Lines Matching defs:params

49 				 struct sys_reg_params *params,
53 	print_sys_reg_instr(params);
59 			       struct sys_reg_params *params,
63 	print_sys_reg_instr(params);
2158 static const struct sys_reg_desc *find_reg(const struct sys_reg_params *params,
2162 	unsigned long pval = reg_to_encoding(params);
2174 			   struct sys_reg_params *params,
2177 	trace_kvm_sys_access(*vcpu_pc(vcpu), params, r);
2193 	if (likely(r->access(vcpu, params, r)))
2201  * @params: pointer to the descriptor of the access
2208 		      struct sys_reg_params *params,
2217 	r = find_reg(params, table, num);
2220 		perform_access(vcpu, params, r);
2229 				struct sys_reg_params *params)
2247 	print_sys_reg_msg(params,
2262 	struct sys_reg_params params;
2267 	params.is_aarch32 = true;
2268 	params.is_32bit = false;
2269 	params.CRm = (esr >> 1) & 0xf;
2270 	params.is_write = ((esr & 1) == 0);
2272 	params.Op0 = 0;
2273 	params.Op1 = (esr >> 16) & 0xf;
2274 	params.Op2 = 0;
2275 	params.CRn = 0;
2281 	if (params.is_write) {
2282 		params.regval = vcpu_get_reg(vcpu, Rt) & 0xffffffff;
2283 		params.regval |= vcpu_get_reg(vcpu, Rt2) << 32;
2291 	if (!emulate_cp(vcpu, &params, global, nr_global)) {
2293 		if (!params.is_write) {
2294 			vcpu_set_reg(vcpu, Rt, lower_32_bits(params.regval));
2295 			vcpu_set_reg(vcpu, Rt2, upper_32_bits(params.regval));
2301 	unhandled_cp_access(vcpu, &params);
2314 	struct sys_reg_params params;
2318 	params.is_aarch32 = true;
2319 	params.is_32bit = true;
2320 	params.CRm = (esr >> 1) & 0xf;
2321 	params.regval = vcpu_get_reg(vcpu, Rt);
2322 	params.is_write = ((esr & 1) == 0);
2323 	params.CRn = (esr >> 10) & 0xf;
2324 	params.Op0 = 0;
2325 	params.Op1 = (esr >> 14) & 0x7;
2326 	params.Op2 = (esr >> 17) & 0x7;
2328 	if (!emulate_cp(vcpu, &params, global, nr_global)) {
2329 		if (!params.is_write)
2330 			vcpu_set_reg(vcpu, Rt, params.regval);
2334 	unhandled_cp_access(vcpu, &params);
2358 static bool is_imp_def_sys_reg(struct sys_reg_params *params)
2361 	return params->Op0 == 3 && (params->CRn & 0b1011) == 0b1011;
2365 			   struct sys_reg_params *params)
2369 	r = find_reg(params, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
2372 		perform_access(vcpu, params, r);
2373 	} else if (is_imp_def_sys_reg(params)) {
2376 		print_sys_reg_msg(params,
2406 	struct sys_reg_params params;
2413 	params.is_aarch32 = false;
2414 	params.is_32bit = false;
2415 	params.Op0 = (esr >> 20) & 3;
2416 	params.Op1 = (esr >> 14) & 0x7;
2417 	params.CRn = (esr >> 10) & 0xf;
2418 	params.CRm = (esr >> 1) & 0xf;
2419 	params.Op2 = (esr >> 17) & 0x7;
2420 	params.regval = vcpu_get_reg(vcpu, Rt);
2421 	params.is_write = !(esr & 1);
2423 	ret = emulate_sys_reg(vcpu, &params);
2425 	if (!params.is_write)
2426 		vcpu_set_reg(vcpu, Rt, params.regval);
2434 static bool index_to_params(u64 id, struct sys_reg_params *params)
2447 		params->Op0 = ((id & KVM_REG_ARM64_SYSREG_OP0_MASK)
2449 		params->Op1 = ((id & KVM_REG_ARM64_SYSREG_OP1_MASK)
2451 		params->CRn = ((id & KVM_REG_ARM64_SYSREG_CRN_MASK)
2453 		params->CRm = ((id & KVM_REG_ARM64_SYSREG_CRM_MASK)
2455 		params->Op2 = ((id & KVM_REG_ARM64_SYSREG_OP2_MASK)
2464 					  struct sys_reg_params *params,
2468 	if (!index_to_params(id, params))
2471 	return find_reg(params, table, num);
2479 	struct sys_reg_params params;
2485 	if (!index_to_params(id, &params))
2488 	r = find_reg(&params, sys_reg_descs, ARRAY_SIZE(sys_reg_descs));
2547 	struct sys_reg_params params;
2550 	r = find_reg_by_id(id, &params, invariant_sys_regs,
2560 	struct sys_reg_params params;
2565 	r = find_reg_by_id(id, &params, invariant_sys_regs,