Lines Matching defs:dmcfreq
351 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
354 unsigned long old_clk_rate = dmcfreq->rate;
368 if (dmcfreq->is_set_rate_direct) {
371 target_rate = clk_round_rate(dmcfreq->dmc_clk, *freq);
376 if (dmcfreq->rate == target_rate) {
377 if (dmcfreq->volt == target_volt)
379 err = regulator_set_voltage(dmcfreq->vdd_center, target_volt,
386 dmcfreq->volt = target_volt;
388 } else if (!dmcfreq->volt) {
389 dmcfreq->volt = regulator_get_voltage(dmcfreq->vdd_center);
417 if (dmcfreq->min_cpu_freq && cpufreq_cur < dmcfreq->min_cpu_freq) {
418 if (policy->max >= dmcfreq->min_cpu_freq) {
419 __cpufreq_driver_target(policy, dmcfreq->min_cpu_freq,
433 err = regulator_set_voltage(dmcfreq->vdd_center, target_volt,
453 if (dmcfreq->set_rate_params) {
454 dmcfreq->set_rate_params->lcdc_type = rk_drm_get_lcdc_type();
455 dmcfreq->set_rate_params->wait_flag1 = 1;
456 dmcfreq->set_rate_params->wait_flag0 = 1;
459 if (dmcfreq->is_set_rate_direct)
462 err = clk_set_rate(dmcfreq->dmc_clk, target_rate);
468 regulator_set_voltage(dmcfreq->vdd_center, dmcfreq->volt,
479 dmcfreq->rate = clk_get_rate(dmcfreq->dmc_clk);
482 if (dmcfreq->rate != target_rate) {
484 target_rate, dmcfreq->rate);
485 regulator_set_voltage(dmcfreq->vdd_center, dmcfreq->volt,
489 err = regulator_set_voltage(dmcfreq->vdd_center, target_volt,
497 if (dmcfreq->info.devfreq) {
498 struct devfreq *devfreq = dmcfreq->info.devfreq;
503 dmcfreq->volt = target_volt;
518 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
522 if (!dmcfreq->info.auto_freq_en)
525 for (i = 0; i < dmcfreq->edev_count; i++) {
526 ret = devfreq_event_get_event(dmcfreq->edev[i], &edata);
529 dmcfreq->edev[i]->desc->name);
532 if (i == dmcfreq->dfi_id) {
536 dmcfreq->nocp_bw[i] = edata.load_count;
546 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
548 *freq = dmcfreq->rate;
1147 static __maybe_unused int rockchip_get_freq_info(struct rockchip_dmcfreq *dmcfreq)
1158 dev_err(dmcfreq->dev, "rockchip_sip_config_dram_get_freq_info error:%lx\n",
1164 dev_err(dmcfreq->dev, "it is no available frequencies!\n");
1169 dmcfreq->freq_info_rate[i] = ddr_psci_param->freq_info_mhz[i] * 1000000;
1170 dmcfreq->freq_count = ddr_psci_param->freq_count;
1173 count = dev_pm_opp_get_opp_count(dmcfreq->dev);
1182 opp = dev_pm_opp_find_freq_ceil(dmcfreq->dev, &rate);
1185 dev_err(dmcfreq->dev, "failed to find OPP for freq %lu.\n", rate);
1192 for (j = 0; j < dmcfreq->freq_count; j++) {
1193 if (rate == dmcfreq->freq_info_rate[j])
1196 if (j == dmcfreq->freq_count)
1197 dev_pm_opp_remove(dmcfreq->dev, rate);
1200 for (i = 0; i < dmcfreq->freq_count; i++) {
1202 if (dmcfreq->freq_info_rate[i] == freq_table[j].freq) {
1204 } else if (dmcfreq->freq_info_rate[i] < freq_table[j].freq) {
1205 dev_pm_opp_add(dmcfreq->dev, dmcfreq->freq_info_rate[i],
1211 dev_err(dmcfreq->dev, "failed to match dmc_opp_table for %ld\n",
1212 dmcfreq->freq_info_rate[i]);
1216 dmcfreq->freq_count = i;
1227 struct rockchip_dmcfreq *dmcfreq)
1286 dmcfreq->set_rate_params = ddr_psci_param;
1287 rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
1298 dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
1304 struct rockchip_dmcfreq *dmcfreq)
1363 dmcfreq->set_rate_params = ddr_psci_param;
1364 rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
1375 dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
1381 struct rockchip_dmcfreq *dmcfreq)
1399 dmcfreq->set_rate_params = ddr_psci_param;
1400 rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
1411 dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
1417 struct rockchip_dmcfreq *dmcfreq)
1436 dmcfreq->set_rate_params = ddr_psci_param;
1437 rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
1448 dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
1454 struct rockchip_dmcfreq *dmcfreq)
1529 dmcfreq->set_rate_params = ddr_psci_param;
1530 rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
1541 dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
1547 struct rockchip_dmcfreq *dmcfreq)
1578 dmcfreq->set_rate_params = ddr_psci_param;
1579 rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
1589 dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
1595 struct rockchip_dmcfreq *dmcfreq)
1655 dmcfreq->set_rate_params =
1657 if (!dmcfreq->set_rate_params)
1659 rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
1669 dmcfreq->set_auto_self_refresh = scpi_ddr_set_auto_self_refresh;
1686 struct rockchip_dmcfreq *dmcfreq)
1716 dmcfreq->set_rate_params =
1718 if (!dmcfreq->set_rate_params)
1720 rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
1726 dmcfreq->info.set_msch_readlatency = rk3399_set_msch_readlatency;
1732 struct rockchip_dmcfreq *dmcfreq)
1791 ret = rockchip_get_freq_info(dmcfreq);
1796 dmcfreq->is_set_rate_direct = true;
1798 dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
1804 struct rockchip_dmcfreq *dmcfreq)
1859 ret = rockchip_get_freq_info(dmcfreq);
1864 dmcfreq->is_set_rate_direct = true;
1866 dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
1872 struct rockchip_dmcfreq *dmcfreq)
1939 dmcfreq->set_rate_params = ddr_psci_param;
1940 rockchip_set_ddrclk_params(dmcfreq->set_rate_params);
1951 dmcfreq->set_auto_self_refresh = rockchip_ddr_set_auto_self_refresh;
2082 struct rockchip_dmcfreq *dmcfreq)
2110 dmcfreq->normal_rate = freq * 1000;
2113 dmcfreq->suspend_rate = freq * 1000;
2116 dmcfreq->video_1080p_rate = freq * 1000;
2119 dmcfreq->video_4k_rate = freq * 1000;
2122 dmcfreq->video_4k_10b_rate = freq * 1000;
2125 dmcfreq->performance_rate = freq * 1000;
2128 dmcfreq->hdmi_rate = freq * 1000;
2131 dmcfreq->idle_rate = freq * 1000;
2134 dmcfreq->reboot_rate = freq * 1000;
2137 dmcfreq->boost_rate = freq * 1000;
2144 if (dmcfreq->fixed_rate < temp_rate)
2145 dmcfreq->fixed_rate = temp_rate;
2148 dmcfreq->low_power_rate = freq * 1000;
2158 static unsigned long rockchip_freq_level_2_rate(struct rockchip_dmcfreq *dmcfreq,
2165 rate = dmcfreq->rate_low;
2168 rate = dmcfreq->rate_mid_low;
2171 rate = dmcfreq->rate_mid_high;
2174 rate = dmcfreq->rate_high;
2185 struct rockchip_dmcfreq *dmcfreq)
2206 if (dmcfreq->freq_count == 1) {
2207 dmcfreq->rate_low = dmcfreq->freq_info_rate[0];
2208 dmcfreq->rate_mid_low = dmcfreq->freq_info_rate[0];
2209 dmcfreq->rate_mid_high = dmcfreq->freq_info_rate[0];
2210 dmcfreq->rate_high = dmcfreq->freq_info_rate[0];
2211 } else if (dmcfreq->freq_count == 2) {
2212 dmcfreq->rate_low = dmcfreq->freq_info_rate[0];
2213 dmcfreq->rate_mid_low = dmcfreq->freq_info_rate[0];
2214 dmcfreq->rate_mid_high = dmcfreq->freq_info_rate[1];
2215 dmcfreq->rate_high = dmcfreq->freq_info_rate[1];
2216 } else if (dmcfreq->freq_count == 3) {
2217 dmcfreq->rate_low = dmcfreq->freq_info_rate[0];
2218 dmcfreq->rate_mid_low = dmcfreq->freq_info_rate[1];
2219 dmcfreq->rate_mid_high = dmcfreq->freq_info_rate[1];
2220 dmcfreq->rate_high = dmcfreq->freq_info_rate[2];
2221 } else if (dmcfreq->freq_count == 4) {
2222 dmcfreq->rate_low = dmcfreq->freq_info_rate[0];
2223 dmcfreq->rate_mid_low = dmcfreq->freq_info_rate[1];
2224 dmcfreq->rate_mid_high = dmcfreq->freq_info_rate[2];
2225 dmcfreq->rate_high = dmcfreq->freq_info_rate[3];
2226 } else if (dmcfreq->freq_count == 5 || dmcfreq->freq_count == 6) {
2227 dmcfreq->rate_low = dmcfreq->freq_info_rate[0];
2228 dmcfreq->rate_mid_low = dmcfreq->freq_info_rate[1];
2229 dmcfreq->rate_mid_high = dmcfreq->freq_info_rate[dmcfreq->freq_count - 2];
2230 dmcfreq->rate_high = dmcfreq->freq_info_rate[dmcfreq->freq_count - 1];
2235 dmcfreq->auto_min_rate = dmcfreq->rate_low;
2244 dmcfreq->normal_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2245 dev_info(dmcfreq->dev, "normal_rate = %ld\n", dmcfreq->normal_rate);
2248 dmcfreq->suspend_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2249 dev_info(dmcfreq->dev, "suspend_rate = %ld\n", dmcfreq->suspend_rate);
2252 dmcfreq->video_1080p_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2253 dev_info(dmcfreq->dev, "video_1080p_rate = %ld\n",
2254 dmcfreq->video_1080p_rate);
2257 dmcfreq->video_4k_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2258 dev_info(dmcfreq->dev, "video_4k_rate = %ld\n", dmcfreq->video_4k_rate);
2261 dmcfreq->video_4k_10b_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2262 dev_info(dmcfreq->dev, "video_4k_10b_rate = %ld\n",
2263 dmcfreq->video_4k_10b_rate);
2266 dmcfreq->performance_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2267 dev_info(dmcfreq->dev, "performance_rate = %ld\n",
2268 dmcfreq->performance_rate);
2271 dmcfreq->hdmi_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2272 dev_info(dmcfreq->dev, "hdmi_rate = %ld\n", dmcfreq->hdmi_rate);
2275 dmcfreq->idle_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2276 dev_info(dmcfreq->dev, "idle_rate = %ld\n", dmcfreq->idle_rate);
2279 dmcfreq->reboot_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2280 dev_info(dmcfreq->dev, "reboot_rate = %ld\n", dmcfreq->reboot_rate);
2283 dmcfreq->boost_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2284 dev_info(dmcfreq->dev, "boost_rate = %ld\n", dmcfreq->boost_rate);
2290 temp_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2291 if (dmcfreq->fixed_rate < temp_rate) {
2292 dmcfreq->fixed_rate = temp_rate;
2293 dev_info(dmcfreq->dev,
2295 dmcfreq->fixed_rate);
2299 dmcfreq->low_power_rate = rockchip_freq_level_2_rate(dmcfreq, level);
2300 dev_info(dmcfreq->dev, "low_power_rate = %ld\n", dmcfreq->low_power_rate);
2310 static void rockchip_dmcfreq_update_target(struct rockchip_dmcfreq *dmcfreq)
2312 struct devfreq *devfreq = dmcfreq->info.devfreq;
2323 struct rockchip_dmcfreq *dmcfreq = system_status_to_dmcfreq(nb);
2328 if (dmcfreq->fixed_rate && (is_dualview(status) || is_isp(status))) {
2329 if (dmcfreq->is_fixed)
2332 target_rate = dmcfreq->fixed_rate;
2336 if (dmcfreq->reboot_rate && (status & SYS_STATUS_REBOOT)) {
2337 if (dmcfreq->info.auto_freq_en)
2338 devfreq_monitor_stop(dmcfreq->info.devfreq);
2339 target_rate = dmcfreq->reboot_rate;
2343 if (dmcfreq->suspend_rate && (status & SYS_STATUS_SUSPEND)) {
2344 target_rate = dmcfreq->suspend_rate;
2349 if (dmcfreq->low_power_rate && (status & SYS_STATUS_LOW_POWER)) {
2350 target_rate = dmcfreq->low_power_rate;
2354 if (dmcfreq->performance_rate && (status & SYS_STATUS_PERFORMANCE)) {
2355 if (dmcfreq->performance_rate > target_rate)
2356 target_rate = dmcfreq->performance_rate;
2359 if (dmcfreq->hdmi_rate && (status & SYS_STATUS_HDMI)) {
2360 if (dmcfreq->hdmi_rate > target_rate)
2361 target_rate = dmcfreq->hdmi_rate;
2364 if (dmcfreq->video_4k_rate && (status & SYS_STATUS_VIDEO_4K)) {
2365 if (dmcfreq->video_4k_rate > target_rate)
2366 target_rate = dmcfreq->video_4k_rate;
2369 if (dmcfreq->video_4k_10b_rate && (status & SYS_STATUS_VIDEO_4K_10B)) {
2370 if (dmcfreq->video_4k_10b_rate > target_rate)
2371 target_rate = dmcfreq->video_4k_10b_rate;
2374 if (dmcfreq->video_1080p_rate && (status & SYS_STATUS_VIDEO_1080P)) {
2375 if (dmcfreq->video_1080p_rate > target_rate)
2376 target_rate = dmcfreq->video_1080p_rate;
2381 dev_dbg(dmcfreq->dev, "status=0x%x\n", (unsigned int)status);
2382 dmcfreq->is_fixed = is_fixed;
2383 dmcfreq->status_rate = target_rate;
2384 if (dmcfreq->refresh != refresh) {
2385 if (dmcfreq->set_auto_self_refresh)
2386 dmcfreq->set_auto_self_refresh(refresh);
2387 dmcfreq->refresh = refresh;
2389 rockchip_dmcfreq_update_target(dmcfreq);
2423 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev->parent);
2424 struct rockchip_dmcfreq_ondemand_data *data = &dmcfreq->ondemand_data;
2434 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev->parent);
2435 struct rockchip_dmcfreq_ondemand_data *data = &dmcfreq->ondemand_data;
2452 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev->parent);
2453 struct rockchip_dmcfreq_ondemand_data *data = &dmcfreq->ondemand_data;
2463 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev->parent);
2464 struct rockchip_dmcfreq_ondemand_data *data = &dmcfreq->ondemand_data;
2477 static unsigned long get_nocp_req_rate(struct rockchip_dmcfreq *dmcfreq)
2482 if (!dmcfreq->cpu_bw_tbl || dmcfreq->nocp_cpu_id < 0)
2485 cpu_bw = dmcfreq->nocp_bw[dmcfreq->nocp_cpu_id];
2487 for (i = 0; dmcfreq->cpu_bw_tbl[i].freq != CPUFREQ_TABLE_END; i++) {
2488 if (cpu_bw >= dmcfreq->cpu_bw_tbl[i].min)
2489 target = dmcfreq->cpu_bw_tbl[i].freq;
2502 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(df->dev.parent);
2503 struct rockchip_dmcfreq_ondemand_data *data = &dmcfreq->ondemand_data;
2509 if (dmcfreq->info.auto_freq_en && !dmcfreq->is_fixed) {
2510 if (dmcfreq->status_rate)
2511 target_freq = dmcfreq->status_rate;
2512 else if (dmcfreq->auto_min_rate)
2513 target_freq = dmcfreq->auto_min_rate;
2514 nocp_req_rate = get_nocp_req_rate(dmcfreq);
2516 dmcfreq->info.vop_req_rate);
2518 if (now < dmcfreq->touchboostpulse_endtime)
2519 target_freq = max(target_freq, dmcfreq->boost_rate);
2521 if (dmcfreq->status_rate)
2522 target_freq = dmcfreq->status_rate;
2523 else if (dmcfreq->normal_rate)
2524 target_freq = dmcfreq->normal_rate;
2527 if (dmcfreq->info.auto_freq_en && !devfreq_update_stats(df))
2596 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(devfreq->dev.parent);
2598 if (!dmcfreq->info.auto_freq_en)
2635 static int rockchip_dmcfreq_enable_event(struct rockchip_dmcfreq *dmcfreq)
2639 if (!dmcfreq->info.auto_freq_en)
2642 for (i = 0; i < dmcfreq->edev_count; i++) {
2643 ret = devfreq_event_enable_edev(dmcfreq->edev[i]);
2645 dev_err(dmcfreq->dev,
2654 static int rockchip_dmcfreq_disable_event(struct rockchip_dmcfreq *dmcfreq)
2658 if (!dmcfreq->info.auto_freq_en)
2661 for (i = 0; i < dmcfreq->edev_count; i++) {
2662 ret = devfreq_event_disable_edev(dmcfreq->edev[i]);
2664 dev_err(dmcfreq->dev,
2673 static int rockchip_get_edev_id(struct rockchip_dmcfreq *dmcfreq,
2679 for (i = 0; i < dmcfreq->edev_count; i++) {
2680 edev = dmcfreq->edev[i];
2688 static int rockchip_dmcfreq_get_event(struct rockchip_dmcfreq *dmcfreq)
2690 struct device *dev = dmcfreq->dev;
2711 dmcfreq->edev_count = available_count;
2712 dmcfreq->edev = devm_kzalloc(dev,
2713 sizeof(*dmcfreq->edev) * available_count,
2715 if (!dmcfreq->edev)
2728 dmcfreq->edev[j] =
2730 if (IS_ERR(dmcfreq->edev[j]))
2737 dmcfreq->info.auto_freq_en = true;
2738 dmcfreq->dfi_id = rockchip_get_edev_id(dmcfreq, "dfi");
2739 dmcfreq->nocp_cpu_id = rockchip_get_edev_id(dmcfreq, "nocp-cpu");
2740 dmcfreq->nocp_bw =
2741 devm_kzalloc(dev, sizeof(*dmcfreq->nocp_bw) * available_count,
2743 if (!dmcfreq->nocp_bw)
2749 static int rockchip_dmcfreq_power_control(struct rockchip_dmcfreq *dmcfreq)
2751 struct device *dev = dmcfreq->dev;
2753 dmcfreq->vdd_center = devm_regulator_get_optional(dev, "center");
2754 if (IS_ERR(dmcfreq->vdd_center)) {
2756 return PTR_ERR(dmcfreq->vdd_center);
2759 dmcfreq->dmc_clk = devm_clk_get(dev, "dmc_clk");
2760 if (IS_ERR(dmcfreq->dmc_clk)) {
2762 return PTR_ERR(dmcfreq->dmc_clk);
2764 dmcfreq->rate = clk_get_rate(dmcfreq->dmc_clk);
2770 struct rockchip_dmcfreq *dmcfreq)
2781 ret = init(pdev, dmcfreq);
2790 static void rockchip_dmcfreq_parse_dt(struct rockchip_dmcfreq *dmcfreq)
2792 struct device *dev = dmcfreq->dev;
2795 if (!rockchip_get_system_status_rate(np, "system-status-freq", dmcfreq))
2796 dmcfreq->system_status_en = true;
2797 else if (!rockchip_get_system_status_level(np, "system-status-level", dmcfreq))
2798 dmcfreq->system_status_en = true;
2800 of_property_read_u32(np, "min-cpu-freq", &dmcfreq->min_cpu_freq);
2803 &dmcfreq->ondemand_data.upthreshold);
2805 &dmcfreq->ondemand_data.downdifferential);
2806 if (dmcfreq->info.auto_freq_en)
2808 &dmcfreq->info.auto_freq_en);
2809 if (!dmcfreq->auto_min_rate) {
2811 (u32 *)&dmcfreq->auto_min_rate);
2812 dmcfreq->auto_min_rate *= 1000;
2816 &dmcfreq->cpu_bw_tbl))
2819 &dmcfreq->info.vop_frame_bw_tbl))
2822 &dmcfreq->info.vop_bw_tbl))
2825 &dmcfreq->info.vop_pn_rl_tbl))
2829 (u32 *)&dmcfreq->touchboostpulse_duration_val);
2830 if (dmcfreq->touchboostpulse_duration_val)
2831 dmcfreq->touchboostpulse_duration_val *= USEC_PER_MSEC;
2833 dmcfreq->touchboostpulse_duration_val = 500 * USEC_PER_MSEC;
2836 static int rockchip_dmcfreq_set_volt_only(struct rockchip_dmcfreq *dmcfreq)
2838 struct device *dev = dmcfreq->dev;
2840 unsigned long opp_volt, opp_rate = dmcfreq->rate;
2851 ret = regulator_set_voltage(dmcfreq->vdd_center, opp_volt, INT_MAX);
2860 static int rockchip_dmcfreq_add_devfreq(struct rockchip_dmcfreq *dmcfreq)
2863 struct device *dev = dmcfreq->dev;
2866 unsigned long opp_rate = dmcfreq->rate;
2875 devp->initial_freq = dmcfreq->rate;
2877 &dmcfreq->ondemand_data);
2889 dmcfreq->info.devfreq = devfreq;
2900 static void rockchip_dmcfreq_register_notifier(struct rockchip_dmcfreq *dmcfreq)
2905 dev_err(dmcfreq->dev, "fail to register notify to vop.\n");
2907 dmcfreq->status_nb.notifier_call =
2909 ret = rockchip_register_system_status_notifier(&dmcfreq->status_nb);
2911 dev_err(dmcfreq->dev, "failed to register system_status nb\n");
2913 dmc_mdevp.data = dmcfreq->info.devfreq;
2914 dmcfreq->mdev_info = rockchip_system_monitor_register(dmcfreq->dev,
2916 if (IS_ERR(dmcfreq->mdev_info)) {
2917 dev_dbg(dmcfreq->dev, "without without system monitor\n");
2918 dmcfreq->mdev_info = NULL;
2922 static void rockchip_dmcfreq_add_interface(struct rockchip_dmcfreq *dmcfreq)
2924 struct devfreq *devfreq = dmcfreq->info.devfreq;
2927 dev_err(dmcfreq->dev,
2931 dev_err(dmcfreq->dev,
2938 dev_err(dmcfreq->dev,
2944 struct rockchip_dmcfreq *dmcfreq = boost_to_dmcfreq(work);
2946 rockchip_dmcfreq_update_target(dmcfreq);
2954 struct rockchip_dmcfreq *dmcfreq = handle->private;
2961 endtime = now + dmcfreq->touchboostpulse_duration_val;
2962 if (endtime < (dmcfreq->touchboostpulse_endtime + 10 * USEC_PER_MSEC))
2964 dmcfreq->touchboostpulse_endtime = endtime;
2966 schedule_work(&dmcfreq->boost_work);
2975 struct rockchip_dmcfreq *dmcfreq = input_hd_to_dmcfreq(handler);
2983 handle->name = "dmcfreq";
2984 handle->private = dmcfreq;
3032 static void rockchip_dmcfreq_boost_init(struct rockchip_dmcfreq *dmcfreq)
3034 if (!dmcfreq->boost_rate)
3036 INIT_WORK(&dmcfreq->boost_work, rockchip_dmcfreq_boost_work);
3037 dmcfreq->input_handler.event = rockchip_dmcfreq_input_event;
3038 dmcfreq->input_handler.connect = rockchip_dmcfreq_input_connect;
3039 dmcfreq->input_handler.disconnect = rockchip_dmcfreq_input_disconnect;
3040 dmcfreq->input_handler.name = "dmcfreq";
3041 dmcfreq->input_handler.id_table = rockchip_dmcfreq_input_ids;
3042 if (input_register_handler(&dmcfreq->input_handler))
3043 dev_err(dmcfreq->dev, "failed to register input handler\n");
3050 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
3057 if (!IS_ERR_OR_NULL(dmcfreq->ddr_tz) && dmcfreq->ddr_tz->ops->get_temp) {
3061 dmcfreq->ddr_tz->ops->get_temp(dmcfreq->ddr_tz,
3080 temp_scaling_factor = (dmcfreq->ts[3] * temp_cubed)
3081 + (dmcfreq->ts[2] * temp_squared)
3082 + (dmcfreq->ts[1] * temp)
3083 + dmcfreq->ts[0];
3085 return (((dmcfreq->static_coefficient * voltage_cubed) >> 20)
3094 static int ddr_power_model_simple_init(struct rockchip_dmcfreq *dmcfreq)
3100 power_model_node = of_get_child_by_name(dmcfreq->dev->of_node,
3103 dev_err(dmcfreq->dev, "could not find power_model node\n");
3108 dev_err(dmcfreq->dev, "ts in power_model not available\n");
3112 dmcfreq->ddr_tz = thermal_zone_get_zone_by_name(tz_name);
3113 if (IS_ERR(dmcfreq->ddr_tz)) {
3116 PTR_ERR(dmcfreq->ddr_tz));
3117 dmcfreq->ddr_tz = NULL;
3123 &dmcfreq->static_coefficient)) {
3124 dev_err(dmcfreq->dev,
3130 dev_err(dmcfreq->dev,
3137 (power_model_node, "ts", (u32 *)dmcfreq->ts, 4)) {
3138 dev_err(dmcfreq->dev, "ts in power_model not available\n");
3146 rockchip_dmcfreq_register_cooling_device(struct rockchip_dmcfreq *dmcfreq)
3150 ret = ddr_power_model_simple_init(dmcfreq);
3153 dmcfreq->devfreq_cooling =
3154 of_devfreq_cooling_register_power(dmcfreq->dev->of_node,
3155 dmcfreq->info.devfreq,
3157 if (IS_ERR(dmcfreq->devfreq_cooling)) {
3158 ret = PTR_ERR(dmcfreq->devfreq_cooling);
3159 dev_err(dmcfreq->dev,
3230 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
3233 if (!dmcfreq)
3236 ret = rockchip_dmcfreq_disable_event(dmcfreq);
3240 ret = devfreq_suspend_device(dmcfreq->info.devfreq);
3251 struct rockchip_dmcfreq *dmcfreq = dev_get_drvdata(dev);
3254 if (!dmcfreq)
3257 ret = rockchip_dmcfreq_enable_event(dmcfreq);
3261 ret = devfreq_resume_device(dmcfreq->info.devfreq);
3282 MODULE_DESCRIPTION("rockchip dmcfreq driver with devfreq framework");