Lines Matching refs:priv
64 int (*phy_init)(struct rockchip_p3phy_priv *priv);
69 struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
74 priv->mode = PHY_MODE_PCIE_RC;
77 priv->mode = PHY_MODE_PCIE_EP;
80 priv->is_bifurcation = true;
90 static int rockchip_p3phy_rk3568_init(struct rockchip_p3phy_priv *priv)
96 regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, (0x1 << DEBUGER_INDEX_FIF) | (0x1 << DEBUGER_INDEX_THIO));
98 if (priv->is_bifurcation) {
99 regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6, 0x1 | (0xf << DEBUGER_INDEX_SIX));
100 regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON1, (0x1 << DEBUGER_INDEX_FIF) | (0x1 << DEBUGER_INDEX_THIO));
103 reset_control_deassert(priv->p30phy);
105 ret = regmap_read_poll_timeout(priv->phy_grf, GRF_PCIE30PHY_STATUS0, reg, SRAM_INIT_DONE(reg), 0, SRAM_NODE_VALUE);
116 static int rockchip_p3phy_rk3588_init(struct rockchip_p3phy_priv *priv)
122 regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, (0x1 << DEBUGER_INDEX_EI) | (0x1 << DEBUGER_INDEX_TWEF));
124 reset_control_deassert(priv->p30phy);
126 ret = regmap_read_poll_timeout(priv->phy_grf, RK3588_PCIE3PHY_GRF_PHY0_STATUS1, reg, RK3588_SRAM_INIT_DONE(reg), 0,
128 ret |= regmap_read_poll_timeout(priv->phy_grf, RK3588_PCIE3PHY_GRF_PHY1_STATUS1, reg, RK3588_SRAM_INIT_DONE(reg), 0,
142 struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
145 ret = clk_bulk_prepare_enable(priv->num_clks, priv->clks);
151 reset_control_assert(priv->p30phy);
154 if (priv->ops->phy_init) {
155 ret = priv->ops->phy_init(priv);
157 clk_bulk_disable_unprepare(priv->num_clks, priv->clks);
166 struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
167 clk_bulk_disable_unprepare(priv->num_clks, priv->clks);
168 reset_control_assert(priv->p30phy);
183 struct rockchip_p3phy_priv *priv;
189 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
190 if (!priv) {
195 priv->mmio = devm_ioremap_resource(dev, res);
196 if (IS_ERR(priv->mmio)) {
197 ret = PTR_ERR(priv->mmio);
201 priv->ops = of_device_get_match_data(&pdev->dev);
202 if (!priv->ops) {
207 priv->phy_grf = syscon_regmap_lookup_by_phandle(np, "rockchip,phy-grf");
208 if (IS_ERR(priv->phy_grf)) {
210 return PTR_ERR(priv->phy_grf);
213 priv->pipe_grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,pipe-grf");
214 if (IS_ERR(priv->pipe_grf)) {
220 priv->pcie30_phymode = val;
222 priv->pcie30_phymode = PHY_MODE_PCIE_AGGREGATION;
226 if (priv->pcie30_phymode > DEBUGER_INDEX_FO) {
227 priv->pcie30_phymode = PHY_MODE_PCIE_AGGREGATION;
230 regmap_write(priv->phy_grf, RK3588_PCIE3PHY_GRF_CMN_CON0, (0x7 << DEBUGER_INDEX_SIX) | priv->pcie30_phymode);
233 if (!IS_ERR(priv->pipe_grf)) {
234 reg = priv->pcie30_phymode & DEBUGER_INDEX_TH;
236 regmap_write(priv->pipe_grf, PHP_GRF_PCIESEL_CON, (reg << DEBUGER_INDEX_SIX) | reg);
240 priv->phy = devm_phy_create(dev, NULL, &rochchip_p3phy_ops);
241 if (IS_ERR(priv->phy)) {
243 return PTR_ERR(priv->phy);
246 priv->p30phy = devm_reset_control_get(dev, "phy");
247 if (IS_ERR(priv->p30phy)) {
249 priv->p30phy = NULL;
252 priv->num_clks = devm_clk_bulk_get_all(dev, &priv->clks);
253 if (priv->num_clks < 1) {
257 dev_set_drvdata(dev, priv);
258 phy_set_drvdata(priv->phy, priv);