Lines Matching refs:phy
3 * Rockchip PCIE3.0 phy driver
16 #include <linux/phy/pcie.h>
17 #include <linux/phy/phy.h>
20 #include <dt-bindings/phy/phy-snps-pcie3.h>
57 struct phy *phy;
67 static int rockchip_p3phy_set_mode(struct phy *phy, enum phy_mode mode, int submode)
69 struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
140 static int rochchip_p3phy_init(struct phy *phy)
142 struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
164 static int rochchip_p3phy_exit(struct phy *phy)
166 struct rockchip_p3phy_priv *priv = phy_get_drvdata(phy);
207 priv->phy_grf = syscon_regmap_lookup_by_phandle(np, "rockchip,phy-grf");
240 priv->phy = devm_phy_create(dev, NULL, &rochchip_p3phy_ops);
241 if (IS_ERR(priv->phy)) {
243 return PTR_ERR(priv->phy);
246 priv->p30phy = devm_reset_control_get(dev, "phy");
248 dev_warn(dev, "no phy reset control specified\n");
258 phy_set_drvdata(priv->phy, priv);
264 {.compatible = "rockchip,rk3568-pcie3-phy", .data = &rk3568_ops},
265 {.compatible = "rockchip,rk3588-pcie3-phy", .data = &rk3588_ops},
274 .name = "rockchip-snps-pcie3-phy",