tests - OpenGrok history log for /third_party/mesa3d/src/intel/tools/tests

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bf215546	14-Sep-2024	openharmony_ci <120357966@qq.com>	!30 pkg-config 引用库路径修改需同步 Merge pull request !30 from 李西腾/master gen11/cr0.asm gen11/cr0.expected gen11/rol.asm gen11/rol.expected gen11/ror.asm gen11/ror.expected gen4.5/add.asm gen4.5/add.expected gen4.5/and.asm gen4.5/and.expected gen4.5/asr.asm gen4.5/asr.expected gen4.5/break.asm gen4.5/break.expected gen4.5/cmp.asm gen4.5/cmp.expected gen4.5/cont.asm gen4.5/cont.expected gen4.5/do.asm gen4.5/do.expected gen4.5/dp2.asm gen4.5/dp2.expected gen4.5/dp3.asm gen4.5/dp3.expected gen4.5/dp4.asm gen4.5/dp4.expected gen4.5/dph.asm gen4.5/dph.expected gen4.5/else.asm gen4.5/else.expected gen4.5/endif.asm gen4.5/endif.expected gen4.5/frc.asm gen4.5/frc.expected gen4.5/if.asm gen4.5/if.expected gen4.5/iff.asm gen4.5/iff.expected gen4.5/jmpi.asm gen4.5/jmpi.expected gen4.5/mach.asm gen4.5/mach.expected gen4.5/mov.asm gen4.5/mov.expected gen4.5/mul.asm gen4.5/mul.expected gen4.5/not.asm gen4.5/not.expected gen4.5/or.asm gen4.5/or.expected gen4.5/pln.asm gen4.5/pln.expected gen4.5/rndd.asm gen4.5/rndd.expected gen4.5/sel.asm gen4.5/sel.expected gen4.5/send.asm gen4.5/send.expected gen4.5/shl.asm gen4.5/shl.expected gen4.5/shr.asm gen4.5/shr.expected gen4.5/while.asm gen4.5/while.expected gen4.5/xor.asm gen4.5/xor.expected gen4/add.asm gen4/add.expected gen4/and.asm gen4/and.expected gen4/asr.asm gen4/asr.expected gen4/break.asm gen4/break.expected gen4/cmp.asm gen4/cmp.expected gen4/cont.asm gen4/cont.expected gen4/do.asm gen4/do.expected gen4/dp2.asm gen4/dp2.expected gen4/dp3.asm gen4/dp3.expected gen4/dp4.asm gen4/dp4.expected gen4/dph.asm gen4/dph.expected gen4/else.asm gen4/else.expected gen4/endif.asm gen4/endif.expected gen4/frc.asm gen4/frc.expected gen4/if.asm gen4/if.expected gen4/iff.asm gen4/iff.expected gen4/jmpi.asm gen4/jmpi.expected gen4/line.asm gen4/line.expected gen4/mac.asm gen4/mac.expected gen4/mach.asm gen4/mach.expected gen4/mov.asm gen4/mov.expected gen4/mul.asm gen4/mul.expected gen4/not.asm gen4/not.expected gen4/or.asm gen4/or.expected gen4/rndd.asm gen4/rndd.expected gen4/sel.asm gen4/sel.expected gen4/send.asm gen4/send.expected gen4/shl.asm gen4/shl.expected gen4/shr.asm gen4/shr.expected gen4/while.asm gen4/while.expected gen4/xor.asm gen4/xor.expected gen5/add.asm gen5/add.expected gen5/and.asm gen5/and.expected gen5/asr.asm gen5/asr.expected gen5/break.asm gen5/break.expected gen5/cmp.asm gen5/cmp.expected gen5/do.asm gen5/do.expected gen5/dp3.asm gen5/dp3.expected gen5/dp4.asm gen5/dp4.expected gen5/dph.asm gen5/dph.expected gen5/else.asm gen5/else.expected gen5/endif.asm gen5/endif.expected gen5/frc.asm gen5/frc.expected gen5/if.asm gen5/if.expected gen5/iff.asm gen5/iff.expected gen5/jmpi.asm gen5/jmpi.expected gen5/mach.asm gen5/mach.expected gen5/mov.asm gen5/mov.expected gen5/mul.asm gen5/mul.expected gen5/not.asm gen5/not.expected gen5/or.asm gen5/or.expected gen5/pln.asm gen5/pln.expected gen5/rndd.asm gen5/rndd.expected gen5/sel.asm gen5/sel.expected gen5/send.asm gen5/send.expected gen5/shl.asm gen5/shl.expected gen5/shr.asm gen5/shr.expected gen5/while.asm gen5/while.expected gen6/add.asm gen6/add.expected gen6/and.asm gen6/and.expected gen6/asr.asm gen6/asr.expected gen6/break.asm gen6/break.expected gen6/cmp.asm gen6/cmp.expected gen6/cont.asm gen6/cont.expected gen6/dp2.asm gen6/dp2.expected gen6/dp3.asm gen6/dp3.expected gen6/dp4.asm gen6/dp4.expected gen6/dph.asm gen6/dph.expected gen6/else.asm gen6/else.expected gen6/endif.asm gen6/endif.expected gen6/frc.asm gen6/frc.expected gen6/halt.asm gen6/halt.expected gen6/if.asm gen6/if.expected gen6/lrp.asm gen6/lrp.expected gen6/lzd.asm gen6/lzd.expected gen6/mach.asm gen6/mach.expected gen6/mad.asm gen6/mad.expected gen6/math.asm gen6/math.expected gen6/mov.asm gen6/mov.expected gen6/mul.asm gen6/mul.expected gen6/not.asm gen6/not.expected gen6/or.asm gen6/or.expected gen6/pln.asm gen6/pln.expected gen6/rndd.asm gen6/rndd.expected gen6/rnde.asm gen6/rnde.expected gen6/rndz.asm gen6/rndz.expected gen6/sel.asm gen6/sel.expected gen6/send.asm gen6/send.expected gen6/sendc.asm gen6/sendc.expected gen6/shl.asm gen6/shl.expected gen6/shr.asm gen6/shr.expected gen6/while.asm gen6/while.expected gen6/xor.asm gen6/xor.expected gen7.5/add.asm gen7.5/add.expected gen7.5/and.asm gen7.5/and.expected gen7.5/asr.asm gen7.5/asr.expected gen7.5/bfe.asm gen7.5/bfe.expected gen7.5/bfi1.asm gen7.5/bfi1.expected gen7.5/bfi2.asm gen7.5/bfi2.expected gen7.5/bfrev.asm gen7.5/bfrev.expected gen7.5/break.asm gen7.5/break.expected gen7.5/cbit.asm gen7.5/cbit.expected gen7.5/cmp.asm gen7.5/cmp.expected gen7.5/cont.asm gen7.5/cont.expected gen7.5/dim.asm gen7.5/dim.expected gen7.5/dp2.asm gen7.5/dp2.expected gen7.5/dp3.asm gen7.5/dp3.expected gen7.5/dp4.asm gen7.5/dp4.expected gen7.5/dph.asm gen7.5/dph.expected gen7.5/else.asm gen7.5/else.expected gen7.5/endif.asm gen7.5/endif.expected gen7.5/f16to32.asm gen7.5/f16to32.expected gen7.5/f32to16.asm gen7.5/f32to16.expected gen7.5/fbh.asm gen7.5/fbh.expected gen7.5/fbl.asm gen7.5/fbl.expected gen7.5/frc.asm gen7.5/frc.expected gen7.5/halt.asm gen7.5/halt.expected gen7.5/if.asm gen7.5/if.expected gen7.5/lrp.asm gen7.5/lrp.expected gen7.5/lzd.asm gen7.5/lzd.expected gen7.5/mach.asm gen7.5/mach.expected gen7.5/mad.asm gen7.5/mad.expected gen7.5/math.asm gen7.5/math.expected gen7.5/mov.asm gen7.5/mov.expected gen7.5/mul.asm gen7.5/mul.expected gen7.5/not.asm gen7.5/not.expected gen7.5/or.asm gen7.5/or.expected gen7.5/pln.asm gen7.5/pln.expected gen7.5/rndd.asm gen7.5/rndd.expected gen7.5/rnde.asm gen7.5/rnde.expected gen7.5/rndz.asm gen7.5/rndz.expected gen7.5/sel.asm gen7.5/sel.expected gen7.5/send.asm gen7.5/send.expected gen7.5/sendc.asm gen7.5/sendc.expected gen7.5/shl.asm gen7.5/shl.expected gen7.5/shr.asm gen7.5/shr.expected gen7.5/wait.asm gen7.5/wait.expected gen7.5/while.asm gen7.5/while.expected gen7.5/xor.asm gen7.5/xor.expected gen7/add.asm gen7/add.expected gen7/and.asm gen7/and.expected gen7/asr.asm gen7/asr.expected gen7/bfe.asm gen7/bfe.expected gen7/bfi1.asm gen7/bfi1.expected gen7/bfi2.asm gen7/bfi2.expected gen7/bfrev.asm gen7/bfrev.expected gen7/break.asm gen7/break.expected gen7/cbit.asm gen7/cbit.expected gen7/cmp.asm gen7/cmp.expected gen7/dp2.asm gen7/dp2.expected gen7/dp3.asm gen7/dp3.expected gen7/dp4.asm gen7/dp4.expected gen7/dph.asm gen7/dph.expected gen7/else.asm gen7/else.expected gen7/endif.asm gen7/endif.expected gen7/f16to32.asm gen7/f16to32.expected gen7/f32to16.asm gen7/f32to16.expected gen7/fbh.asm gen7/fbh.expected gen7/fbl.asm gen7/fbl.expected gen7/frc.asm gen7/frc.expected gen7/halt.asm gen7/halt.expected gen7/if.asm gen7/if.expected gen7/lrp.asm gen7/lrp.expected gen7/lzd.asm gen7/lzd.expected gen7/mach.asm gen7/mach.expected gen7/mad.asm gen7/mad.expected gen7/math.asm gen7/math.expected gen7/mov.asm gen7/mov.expected gen7/mul.asm gen7/mul.expected gen7/not.asm gen7/not.expected gen7/or.asm gen7/or.expected gen7/pln.asm gen7/pln.expected gen7/rndd.asm gen7/rndd.expected gen7/rnde.asm gen7/rnde.expected gen7/rndz.asm gen7/rndz.expected gen7/sel.asm gen7/sel.expected gen7/send.asm gen7/send.expected gen7/sendc.asm gen7/sendc.expected gen7/shl.asm gen7/shl.expected gen7/shr.asm gen7/shr.expected gen7/wait.asm gen7/wait.expected gen7/while.asm gen7/while.expected gen7/xor.asm gen7/xor.expected gen8/add.asm gen8/add.expected gen8/and.asm gen8/and.expected gen8/asr.asm gen8/asr.expected gen8/bfe.asm gen8/bfe.expected gen8/bfi1.asm gen8/bfi1.expected gen8/bfi2.asm gen8/bfi2.expected gen8/bfrev.asm gen8/bfrev.expected gen8/break.asm gen8/break.expected gen8/cbit.asm gen8/cbit.expected gen8/cmp.asm gen8/cmp.expected gen8/cont.asm gen8/cont.expected gen8/cr0.asm gen8/cr0.expected gen8/csel.asm gen8/csel.expected gen8/else.asm gen8/else.expected gen8/endif.asm gen8/endif.expected gen8/fbh.asm gen8/fbh.expected gen8/fbl.asm gen8/fbl.expected gen8/frc.asm gen8/frc.expected gen8/halt.asm gen8/halt.expected gen8/if.asm gen8/if.expected gen8/lrp.asm gen8/lrp.expected gen8/lzd.asm gen8/lzd.expected gen8/mach.asm gen8/mach.expected gen8/mad.asm gen8/mad.expected gen8/math.asm gen8/math.expected gen8/mov.asm gen8/mov.expected gen8/mul.asm gen8/mul.expected gen8/nop.asm gen8/nop.expected gen8/not.asm gen8/not.expected gen8/or.asm gen8/or.expected gen8/pln.asm gen8/pln.expected gen8/rndd.asm gen8/rndd.expected gen8/rnde.asm gen8/rnde.expected gen8/rndz.asm gen8/rndz.expected gen8/sel.asm gen8/sel.expected gen8/send.asm gen8/send.expected gen8/sendc.asm gen8/sendc.expected gen8/shl.asm gen8/shl.expected gen8/shr.asm gen8/shr.expected gen8/wait.asm gen8/wait.expected gen8/while.asm gen8/while.expected gen8/xor.asm gen8/xor.expected gen9/add.asm gen9/add.expected gen9/and.asm gen9/and.expected gen9/asr.asm gen9/asr.expected gen9/bfe.asm gen9/bfe.expected gen9/bfi1.asm gen9/bfi1.expected gen9/bfi2.asm gen9/bfi2.expected gen9/bfrev.asm gen9/bfrev.expected gen9/break.asm gen9/break.expected gen9/cbit.asm gen9/cbit.expected gen9/cmp.asm gen9/cmp.expected gen9/cont.asm gen9/cont.expected gen9/cr0.asm gen9/cr0.expected gen9/csel.asm gen9/csel.expected gen9/else.asm gen9/else.expected gen9/endif.asm gen9/endif.expected gen9/fbh.asm gen9/fbh.expected gen9/fbl.asm gen9/fbl.expected gen9/frc.asm gen9/frc.expected gen9/halt.asm gen9/halt.expected gen9/if.asm gen9/if.expected gen9/lrp.asm gen9/lrp.expected gen9/lzd.asm gen9/lzd.expected gen9/mach.asm gen9/mach.expected gen9/mad.asm gen9/mad.expected gen9/math.asm gen9/math.expected gen9/mov.asm gen9/mov.expected gen9/mul.asm gen9/mul.expected gen9/nop.asm gen9/nop.expected gen9/not.asm gen9/not.expected gen9/or.asm gen9/or.expected gen9/pln.asm gen9/pln.expected gen9/rndd.asm gen9/rndd.expected gen9/rnde.asm gen9/rnde.expected gen9/rndz.asm gen9/rndz.expected gen9/sel.asm gen9/sel.expected gen9/send.asm gen9/send.expected gen9/sendc.asm gen9/sendc.expected gen9/sends.asm gen9/sends.expected gen9/shl.asm gen9/shl.expected gen9/shr.asm gen9/shr.expected gen9/wait.asm gen9/wait.expected gen9/while.asm gen9/while.expected gen9/xor.asm gen9/xor.expected run-test.py