10b966c5eSopenharmony_ciroot { 20b966c5eSopenharmony_ci platform { 30b966c5eSopenharmony_ci template dai_controller { 40b966c5eSopenharmony_ci match_attr = ""; 50b966c5eSopenharmony_ci serviceName = ""; 60b966c5eSopenharmony_ci } 70b966c5eSopenharmony_ci controller_0x120c1020 :: dai_controller { 80b966c5eSopenharmony_ci match_attr = "hdf_dai_driver"; 90b966c5eSopenharmony_ci serviceName = "dai_service"; 100b966c5eSopenharmony_ci 110b966c5eSopenharmony_ci idInfo { 120b966c5eSopenharmony_ci chipName = "/i2s@fe410000"; 130b966c5eSopenharmony_ci chipIdRegister = 0xfe410000; 140b966c5eSopenharmony_ci chipIdSize = 0x1000; 150b966c5eSopenharmony_ci } 160b966c5eSopenharmony_ci 170b966c5eSopenharmony_ci regConfig { 180b966c5eSopenharmony_ci 190b966c5eSopenharmony_ci /* reg: register address 200b966c5eSopenharmony_ci rreg: register address 210b966c5eSopenharmony_ci shift: shift bits 220b966c5eSopenharmony_ci rshift: rshift bits 230b966c5eSopenharmony_ci min: min value 240b966c5eSopenharmony_ci max: max value 250b966c5eSopenharmony_ci mask: mask of value 260b966c5eSopenharmony_ci invert: enum InvertVal 0-uninvert 1-invert 270b966c5eSopenharmony_ci value: value 280b966c5eSopenharmony_ci 290b966c5eSopenharmony_ci reg, rreg, shift, rshift, min, max, mask, invert value 300b966c5eSopenharmony_ci */ 310b966c5eSopenharmony_ci daiStartupSeqConfig = [ 320b966c5eSopenharmony_ci 0x00, 0x00, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x7200000f, //Transmit Operation Init 330b966c5eSopenharmony_ci 0x04, 0x04, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x01c8000f, //Receive Operation Init 340b966c5eSopenharmony_ci 0x08, 0x08, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x00001f1f, //Clock Generation Init 350b966c5eSopenharmony_ci 0x10, 0x10, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x001f0000, //DMA Control Init 360b966c5eSopenharmony_ci 0x14, 0x14, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x01f00000, //Interrupt Control Init 370b966c5eSopenharmony_ci 0x1C, 0x1C, 0, 0, 0, 0x3, 0x3, 0, 0, //XFER Init 380b966c5eSopenharmony_ci 0x30, 0x30, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x00003eff, //TDM Transmit Init 390b966c5eSopenharmony_ci 0x34, 0x34, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x00003eff, //TDM Receive Init 400b966c5eSopenharmony_ci 0x38, 0x38, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x00000707 //Clock Divider Init 410b966c5eSopenharmony_ci ]; 420b966c5eSopenharmony_ci 430b966c5eSopenharmony_ci daiParamsSeqConfig = [ 440b966c5eSopenharmony_ci 0x08, 0x08, 8, 8, 0x1F, 0xFF, 0xFF, 0, 0x0, // I2S_CKR_RSD 450b966c5eSopenharmony_ci 0x08, 0x08, 0, 0, 0x1F, 0xFF, 0xFF, 0, 0x0, // I2S_CKR_TSD 460b966c5eSopenharmony_ci 0x38, 0x38, 8, 8, 0x00, 0xFF, 0xFF, 0, 0x0, // I2S_CLKDIV_RX_MDIV 470b966c5eSopenharmony_ci 0x38, 0x38, 0, 0, 0x00, 0xFF, 0xFF, 0, 0x0, // I2S_CLKDIV_TX_MDIV 480b966c5eSopenharmony_ci 0x08, 0x08, 27, 27, 0x0, 0x1, 0x1, 0, 0x0, // I2S_CKR_MSS 490b966c5eSopenharmony_ci 0x08, 0x08, 26, 26, 0x0, 0x1, 0x1, 0, 0x0, // I2S_CKR_CKP 500b966c5eSopenharmony_ci 0x08, 0x08, 25, 25, 0x0, 0x1, 0x1, 0, 0x0, // I2S_CKR_RLP 510b966c5eSopenharmony_ci 0x08, 0x08, 24, 24, 0x0, 0x1, 0x1, 0, 0x0, // I2S_CKR_TLP 520b966c5eSopenharmony_ci ]; 530b966c5eSopenharmony_ci 540b966c5eSopenharmony_ci daiTriggerSeqConfig = [ 550b966c5eSopenharmony_ci 0x10, 0x10, 24, 24, 0x0, 0x1, 0x1, 0, 0x1, // I2S_DMACR_RDE 560b966c5eSopenharmony_ci 0x10, 0x10, 8, 8, 0x0, 0x1, 0x1, 0, 0x1, // I2S_DMACR_TDE 570b966c5eSopenharmony_ci 0x14, 0x14, 17, 17, 0x0, 0x1, 0x1, 0, 0x0, // I2S_INTCR_RXOIE 580b966c5eSopenharmony_ci 0x14, 0x14, 16, 16, 0x0, 0x1, 0x1, 0, 0x0, // I2S_INTCR_RXFIE 590b966c5eSopenharmony_ci 0x14, 0x14, 1, 1, 0x0, 0x1, 0x1, 0, 0x0, // I2S_INTCR_TXUIE 600b966c5eSopenharmony_ci 0x14, 0x14, 0, 0, 0x0, 0x1, 0x1, 0, 0x0 // I2S_INTCR_TXEIE 610b966c5eSopenharmony_ci ]; 620b966c5eSopenharmony_ci } 630b966c5eSopenharmony_ci } 640b966c5eSopenharmony_ci controller_0x120c1021 :: dai_controller { 650b966c5eSopenharmony_ci match_attr = "hdf_hdmi_dai_driver"; 660b966c5eSopenharmony_ci serviceName = "hdmi_dai_service"; 670b966c5eSopenharmony_ci 680b966c5eSopenharmony_ci idInfo { 690b966c5eSopenharmony_ci chipName = "/i2s@fe400000"; 700b966c5eSopenharmony_ci chipIdRegister = 0xfe400000; 710b966c5eSopenharmony_ci chipIdSize = 0x1000; 720b966c5eSopenharmony_ci } 730b966c5eSopenharmony_ci regConfig { 740b966c5eSopenharmony_ci 750b966c5eSopenharmony_ci /* reg: register address 760b966c5eSopenharmony_ci rreg: register address 770b966c5eSopenharmony_ci shift: shift bits 780b966c5eSopenharmony_ci rshift: rshift bits 790b966c5eSopenharmony_ci min: min value 800b966c5eSopenharmony_ci max: max value 810b966c5eSopenharmony_ci mask: mask of value 820b966c5eSopenharmony_ci invert: enum InvertVal 0-uninvert 1-invert 830b966c5eSopenharmony_ci value: value 840b966c5eSopenharmony_ci 850b966c5eSopenharmony_ci reg, rreg, shift, rshift, min, max, mask, invert value 860b966c5eSopenharmony_ci */ 870b966c5eSopenharmony_ci daiStartupSeqConfig = [ 880b966c5eSopenharmony_ci 0x00, 0x00, 0, 0, 0, 0xFFFFFFFF, 0xFFFFFFFF, 0, 0x0, //Transmit Operation Init 890b966c5eSopenharmony_ci ]; 900b966c5eSopenharmony_ci } 910b966c5eSopenharmony_ci } 920b966c5eSopenharmony_ci } 930b966c5eSopenharmony_ci} 94