10b966c5eSopenharmony_ciroot { 20b966c5eSopenharmony_ci platform { 30b966c5eSopenharmony_ci template codec_controller { 40b966c5eSopenharmony_ci match_attr = ""; 50b966c5eSopenharmony_ci serviceName = ""; 60b966c5eSopenharmony_ci codecDaiName = ""; 70b966c5eSopenharmony_ci } 80b966c5eSopenharmony_ci controller_0x120c1030 :: codec_controller { 90b966c5eSopenharmony_ci match_attr = "hdf_codec_driver_0"; 100b966c5eSopenharmony_ci serviceName = "codec_service_0"; 110b966c5eSopenharmony_ci codecDaiName = "codec_dai"; 120b966c5eSopenharmony_ci 130b966c5eSopenharmony_ci hwInfo = [ 140b966c5eSopenharmony_ci /* 150b966c5eSopenharmony_ci Playback/Captrue, formats, rates, rate_min, rate_max, channels_min, channels_max, 160b966c5eSopenharmony_ci buffer_bytes_max, period_bytes_min, period_bytes_max, periods_min, periods_max 170b966c5eSopenharmony_ci */ 180b966c5eSopenharmony_ci 1, 0xF, 0xFF, 8000, 96000, 1, 2, 1, 2, 3, 4, 5, 190b966c5eSopenharmony_ci 2, 0xF, 0xFF, 8000, 96000, 1, 2, 1, 2, 3, 4, 5, 200b966c5eSopenharmony_ci ]; 210b966c5eSopenharmony_ci 220b966c5eSopenharmony_ci regConfig { 230b966c5eSopenharmony_ci /* reg: register address 240b966c5eSopenharmony_ci rreg: register address 250b966c5eSopenharmony_ci shift: shift bits 260b966c5eSopenharmony_ci rshift: rshift bits 270b966c5eSopenharmony_ci min: min value 280b966c5eSopenharmony_ci max: max value 290b966c5eSopenharmony_ci mask: mask of value 300b966c5eSopenharmony_ci invert: enum InvertVal 0-uninvert 1-invert 310b966c5eSopenharmony_ci value: value 320b966c5eSopenharmony_ci */ 330b966c5eSopenharmony_ci 340b966c5eSopenharmony_ci /* reg, value */ 350b966c5eSopenharmony_ci initSeqConfig = [ 360b966c5eSopenharmony_ci 0x13, 0xf4, 370b966c5eSopenharmony_ci 0x15, 0xff, 380b966c5eSopenharmony_ci 0x17, 0x40, 390b966c5eSopenharmony_ci 0x18, 0xc8, 400b966c5eSopenharmony_ci 0x1e, 0x00, 410b966c5eSopenharmony_ci 0x27, 0x3f, 420b966c5eSopenharmony_ci 0x29, 0x99, 430b966c5eSopenharmony_ci 0x2f, 0x03, 440b966c5eSopenharmony_ci 0x30, 0x06, 450b966c5eSopenharmony_ci 0x35, 0x02, 460b966c5eSopenharmony_ci 0x38, 0x10, 470b966c5eSopenharmony_ci 0x3c, 0x0F, 480b966c5eSopenharmony_ci 0x3d, 0x80, 490b966c5eSopenharmony_ci 0x3e, 0x0f, 500b966c5eSopenharmony_ci 0x3f, 0x11, 510b966c5eSopenharmony_ci 0x40, 0xa5, 520b966c5eSopenharmony_ci 0x41, 0x77, 530b966c5eSopenharmony_ci 0x42, 0x04, 540b966c5eSopenharmony_ci 0x43, 0x58, 550b966c5eSopenharmony_ci 0x44, 0x2d, 560b966c5eSopenharmony_ci 0x45, 0x0c, 570b966c5eSopenharmony_ci 0x46, 0xa5, 580b966c5eSopenharmony_ci 0x47, 0x00, 590b966c5eSopenharmony_ci 0x48, 0x00, 600b966c5eSopenharmony_ci 0x4b, 0x0f, 610b966c5eSopenharmony_ci 0x4c, 0x20, 620b966c5eSopenharmony_ci 0x4e, 0x0f, 630b966c5eSopenharmony_ci 0x4f, 0x00, 640b966c5eSopenharmony_ci ]; 650b966c5eSopenharmony_ci 660b966c5eSopenharmony_ci controlsConfig = [ 670b966c5eSopenharmony_ci /*array index, iface, mixer/mux, enable,*/ 680b966c5eSopenharmony_ci 0, 2, 0, 1, 690b966c5eSopenharmony_ci 1, 2, 0, 1, 700b966c5eSopenharmony_ci 2, 2, 0, 1, 710b966c5eSopenharmony_ci 3, 2, 0, 1, 720b966c5eSopenharmony_ci 4, 2, 0, 1, 730b966c5eSopenharmony_ci 5, 2, 0, 1, 740b966c5eSopenharmony_ci 8, 2, 0, 1, 750b966c5eSopenharmony_ci 9, 2, 0, 1, 760b966c5eSopenharmony_ci ]; 770b966c5eSopenharmony_ci 780b966c5eSopenharmony_ci /* reg, rreg, shift, rshift, min, max, mask, invert, value */ 790b966c5eSopenharmony_ci ctrlParamsSeqConfig = [ 800b966c5eSopenharmony_ci 0x31, 0x32, 0, 0, 0x00, 0xFF, 0xFF, 1, 0x00, // DACL/R Playback Volume 810b966c5eSopenharmony_ci 0x1a, 0x1b, 0, 0, 0x00, 0xFF, 0xFF, 1, 0x00, // ADCL/R Capture Volume 820b966c5eSopenharmony_ci 0x38, 0x38, 0, 0, 0x0, 0x1, 0x1, 0, 0x0, // DAC Playback Mute 830b966c5eSopenharmony_ci 0x27, 0x27, 6, 6, 0x0, 0x1, 0x1, 0, 0x0, // ADCL/R Capture Mute 840b966c5eSopenharmony_ci 0x29, 0x29, 4, 4, 0x0, 0xF, 0xF, 0, 0x9, // Mic Left Gain 850b966c5eSopenharmony_ci 0x29, 0x29, 0, 0, 0x0, 0xF, 0xF, 0, 0x9, // Mic Right Gain 860b966c5eSopenharmony_ci 0x4a, 0x4a, 2, 2, 0x0, 0x2, 0x3, 0, 0x0, // Render Channel Mode 870b966c5eSopenharmony_ci 0x4d, 0x4d, 2, 2, 0x0, 0x2, 0x3, 0, 0x0, // Captrue Channel Mode 880b966c5eSopenharmony_ci ]; 890b966c5eSopenharmony_ci 900b966c5eSopenharmony_ci /* reg, rreg, shift, rshift, min, max, mask, invert, value */ 910b966c5eSopenharmony_ci daiParamsSeqConfig = [ 920b966c5eSopenharmony_ci 0x45, 0x45, 0, 0, 0x0, 0xFF, 0xFF, 0, 0x0C, // PLL_PREDIV_BIT 930b966c5eSopenharmony_ci 0x35, 0x35, 0, 0, 0x0, 0x7, 0x7, 0, 0x2, // DAC_Sample_rate 940b966c5eSopenharmony_ci 0x1e, 0x1e, 0, 0, 0x0, 0x7, 0x7, 0, 0x2, // ADC_Sample_rate 950b966c5eSopenharmony_ci 0x4e, 0x4e, 0, 0, 0x0, 0x17, 0x1F, 0, 0x0F, // TX_datawidth 960b966c5eSopenharmony_ci 0x4b, 0x4b, 0, 0, 0x0, 0x17, 0x1F, 0, 0x0F, // RX_datawidth 970b966c5eSopenharmony_ci 0x15, 0x15, 0x0, 0x0, 0x0, 0xf, 0xf, 0, 0x0, // rx clk enable 980b966c5eSopenharmony_ci 0x15, 0x15, 0x4, 0x4, 0x0, 0xf, 0xf, 0, 0x0, // tx clk enable 990b966c5eSopenharmony_ci ]; 1000b966c5eSopenharmony_ci 1010b966c5eSopenharmony_ci ctrlSapmParamsSeqConfig = [ 1020b966c5eSopenharmony_ci 0x27, 0x27, 5, 5, 0x00, 0x1, 0x1, 1, 0x00, //LPGA MIC -- connect MIC1 1030b966c5eSopenharmony_ci 0x27, 0x27, 4, 4, 0x00, 0x1, 0x1, 1, 0x00, //RPGA MIC -- connect MIC2 1040b966c5eSopenharmony_ci 0x2F, 0x2F, 2, 2, 0x00, 0x1, 0x1, 1, 0x00, //Speaker1 Switch -- connect speaker 1050b966c5eSopenharmony_ci 0x2F, 0x2F, 1, 1, 0x00, 0x1, 0x1, 1, 0x00, //Headphone1 Switch -- connect hpl 1060b966c5eSopenharmony_ci 0x2F, 0x2F, 0, 0, 0x00, 0x1, 0x1, 1, 0x00, //Headphone2 Switch -- connect hpr 1070b966c5eSopenharmony_ci ]; 1080b966c5eSopenharmony_ci /* 1090b966c5eSopenharmony_ci reg is 0xFFFF: component has no sapm register bit 1100b966c5eSopenharmony_ci sapmType, compNameIndex, reg, mask, shift, invert, kcontrolNews, kcontrolsNum 1110b966c5eSopenharmony_ci */ 1120b966c5eSopenharmony_ci sapmComponent = [ 1130b966c5eSopenharmony_ci 10, 0, 0x18, 0x1, 7, 1, 0, 0, //ADCL 1140b966c5eSopenharmony_ci 10, 1, 0x18, 0x1, 6, 1, 0, 0, //ADCR 1150b966c5eSopenharmony_ci 11, 32, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //DAC1 1160b966c5eSopenharmony_ci 11, 33, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //DAC2 1170b966c5eSopenharmony_ci 11, 34, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //DAC3 1180b966c5eSopenharmony_ci 6, 52, 0xFFFF, 0xFFFF, 0, 0, 3, 1, //SPKL PGA 1190b966c5eSopenharmony_ci 6, 54, 0xFFFF, 0xFFFF, 0, 0, 4, 1, //HPL PGA 1200b966c5eSopenharmony_ci 6, 55, 0xFFFF, 0xFFFF, 0, 0, 5, 1, //HPR PGA 1210b966c5eSopenharmony_ci 15, 6, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //SPK 1220b966c5eSopenharmony_ci 14, 10, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //HPL 1230b966c5eSopenharmony_ci 14, 11, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //HPR 1240b966c5eSopenharmony_ci 6, 4, 0xFFFF, 0xFFFF, 6, 0, 1, 1, //LPGA 1250b966c5eSopenharmony_ci 6, 5, 0xFFFF, 0xFFFF, 6, 0, 2, 1, //RPGA 1260b966c5eSopenharmony_ci 13, 40, 0xFFFF, 0xFFFF, 6, 0, 0, 0, //MIC1 1270b966c5eSopenharmony_ci 13, 41, 0x4d, 0x1, 1, 0, 0, 0 //MIC2 1280b966c5eSopenharmony_ci ]; 1290b966c5eSopenharmony_ci 1300b966c5eSopenharmony_ci /*array index, iface, mixer/mux, enable*/ 1310b966c5eSopenharmony_ci sapmConfig = [ 1320b966c5eSopenharmony_ci 0, 2, 0, 1, 1330b966c5eSopenharmony_ci 1, 2, 0, 1, 1340b966c5eSopenharmony_ci 24, 2, 0, 1, 1350b966c5eSopenharmony_ci 28, 2, 0, 1, 1360b966c5eSopenharmony_ci 29, 2, 0, 1 1370b966c5eSopenharmony_ci ]; 1380b966c5eSopenharmony_ci } 1390b966c5eSopenharmony_ci } 1400b966c5eSopenharmony_ci controller_0x120c1031 :: codec_controller { 1410b966c5eSopenharmony_ci match_attr = "hdf_codec_driver_1"; 1420b966c5eSopenharmony_ci serviceName = "codec_service_1"; 1430b966c5eSopenharmony_ci codecDaiName = "hdmi_codec_dai"; 1440b966c5eSopenharmony_ci 1450b966c5eSopenharmony_ci hwInfo = [ 1460b966c5eSopenharmony_ci /* 1470b966c5eSopenharmony_ci Playback/Captrue, formats, rates, rate_min, rate_max, channels_min, channels_max, 1480b966c5eSopenharmony_ci buffer_bytes_max, period_bytes_min, period_bytes_max, periods_min, periods_max 1490b966c5eSopenharmony_ci */ 1500b966c5eSopenharmony_ci 1, 0xF, 0xFF, 8000, 96000, 1, 2, 1, 2, 3, 4, 5 1510b966c5eSopenharmony_ci ]; 1520b966c5eSopenharmony_ci 1530b966c5eSopenharmony_ci regConfig { 1540b966c5eSopenharmony_ci /* reg: register address 1550b966c5eSopenharmony_ci rreg: register address 1560b966c5eSopenharmony_ci shift: shift bits 1570b966c5eSopenharmony_ci rshift: rshift bits 1580b966c5eSopenharmony_ci min: min value 1590b966c5eSopenharmony_ci max: max value 1600b966c5eSopenharmony_ci mask: mask of value 1610b966c5eSopenharmony_ci invert: enum InvertVal 0-uninvert 1-invert 1620b966c5eSopenharmony_ci value: value 1630b966c5eSopenharmony_ci */ 1640b966c5eSopenharmony_ci 1650b966c5eSopenharmony_ci initSeqConfig = [ 1660b966c5eSopenharmony_ci /* reg, value */ 1670b966c5eSopenharmony_ci 0x13, 0xf4, 1680b966c5eSopenharmony_ci ]; 1690b966c5eSopenharmony_ci 1700b966c5eSopenharmony_ci controlsConfig = [ 1710b966c5eSopenharmony_ci /* array index, iface, mixer/mux, enable */ 1720b966c5eSopenharmony_ci 0, 2, 0, 1, 1730b966c5eSopenharmony_ci 1, 2, 0, 1, 1740b966c5eSopenharmony_ci 2, 2, 0, 1, 1750b966c5eSopenharmony_ci 3, 2, 0, 1, 1760b966c5eSopenharmony_ci 4, 2, 0, 1, 1770b966c5eSopenharmony_ci 5, 2, 0, 1, 1780b966c5eSopenharmony_ci 8, 2, 0, 1, 1790b966c5eSopenharmony_ci 9, 2, 0, 1, 1800b966c5eSopenharmony_ci ]; 1810b966c5eSopenharmony_ci 1820b966c5eSopenharmony_ci ctrlParamsSeqConfig = [ 1830b966c5eSopenharmony_ci /* reg, rreg, shift, rshift, min, max, mask, invert, value */ 1840b966c5eSopenharmony_ci 0x31, 0x32, 0, 0, 0x00, 0xFF, 0xFF, 1, 0x00, // DACL/R Playback Volume 1850b966c5eSopenharmony_ci 0x1a, 0x1b, 0, 0, 0x00, 0xFF, 0xFF, 1, 0x00, // ADCL/R Capture Volume 1860b966c5eSopenharmony_ci 0x38, 0x38, 0, 0, 0x0, 0x1, 0x1, 0, 0x0, // DAC Playback Mute 1870b966c5eSopenharmony_ci 0x27, 0x27, 6, 6, 0x0, 0x1, 0x1, 0, 0x0, // ADCL/R Capture Mute 1880b966c5eSopenharmony_ci 0x29, 0x29, 4, 4, 0x0, 0xF, 0xF, 0, 0x9, // Mic Left Gain 1890b966c5eSopenharmony_ci 0x29, 0x29, 0, 0, 0x0, 0xF, 0xF, 0, 0x9, // Mic Right Gain 1900b966c5eSopenharmony_ci 0x4a, 0x4a, 2, 2, 0x0, 0x2, 0x3, 0, 0x0, // Render Channel Mode 1910b966c5eSopenharmony_ci 0x4d, 0x4d, 2, 2, 0x0, 0x2, 0x3, 0, 0x0, // Captrue Channel Mode 1920b966c5eSopenharmony_ci ]; 1930b966c5eSopenharmony_ci 1940b966c5eSopenharmony_ci daiParamsSeqConfig = [ 1950b966c5eSopenharmony_ci /* reg, rreg, shift, rshift, min, max, mask, invert, value */ 1960b966c5eSopenharmony_ci 0x45, 0x45, 0, 0, 0x0, 0xFF, 0xFF, 0, 0x0C, // PLL_PREDIV_BIT 1970b966c5eSopenharmony_ci 0x35, 0x35, 0, 0, 0x0, 0x7, 0x7, 0, 0x2, // DAC_Sample_rate 1980b966c5eSopenharmony_ci 0x1e, 0x1e, 0, 0, 0x0, 0x7, 0x7, 0, 0x2, // ADC_Sample_rate 1990b966c5eSopenharmony_ci 0x4e, 0x4e, 0, 0, 0x0, 0x17, 0x1F, 0, 0x0F, // TX_datawidth 2000b966c5eSopenharmony_ci 0x4b, 0x4b, 0, 0, 0x0, 0x17, 0x1F, 0, 0x0F, // RX_datawidth 2010b966c5eSopenharmony_ci 0x15, 0x15, 0x0, 0x0, 0x0, 0xf, 0xf, 0, 0x0, // rx clk enable 2020b966c5eSopenharmony_ci 0x15, 0x15, 0x4, 0x4, 0x0, 0xf, 0xf, 0, 0x0, // tx clk enable 2030b966c5eSopenharmony_ci ]; 2040b966c5eSopenharmony_ci 2050b966c5eSopenharmony_ci ctrlSapmParamsSeqConfig = [ 2060b966c5eSopenharmony_ci /* reg, rreg, shift, rshift, min, max, mask, invert, value */ 2070b966c5eSopenharmony_ci 0x27, 0x27, 5, 5, 0x00, 0x1, 0x1, 1, 0x00, //LPGA MIC -- connect MIC1 2080b966c5eSopenharmony_ci 0x27, 0x27, 4, 4, 0x00, 0x1, 0x1, 1, 0x00, //RPGA MIC -- connect MIC2 2090b966c5eSopenharmony_ci 0x2F, 0x2F, 2, 2, 0x00, 0x1, 0x1, 1, 0x00, //Speaker1 Switch -- connect speaker 2100b966c5eSopenharmony_ci 0x2F, 0x2F, 1, 1, 0x00, 0x1, 0x1, 1, 0x00, //Headphone1 Switch -- connect hpl 2110b966c5eSopenharmony_ci 0x2F, 0x2F, 0, 0, 0x00, 0x1, 0x1, 1, 0x00, //Headphone2 Switch -- connect hpr 2120b966c5eSopenharmony_ci ]; 2130b966c5eSopenharmony_ci 2140b966c5eSopenharmony_ci /* 2150b966c5eSopenharmony_ci reg is 0xFFFF: component has no sapm register bit 2160b966c5eSopenharmony_ci sapmType, compNameIndex, reg, mask, shift, invert, kcontrolNews, kcontrolsNum 2170b966c5eSopenharmony_ci */ 2180b966c5eSopenharmony_ci sapmComponent = [ 2190b966c5eSopenharmony_ci 10, 0, 0x18, 0x1, 7, 1, 0, 0, //ADCL 2200b966c5eSopenharmony_ci 10, 1, 0x18, 0x1, 6, 1, 0, 0, //ADCR 2210b966c5eSopenharmony_ci 11, 32, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //DAC1 2220b966c5eSopenharmony_ci 11, 33, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //DAC2 2230b966c5eSopenharmony_ci 11, 34, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //DAC3 2240b966c5eSopenharmony_ci 6, 52, 0xFFFF, 0xFFFF, 0, 0, 3, 1, //SPKL PGA 2250b966c5eSopenharmony_ci 6, 54, 0xFFFF, 0xFFFF, 0, 0, 4, 1, //HPL PGA 2260b966c5eSopenharmony_ci 6, 55, 0xFFFF, 0xFFFF, 0, 0, 5, 1, //HPR PGA 2270b966c5eSopenharmony_ci 15, 6, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //SPK 2280b966c5eSopenharmony_ci 14, 10, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //HPL 2290b966c5eSopenharmony_ci 14, 11, 0xFFFF, 0xFFFF, 0, 0, 0, 0, //HPR 2300b966c5eSopenharmony_ci 6, 4, 0xFFFF, 0xFFFF, 6, 0, 1, 1, //LPGA 2310b966c5eSopenharmony_ci 6, 5, 0xFFFF, 0xFFFF, 6, 0, 2, 1, //RPGA 2320b966c5eSopenharmony_ci 13, 40, 0xFFFF, 0xFFFF, 6, 0, 0, 0, //MIC1 2330b966c5eSopenharmony_ci 13, 41, 0x4d, 0x1, 1, 0, 0, 0 //MIC2 2340b966c5eSopenharmony_ci ]; 2350b966c5eSopenharmony_ci 2360b966c5eSopenharmony_ci sapmConfig = [ 2370b966c5eSopenharmony_ci /* array index, iface, mixer/mux, enable */ 2380b966c5eSopenharmony_ci 0, 2, 0, 1, 2390b966c5eSopenharmony_ci 1, 2, 0, 1, 2400b966c5eSopenharmony_ci 24, 2, 0, 1, 2410b966c5eSopenharmony_ci 28, 2, 0, 1, 2420b966c5eSopenharmony_ci 29, 2, 0, 1 2430b966c5eSopenharmony_ci ]; 2440b966c5eSopenharmony_ci } 2450b966c5eSopenharmony_ci } 2460b966c5eSopenharmony_ci } 2470b966c5eSopenharmony_ci}