1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
11//     and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may be
13//     used to endorse or promote products derived from this software without
14//     specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27
28// ---------------------------------------------------------------------
29// This file is auto generated using tools/generate_simulator_traces.py.
30//
31// PLEASE DO NOT EDIT.
32// ---------------------------------------------------------------------
33
34#ifndef VIXL_SIM_SUQADD_D_TRACE_AARCH64_H_
35#define VIXL_SIM_SUQADD_D_TRACE_AARCH64_H_
36
37const uint64_t kExpected_NEON_suqadd_D[] = {
38  0x7fffffffffffffff,
39  0x0000000000000000,
40  0x0000000000000001,
41  0x0000000000000002,
42  0x0000000000000040,
43  0x000000000000007d,
44  0x000000000000007e,
45  0x000000000000007f,
46  0x0000000000007ffd,
47  0x0000000000007ffe,
48  0x0000000000007fff,
49  0x000000007ffffffd,
50  0x000000007ffffffe,
51  0x000000007fffffff,
52  0x3333333333333333,
53  0x5555555555555555,
54  0x7ffffffffffffffd,
55  0x7ffffffffffffffe,
56  0x7fffffffffffffff,
57  0x7fffffffffffffff,
58  0x7fffffffffffffff,
59  0x7fffffffffffffff,
60  0x7fffffffffffffff,
61  0x7fffffffffffffff,
62  0x7fffffffffffffff,
63  0x7fffffffffffffff,
64  0x7fffffffffffffff,
65  0x7fffffffffffffff,
66  0x7fffffffffffffff,
67  0x7fffffffffffffff,
68  0x7fffffffffffffff,
69  0x7fffffffffffffff,
70  0x7fffffffffffffff,
71  0x7fffffffffffffff,
72  0x7fffffffffffffff,
73  0x7fffffffffffffff,
74  0x7fffffffffffffff,
75  0x7fffffffffffffff,
76  0x7fffffffffffffff,
77  0x7fffffffffffffff,
78};
79const unsigned kExpectedCount_NEON_suqadd_D = 40;
80
81#endif  // VIXL_SIM_SUQADD_D_TRACE_AARCH64_H_
82