1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
11//     and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may be
13//     used to endorse or promote products derived from this software without
14//     specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27
28// ---------------------------------------------------------------------
29// This file is auto generated using tools/generate_simulator_traces.py.
30//
31// PLEASE DO NOT EDIT.
32// ---------------------------------------------------------------------
33
34#ifndef VIXL_SIM_SQNEG_S_TRACE_AARCH64_H_
35#define VIXL_SIM_SQNEG_S_TRACE_AARCH64_H_
36
37const uint32_t kExpected_NEON_sqneg_S[] = {
38  0x00000003,
39  0x00000002,
40  0x00000001,
41  0x00000000,
42  0xffffffff,
43  0xfffffffe,
44  0xffffffe0,
45  0xffffff83,
46  0xffffff82,
47  0xffffff81,
48  0xffff8003,
49  0xffff8002,
50  0xffff8001,
51  0xcccccccd,
52  0xaaaaaaab,
53  0x80000003,
54  0x80000002,
55  0x80000001,
56  0x7fffffff,
57  0x7fffffff,
58  0x55555556,
59  0x33333334,
60  0x00008000,
61  0x00007fff,
62  0x00007ffe,
63  0x00007ffd,
64  0x00000080,
65  0x0000007f,
66  0x0000007e,
67  0x0000007d,
68  0x00000020,
69};
70const unsigned kExpectedCount_NEON_sqneg_S = 31;
71
72#endif  // VIXL_SIM_SQNEG_S_TRACE_AARCH64_H_
73