1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
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5// modification, are permitted provided that the following conditions are met:
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15//
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26
27
28// ---------------------------------------------------------------------
29// This file is auto generated using tools/generate_simulator_traces.py.
30//
31// PLEASE DO NOT EDIT.
32// ---------------------------------------------------------------------
33
34#ifndef VIXL_SIM_SHLL2_8H_2OPIMM_TRACE_AARCH64_H_
35#define VIXL_SIM_SHLL2_8H_2OPIMM_TRACE_AARCH64_H_
36
37const uint16_t kExpected_NEON_shll2_8H_2OPIMM[] = {
38  0x8300, 0xaa00, 0xcc00, 0xf800, 0xfd00, 0xfe00, 0xff00, 0x0000,
39  0xaa00, 0xcc00, 0xf800, 0xfd00, 0xfe00, 0xff00, 0x0000, 0x0100,
40  0xcc00, 0xf800, 0xfd00, 0xfe00, 0xff00, 0x0000, 0x0100, 0x0200,
41  0xf800, 0xfd00, 0xfe00, 0xff00, 0x0000, 0x0100, 0x0200, 0x0800,
42  0xfd00, 0xfe00, 0xff00, 0x0000, 0x0100, 0x0200, 0x0800, 0x3300,
43  0xfe00, 0xff00, 0x0000, 0x0100, 0x0200, 0x0800, 0x3300, 0x5500,
44  0xff00, 0x0000, 0x0100, 0x0200, 0x0800, 0x3300, 0x5500, 0x7d00,
45  0x0000, 0x0100, 0x0200, 0x0800, 0x3300, 0x5500, 0x7d00, 0x7e00,
46  0x0100, 0x0200, 0x0800, 0x3300, 0x5500, 0x7d00, 0x7e00, 0x7f00,
47  0x0200, 0x0800, 0x3300, 0x5500, 0x7d00, 0x7e00, 0x7f00, 0x8000,
48  0x0800, 0x3300, 0x5500, 0x7d00, 0x7e00, 0x7f00, 0x8000, 0x8100,
49  0x3300, 0x5500, 0x7d00, 0x7e00, 0x7f00, 0x8000, 0x8100, 0x8200,
50  0x5500, 0x7d00, 0x7e00, 0x7f00, 0x8000, 0x8100, 0x8200, 0x8300,
51  0x7d00, 0x7e00, 0x7f00, 0x8000, 0x8100, 0x8200, 0x8300, 0xaa00,
52  0x7e00, 0x7f00, 0x8000, 0x8100, 0x8200, 0x8300, 0xaa00, 0xcc00,
53  0x7f00, 0x8000, 0x8100, 0x8200, 0x8300, 0xaa00, 0xcc00, 0xf800,
54  0x8000, 0x8100, 0x8200, 0x8300, 0xaa00, 0xcc00, 0xf800, 0xfd00,
55  0x8100, 0x8200, 0x8300, 0xaa00, 0xcc00, 0xf800, 0xfd00, 0xfe00,
56  0x8200, 0x8300, 0xaa00, 0xcc00, 0xf800, 0xfd00, 0xfe00, 0xff00,
57};
58const unsigned kExpectedCount_NEON_shll2_8H_2OPIMM = 19;
59
60#endif  // VIXL_SIM_SHLL2_8H_2OPIMM_TRACE_AARCH64_H_
61