1// Copyright 2015, VIXL authors 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright notice, 10// this list of conditions and the following disclaimer in the documentation 11// and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may be 13// used to endorse or promote products derived from this software without 14// specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 28// --------------------------------------------------------------------- 29// This file is auto generated using tools/generate_simulator_traces.py. 30// 31// PLEASE DO NOT EDIT. 32// --------------------------------------------------------------------- 33 34#ifndef VIXL_SIM_RBIT_16B_TRACE_AARCH64_H_ 35#define VIXL_SIM_RBIT_16B_TRACE_AARCH64_H_ 36 37const uint8_t kExpected_NEON_rbit_16B[] = { 38 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 39 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 40 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 41 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 42 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 43 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 44 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 45 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 46 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 47 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 48 0x33, 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 49 0x1f, 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 50 0xbf, 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 51 0x7f, 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 52 0xff, 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 53 0x00, 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 54 0x80, 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 55 0x40, 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 56 0x10, 0xcc, 0xaa, 0xbe, 0x7e, 0xfe, 0x01, 0x81, 0x41, 0xc1, 0x55, 0x33, 0x1f, 0xbf, 0x7f, 0xff, 57}; 58const unsigned kExpectedCount_NEON_rbit_16B = 19; 59 60#endif // VIXL_SIM_RBIT_16B_TRACE_AARCH64_H_ 61