1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
4// Redistribution and use in source and binary forms, with or without
5// modification, are permitted provided that the following conditions are met:
6//
7//   * Redistributions of source code must retain the above copyright notice,
8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
11//     and/or other materials provided with the distribution.
12//   * Neither the name of ARM Limited nor the names of its contributors may be
13//     used to endorse or promote products derived from this software without
14//     specific prior written permission.
15//
16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND
17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE
20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27
28// ---------------------------------------------------------------------
29// This file is auto generated using tools/generate_simulator_traces.py.
30//
31// PLEASE DO NOT EDIT.
32// ---------------------------------------------------------------------
33
34#ifndef VIXL_SIM_FSQRT_D_TRACE_AARCH64_H_
35#define VIXL_SIM_FSQRT_D_TRACE_AARCH64_H_
36
37const uint64_t kExpected_fsqrt_d[] = {
38  0x0000000000000000,
39  0x2000000000000000,
40  0x3fe6a09e667f3bcc,
41  0x3fe6a09e667f3bcd,
42  0x3fe6a09e667f3bcd,
43  0x3fefffffffffffff,
44  0x3ff0000000000000,
45  0x3ff0000000000000,
46  0x3ff3988e1409212e,
47  0x40094c583ada5b53,
48  0x5fefffffffffffff,
49  0x7ff0000000000000,
50  0x7ff923456789abcd,
51  0x7ff8000000000000,
52  0x7ff923456789abcd,
53  0x7ff0000000000000,
54  0x1fe111111111110a,
55  0x1fffffffffffffff,
56  0x1e60000000000000,
57  0x8000000000000000,
58  0x7ff8000000000000,
59  0x7ff8000000000000,
60  0x7ff8000000000000,
61  0x7ff8000000000000,
62  0x7ff8000000000000,
63  0x7ff8000000000000,
64  0x7ff8000000000000,
65  0x7ff8000000000000,
66  0x7ff8000000000000,
67  0x7ff8000000000000,
68  0x7ff8000000000000,
69  0xfff923456789abcd,
70  0xfff8000000000000,
71  0xfff923456789abcd,
72  0x7ff8000000000000,
73  0x7ff8000000000000,
74  0x7ff8000000000000,
75  0x7ff8000000000000,
76};
77const unsigned kExpectedCount_fsqrt_d = 38;
78
79#endif  // VIXL_SIM_FSQRT_D_TRACE_AARCH64_H_
80