1// Copyright 2015, VIXL authors
2// All rights reserved.
3//
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5// modification, are permitted provided that the following conditions are met:
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8//     this list of conditions and the following disclaimer.
9//   * Redistributions in binary form must reproduce the above copyright notice,
10//     this list of conditions and the following disclaimer in the documentation
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14//     specific prior written permission.
15//
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21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26
27
28// ---------------------------------------------------------------------
29// This file is auto generated using tools/generate_simulator_traces.py.
30//
31// PLEASE DO NOT EDIT.
32// ---------------------------------------------------------------------
33
34#ifndef VIXL_SIM_FJCVTZS_WD_TRACE_AARCH64_H_
35#define VIXL_SIM_FJCVTZS_WD_TRACE_AARCH64_H_
36
37const int32_t kExpected_fjcvtzs_wd[] = {
38  INT32_C(0),
39  INT32_C(0),
40  INT32_C(0),
41  INT32_C(0),
42  INT32_C(0),
43  INT32_C(0),
44  INT32_C(1),
45  INT32_C(1),
46  INT32_C(1),
47  INT32_C(10),
48  INT32_C(0),
49  INT32_C(0),
50  INT32_C(0),
51  INT32_C(0),
52  INT32_C(0),
53  INT32_C(0),
54  INT32_C(0),
55  INT32_C(0),
56  INT32_C(0),
57  INT32_C(0),
58  INT32_C(0),
59  INT32_C(0),
60  INT32_C(0),
61  INT32_C(0),
62  INT32_C(0),
63  -INT32_C(1),
64  -INT32_C(1),
65  -INT32_C(1),
66  -INT32_C(10),
67  INT32_C(0),
68  INT32_C(0),
69  INT32_C(0),
70  INT32_C(0),
71  INT32_C(0),
72  INT32_C(0),
73  INT32_C(0),
74  INT32_C(0),
75  INT32_C(0),
76  INT32_C(0),
77  INT32_C(0),
78  INT32_C(1),
79  INT32_C(1),
80  INT32_C(1),
81  INT32_C(1),
82  INT32_C(1),
83  INT32_C(1),
84  INT32_C(1),
85  INT32_C(1),
86  INT32_C(1),
87  INT32_C(1),
88  INT32_C(1),
89  INT32_C(1),
90  INT32_C(1),
91  INT32_C(0),
92  INT32_C(0),
93  INT32_C(0),
94  INT32_C(0),
95  INT32_C(0),
96  INT32_C(0),
97  INT32_C(0),
98  INT32_C(0),
99  INT32_C(0),
100  INT32_C(0),
101  INT32_C(0),
102  INT32_C(0),
103  INT32_C(0),
104  INT32_C(0),
105  INT32_C(0),
106  INT32_C(0),
107  INT32_C(0),
108  INT32_C(0),
109  INT32_C(0),
110  INT32_C(0),
111  INT32_C(0),
112  INT32_C(0),
113  INT32_C(0),
114  -INT32_C(1),
115  -INT32_C(1),
116  -INT32_C(1),
117  -INT32_C(1),
118  -INT32_C(1),
119  -INT32_C(1),
120  -INT32_C(1),
121  -INT32_C(1),
122  -INT32_C(1),
123  -INT32_C(1),
124  -INT32_C(1),
125  -INT32_C(1),
126  -INT32_C(1),
127  INT32_C(0),
128  INT32_C(0),
129  INT32_C(0),
130  INT32_C(0),
131  INT32_C(0),
132  INT32_C(0),
133  INT32_C(0),
134  INT32_C(0),
135  INT32_C(0),
136  INT32_C(0),
137  INT32_C(0),
138  INT32_C(0),
139  INT32_C(0),
140  INT32_C(0),
141  INT32_C(0),
142  INT32_C(0),
143  INT32_C(0),
144  INT32_C(0),
145  INT32_C(0),
146  INT32_C(0),
147  INT32_C(0),
148  INT32_C(0),
149  INT32_C(1),
150  INT32_C(2),
151  INT32_C(3),
152  -INT32_C(1450744509),
153  -INT32_C(4),
154  -INT32_C(3),
155  -INT32_C(2),
156  -INT32_C(1),
157  INT32_C(0),
158  INT32_C(0),
159  INT32_C(1),
160  INT32_C(1),
161  -INT32_C(725372255),
162  -INT32_C(2),
163  -INT32_C(2),
164  -INT32_C(1),
165  -INT32_C(1),
166  INT32_C(0),
167  INT32_C(0),
168  INT32_C(0),
169  INT32_C(0),
170  -INT32_C(362686128),
171  -INT32_C(1),
172  -INT32_C(1),
173  -INT32_C(1),
174  -INT32_C(1),
175  INT32_C(0),
176  -INT32_C(1),
177  -INT32_C(2),
178  -INT32_C(3),
179  INT32_C(1450744509),
180  INT32_C(4),
181  INT32_C(3),
182  INT32_C(2),
183  INT32_C(1),
184  INT32_C(0),
185  INT32_C(0),
186  -INT32_C(1),
187  -INT32_C(1),
188  INT32_C(725372255),
189  INT32_C(2),
190  INT32_C(2),
191  INT32_C(1),
192  INT32_C(1),
193  INT32_C(0),
194  INT32_C(0),
195  INT32_C(0),
196  INT32_C(0),
197  INT32_C(362686128),
198  INT32_C(1),
199  INT32_C(1),
200  INT32_C(1),
201  INT32_C(1),
202  -INT32_C(2048),
203  INT32_C(0),
204  INT32_C(1024),
205  -INT32_C(1024),
206  INT32_C(0),
207  -INT32_C(2048),
208  INT32_C(0),
209  INT32_C(2147483647),
210  INT32_C(2147483647),
211  -INT32_C(2147483647) - 1,
212  -INT32_C(2147483647) - 1,
213  -INT32_C(2147483647) - 1,
214  -INT32_C(2147483647) - 1,
215  -INT32_C(2147483647) - 1,
216  -INT32_C(2147483647) - 1,
217  -INT32_C(2147483647),
218  -INT32_C(2147483647),
219  -INT32_C(2147483647),
220  -INT32_C(2147483647),
221  INT32_C(2147483645),
222  INT32_C(2147483646),
223  INT32_C(2147483646),
224  INT32_C(2147483646),
225  INT32_C(2147483646),
226  INT32_C(2147483646),
227  INT32_C(2147483646),
228  INT32_C(2147483647),
229  INT32_C(2147483647),
230  INT32_C(2147483647),
231  INT32_C(2147483647),
232  INT32_C(2147483647),
233  -INT32_C(3),
234  -INT32_C(2),
235  -INT32_C(2),
236  -INT32_C(2),
237  -INT32_C(2),
238  -INT32_C(2),
239  -INT32_C(2),
240  -INT32_C(1),
241  -INT32_C(1),
242  -INT32_C(1),
243  -INT32_C(1),
244  -INT32_C(1),
245};
246const unsigned kExpectedCount_fjcvtzs_wd = 207;
247
248#endif  // VIXL_SIM_FJCVTZS_WD_TRACE_AARCH64_H_
249