1// Copyright 2015, VIXL authors 2// All rights reserved. 3// 4// Redistribution and use in source and binary forms, with or without 5// modification, are permitted provided that the following conditions are met: 6// 7// * Redistributions of source code must retain the above copyright notice, 8// this list of conditions and the following disclaimer. 9// * Redistributions in binary form must reproduce the above copyright notice, 10// this list of conditions and the following disclaimer in the documentation 11// and/or other materials provided with the distribution. 12// * Neither the name of ARM Limited nor the names of its contributors may be 13// used to endorse or promote products derived from this software without 14// specific prior written permission. 15// 16// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 27 28// --------------------------------------------------------------------- 29// This file is auto generated using tools/generate_simulator_traces.py. 30// 31// PLEASE DO NOT EDIT. 32// --------------------------------------------------------------------- 33 34#ifndef VIXL_ASSEMBLER_COND_RD_OPERAND_RN_IDENTICAL_LOW_REGISTERS_IN_IT_BLOCK_MVN_T32_H_ 35#define VIXL_ASSEMBLER_COND_RD_OPERAND_RN_IDENTICAL_LOW_REGISTERS_IN_IT_BLOCK_MVN_T32_H_ 36 37const byte kInstruction_mvn_eq_r0_r0[] = { 38 0x08, 0xbf, 0xc0, 0x43 // It eq; mvn eq r0 r0 39}; 40const byte kInstruction_mvn_eq_r1_r1[] = { 41 0x08, 0xbf, 0xc9, 0x43 // It eq; mvn eq r1 r1 42}; 43const byte kInstruction_mvn_eq_r2_r2[] = { 44 0x08, 0xbf, 0xd2, 0x43 // It eq; mvn eq r2 r2 45}; 46const byte kInstruction_mvn_eq_r3_r3[] = { 47 0x08, 0xbf, 0xdb, 0x43 // It eq; mvn eq r3 r3 48}; 49const byte kInstruction_mvn_eq_r4_r4[] = { 50 0x08, 0xbf, 0xe4, 0x43 // It eq; mvn eq r4 r4 51}; 52const byte kInstruction_mvn_eq_r5_r5[] = { 53 0x08, 0xbf, 0xed, 0x43 // It eq; mvn eq r5 r5 54}; 55const byte kInstruction_mvn_eq_r6_r6[] = { 56 0x08, 0xbf, 0xf6, 0x43 // It eq; mvn eq r6 r6 57}; 58const byte kInstruction_mvn_eq_r7_r7[] = { 59 0x08, 0xbf, 0xff, 0x43 // It eq; mvn eq r7 r7 60}; 61const byte kInstruction_mvn_ne_r0_r0[] = { 62 0x18, 0xbf, 0xc0, 0x43 // It ne; mvn ne r0 r0 63}; 64const byte kInstruction_mvn_ne_r1_r1[] = { 65 0x18, 0xbf, 0xc9, 0x43 // It ne; mvn ne r1 r1 66}; 67const byte kInstruction_mvn_ne_r2_r2[] = { 68 0x18, 0xbf, 0xd2, 0x43 // It ne; mvn ne r2 r2 69}; 70const byte kInstruction_mvn_ne_r3_r3[] = { 71 0x18, 0xbf, 0xdb, 0x43 // It ne; mvn ne r3 r3 72}; 73const byte kInstruction_mvn_ne_r4_r4[] = { 74 0x18, 0xbf, 0xe4, 0x43 // It ne; mvn ne r4 r4 75}; 76const byte kInstruction_mvn_ne_r5_r5[] = { 77 0x18, 0xbf, 0xed, 0x43 // It ne; mvn ne r5 r5 78}; 79const byte kInstruction_mvn_ne_r6_r6[] = { 80 0x18, 0xbf, 0xf6, 0x43 // It ne; mvn ne r6 r6 81}; 82const byte kInstruction_mvn_ne_r7_r7[] = { 83 0x18, 0xbf, 0xff, 0x43 // It ne; mvn ne r7 r7 84}; 85const byte kInstruction_mvn_cs_r0_r0[] = { 86 0x28, 0xbf, 0xc0, 0x43 // It cs; mvn cs r0 r0 87}; 88const byte kInstruction_mvn_cs_r1_r1[] = { 89 0x28, 0xbf, 0xc9, 0x43 // It cs; mvn cs r1 r1 90}; 91const byte kInstruction_mvn_cs_r2_r2[] = { 92 0x28, 0xbf, 0xd2, 0x43 // It cs; mvn cs r2 r2 93}; 94const byte kInstruction_mvn_cs_r3_r3[] = { 95 0x28, 0xbf, 0xdb, 0x43 // It cs; mvn cs r3 r3 96}; 97const byte kInstruction_mvn_cs_r4_r4[] = { 98 0x28, 0xbf, 0xe4, 0x43 // It cs; mvn cs r4 r4 99}; 100const byte kInstruction_mvn_cs_r5_r5[] = { 101 0x28, 0xbf, 0xed, 0x43 // It cs; mvn cs r5 r5 102}; 103const byte kInstruction_mvn_cs_r6_r6[] = { 104 0x28, 0xbf, 0xf6, 0x43 // It cs; mvn cs r6 r6 105}; 106const byte kInstruction_mvn_cs_r7_r7[] = { 107 0x28, 0xbf, 0xff, 0x43 // It cs; mvn cs r7 r7 108}; 109const byte kInstruction_mvn_cc_r0_r0[] = { 110 0x38, 0xbf, 0xc0, 0x43 // It cc; mvn cc r0 r0 111}; 112const byte kInstruction_mvn_cc_r1_r1[] = { 113 0x38, 0xbf, 0xc9, 0x43 // It cc; mvn cc r1 r1 114}; 115const byte kInstruction_mvn_cc_r2_r2[] = { 116 0x38, 0xbf, 0xd2, 0x43 // It cc; mvn cc r2 r2 117}; 118const byte kInstruction_mvn_cc_r3_r3[] = { 119 0x38, 0xbf, 0xdb, 0x43 // It cc; mvn cc r3 r3 120}; 121const byte kInstruction_mvn_cc_r4_r4[] = { 122 0x38, 0xbf, 0xe4, 0x43 // It cc; mvn cc r4 r4 123}; 124const byte kInstruction_mvn_cc_r5_r5[] = { 125 0x38, 0xbf, 0xed, 0x43 // It cc; mvn cc r5 r5 126}; 127const byte kInstruction_mvn_cc_r6_r6[] = { 128 0x38, 0xbf, 0xf6, 0x43 // It cc; mvn cc r6 r6 129}; 130const byte kInstruction_mvn_cc_r7_r7[] = { 131 0x38, 0xbf, 0xff, 0x43 // It cc; mvn cc r7 r7 132}; 133const byte kInstruction_mvn_mi_r0_r0[] = { 134 0x48, 0xbf, 0xc0, 0x43 // It mi; mvn mi r0 r0 135}; 136const byte kInstruction_mvn_mi_r1_r1[] = { 137 0x48, 0xbf, 0xc9, 0x43 // It mi; mvn mi r1 r1 138}; 139const byte kInstruction_mvn_mi_r2_r2[] = { 140 0x48, 0xbf, 0xd2, 0x43 // It mi; mvn mi r2 r2 141}; 142const byte kInstruction_mvn_mi_r3_r3[] = { 143 0x48, 0xbf, 0xdb, 0x43 // It mi; mvn mi r3 r3 144}; 145const byte kInstruction_mvn_mi_r4_r4[] = { 146 0x48, 0xbf, 0xe4, 0x43 // It mi; mvn mi r4 r4 147}; 148const byte kInstruction_mvn_mi_r5_r5[] = { 149 0x48, 0xbf, 0xed, 0x43 // It mi; mvn mi r5 r5 150}; 151const byte kInstruction_mvn_mi_r6_r6[] = { 152 0x48, 0xbf, 0xf6, 0x43 // It mi; mvn mi r6 r6 153}; 154const byte kInstruction_mvn_mi_r7_r7[] = { 155 0x48, 0xbf, 0xff, 0x43 // It mi; mvn mi r7 r7 156}; 157const byte kInstruction_mvn_pl_r0_r0[] = { 158 0x58, 0xbf, 0xc0, 0x43 // It pl; mvn pl r0 r0 159}; 160const byte kInstruction_mvn_pl_r1_r1[] = { 161 0x58, 0xbf, 0xc9, 0x43 // It pl; mvn pl r1 r1 162}; 163const byte kInstruction_mvn_pl_r2_r2[] = { 164 0x58, 0xbf, 0xd2, 0x43 // It pl; mvn pl r2 r2 165}; 166const byte kInstruction_mvn_pl_r3_r3[] = { 167 0x58, 0xbf, 0xdb, 0x43 // It pl; mvn pl r3 r3 168}; 169const byte kInstruction_mvn_pl_r4_r4[] = { 170 0x58, 0xbf, 0xe4, 0x43 // It pl; mvn pl r4 r4 171}; 172const byte kInstruction_mvn_pl_r5_r5[] = { 173 0x58, 0xbf, 0xed, 0x43 // It pl; mvn pl r5 r5 174}; 175const byte kInstruction_mvn_pl_r6_r6[] = { 176 0x58, 0xbf, 0xf6, 0x43 // It pl; mvn pl r6 r6 177}; 178const byte kInstruction_mvn_pl_r7_r7[] = { 179 0x58, 0xbf, 0xff, 0x43 // It pl; mvn pl r7 r7 180}; 181const byte kInstruction_mvn_vs_r0_r0[] = { 182 0x68, 0xbf, 0xc0, 0x43 // It vs; mvn vs r0 r0 183}; 184const byte kInstruction_mvn_vs_r1_r1[] = { 185 0x68, 0xbf, 0xc9, 0x43 // It vs; mvn vs r1 r1 186}; 187const byte kInstruction_mvn_vs_r2_r2[] = { 188 0x68, 0xbf, 0xd2, 0x43 // It vs; mvn vs r2 r2 189}; 190const byte kInstruction_mvn_vs_r3_r3[] = { 191 0x68, 0xbf, 0xdb, 0x43 // It vs; mvn vs r3 r3 192}; 193const byte kInstruction_mvn_vs_r4_r4[] = { 194 0x68, 0xbf, 0xe4, 0x43 // It vs; mvn vs r4 r4 195}; 196const byte kInstruction_mvn_vs_r5_r5[] = { 197 0x68, 0xbf, 0xed, 0x43 // It vs; mvn vs r5 r5 198}; 199const byte kInstruction_mvn_vs_r6_r6[] = { 200 0x68, 0xbf, 0xf6, 0x43 // It vs; mvn vs r6 r6 201}; 202const byte kInstruction_mvn_vs_r7_r7[] = { 203 0x68, 0xbf, 0xff, 0x43 // It vs; mvn vs r7 r7 204}; 205const byte kInstruction_mvn_vc_r0_r0[] = { 206 0x78, 0xbf, 0xc0, 0x43 // It vc; mvn vc r0 r0 207}; 208const byte kInstruction_mvn_vc_r1_r1[] = { 209 0x78, 0xbf, 0xc9, 0x43 // It vc; mvn vc r1 r1 210}; 211const byte kInstruction_mvn_vc_r2_r2[] = { 212 0x78, 0xbf, 0xd2, 0x43 // It vc; mvn vc r2 r2 213}; 214const byte kInstruction_mvn_vc_r3_r3[] = { 215 0x78, 0xbf, 0xdb, 0x43 // It vc; mvn vc r3 r3 216}; 217const byte kInstruction_mvn_vc_r4_r4[] = { 218 0x78, 0xbf, 0xe4, 0x43 // It vc; mvn vc r4 r4 219}; 220const byte kInstruction_mvn_vc_r5_r5[] = { 221 0x78, 0xbf, 0xed, 0x43 // It vc; mvn vc r5 r5 222}; 223const byte kInstruction_mvn_vc_r6_r6[] = { 224 0x78, 0xbf, 0xf6, 0x43 // It vc; mvn vc r6 r6 225}; 226const byte kInstruction_mvn_vc_r7_r7[] = { 227 0x78, 0xbf, 0xff, 0x43 // It vc; mvn vc r7 r7 228}; 229const byte kInstruction_mvn_hi_r0_r0[] = { 230 0x88, 0xbf, 0xc0, 0x43 // It hi; mvn hi r0 r0 231}; 232const byte kInstruction_mvn_hi_r1_r1[] = { 233 0x88, 0xbf, 0xc9, 0x43 // It hi; mvn hi r1 r1 234}; 235const byte kInstruction_mvn_hi_r2_r2[] = { 236 0x88, 0xbf, 0xd2, 0x43 // It hi; mvn hi r2 r2 237}; 238const byte kInstruction_mvn_hi_r3_r3[] = { 239 0x88, 0xbf, 0xdb, 0x43 // It hi; mvn hi r3 r3 240}; 241const byte kInstruction_mvn_hi_r4_r4[] = { 242 0x88, 0xbf, 0xe4, 0x43 // It hi; mvn hi r4 r4 243}; 244const byte kInstruction_mvn_hi_r5_r5[] = { 245 0x88, 0xbf, 0xed, 0x43 // It hi; mvn hi r5 r5 246}; 247const byte kInstruction_mvn_hi_r6_r6[] = { 248 0x88, 0xbf, 0xf6, 0x43 // It hi; mvn hi r6 r6 249}; 250const byte kInstruction_mvn_hi_r7_r7[] = { 251 0x88, 0xbf, 0xff, 0x43 // It hi; mvn hi r7 r7 252}; 253const byte kInstruction_mvn_ls_r0_r0[] = { 254 0x98, 0xbf, 0xc0, 0x43 // It ls; mvn ls r0 r0 255}; 256const byte kInstruction_mvn_ls_r1_r1[] = { 257 0x98, 0xbf, 0xc9, 0x43 // It ls; mvn ls r1 r1 258}; 259const byte kInstruction_mvn_ls_r2_r2[] = { 260 0x98, 0xbf, 0xd2, 0x43 // It ls; mvn ls r2 r2 261}; 262const byte kInstruction_mvn_ls_r3_r3[] = { 263 0x98, 0xbf, 0xdb, 0x43 // It ls; mvn ls r3 r3 264}; 265const byte kInstruction_mvn_ls_r4_r4[] = { 266 0x98, 0xbf, 0xe4, 0x43 // It ls; mvn ls r4 r4 267}; 268const byte kInstruction_mvn_ls_r5_r5[] = { 269 0x98, 0xbf, 0xed, 0x43 // It ls; mvn ls r5 r5 270}; 271const byte kInstruction_mvn_ls_r6_r6[] = { 272 0x98, 0xbf, 0xf6, 0x43 // It ls; mvn ls r6 r6 273}; 274const byte kInstruction_mvn_ls_r7_r7[] = { 275 0x98, 0xbf, 0xff, 0x43 // It ls; mvn ls r7 r7 276}; 277const byte kInstruction_mvn_ge_r0_r0[] = { 278 0xa8, 0xbf, 0xc0, 0x43 // It ge; mvn ge r0 r0 279}; 280const byte kInstruction_mvn_ge_r1_r1[] = { 281 0xa8, 0xbf, 0xc9, 0x43 // It ge; mvn ge r1 r1 282}; 283const byte kInstruction_mvn_ge_r2_r2[] = { 284 0xa8, 0xbf, 0xd2, 0x43 // It ge; mvn ge r2 r2 285}; 286const byte kInstruction_mvn_ge_r3_r3[] = { 287 0xa8, 0xbf, 0xdb, 0x43 // It ge; mvn ge r3 r3 288}; 289const byte kInstruction_mvn_ge_r4_r4[] = { 290 0xa8, 0xbf, 0xe4, 0x43 // It ge; mvn ge r4 r4 291}; 292const byte kInstruction_mvn_ge_r5_r5[] = { 293 0xa8, 0xbf, 0xed, 0x43 // It ge; mvn ge r5 r5 294}; 295const byte kInstruction_mvn_ge_r6_r6[] = { 296 0xa8, 0xbf, 0xf6, 0x43 // It ge; mvn ge r6 r6 297}; 298const byte kInstruction_mvn_ge_r7_r7[] = { 299 0xa8, 0xbf, 0xff, 0x43 // It ge; mvn ge r7 r7 300}; 301const byte kInstruction_mvn_lt_r0_r0[] = { 302 0xb8, 0xbf, 0xc0, 0x43 // It lt; mvn lt r0 r0 303}; 304const byte kInstruction_mvn_lt_r1_r1[] = { 305 0xb8, 0xbf, 0xc9, 0x43 // It lt; mvn lt r1 r1 306}; 307const byte kInstruction_mvn_lt_r2_r2[] = { 308 0xb8, 0xbf, 0xd2, 0x43 // It lt; mvn lt r2 r2 309}; 310const byte kInstruction_mvn_lt_r3_r3[] = { 311 0xb8, 0xbf, 0xdb, 0x43 // It lt; mvn lt r3 r3 312}; 313const byte kInstruction_mvn_lt_r4_r4[] = { 314 0xb8, 0xbf, 0xe4, 0x43 // It lt; mvn lt r4 r4 315}; 316const byte kInstruction_mvn_lt_r5_r5[] = { 317 0xb8, 0xbf, 0xed, 0x43 // It lt; mvn lt r5 r5 318}; 319const byte kInstruction_mvn_lt_r6_r6[] = { 320 0xb8, 0xbf, 0xf6, 0x43 // It lt; mvn lt r6 r6 321}; 322const byte kInstruction_mvn_lt_r7_r7[] = { 323 0xb8, 0xbf, 0xff, 0x43 // It lt; mvn lt r7 r7 324}; 325const byte kInstruction_mvn_gt_r0_r0[] = { 326 0xc8, 0xbf, 0xc0, 0x43 // It gt; mvn gt r0 r0 327}; 328const byte kInstruction_mvn_gt_r1_r1[] = { 329 0xc8, 0xbf, 0xc9, 0x43 // It gt; mvn gt r1 r1 330}; 331const byte kInstruction_mvn_gt_r2_r2[] = { 332 0xc8, 0xbf, 0xd2, 0x43 // It gt; mvn gt r2 r2 333}; 334const byte kInstruction_mvn_gt_r3_r3[] = { 335 0xc8, 0xbf, 0xdb, 0x43 // It gt; mvn gt r3 r3 336}; 337const byte kInstruction_mvn_gt_r4_r4[] = { 338 0xc8, 0xbf, 0xe4, 0x43 // It gt; mvn gt r4 r4 339}; 340const byte kInstruction_mvn_gt_r5_r5[] = { 341 0xc8, 0xbf, 0xed, 0x43 // It gt; mvn gt r5 r5 342}; 343const byte kInstruction_mvn_gt_r6_r6[] = { 344 0xc8, 0xbf, 0xf6, 0x43 // It gt; mvn gt r6 r6 345}; 346const byte kInstruction_mvn_gt_r7_r7[] = { 347 0xc8, 0xbf, 0xff, 0x43 // It gt; mvn gt r7 r7 348}; 349const byte kInstruction_mvn_le_r0_r0[] = { 350 0xd8, 0xbf, 0xc0, 0x43 // It le; mvn le r0 r0 351}; 352const byte kInstruction_mvn_le_r1_r1[] = { 353 0xd8, 0xbf, 0xc9, 0x43 // It le; mvn le r1 r1 354}; 355const byte kInstruction_mvn_le_r2_r2[] = { 356 0xd8, 0xbf, 0xd2, 0x43 // It le; mvn le r2 r2 357}; 358const byte kInstruction_mvn_le_r3_r3[] = { 359 0xd8, 0xbf, 0xdb, 0x43 // It le; mvn le r3 r3 360}; 361const byte kInstruction_mvn_le_r4_r4[] = { 362 0xd8, 0xbf, 0xe4, 0x43 // It le; mvn le r4 r4 363}; 364const byte kInstruction_mvn_le_r5_r5[] = { 365 0xd8, 0xbf, 0xed, 0x43 // It le; mvn le r5 r5 366}; 367const byte kInstruction_mvn_le_r6_r6[] = { 368 0xd8, 0xbf, 0xf6, 0x43 // It le; mvn le r6 r6 369}; 370const byte kInstruction_mvn_le_r7_r7[] = { 371 0xd8, 0xbf, 0xff, 0x43 // It le; mvn le r7 r7 372}; 373const TestResult kReferencemvn[] = { 374 { 375 ARRAY_SIZE(kInstruction_mvn_eq_r0_r0), 376 kInstruction_mvn_eq_r0_r0, 377 }, 378 { 379 ARRAY_SIZE(kInstruction_mvn_eq_r1_r1), 380 kInstruction_mvn_eq_r1_r1, 381 }, 382 { 383 ARRAY_SIZE(kInstruction_mvn_eq_r2_r2), 384 kInstruction_mvn_eq_r2_r2, 385 }, 386 { 387 ARRAY_SIZE(kInstruction_mvn_eq_r3_r3), 388 kInstruction_mvn_eq_r3_r3, 389 }, 390 { 391 ARRAY_SIZE(kInstruction_mvn_eq_r4_r4), 392 kInstruction_mvn_eq_r4_r4, 393 }, 394 { 395 ARRAY_SIZE(kInstruction_mvn_eq_r5_r5), 396 kInstruction_mvn_eq_r5_r5, 397 }, 398 { 399 ARRAY_SIZE(kInstruction_mvn_eq_r6_r6), 400 kInstruction_mvn_eq_r6_r6, 401 }, 402 { 403 ARRAY_SIZE(kInstruction_mvn_eq_r7_r7), 404 kInstruction_mvn_eq_r7_r7, 405 }, 406 { 407 ARRAY_SIZE(kInstruction_mvn_ne_r0_r0), 408 kInstruction_mvn_ne_r0_r0, 409 }, 410 { 411 ARRAY_SIZE(kInstruction_mvn_ne_r1_r1), 412 kInstruction_mvn_ne_r1_r1, 413 }, 414 { 415 ARRAY_SIZE(kInstruction_mvn_ne_r2_r2), 416 kInstruction_mvn_ne_r2_r2, 417 }, 418 { 419 ARRAY_SIZE(kInstruction_mvn_ne_r3_r3), 420 kInstruction_mvn_ne_r3_r3, 421 }, 422 { 423 ARRAY_SIZE(kInstruction_mvn_ne_r4_r4), 424 kInstruction_mvn_ne_r4_r4, 425 }, 426 { 427 ARRAY_SIZE(kInstruction_mvn_ne_r5_r5), 428 kInstruction_mvn_ne_r5_r5, 429 }, 430 { 431 ARRAY_SIZE(kInstruction_mvn_ne_r6_r6), 432 kInstruction_mvn_ne_r6_r6, 433 }, 434 { 435 ARRAY_SIZE(kInstruction_mvn_ne_r7_r7), 436 kInstruction_mvn_ne_r7_r7, 437 }, 438 { 439 ARRAY_SIZE(kInstruction_mvn_cs_r0_r0), 440 kInstruction_mvn_cs_r0_r0, 441 }, 442 { 443 ARRAY_SIZE(kInstruction_mvn_cs_r1_r1), 444 kInstruction_mvn_cs_r1_r1, 445 }, 446 { 447 ARRAY_SIZE(kInstruction_mvn_cs_r2_r2), 448 kInstruction_mvn_cs_r2_r2, 449 }, 450 { 451 ARRAY_SIZE(kInstruction_mvn_cs_r3_r3), 452 kInstruction_mvn_cs_r3_r3, 453 }, 454 { 455 ARRAY_SIZE(kInstruction_mvn_cs_r4_r4), 456 kInstruction_mvn_cs_r4_r4, 457 }, 458 { 459 ARRAY_SIZE(kInstruction_mvn_cs_r5_r5), 460 kInstruction_mvn_cs_r5_r5, 461 }, 462 { 463 ARRAY_SIZE(kInstruction_mvn_cs_r6_r6), 464 kInstruction_mvn_cs_r6_r6, 465 }, 466 { 467 ARRAY_SIZE(kInstruction_mvn_cs_r7_r7), 468 kInstruction_mvn_cs_r7_r7, 469 }, 470 { 471 ARRAY_SIZE(kInstruction_mvn_cc_r0_r0), 472 kInstruction_mvn_cc_r0_r0, 473 }, 474 { 475 ARRAY_SIZE(kInstruction_mvn_cc_r1_r1), 476 kInstruction_mvn_cc_r1_r1, 477 }, 478 { 479 ARRAY_SIZE(kInstruction_mvn_cc_r2_r2), 480 kInstruction_mvn_cc_r2_r2, 481 }, 482 { 483 ARRAY_SIZE(kInstruction_mvn_cc_r3_r3), 484 kInstruction_mvn_cc_r3_r3, 485 }, 486 { 487 ARRAY_SIZE(kInstruction_mvn_cc_r4_r4), 488 kInstruction_mvn_cc_r4_r4, 489 }, 490 { 491 ARRAY_SIZE(kInstruction_mvn_cc_r5_r5), 492 kInstruction_mvn_cc_r5_r5, 493 }, 494 { 495 ARRAY_SIZE(kInstruction_mvn_cc_r6_r6), 496 kInstruction_mvn_cc_r6_r6, 497 }, 498 { 499 ARRAY_SIZE(kInstruction_mvn_cc_r7_r7), 500 kInstruction_mvn_cc_r7_r7, 501 }, 502 { 503 ARRAY_SIZE(kInstruction_mvn_mi_r0_r0), 504 kInstruction_mvn_mi_r0_r0, 505 }, 506 { 507 ARRAY_SIZE(kInstruction_mvn_mi_r1_r1), 508 kInstruction_mvn_mi_r1_r1, 509 }, 510 { 511 ARRAY_SIZE(kInstruction_mvn_mi_r2_r2), 512 kInstruction_mvn_mi_r2_r2, 513 }, 514 { 515 ARRAY_SIZE(kInstruction_mvn_mi_r3_r3), 516 kInstruction_mvn_mi_r3_r3, 517 }, 518 { 519 ARRAY_SIZE(kInstruction_mvn_mi_r4_r4), 520 kInstruction_mvn_mi_r4_r4, 521 }, 522 { 523 ARRAY_SIZE(kInstruction_mvn_mi_r5_r5), 524 kInstruction_mvn_mi_r5_r5, 525 }, 526 { 527 ARRAY_SIZE(kInstruction_mvn_mi_r6_r6), 528 kInstruction_mvn_mi_r6_r6, 529 }, 530 { 531 ARRAY_SIZE(kInstruction_mvn_mi_r7_r7), 532 kInstruction_mvn_mi_r7_r7, 533 }, 534 { 535 ARRAY_SIZE(kInstruction_mvn_pl_r0_r0), 536 kInstruction_mvn_pl_r0_r0, 537 }, 538 { 539 ARRAY_SIZE(kInstruction_mvn_pl_r1_r1), 540 kInstruction_mvn_pl_r1_r1, 541 }, 542 { 543 ARRAY_SIZE(kInstruction_mvn_pl_r2_r2), 544 kInstruction_mvn_pl_r2_r2, 545 }, 546 { 547 ARRAY_SIZE(kInstruction_mvn_pl_r3_r3), 548 kInstruction_mvn_pl_r3_r3, 549 }, 550 { 551 ARRAY_SIZE(kInstruction_mvn_pl_r4_r4), 552 kInstruction_mvn_pl_r4_r4, 553 }, 554 { 555 ARRAY_SIZE(kInstruction_mvn_pl_r5_r5), 556 kInstruction_mvn_pl_r5_r5, 557 }, 558 { 559 ARRAY_SIZE(kInstruction_mvn_pl_r6_r6), 560 kInstruction_mvn_pl_r6_r6, 561 }, 562 { 563 ARRAY_SIZE(kInstruction_mvn_pl_r7_r7), 564 kInstruction_mvn_pl_r7_r7, 565 }, 566 { 567 ARRAY_SIZE(kInstruction_mvn_vs_r0_r0), 568 kInstruction_mvn_vs_r0_r0, 569 }, 570 { 571 ARRAY_SIZE(kInstruction_mvn_vs_r1_r1), 572 kInstruction_mvn_vs_r1_r1, 573 }, 574 { 575 ARRAY_SIZE(kInstruction_mvn_vs_r2_r2), 576 kInstruction_mvn_vs_r2_r2, 577 }, 578 { 579 ARRAY_SIZE(kInstruction_mvn_vs_r3_r3), 580 kInstruction_mvn_vs_r3_r3, 581 }, 582 { 583 ARRAY_SIZE(kInstruction_mvn_vs_r4_r4), 584 kInstruction_mvn_vs_r4_r4, 585 }, 586 { 587 ARRAY_SIZE(kInstruction_mvn_vs_r5_r5), 588 kInstruction_mvn_vs_r5_r5, 589 }, 590 { 591 ARRAY_SIZE(kInstruction_mvn_vs_r6_r6), 592 kInstruction_mvn_vs_r6_r6, 593 }, 594 { 595 ARRAY_SIZE(kInstruction_mvn_vs_r7_r7), 596 kInstruction_mvn_vs_r7_r7, 597 }, 598 { 599 ARRAY_SIZE(kInstruction_mvn_vc_r0_r0), 600 kInstruction_mvn_vc_r0_r0, 601 }, 602 { 603 ARRAY_SIZE(kInstruction_mvn_vc_r1_r1), 604 kInstruction_mvn_vc_r1_r1, 605 }, 606 { 607 ARRAY_SIZE(kInstruction_mvn_vc_r2_r2), 608 kInstruction_mvn_vc_r2_r2, 609 }, 610 { 611 ARRAY_SIZE(kInstruction_mvn_vc_r3_r3), 612 kInstruction_mvn_vc_r3_r3, 613 }, 614 { 615 ARRAY_SIZE(kInstruction_mvn_vc_r4_r4), 616 kInstruction_mvn_vc_r4_r4, 617 }, 618 { 619 ARRAY_SIZE(kInstruction_mvn_vc_r5_r5), 620 kInstruction_mvn_vc_r5_r5, 621 }, 622 { 623 ARRAY_SIZE(kInstruction_mvn_vc_r6_r6), 624 kInstruction_mvn_vc_r6_r6, 625 }, 626 { 627 ARRAY_SIZE(kInstruction_mvn_vc_r7_r7), 628 kInstruction_mvn_vc_r7_r7, 629 }, 630 { 631 ARRAY_SIZE(kInstruction_mvn_hi_r0_r0), 632 kInstruction_mvn_hi_r0_r0, 633 }, 634 { 635 ARRAY_SIZE(kInstruction_mvn_hi_r1_r1), 636 kInstruction_mvn_hi_r1_r1, 637 }, 638 { 639 ARRAY_SIZE(kInstruction_mvn_hi_r2_r2), 640 kInstruction_mvn_hi_r2_r2, 641 }, 642 { 643 ARRAY_SIZE(kInstruction_mvn_hi_r3_r3), 644 kInstruction_mvn_hi_r3_r3, 645 }, 646 { 647 ARRAY_SIZE(kInstruction_mvn_hi_r4_r4), 648 kInstruction_mvn_hi_r4_r4, 649 }, 650 { 651 ARRAY_SIZE(kInstruction_mvn_hi_r5_r5), 652 kInstruction_mvn_hi_r5_r5, 653 }, 654 { 655 ARRAY_SIZE(kInstruction_mvn_hi_r6_r6), 656 kInstruction_mvn_hi_r6_r6, 657 }, 658 { 659 ARRAY_SIZE(kInstruction_mvn_hi_r7_r7), 660 kInstruction_mvn_hi_r7_r7, 661 }, 662 { 663 ARRAY_SIZE(kInstruction_mvn_ls_r0_r0), 664 kInstruction_mvn_ls_r0_r0, 665 }, 666 { 667 ARRAY_SIZE(kInstruction_mvn_ls_r1_r1), 668 kInstruction_mvn_ls_r1_r1, 669 }, 670 { 671 ARRAY_SIZE(kInstruction_mvn_ls_r2_r2), 672 kInstruction_mvn_ls_r2_r2, 673 }, 674 { 675 ARRAY_SIZE(kInstruction_mvn_ls_r3_r3), 676 kInstruction_mvn_ls_r3_r3, 677 }, 678 { 679 ARRAY_SIZE(kInstruction_mvn_ls_r4_r4), 680 kInstruction_mvn_ls_r4_r4, 681 }, 682 { 683 ARRAY_SIZE(kInstruction_mvn_ls_r5_r5), 684 kInstruction_mvn_ls_r5_r5, 685 }, 686 { 687 ARRAY_SIZE(kInstruction_mvn_ls_r6_r6), 688 kInstruction_mvn_ls_r6_r6, 689 }, 690 { 691 ARRAY_SIZE(kInstruction_mvn_ls_r7_r7), 692 kInstruction_mvn_ls_r7_r7, 693 }, 694 { 695 ARRAY_SIZE(kInstruction_mvn_ge_r0_r0), 696 kInstruction_mvn_ge_r0_r0, 697 }, 698 { 699 ARRAY_SIZE(kInstruction_mvn_ge_r1_r1), 700 kInstruction_mvn_ge_r1_r1, 701 }, 702 { 703 ARRAY_SIZE(kInstruction_mvn_ge_r2_r2), 704 kInstruction_mvn_ge_r2_r2, 705 }, 706 { 707 ARRAY_SIZE(kInstruction_mvn_ge_r3_r3), 708 kInstruction_mvn_ge_r3_r3, 709 }, 710 { 711 ARRAY_SIZE(kInstruction_mvn_ge_r4_r4), 712 kInstruction_mvn_ge_r4_r4, 713 }, 714 { 715 ARRAY_SIZE(kInstruction_mvn_ge_r5_r5), 716 kInstruction_mvn_ge_r5_r5, 717 }, 718 { 719 ARRAY_SIZE(kInstruction_mvn_ge_r6_r6), 720 kInstruction_mvn_ge_r6_r6, 721 }, 722 { 723 ARRAY_SIZE(kInstruction_mvn_ge_r7_r7), 724 kInstruction_mvn_ge_r7_r7, 725 }, 726 { 727 ARRAY_SIZE(kInstruction_mvn_lt_r0_r0), 728 kInstruction_mvn_lt_r0_r0, 729 }, 730 { 731 ARRAY_SIZE(kInstruction_mvn_lt_r1_r1), 732 kInstruction_mvn_lt_r1_r1, 733 }, 734 { 735 ARRAY_SIZE(kInstruction_mvn_lt_r2_r2), 736 kInstruction_mvn_lt_r2_r2, 737 }, 738 { 739 ARRAY_SIZE(kInstruction_mvn_lt_r3_r3), 740 kInstruction_mvn_lt_r3_r3, 741 }, 742 { 743 ARRAY_SIZE(kInstruction_mvn_lt_r4_r4), 744 kInstruction_mvn_lt_r4_r4, 745 }, 746 { 747 ARRAY_SIZE(kInstruction_mvn_lt_r5_r5), 748 kInstruction_mvn_lt_r5_r5, 749 }, 750 { 751 ARRAY_SIZE(kInstruction_mvn_lt_r6_r6), 752 kInstruction_mvn_lt_r6_r6, 753 }, 754 { 755 ARRAY_SIZE(kInstruction_mvn_lt_r7_r7), 756 kInstruction_mvn_lt_r7_r7, 757 }, 758 { 759 ARRAY_SIZE(kInstruction_mvn_gt_r0_r0), 760 kInstruction_mvn_gt_r0_r0, 761 }, 762 { 763 ARRAY_SIZE(kInstruction_mvn_gt_r1_r1), 764 kInstruction_mvn_gt_r1_r1, 765 }, 766 { 767 ARRAY_SIZE(kInstruction_mvn_gt_r2_r2), 768 kInstruction_mvn_gt_r2_r2, 769 }, 770 { 771 ARRAY_SIZE(kInstruction_mvn_gt_r3_r3), 772 kInstruction_mvn_gt_r3_r3, 773 }, 774 { 775 ARRAY_SIZE(kInstruction_mvn_gt_r4_r4), 776 kInstruction_mvn_gt_r4_r4, 777 }, 778 { 779 ARRAY_SIZE(kInstruction_mvn_gt_r5_r5), 780 kInstruction_mvn_gt_r5_r5, 781 }, 782 { 783 ARRAY_SIZE(kInstruction_mvn_gt_r6_r6), 784 kInstruction_mvn_gt_r6_r6, 785 }, 786 { 787 ARRAY_SIZE(kInstruction_mvn_gt_r7_r7), 788 kInstruction_mvn_gt_r7_r7, 789 }, 790 { 791 ARRAY_SIZE(kInstruction_mvn_le_r0_r0), 792 kInstruction_mvn_le_r0_r0, 793 }, 794 { 795 ARRAY_SIZE(kInstruction_mvn_le_r1_r1), 796 kInstruction_mvn_le_r1_r1, 797 }, 798 { 799 ARRAY_SIZE(kInstruction_mvn_le_r2_r2), 800 kInstruction_mvn_le_r2_r2, 801 }, 802 { 803 ARRAY_SIZE(kInstruction_mvn_le_r3_r3), 804 kInstruction_mvn_le_r3_r3, 805 }, 806 { 807 ARRAY_SIZE(kInstruction_mvn_le_r4_r4), 808 kInstruction_mvn_le_r4_r4, 809 }, 810 { 811 ARRAY_SIZE(kInstruction_mvn_le_r5_r5), 812 kInstruction_mvn_le_r5_r5, 813 }, 814 { 815 ARRAY_SIZE(kInstruction_mvn_le_r6_r6), 816 kInstruction_mvn_le_r6_r6, 817 }, 818 { 819 ARRAY_SIZE(kInstruction_mvn_le_r7_r7), 820 kInstruction_mvn_le_r7_r7, 821 }, 822}; 823 824#endif // VIXL_ASSEMBLER_COND_RD_OPERAND_RN_IDENTICAL_LOW_REGISTERS_IN_IT_BLOCK_MVN_T32_H_ 825