1b8021494Sopenharmony_ci// Copyright 2016, VIXL authors 2b8021494Sopenharmony_ci// All rights reserved. 3b8021494Sopenharmony_ci// 4b8021494Sopenharmony_ci// Redistribution and use in source and binary forms, with or without 5b8021494Sopenharmony_ci// modification, are permitted provided that the following conditions are met: 6b8021494Sopenharmony_ci// 7b8021494Sopenharmony_ci// * Redistributions of source code must retain the above copyright notice, 8b8021494Sopenharmony_ci// this list of conditions and the following disclaimer. 9b8021494Sopenharmony_ci// * Redistributions in binary form must reproduce the above copyright notice, 10b8021494Sopenharmony_ci// this list of conditions and the following disclaimer in the documentation 11b8021494Sopenharmony_ci// and/or other materials provided with the distribution. 12b8021494Sopenharmony_ci// * Neither the name of ARM Limited nor the names of its contributors may be 13b8021494Sopenharmony_ci// used to endorse or promote products derived from this software without 14b8021494Sopenharmony_ci// specific prior written permission. 15b8021494Sopenharmony_ci// 16b8021494Sopenharmony_ci// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS CONTRIBUTORS "AS IS" AND 17b8021494Sopenharmony_ci// ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18b8021494Sopenharmony_ci// WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19b8021494Sopenharmony_ci// DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE 20b8021494Sopenharmony_ci// FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21b8021494Sopenharmony_ci// DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22b8021494Sopenharmony_ci// SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER 23b8021494Sopenharmony_ci// CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24b8021494Sopenharmony_ci// OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 25b8021494Sopenharmony_ci// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26b8021494Sopenharmony_ci 27b8021494Sopenharmony_ci// Test description for instructions of the following forms: 28b8021494Sopenharmony_ci// MNEMONIC{<c>}.W <Rd>, <Rn>, #<const> 29b8021494Sopenharmony_ci// MNEMONIC{<c>}.W <Rd>, SP, #<const> 30b8021494Sopenharmony_ci// 31b8021494Sopenharmony_ci// The instructions covered in this test do not write to the `Q` and `GE` flags, 32b8021494Sopenharmony_ci// these are covered in other description files. 33b8021494Sopenharmony_ci 34b8021494Sopenharmony_ci{ 35b8021494Sopenharmony_ci "mnemonics" : [ 36b8021494Sopenharmony_ci "Adc", // ADC{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 37b8021494Sopenharmony_ci "Adcs", // ADCS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 38b8021494Sopenharmony_ci "Add", // ADD{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T3 39b8021494Sopenharmony_ci // ADD{<c>}{<q>} {<Rd>}, SP, #<const> ; T3 40b8021494Sopenharmony_ci "Adds", // ADDS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T3 41b8021494Sopenharmony_ci // ADDS{<c>}{<q>} {<Rd>}, SP, #<const> ; T3 42b8021494Sopenharmony_ci "And", // AND{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 43b8021494Sopenharmony_ci "Ands", // ANDS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 44b8021494Sopenharmony_ci "Bic", // BIC{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 45b8021494Sopenharmony_ci "Bics", // BICS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 46b8021494Sopenharmony_ci "Eor", // EOR{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 47b8021494Sopenharmony_ci "Eors", // EORS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 48b8021494Sopenharmony_ci "Orn", // ORN{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 49b8021494Sopenharmony_ci "Orns", // ORNS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 50b8021494Sopenharmony_ci "Orr", // ORR{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 51b8021494Sopenharmony_ci "Orrs", // ORRS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 52b8021494Sopenharmony_ci "Rsb", // RSB{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T2 53b8021494Sopenharmony_ci "Rsbs", // RSBS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T2 54b8021494Sopenharmony_ci "Sbc", // SBC{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 55b8021494Sopenharmony_ci "Sbcs", // SBCS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T1 56b8021494Sopenharmony_ci "Sub", // SUB{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T3 57b8021494Sopenharmony_ci // SUB{<c>}{<q>} {<Rd>}, SP, #<const> ; T2 58b8021494Sopenharmony_ci "Subs" // SUBS{<c>}{<q>} {<Rd>}, <Rn>, #<const> ; T3 59b8021494Sopenharmony_ci // SUBS{<c>}{<q>} {<Rd>}, SP, #<const> ; T2 60b8021494Sopenharmony_ci ], 61b8021494Sopenharmony_ci "description" : { 62b8021494Sopenharmony_ci "operands": [ 63b8021494Sopenharmony_ci { 64b8021494Sopenharmony_ci "name": "cond", 65b8021494Sopenharmony_ci "type": "Always" 66b8021494Sopenharmony_ci }, 67b8021494Sopenharmony_ci { 68b8021494Sopenharmony_ci "name": "rd", 69b8021494Sopenharmony_ci "type": "AllRegistersButPC" 70b8021494Sopenharmony_ci }, 71b8021494Sopenharmony_ci { 72b8021494Sopenharmony_ci "name": "rn", 73b8021494Sopenharmony_ci "type": "AllRegistersButPC" 74b8021494Sopenharmony_ci }, 75b8021494Sopenharmony_ci { 76b8021494Sopenharmony_ci "name": "op", 77b8021494Sopenharmony_ci "wrapper": "Operand", 78b8021494Sopenharmony_ci "operands": [ 79b8021494Sopenharmony_ci { 80b8021494Sopenharmony_ci "name": "immediate", 81b8021494Sopenharmony_ci "type": "T32ModifiedImmediate" 82b8021494Sopenharmony_ci } 83b8021494Sopenharmony_ci ] 84b8021494Sopenharmony_ci } 85b8021494Sopenharmony_ci ], 86b8021494Sopenharmony_ci "inputs":[ 87b8021494Sopenharmony_ci { 88b8021494Sopenharmony_ci "name": "apsr", 89b8021494Sopenharmony_ci "type": "NZCV" 90b8021494Sopenharmony_ci }, 91b8021494Sopenharmony_ci { 92b8021494Sopenharmony_ci "name": "rd", 93b8021494Sopenharmony_ci "type": "Register" 94b8021494Sopenharmony_ci }, 95b8021494Sopenharmony_ci { 96b8021494Sopenharmony_ci "name": "rn", 97b8021494Sopenharmony_ci "type": "Register" 98b8021494Sopenharmony_ci } 99b8021494Sopenharmony_ci ] 100b8021494Sopenharmony_ci }, 101b8021494Sopenharmony_ci "test-files": [ 102b8021494Sopenharmony_ci { 103b8021494Sopenharmony_ci "type": "assembler", 104b8021494Sopenharmony_ci "test-cases": [ 105b8021494Sopenharmony_ci { 106b8021494Sopenharmony_ci "name": "Operands", 107b8021494Sopenharmony_ci "operands": [ 108b8021494Sopenharmony_ci "rd", "rn", "immediate" 109b8021494Sopenharmony_ci ], 110b8021494Sopenharmony_ci "operand-limit": 500 111b8021494Sopenharmony_ci } 112b8021494Sopenharmony_ci ] 113b8021494Sopenharmony_ci }, 114b8021494Sopenharmony_ci { 115b8021494Sopenharmony_ci "type": "simulator", 116b8021494Sopenharmony_ci "test-cases": [ 117b8021494Sopenharmony_ci { 118b8021494Sopenharmony_ci "name": "RdIsRn", 119b8021494Sopenharmony_ci "operands": [ 120b8021494Sopenharmony_ci "rd", "rn", "immediate" 121b8021494Sopenharmony_ci ], 122b8021494Sopenharmony_ci "inputs": [ 123b8021494Sopenharmony_ci "rd", "rn" 124b8021494Sopenharmony_ci ], 125b8021494Sopenharmony_ci "operand-filter": "rd == rn", 126b8021494Sopenharmony_ci "operand-limit": 10, 127b8021494Sopenharmony_ci "input-filter": "rd == rn" 128b8021494Sopenharmony_ci }, 129b8021494Sopenharmony_ci { 130b8021494Sopenharmony_ci "name": "RdIsNotRn", 131b8021494Sopenharmony_ci "operands": [ 132b8021494Sopenharmony_ci "rd", "rn", "immediate" 133b8021494Sopenharmony_ci ], 134b8021494Sopenharmony_ci "inputs": [ 135b8021494Sopenharmony_ci "rd", "rn" 136b8021494Sopenharmony_ci ], 137b8021494Sopenharmony_ci "operand-filter": "rd != rn", 138b8021494Sopenharmony_ci "operand-limit": 10 139b8021494Sopenharmony_ci }, 140b8021494Sopenharmony_ci { 141b8021494Sopenharmony_ci "name": "ModifiedImmediate", 142b8021494Sopenharmony_ci "operands": [ 143b8021494Sopenharmony_ci "immediate" 144b8021494Sopenharmony_ci ], 145b8021494Sopenharmony_ci "inputs": [ 146b8021494Sopenharmony_ci "rn" 147b8021494Sopenharmony_ci ] 148b8021494Sopenharmony_ci } 149b8021494Sopenharmony_ci ] 150b8021494Sopenharmony_ci } 151b8021494Sopenharmony_ci ] 152b8021494Sopenharmony_ci} 153