15bd8deadSopenharmony_ciName
25bd8deadSopenharmony_ci
35bd8deadSopenharmony_ci    NV_pixel_data_range
45bd8deadSopenharmony_ci
55bd8deadSopenharmony_ciName Strings
65bd8deadSopenharmony_ci
75bd8deadSopenharmony_ci    GL_NV_pixel_data_range
85bd8deadSopenharmony_ci
95bd8deadSopenharmony_ciContact
105bd8deadSopenharmony_ci
115bd8deadSopenharmony_ci    Matt Craighead, NVIDIA Corporation (mcraighead 'at' nvidia.com)
125bd8deadSopenharmony_ci
135bd8deadSopenharmony_ciNotice
145bd8deadSopenharmony_ci
155bd8deadSopenharmony_ci    Copyright NVIDIA Corporation, 2000, 2001, 2002.
165bd8deadSopenharmony_ci
175bd8deadSopenharmony_ciIP Status
185bd8deadSopenharmony_ci
195bd8deadSopenharmony_ci    NVIDIA Proprietary.
205bd8deadSopenharmony_ci
215bd8deadSopenharmony_ciStatus
225bd8deadSopenharmony_ci
235bd8deadSopenharmony_ci    Shipping (version 1.0)
245bd8deadSopenharmony_ci
255bd8deadSopenharmony_ciVersion
265bd8deadSopenharmony_ci
275bd8deadSopenharmony_ci    NVIDIA Date: November 7, 2002 (version 1.0)
285bd8deadSopenharmony_ci
295bd8deadSopenharmony_ciNumber
305bd8deadSopenharmony_ci
315bd8deadSopenharmony_ci    284
325bd8deadSopenharmony_ci
335bd8deadSopenharmony_ciDependencies
345bd8deadSopenharmony_ci
355bd8deadSopenharmony_ci    Written based on the wording of the OpenGL 1.3 specification.
365bd8deadSopenharmony_ci
375bd8deadSopenharmony_ci    If this extension is implemented, the WGL or GLX memory allocator
385bd8deadSopenharmony_ci    interface specified in NV_vertex_array_range must also be
395bd8deadSopenharmony_ci    implemented.  Please refer to the NV_vertex_array_range specification
405bd8deadSopenharmony_ci    for further information on this interface.
415bd8deadSopenharmony_ci
425bd8deadSopenharmony_ciOverview
435bd8deadSopenharmony_ci
445bd8deadSopenharmony_ci    The vertex array range extension is intended to improve the
455bd8deadSopenharmony_ci    efficiency of OpenGL vertex arrays.  OpenGL vertex arrays' coherency
465bd8deadSopenharmony_ci    model and ability to access memory from arbitrary locations in memory
475bd8deadSopenharmony_ci    prevented implementations from using DMA (Direct Memory Access)
485bd8deadSopenharmony_ci    operations.
495bd8deadSopenharmony_ci
505bd8deadSopenharmony_ci    Many image-intensive applications, such as those that use dynamically
515bd8deadSopenharmony_ci    generated textures, face similar problems.  These applications would
525bd8deadSopenharmony_ci    like to be able to sustain throughputs of hundreds of millions of
535bd8deadSopenharmony_ci    pixels per second through DrawPixels and hundreds of millions of
545bd8deadSopenharmony_ci    texels per second through TexSubImage.
555bd8deadSopenharmony_ci
565bd8deadSopenharmony_ci    However, the same restrictions that limited vertex throughput also
575bd8deadSopenharmony_ci    limit pixel throughput.
585bd8deadSopenharmony_ci
595bd8deadSopenharmony_ci    By the time that any pixel operation that reads data from user memory
605bd8deadSopenharmony_ci    returns, OpenGL requires that it must be safe for the application to
615bd8deadSopenharmony_ci    start using that memory for a different purpose.  This coherency
625bd8deadSopenharmony_ci    model prevents asynchronous DMA transfers directly out of the user's
635bd8deadSopenharmony_ci    buffer.
645bd8deadSopenharmony_ci
655bd8deadSopenharmony_ci    There are also no restrictions on the pointer provided to pixel
665bd8deadSopenharmony_ci    operations or on the size of the data.  To facilitate DMA
675bd8deadSopenharmony_ci    implementations, the driver needs to know in advance what region of
685bd8deadSopenharmony_ci    the address space to lock down.
695bd8deadSopenharmony_ci
705bd8deadSopenharmony_ci    Vertex arrays faced both of these restrictions already, but pixel
715bd8deadSopenharmony_ci    operations have one additional complicating factor -- they are
725bd8deadSopenharmony_ci    bidirectional.  Vertex array data is always being transfered from the
735bd8deadSopenharmony_ci    application to the driver and the HW, whereas pixel operations
745bd8deadSopenharmony_ci    sometimes transfer data to the application from the driver and HW.
755bd8deadSopenharmony_ci    Note that the types of memory that are suitable for DMA for reading
765bd8deadSopenharmony_ci    and writing purposes are often different.  For example, on many PC
775bd8deadSopenharmony_ci    platforms, DMA pulling is best accomplished with write-combined
785bd8deadSopenharmony_ci    (uncached) AGP memory, while pushing data should use cached memory so
795bd8deadSopenharmony_ci    that the application can read the data efficiently once it has been
805bd8deadSopenharmony_ci    read back over the AGP bus.
815bd8deadSopenharmony_ci
825bd8deadSopenharmony_ci    This extension defines an API where an application can specify two
835bd8deadSopenharmony_ci    pixel data ranges, which are analogous to vertex array ranges, except
845bd8deadSopenharmony_ci    that one is for operations where the application is reading data
855bd8deadSopenharmony_ci    (e.g. glReadPixels) and one is for operations where the application
865bd8deadSopenharmony_ci    is writing data (e.g. glDrawPixels, glTexSubImage2D, etc.).  Each
875bd8deadSopenharmony_ci    pixel data range has a pointer to its start and a length in bytes.
885bd8deadSopenharmony_ci
895bd8deadSopenharmony_ci    When the pixel data range is enabled, and if the pointer specified
905bd8deadSopenharmony_ci    as the argument to a pixel operation is inside the corresponding
915bd8deadSopenharmony_ci    pixel data range, the implementation may choose to asynchronously
925bd8deadSopenharmony_ci    pull data from the pixel data range or push data to the pixel data
935bd8deadSopenharmony_ci    range.  Data pulled from outside the pixel data range is undefined,
945bd8deadSopenharmony_ci    while pushing data to outside the pixel data range produces undefined
955bd8deadSopenharmony_ci    results.
965bd8deadSopenharmony_ci
975bd8deadSopenharmony_ci    The application may synchronize with the hardware in one of two ways:
985bd8deadSopenharmony_ci    by flushing the pixel data range (or causing an implicit flush) or by
995bd8deadSopenharmony_ci    using the NV_fence extension to insert fences in the command stream.
1005bd8deadSopenharmony_ci
1015bd8deadSopenharmony_ciIssues
1025bd8deadSopenharmony_ci
1035bd8deadSopenharmony_ci    *   The vertex array range extension required that all active vertex
1045bd8deadSopenharmony_ci        arrays must be located inside the vertex array range.  Should
1055bd8deadSopenharmony_ci        this extension be equally strict?
1065bd8deadSopenharmony_ci
1075bd8deadSopenharmony_ci        RESOLVED: No, because a user may want to use the pixel data range
1085bd8deadSopenharmony_ci        for one type of operation (say, texture downloads) but still be
1095bd8deadSopenharmony_ci        able to use standard non-PDR pixel operations for everything
1105bd8deadSopenharmony_ci        else.  Requiring that apps disable PDR every time such an
1115bd8deadSopenharmony_ci        operation occurs would be burdensome and make it difficult to
1125bd8deadSopenharmony_ci        integrate this extension into a larger app with minimal changes.
1135bd8deadSopenharmony_ci        So, for each pixel operation, we will look at the pointer
1145bd8deadSopenharmony_ci        provided by the application.  If it's inside the PDR, the PDR
1155bd8deadSopenharmony_ci        rules apply, and if it's not inside the PDR, it's a standard GL
1165bd8deadSopenharmony_ci        pixel operation, even if some of the data is actually inside the
1175bd8deadSopenharmony_ci        PDR.
1185bd8deadSopenharmony_ci
1195bd8deadSopenharmony_ci    *   Reads and writes may require different types of memory.  How do
1205bd8deadSopenharmony_ci        we handle this?
1215bd8deadSopenharmony_ci
1225bd8deadSopenharmony_ci        RESOLVED: The allocator interface already provides the ability to
1235bd8deadSopenharmony_ci        specify different read and write frequencies.  A buffer for a
1245bd8deadSopenharmony_ci        write PDR should probably be allocated with a high write
1255bd8deadSopenharmony_ci        frequency and low read frequency, while a read PDR's buffer
1265bd8deadSopenharmony_ci        should have a low write and high read frequency.
1275bd8deadSopenharmony_ci
1285bd8deadSopenharmony_ci        Having two PDRs is essential because a single application may
1295bd8deadSopenharmony_ci        want to perform both asynchronous reads and writes
1305bd8deadSopenharmony_ci        simultaneously.
1315bd8deadSopenharmony_ci
1325bd8deadSopenharmony_ci    *   What happens if a PDR pixel operation pulls data from a location
1335bd8deadSopenharmony_ci        outside the PDR?
1345bd8deadSopenharmony_ci
1355bd8deadSopenharmony_ci        RESOLVED: The data pulled is undefined, and program termination
1365bd8deadSopenharmony_ci        may result.
1375bd8deadSopenharmony_ci
1385bd8deadSopenharmony_ci    *   What happens if a PDR pixel operation pushes data to a location
1395bd8deadSopenharmony_ci        outside the PDR?
1405bd8deadSopenharmony_ci
1415bd8deadSopenharmony_ci        RESOLVED: The contents of that memory location become undefined,
1425bd8deadSopenharmony_ci        and program termination may result.
1435bd8deadSopenharmony_ci
1445bd8deadSopenharmony_ci    *   What happens if the hardware can't support the operation?
1455bd8deadSopenharmony_ci
1465bd8deadSopenharmony_ci        RESOLVED: The operation may be slow, because we may need to, for
1475bd8deadSopenharmony_ci        example, read the pixel data out of uncached memory with the CPU,
1485bd8deadSopenharmony_ci        but it should still work.  So this should never be a problem; in
1495bd8deadSopenharmony_ci        fact, it means that a basic implementation that accelerates only,
1505bd8deadSopenharmony_ci        say, one operation is quite trivial.
1515bd8deadSopenharmony_ci
1525bd8deadSopenharmony_ci    *   Should there be any limitations to what operations should be
1535bd8deadSopenharmony_ci        supported?
1545bd8deadSopenharmony_ci
1555bd8deadSopenharmony_ci        RESOLVED: No, in theory any pixel operation that accesses a
1565bd8deadSopenharmony_ci        user's buffer can work with PDR.  This includes Bitmap,
1575bd8deadSopenharmony_ci        PolygonStipple, GetTexImage, ConvolutionFilter2D, etc.  Many are
1585bd8deadSopenharmony_ci        unlikely to be accelerated, but there is no reason to place
1595bd8deadSopenharmony_ci        arbitrary restrictions.  A list of possibly supported operations
1605bd8deadSopenharmony_ci        is provided for OpenGL 1.2.1 with ARB_imaging support and for all
1615bd8deadSopenharmony_ci        the extensions currently supported by NVIDIA.  Developers should
1625bd8deadSopenharmony_ci        carefully read the Implementation Details provided by their
1635bd8deadSopenharmony_ci        vendor before using the extension.
1645bd8deadSopenharmony_ci
1655bd8deadSopenharmony_ci    *   Should PixelMap and GetPixelMap be supported?
1665bd8deadSopenharmony_ci
1675bd8deadSopenharmony_ci        RESOLVED: Yes.  They're not really pixel path operations, but,
1685bd8deadSopenharmony_ci        again, there is no good reason to omit operations, and they _are_
1695bd8deadSopenharmony_ci        operations that pass around big chunks of pixel-related data.  If
1705bd8deadSopenharmony_ci        we support PolygonStipple, surely we should support this.
1715bd8deadSopenharmony_ci
1725bd8deadSopenharmony_ci    *   Can the PDRs and the VAR overlap and/or be the same buffer?
1735bd8deadSopenharmony_ci
1745bd8deadSopenharmony_ci        RESOLVED: Yes.  In fact, it is expected that one of the preferred
1755bd8deadSopenharmony_ci        modes of usage for this extension will be to use the same AGP
1765bd8deadSopenharmony_ci        buffer for both the write PDR and the VAR, so it can be used for
1775bd8deadSopenharmony_ci        both dynamic texturing and dynamic geometry.
1785bd8deadSopenharmony_ci
1795bd8deadSopenharmony_ci    *   Can video memory buffers be used?
1805bd8deadSopenharmony_ci
1815bd8deadSopenharmony_ci        RESOLVED: Yes, assuming the implementation supports using them
1825bd8deadSopenharmony_ci        for PDR.  On systems with AGP Fast Writes, this may be
1835bd8deadSopenharmony_ci        interesting in some cases.  Another possible use for this is to
1845bd8deadSopenharmony_ci        treat a video memory buffer as an offscreen surface, where
1855bd8deadSopenharmony_ci        DrawPixels can be thought of as a blit from offscreen memory to
1865bd8deadSopenharmony_ci        a GL surface, and ReadPixels can be thought of as a blit from a
1875bd8deadSopenharmony_ci        GL surface to offscreen memory.  This technique should be used
1885bd8deadSopenharmony_ci        with caution, because there are other alternatives, such as
1895bd8deadSopenharmony_ci        pbuffers, aux buffers, and even textures.
1905bd8deadSopenharmony_ci
1915bd8deadSopenharmony_ci    *   Do we want to support more than one read and one write PDR?
1925bd8deadSopenharmony_ci
1935bd8deadSopenharmony_ci        RESOLVED: No, but I could imagine uses for it.  For example, an
1945bd8deadSopenharmony_ci        app could use two system memory buffers (one read, one write PDR)
1955bd8deadSopenharmony_ci        and a single video memory buffer (both read and write).  Do we
1965bd8deadSopenharmony_ci        need a scheme where an unlimited number of PDR buffers can be
1975bd8deadSopenharmony_ci        specified?  Ugh.  I hope not.  I can't think of a good reason to
1985bd8deadSopenharmony_ci        use more than 3 buffers, and even that is stretching it.
1995bd8deadSopenharmony_ci
2005bd8deadSopenharmony_ci    *   Do we want a separate enable for both the read and write PDR?
2015bd8deadSopenharmony_ci
2025bd8deadSopenharmony_ci        RESOLVED: Yes.  In theory, they are completely independent, and
2035bd8deadSopenharmony_ci        we should treat them as such.
2045bd8deadSopenharmony_ci
2055bd8deadSopenharmony_ci    *   Is there an equivalent to the VAR validity check?
2065bd8deadSopenharmony_ci
2075bd8deadSopenharmony_ci        RESOLVED: No.  When a vertex array call occurs, all the vertex
2085bd8deadSopenharmony_ci        array state is already set.  We can know in advance whether all
2095bd8deadSopenharmony_ci        the pointers, strides, etc. are set up in a satisfactory way.
2105bd8deadSopenharmony_ci        However, for a pixel operation, much of the state is provided on
2115bd8deadSopenharmony_ci        the same function call that performs the operation.  For example,
2125bd8deadSopenharmony_ci        the pixel format of the data may need to match that of the
2135bd8deadSopenharmony_ci        framebuffer.  We can't know this without looking at the format
2145bd8deadSopenharmony_ci        and type arguments.
2155bd8deadSopenharmony_ci
2165bd8deadSopenharmony_ci        An alternative might be some sort of "proxy" mechanism for pixel
2175bd8deadSopenharmony_ci        operations, but this seems to be very complicated.
2185bd8deadSopenharmony_ci
2195bd8deadSopenharmony_ci    *   Do we want a more generalized API?  What stops us from needing a
2205bd8deadSopenharmony_ci        DMA extension for every single conceivable use in the future?
2215bd8deadSopenharmony_ci
2225bd8deadSopenharmony_ci        RESOLVED: No, this is good enough.  Since new extensions will
2235bd8deadSopenharmony_ci        probably require new semantics anyhow, we'll just live with that.
2245bd8deadSopenharmony_ci        Maybe if the ARB wants to create a more generic "DMA" extension,
2255bd8deadSopenharmony_ci        these issues can be revisited.
2265bd8deadSopenharmony_ci
2275bd8deadSopenharmony_ci    *   How do applications synchronize with the hardware?
2285bd8deadSopenharmony_ci
2295bd8deadSopenharmony_ci        RESOLVED: A new command, FlushPixelDataRangeNV, is provided, that
2305bd8deadSopenharmony_ci        is analogous to FlushVertexArrayRangeNV.  Applications can also
2315bd8deadSopenharmony_ci        use the Finish command.  The NV_fence extension is best for
2325bd8deadSopenharmony_ci        applications that need fine-grained synchronization.
2335bd8deadSopenharmony_ci
2345bd8deadSopenharmony_ci    *   Should enabling or disabling a PDR induce an implicit PDR flush?
2355bd8deadSopenharmony_ci
2365bd8deadSopenharmony_ci        RESOLVED: No.  In the VAR extension, enabling and disabling the
2375bd8deadSopenharmony_ci        VAR does induce a VAR flush, but this has proven to be more
2385bd8deadSopenharmony_ci        problematic than helpful, because it makes it much more difficult
2395bd8deadSopenharmony_ci        to switch between VAR and non-VAR rendering; the VAR2 extension
2405bd8deadSopenharmony_ci        lifts this restriction, and there is no reason to get this wrong
2415bd8deadSopenharmony_ci        a second time.
2425bd8deadSopenharmony_ci
2435bd8deadSopenharmony_ci        The PDR extension does not suffer from the problem of enabling
2445bd8deadSopenharmony_ci        and disabling frequently, because non-PDR operations are
2455bd8deadSopenharmony_ci        permitted simply by providing a pointer outside of the PDR, but
2465bd8deadSopenharmony_ci        there is no clear reason why the enable or disable should cause
2475bd8deadSopenharmony_ci        a quite unnecessary PDR flush.
2485bd8deadSopenharmony_ci
2495bd8deadSopenharmony_ci    *   Should this state push/pop?
2505bd8deadSopenharmony_ci
2515bd8deadSopenharmony_ci        RESOLVED: Yes, but via a Push/PopClientAttrib and the
2525bd8deadSopenharmony_ci        GL_CLIENT_PIXEL_STORE_BIT bit.  Although this is heavyweight
2535bd8deadSopenharmony_ci        state, VAR also allowed push/pop.  It does fit nicely into an
2545bd8deadSopenharmony_ci        existing category, too.
2555bd8deadSopenharmony_ci
2565bd8deadSopenharmony_ci    *   Should making another context current cause a PDR flush?
2575bd8deadSopenharmony_ci
2585bd8deadSopenharmony_ci        RESOLVED: No.  There's no fundamental reason it should.  Note
2595bd8deadSopenharmony_ci        that apps should be careful to not free their memory until the
2605bd8deadSopenharmony_ci        hardware is not using it... note also that this decision is
2615bd8deadSopenharmony_ci        inconsistent with VAR, which did guarantee a flush here.
2625bd8deadSopenharmony_ci
2635bd8deadSopenharmony_ci    *   Is the read PDR guaranteed to give you either old or new values,
2645bd8deadSopenharmony_ci        or is it truly undefined?
2655bd8deadSopenharmony_ci
2665bd8deadSopenharmony_ci        RESOLVED: Undefined.  This may ease implementation constraints
2675bd8deadSopenharmony_ci        slightly.  Apps must not rely at all on the contents of the
2685bd8deadSopenharmony_ci        region where the readback is occurring until it is known to be
2695bd8deadSopenharmony_ci        finished.
2705bd8deadSopenharmony_ci
2715bd8deadSopenharmony_ci        An example of how an implementation might conceivably require
2725bd8deadSopenharmony_ci        this is as follows.  Suppose that a piece of hardware, for some
2735bd8deadSopenharmony_ci        reason, can only write full 32-byte chunks of data.  Any bytes
2745bd8deadSopenharmony_ci        that were supposed to be unwritten are in fact trashed by the
2755bd8deadSopenharmony_ci        hardware, filled with garbage.  By careful fixups (read the
2765bd8deadSopenharmony_ci        contents before the operation, restore when done), the driver may
2775bd8deadSopenharmony_ci        be able to hide this fact, but a requirement that either new or
2785bd8deadSopenharmony_ci        old data must show up would be violated.
2795bd8deadSopenharmony_ci
2805bd8deadSopenharmony_ci        Or, more trivially, you might implement certain pixel operations
2815bd8deadSopenharmony_ci        as an in-place postprocess on the returned data.
2825bd8deadSopenharmony_ci
2835bd8deadSopenharmony_ci        It is not anticipated that NVIDIA implementations will need this
2845bd8deadSopenharmony_ci        flexibility, but it is nevertheless provided.
2855bd8deadSopenharmony_ci
2865bd8deadSopenharmony_ci    *   How should an application allocate its PDR memory?
2875bd8deadSopenharmony_ci
2885bd8deadSopenharmony_ci        The app should use wglAllocateMemoryNV, even for a read PDR in
2895bd8deadSopenharmony_ci        system memory.  Using malloc may result in suboptimal
2905bd8deadSopenharmony_ci        performance, because the driver will not be able to choose an
2915bd8deadSopenharmony_ci        optimal memory type.  For ReadPixels to system memory, you might
2925bd8deadSopenharmony_ci        set a read frequency of 1.0, a write frequency of 0.0, and a
2935bd8deadSopenharmony_ci        priority of 1.0.  The driver might allocate PCI memory, or
2945bd8deadSopenharmony_ci        physically contiguous PCI memory, or cachable AGP memory, all
2955bd8deadSopenharmony_ci        depending on the performance characteristics of the device.
2965bd8deadSopenharmony_ci        While memory from malloc will work, it does not allow the driver
2975bd8deadSopenharmony_ci        to make these decisions, and it will certainly never give you AGP
2985bd8deadSopenharmony_ci        memory.
2995bd8deadSopenharmony_ci
3005bd8deadSopenharmony_ci        Write PDR memory for purposes of streaming textures, etc. works
3015bd8deadSopenharmony_ci        exactly the same as VAR memory for streaming vertices.  You can,
3025bd8deadSopenharmony_ci        and in fact are encouraged to, use the same circular buffer for
3035bd8deadSopenharmony_ci        both vertices and textures.
3045bd8deadSopenharmony_ci
3055bd8deadSopenharmony_ci        If you have different needs (not just streaming textures or
3065bd8deadSopenharmony_ci        asynchronous readbacks), you may want your pixel data in video
3075bd8deadSopenharmony_ci        memory.
3085bd8deadSopenharmony_ci
3095bd8deadSopenharmony_ciNew Procedures and Functions
3105bd8deadSopenharmony_ci
3115bd8deadSopenharmony_ci    void PixelDataRangeNV(enum target, sizei length, void *pointer)
3125bd8deadSopenharmony_ci    void FlushPixelDataRangeNV(enum target)
3135bd8deadSopenharmony_ci
3145bd8deadSopenharmony_ciNew Tokens
3155bd8deadSopenharmony_ci
3165bd8deadSopenharmony_ci    Accepted by the <target> parameter of PixelDataRangeNV and
3175bd8deadSopenharmony_ci    FlushPixelDataRangeNV, and by the <cap> parameter of
3185bd8deadSopenharmony_ci    EnableClientState, DisableClientState, and IsEnabled:
3195bd8deadSopenharmony_ci
3205bd8deadSopenharmony_ci        WRITE_PIXEL_DATA_RANGE_NV                      0x8878
3215bd8deadSopenharmony_ci        READ_PIXEL_DATA_RANGE_NV                       0x8879
3225bd8deadSopenharmony_ci
3235bd8deadSopenharmony_ci    Accepted by the <pname> parameter of GetBooleanv, GetIntegerv,
3245bd8deadSopenharmony_ci    GetFloatv, and GetDoublev:
3255bd8deadSopenharmony_ci
3265bd8deadSopenharmony_ci        WRITE_PIXEL_DATA_RANGE_LENGTH_NV               0x887A
3275bd8deadSopenharmony_ci        READ_PIXEL_DATA_RANGE_LENGTH_NV                0x887B
3285bd8deadSopenharmony_ci
3295bd8deadSopenharmony_ci    Accepted by the <pname> parameter of GetPointerv:
3305bd8deadSopenharmony_ci
3315bd8deadSopenharmony_ci        WRITE_PIXEL_DATA_RANGE_POINTER_NV              0x887C
3325bd8deadSopenharmony_ci        READ_PIXEL_DATA_RANGE_POINTER_NV               0x887D
3335bd8deadSopenharmony_ci
3345bd8deadSopenharmony_ciAdditions to Chapter 2 of the OpenGL 1.3 Specification (OpenGL Operation)
3355bd8deadSopenharmony_ci
3365bd8deadSopenharmony_ci    None.
3375bd8deadSopenharmony_ci
3385bd8deadSopenharmony_ciAdditions to Chapter 3 of the OpenGL 1.3 Specification (Rasterization)
3395bd8deadSopenharmony_ci
3405bd8deadSopenharmony_ci
3415bd8deadSopenharmony_ci    Add new section to Section 3.6, "Pixel Rectangles", on page 113:
3425bd8deadSopenharmony_ci
3435bd8deadSopenharmony_ci    "3.6.7  Write Pixel Data Range Operation
3445bd8deadSopenharmony_ci
3455bd8deadSopenharmony_ci    Applications can enhance the performance of DrawPixels and other
3465bd8deadSopenharmony_ci    commands that transfer large amounts of pixel data by using a pixel
3475bd8deadSopenharmony_ci    data range.  The command 
3485bd8deadSopenharmony_ci
3495bd8deadSopenharmony_ci       void PixelDataRangeNV(enum target, sizei length, void *pointer)
3505bd8deadSopenharmony_ci
3515bd8deadSopenharmony_ci    specifies one of the current pixel data ranges.  When the write pixel
3525bd8deadSopenharmony_ci    data range is enabled and valid, pixel data transfers from within
3535bd8deadSopenharmony_ci    the pixel data range are potentially faster.  The pixel data range is
3545bd8deadSopenharmony_ci    a contiguous region of (virtual) address space for placing pixel
3555bd8deadSopenharmony_ci    data.  The "pointer" parameter is a pointer to the base of the pixel
3565bd8deadSopenharmony_ci    data range.  The "length" pointer is the length of the pixel data
3575bd8deadSopenharmony_ci    range in basic machine units (typically unsigned bytes).  For the
3585bd8deadSopenharmony_ci    write pixel data range, "target" must be WRITE_PIXEL_DATA_RANGE_NV.
3595bd8deadSopenharmony_ci
3605bd8deadSopenharmony_ci    The pixel data range address space region extends from "pointer"
3615bd8deadSopenharmony_ci    to "pointer + length - 1" inclusive.
3625bd8deadSopenharmony_ci
3635bd8deadSopenharmony_ci    There is some system burden associated with establishing a pixel data
3645bd8deadSopenharmony_ci    range (typically, the memory range must be locked down).  If either
3655bd8deadSopenharmony_ci    the pixel data range pointer or size is set to zero, the previously
3665bd8deadSopenharmony_ci    established pixel data range is released (typically, unlocking the
3675bd8deadSopenharmony_ci    memory).
3685bd8deadSopenharmony_ci
3695bd8deadSopenharmony_ci    The pixel data range may not be established for operating system
3705bd8deadSopenharmony_ci    dependent reasons, and therefore, not valid.  Reasons that a pixel
3715bd8deadSopenharmony_ci    data range cannot be established include spanning different memory
3725bd8deadSopenharmony_ci    types, the memory could not be locked down, alignment restrictions
3735bd8deadSopenharmony_ci    are not met, etc.
3745bd8deadSopenharmony_ci
3755bd8deadSopenharmony_ci    The write pixel data range is enabled or disabled by calling
3765bd8deadSopenharmony_ci    EnableClientState or DisableClientState with the symbolic constant
3775bd8deadSopenharmony_ci    WRITE_PIXEL_DATA_RANGE_NV.
3785bd8deadSopenharmony_ci
3795bd8deadSopenharmony_ci    The write pixel data range is valid when the following conditions are
3805bd8deadSopenharmony_ci    met:
3815bd8deadSopenharmony_ci
3825bd8deadSopenharmony_ci      o  WRITE_PIXEL_DATA_RANGE_NV is enabled.
3835bd8deadSopenharmony_ci
3845bd8deadSopenharmony_ci      o  PixelDataRangeNV has been called with a non-null pointer and
3855bd8deadSopenharmony_ci         non-zero size, for target WRITE_PIXEL_DATA_RANGE_NV.
3865bd8deadSopenharmony_ci
3875bd8deadSopenharmony_ci      o  The write pixel data range has been established.
3885bd8deadSopenharmony_ci
3895bd8deadSopenharmony_ci      o  An implementation-dependent validity check based on the
3905bd8deadSopenharmony_ci         pointer alignment, size, and underlying memory type of the
3915bd8deadSopenharmony_ci         write pixel data range region of memory.
3925bd8deadSopenharmony_ci
3935bd8deadSopenharmony_ci    Otherwise, the write pixel data range is not valid.
3945bd8deadSopenharmony_ci
3955bd8deadSopenharmony_ci    The commands, such as DrawPixels, that may be made faster by the
3965bd8deadSopenharmony_ci    write pixel data range are listed in the Appendix.
3975bd8deadSopenharmony_ci
3985bd8deadSopenharmony_ci    When the write pixel data range is valid, an attempt will be made to
3995bd8deadSopenharmony_ci    accelerate these commands if and only if the data pointer argument to
4005bd8deadSopenharmony_ci    the command lies within the write pixel data range.  No attempt will
4015bd8deadSopenharmony_ci    be made to accelerate commands whose base pointer is outside this
4025bd8deadSopenharmony_ci    range.  Accessing data outside the write pixel data range when the
4035bd8deadSopenharmony_ci    base pointer lies within the range and the range is valid will
4045bd8deadSopenharmony_ci    produce undefined results and may cause program termination.
4055bd8deadSopenharmony_ci
4065bd8deadSopenharmony_ci    The standard OpenGL pixel data coherency model requires that pixel
4075bd8deadSopenharmony_ci    data be extracted from the user's buffer immediately, before the
4085bd8deadSopenharmony_ci    pixel command returns.  When the write pixel data range is valid,
4095bd8deadSopenharmony_ci    this model is relaxed so that changes made to pixel data until the
4105bd8deadSopenharmony_ci    next "write pixel data range flush" may affect pixel commands in non-
4115bd8deadSopenharmony_ci    sequential ways.  That is, a call to a pixel command that precedes
4125bd8deadSopenharmony_ci    a change to pixel data (without an intervening "write pixel data
4135bd8deadSopenharmony_ci    range flush") may access the changed data; though a call to a pixel
4145bd8deadSopenharmony_ci    command following a change to pixel data must always access the
4155bd8deadSopenharmony_ci    changed data, and never the original data.
4165bd8deadSopenharmony_ci
4175bd8deadSopenharmony_ci    A 'write pixel data range flush' occurs when one of the following
4185bd8deadSopenharmony_ci    operations occur:
4195bd8deadSopenharmony_ci
4205bd8deadSopenharmony_ci       o  Finish returns.
4215bd8deadSopenharmony_ci
4225bd8deadSopenharmony_ci       o  FlushPixelDataRangeNV (with target WRITE_PIXEL_DATA_RANGE_NV)
4235bd8deadSopenharmony_ci          returns.
4245bd8deadSopenharmony_ci
4255bd8deadSopenharmony_ci       o  PixelDataRangeNV (with target WRITE_PIXEL_DATA_RANGE_NV)
4265bd8deadSopenharmony_ci          returns.
4275bd8deadSopenharmony_ci
4285bd8deadSopenharmony_ci    The client state required to implement the write pixel data range
4295bd8deadSopenharmony_ci    consists of an enable bit, a memory pointer, and an integer size.
4305bd8deadSopenharmony_ci
4315bd8deadSopenharmony_ci    If the memory mapping of pages within the pixel data range changes,
4325bd8deadSopenharmony_ci    using the pixel data range has undefined effects.  To ensure that the
4335bd8deadSopenharmony_ci    pixel data range reflects the address space's current state, the
4345bd8deadSopenharmony_ci    application is responsible for calling PixelDataRange again after any
4355bd8deadSopenharmony_ci    memory mapping changes within the pixel data range."
4365bd8deadSopenharmony_ci
4375bd8deadSopenharmony_ciAdditions to Chapter 4 of the OpenGL 1.3 Specification (Per-Fragment
4385bd8deadSopenharmony_ciOperations and the Frame Buffer)
4395bd8deadSopenharmony_ci
4405bd8deadSopenharmony_ci    Add new section to Section 4.3, "Pixel Draw/Read State", on page 180:
4415bd8deadSopenharmony_ci
4425bd8deadSopenharmony_ci    "4.3.5  Read Pixel Data Range Operation
4435bd8deadSopenharmony_ci
4445bd8deadSopenharmony_ci    The read pixel data range is similar to the write pixel data range
4455bd8deadSopenharmony_ci    (see section 3.6.7), but is specified with PixelDataRangeNV with a
4465bd8deadSopenharmony_ci    target READ_PIXEL_DATA_RANGE_NV.  It is exactly analogous to the
4475bd8deadSopenharmony_ci    write pixel data range, but applies to commands where OpenGL returns
4485bd8deadSopenharmony_ci    pixel data to the caller, such as ReadPixels.  The list of commands
4495bd8deadSopenharmony_ci    to which the read pixel data range applies can be found in the
4505bd8deadSopenharmony_ci    Appendix.
4515bd8deadSopenharmony_ci
4525bd8deadSopenharmony_ci    Validity checks and flushes of the read pixel data range behave in a
4535bd8deadSopenharmony_ci    manner exactly analogous to those of the write pixel data range,
4545bd8deadSopenharmony_ci    though any implementation-dependent checks may differ between the two
4555bd8deadSopenharmony_ci    types of pixel data range.
4565bd8deadSopenharmony_ci
4575bd8deadSopenharmony_ci    The standard OpenGL pixel data coherency model requires that pixel
4585bd8deadSopenharmony_ci    data be written into the user's buffer immediately, before the
4595bd8deadSopenharmony_ci    pixel command returns.  When the read pixel data range is valid,
4605bd8deadSopenharmony_ci    this model is relaxed so that this data may not necessarily be
4615bd8deadSopenharmony_ci    available until the next "read pixel data range flush".  Until such
4625bd8deadSopenharmony_ci    point in time, an attempt to read the buffer returns undefined
4635bd8deadSopenharmony_ci    values.
4645bd8deadSopenharmony_ci
4655bd8deadSopenharmony_ci    If both the read and write pixel data ranges are valid and overlap,
4665bd8deadSopenharmony_ci    then all operations involving both in the same thread are
4675bd8deadSopenharmony_ci    automatically synchronized.  That is, the write pixel data range
4685bd8deadSopenharmony_ci    operation will automatically wait for any pending read pixel data
4695bd8deadSopenharmony_ci    range results to become available before attempting to retrieve them.
4705bd8deadSopenharmony_ci    However, if the operations are performed from different threads, the
4715bd8deadSopenharmony_ci    user is responsible for all such synchronization.
4725bd8deadSopenharmony_ci
4735bd8deadSopenharmony_ci    Read pixel data range operations are also synchronized with vertex
4745bd8deadSopenharmony_ci    array range operations in the same way.
4755bd8deadSopenharmony_ci
4765bd8deadSopenharmony_ci    The client state required to implement the read pixel data range
4775bd8deadSopenharmony_ci    consists of an enable bit, a memory pointer, and an integer size."
4785bd8deadSopenharmony_ci
4795bd8deadSopenharmony_ciAdditions to Chapter 5 of the OpenGL 1.3 Specification (Special Functions)
4805bd8deadSopenharmony_ci
4815bd8deadSopenharmony_ci    Add the following to the end of Section 5.4 "Display Lists" (page
4825bd8deadSopenharmony_ci    179):
4835bd8deadSopenharmony_ci
4845bd8deadSopenharmony_ci    "PixelDataRangeNV and FlushPixelDataRangeNV are not complied into
4855bd8deadSopenharmony_ci    display lists but are executed immediately.
4865bd8deadSopenharmony_ci
4875bd8deadSopenharmony_ci    If a display list is compiled while WRITE_PIXEL_DATA_RANGE_NV is
4885bd8deadSopenharmony_ci    enabled, all commands affected by that enable are accumulated into a
4895bd8deadSopenharmony_ci    display list as if WRITE_PIXEL_DATA_RANGE_NV is disabled.
4905bd8deadSopenharmony_ci
4915bd8deadSopenharmony_ci    The state of the read pixel data range does not affect display list
4925bd8deadSopenharmony_ci    compilation, because those commands that might be accelerated by a
4935bd8deadSopenharmony_ci    read pixel data range are commands that are executed immediately
4945bd8deadSopenharmony_ci    rather than being compiled into a display list (ReadPixels and
4955bd8deadSopenharmony_ci    GetTexImage, for example)."
4965bd8deadSopenharmony_ci
4975bd8deadSopenharmony_ciAdditions to Chapter 6 of the OpenGL 1.3 Specification (State and
4985bd8deadSopenharmony_ciState Requests)
4995bd8deadSopenharmony_ci
5005bd8deadSopenharmony_ci    None.
5015bd8deadSopenharmony_ci
5025bd8deadSopenharmony_ciAdditions to the GLX Specification
5035bd8deadSopenharmony_ci
5045bd8deadSopenharmony_ci    "OpenGL implementations using GLX indirect rendering should fail to
5055bd8deadSopenharmony_ci    set up the pixel data range and will not accelerate any pixel
5065bd8deadSopenharmony_ci    operations using it.  Additionally, glXAllocateMemoryNV always fails
5075bd8deadSopenharmony_ci    to allocate memory (returns NULL) when used with an indirect
5085bd8deadSopenharmony_ci    rendering context."
5095bd8deadSopenharmony_ci
5105bd8deadSopenharmony_ciGLX Protocol
5115bd8deadSopenharmony_ci
5125bd8deadSopenharmony_ci    None
5135bd8deadSopenharmony_ci
5145bd8deadSopenharmony_ciErrors
5155bd8deadSopenharmony_ci
5165bd8deadSopenharmony_ci    INVALID_OPERATION is generated if PixelDataRangeNV or
5175bd8deadSopenharmony_ci    FlushPixelDataRangeNV is called between the execution of Begin and
5185bd8deadSopenharmony_ci    the corresponding execution of End.
5195bd8deadSopenharmony_ci
5205bd8deadSopenharmony_ci    INVALID_ENUM is generated if PixelDataRangeNV or
5215bd8deadSopenharmony_ci    FlushPixelDataRangeNV is called when target is not
5225bd8deadSopenharmony_ci    WRITE_PIXEL_DATA_RANGE_NV or READ_PIXEL_DATA_RANGE_NV.
5235bd8deadSopenharmony_ci
5245bd8deadSopenharmony_ci    INVALID_VALUE is generated if PixelDataRangeNV is called when length
5255bd8deadSopenharmony_ci    is negative.
5265bd8deadSopenharmony_ci
5275bd8deadSopenharmony_ciNew State
5285bd8deadSopenharmony_ci
5295bd8deadSopenharmony_ci                                                              Initial
5305bd8deadSopenharmony_ci   Get Value                          Get Command     Type    Value    Attrib
5315bd8deadSopenharmony_ci   ---------                          -----------     ----    -------  ------
5325bd8deadSopenharmony_ci   WRITE_PIXEL_DATA_RANGE_NV          IsEnabled       B       False    pixel-store
5335bd8deadSopenharmony_ci   READ_PIXEL_DATA_RANGE_NV           IsEnabled       B       False    pixel-store
5345bd8deadSopenharmony_ci   WRITE_PIXEL_DATA_RANGE_POINTER_NV  GetPointerv     Z+      0        pixel-store
5355bd8deadSopenharmony_ci   READ_PIXEL_DATA_RANGE_POINTER_NV   GetPointerv     Z+      0        pixel-store
5365bd8deadSopenharmony_ci   WRITE_PIXEL_DATA_RANGE_LENGTH_NV   GetIntegerv     Z+      0        pixel-store
5375bd8deadSopenharmony_ci   READ_PIXEL_DATA_RANGE_LENGTH_NV    GetIntegerv     Z+      0        pixel-store
5385bd8deadSopenharmony_ci
5395bd8deadSopenharmony_ciAppendix: Operations Supported
5405bd8deadSopenharmony_ci
5415bd8deadSopenharmony_ci    In unextended OpenGL 1.3 with ARB_imaging support, the following
5425bd8deadSopenharmony_ci    commands may take advantage of the write PDR:
5435bd8deadSopenharmony_ci
5445bd8deadSopenharmony_ci        glBitmap
5455bd8deadSopenharmony_ci        glColorSubTable
5465bd8deadSopenharmony_ci        glColorTable
5475bd8deadSopenharmony_ci        glCompressedTexImage1D
5485bd8deadSopenharmony_ci        glCompressedTexImage2D
5495bd8deadSopenharmony_ci        glCompressedTexImage3D
5505bd8deadSopenharmony_ci        glCompressedTexSubImage1D
5515bd8deadSopenharmony_ci        glCompressedTexSubImage2D
5525bd8deadSopenharmony_ci        glCompressedTexSubImage3D
5535bd8deadSopenharmony_ci        glConvolutionFilter1D
5545bd8deadSopenharmony_ci        glConvolutionFilter2D
5555bd8deadSopenharmony_ci        glDrawPixels
5565bd8deadSopenharmony_ci        glPixelMapfv
5575bd8deadSopenharmony_ci        glPixelMapuiv
5585bd8deadSopenharmony_ci        glPixelMapusv
5595bd8deadSopenharmony_ci        glPolygonStipple
5605bd8deadSopenharmony_ci        glSeparableFilter2D
5615bd8deadSopenharmony_ci        glTexImage1D
5625bd8deadSopenharmony_ci        glTexImage2D
5635bd8deadSopenharmony_ci        glTexImage3D
5645bd8deadSopenharmony_ci        glTexSubImage1D
5655bd8deadSopenharmony_ci        glTexSubImage2D
5665bd8deadSopenharmony_ci        glTexSubImage3D
5675bd8deadSopenharmony_ci
5685bd8deadSopenharmony_ci    In unextended OpenGL 1.3 with ARB_imaging support, the following
5695bd8deadSopenharmony_ci    commands may take advantage of the read PDR:
5705bd8deadSopenharmony_ci
5715bd8deadSopenharmony_ci        glGetColorTable
5725bd8deadSopenharmony_ci        glGetCompressedTexImage
5735bd8deadSopenharmony_ci        glGetConvolutionFilter
5745bd8deadSopenharmony_ci        glGetHistogram
5755bd8deadSopenharmony_ci        glGetMinmax
5765bd8deadSopenharmony_ci        glGetPixelMapfv
5775bd8deadSopenharmony_ci        glGetPixelMapuiv
5785bd8deadSopenharmony_ci        glGetPixelMapusv
5795bd8deadSopenharmony_ci        glGetPolygonStipple
5805bd8deadSopenharmony_ci        glGetSeparableFilter
5815bd8deadSopenharmony_ci        glGetTexImage
5825bd8deadSopenharmony_ci        glReadPixels
5835bd8deadSopenharmony_ci
5845bd8deadSopenharmony_ci    No other extensions shipping in the NVIDIA OpenGL drivers add any
5855bd8deadSopenharmony_ci    other new commands that may take advantage of this extension,
5865bd8deadSopenharmony_ci    although in a few cases there are new commands that alias to other
5875bd8deadSopenharmony_ci    commands that may be accelerated by this extension.  These commands
5885bd8deadSopenharmony_ci    are:
5895bd8deadSopenharmony_ci
5905bd8deadSopenharmony_ci        glCompressedTexImage1DARB (ARB_texture_compression)
5915bd8deadSopenharmony_ci        glCompressedTexImage2DARB (ARB_texture_compression)
5925bd8deadSopenharmony_ci        glCompressedTexImage3DARB (ARB_texture_compression)
5935bd8deadSopenharmony_ci        glCompressedTexSubImage1DARB (ARB_texture_compression)
5945bd8deadSopenharmony_ci        glCompressedTexSubImage2DARB (ARB_texture_compression)
5955bd8deadSopenharmony_ci        glCompressedTexSubImage3DARB (ARB_texture_compression)
5965bd8deadSopenharmony_ci        glColorSubTableEXT (EXT_paletted_texture)
5975bd8deadSopenharmony_ci        glColorTableEXT (EXT_paletted_texture)
5985bd8deadSopenharmony_ci        glGetCompressedTexImageARB (ARB_texture_compression)
5995bd8deadSopenharmony_ci        glTexImage3DEXT (EXT_texture3D)
6005bd8deadSopenharmony_ci        glTexSubImage3DEXT (EXT_texture3D)
6015bd8deadSopenharmony_ci
6025bd8deadSopenharmony_ciNVIDIA Implementation Details
6035bd8deadSopenharmony_ci
6045bd8deadSopenharmony_ci    In the Release 40 OpenGL drivers, the NV_pixel_data_range extension
6055bd8deadSopenharmony_ci    is supported on all GeForce/Quadro-class hardware.  The following
6065bd8deadSopenharmony_ci    commands may potentially be accelerated in this release:
6075bd8deadSopenharmony_ci
6085bd8deadSopenharmony_ci        glReadPixels
6095bd8deadSopenharmony_ci        glTexImage2D
6105bd8deadSopenharmony_ci        glTexSubImage2D
6115bd8deadSopenharmony_ci        glCompressedTexImage2D
6125bd8deadSopenharmony_ci        glCompressedTexImage3D
6135bd8deadSopenharmony_ci        glCompressedTexSubImage2D
6145bd8deadSopenharmony_ci
6155bd8deadSopenharmony_ci    The following type/format/buffer format sets are accelerated for
6165bd8deadSopenharmony_ci    glReadPixels:
6175bd8deadSopenharmony_ci
6185bd8deadSopenharmony_ci      type                            format               buffer format
6195bd8deadSopenharmony_ci      -----------------------------------------------------------------------------------------------
6205bd8deadSopenharmony_ci      GL_UNSIGNED_SHORT_5_6_5         GL_RGB               16-bit color (PCs only -- Macs use 555)
6215bd8deadSopenharmony_ci      GL_UNSIGNED_INT_8_8_8_8_REV     GL_BGRA              32-bit color w/ alpha
6225bd8deadSopenharmony_ci      GL_UNSIGNED_BYTE                GL_BGRA              32-bit color w/ alpha (little endian only)
6235bd8deadSopenharmony_ci      GL_UNSIGNED_SHORT               GL_DEPTH_COMPONENT   16-bit depth
6245bd8deadSopenharmony_ci      GL_UNSIGNED_INT_24_8_NV         GL_DEPTH_STENCIL_NV  24-bit depth, 8-bit stencil
6255bd8deadSopenharmony_ci
6265bd8deadSopenharmony_ci    The following internalformat/type/format sets are accelerated for
6275bd8deadSopenharmony_ci    glTex[Sub]Image2D:
6285bd8deadSopenharmony_ci
6295bd8deadSopenharmony_ci      internalformat              type                            format
6305bd8deadSopenharmony_ci      -------------------------------------------------------------------------------
6315bd8deadSopenharmony_ci      GL_RGB5                     GL_UNSIGNED_SHORT_5_6_5         GL_RGB
6325bd8deadSopenharmony_ci      GL_RGB8                     GL_UNSIGNED_INT_8_8_8_8_REV     GL_BGRA
6335bd8deadSopenharmony_ci      GL_RGBA4                    GL_UNSIGNED_SHORT_4_4_4_4_REV   GL_BGRA
6345bd8deadSopenharmony_ci      GL_RGB5_A1                  GL_UNSIGNED_SHORT_1_5_5_5_REV   GL_BGRA
6355bd8deadSopenharmony_ci      GL_RGBA8                    GL_UNSIGNED_INT_8_8_8_8_REV     GL_BGRA
6365bd8deadSopenharmony_ci
6375bd8deadSopenharmony_ci      GL_DEPTH_COMPONENT16_SGIX   GL_UNSIGNED_SHORT               GL_DEPTH_COMPONENT
6385bd8deadSopenharmony_ci      GL_DEPTH_COMPONENT24_SGIX   GL_UNSIGNED_INT_24_8_NV         GL_DEPTH_STENCIL_NV
6395bd8deadSopenharmony_ci
6405bd8deadSopenharmony_ci    The following internalformat/type/format sets will be accelerated for
6415bd8deadSopenharmony_ci    glTex[Sub]Image2D on little-endian machines only:
6425bd8deadSopenharmony_ci
6435bd8deadSopenharmony_ci      internalformat              type                            format
6445bd8deadSopenharmony_ci      -------------------------------------------------------------------------------
6455bd8deadSopenharmony_ci      GL_LUMINANCE8_ALPHA8        GL_UNSIGNED_BYTE                GL_LUMINANCE_ALPHA
6465bd8deadSopenharmony_ci
6475bd8deadSopenharmony_ci      GL_RGB8                     GL_UNSIGNED_BYTE                GL_BGRA
6485bd8deadSopenharmony_ci      GL_RGBA8                    GL_UNSIGNED_BYTE                GL_BGRA
6495bd8deadSopenharmony_ci
6505bd8deadSopenharmony_ci    All compressed texture formats are supported for
6515bd8deadSopenharmony_ci    glCompressedTex[Sub]Image[2,3]D.
6525bd8deadSopenharmony_ci
6535bd8deadSopenharmony_ci    The following restrictions apply to all commands:
6545bd8deadSopenharmony_ci    - No pixel transfer operations of any kind may be in use.
6555bd8deadSopenharmony_ci    - The base address of the PDR must be aligned to a 32-byte boundary.
6565bd8deadSopenharmony_ci    - The data pointer must be aligned to boundaries of the size of one
6575bd8deadSopenharmony_ci      group of pixels.  For example, GL_UNSIGNED_SHORT_5_6_5 data must
6585bd8deadSopenharmony_ci      be aligned to 2-byte boundaries, GL_UNSIGNED_INT_24_8_NV data must
6595bd8deadSopenharmony_ci      be aligned to 4-byte boundaries, and GL_BGRA/GL_UNSIGNED_BYTE data
6605bd8deadSopenharmony_ci      must be aligned to 4-byte boundaries (not 1-byte boundaries).
6615bd8deadSopenharmony_ci      Compressed texture data must be aligned to a block boundary.
6625bd8deadSopenharmony_ci
6635bd8deadSopenharmony_ci    No additional restrictions apply to glReadPixels or
6645bd8deadSopenharmony_ci    glCompressedTex[Sub]Image[2,3]D.
6655bd8deadSopenharmony_ci
6665bd8deadSopenharmony_ci    The following additional restrictions apply to glTex[Sub]Image2D:
6675bd8deadSopenharmony_ci    - The texture must fit in video memory.
6685bd8deadSopenharmony_ci    - The texture must have a border size of zero.
6695bd8deadSopenharmony_ci    - The stride (in bytes) between two lines of source data must not
6705bd8deadSopenharmony_ci      exceed 65535.
6715bd8deadSopenharmony_ci    - For non-rectangle textures, the width and height of the destination
6725bd8deadSopenharmony_ci      mipmap level must not exceed 2048, nor be below 2; also, the
6735bd8deadSopenharmony_ci      destination mipmap level must not be 2x2 (for 16-bit textures) or
6745bd8deadSopenharmony_ci      2x2, 4x2, or 2x4 (for 8-bit textures).
6755bd8deadSopenharmony_ci
6765bd8deadSopenharmony_ci    Future software releases may increase the number of accelerated
6775bd8deadSopenharmony_ci    commands and the number of accelerated data formats for each command.
6785bd8deadSopenharmony_ci    Note also that although all of the formats and commands listed are
6795bd8deadSopenharmony_ci    guaranteed to be accelerated, there may be limitations in the actual
6805bd8deadSopenharmony_ci    implementation not as strict as those stated here; for example, some
6815bd8deadSopenharmony_ci    data formats not listed here may turn out to be accelerated.
6825bd8deadSopenharmony_ci    However, it is highly recommended that you stick to the formats and
6835bd8deadSopenharmony_ci    commands listed in this section.  In cases where actual restrictions
6845bd8deadSopenharmony_ci    are less strict, future implementations may very well enforce the
6855bd8deadSopenharmony_ci    listed restriction.
6865bd8deadSopenharmony_ci
6875bd8deadSopenharmony_ci    It is also possible that some of these restrictions may become _more_
6885bd8deadSopenharmony_ci    strict on future chips; though at present no such additional
6895bd8deadSopenharmony_ci    restrictions are known to be likely.  Such restrictions would likely
6905bd8deadSopenharmony_ci    take the form of more stringent pitch or alignment restrictions, if
6915bd8deadSopenharmony_ci    they proved to be necessary.
6925bd8deadSopenharmony_ci
6935bd8deadSopenharmony_ci    In practice, you should expect that several of these restrictions
6945bd8deadSopenharmony_ci    will be more lenient in a future release.
6955bd8deadSopenharmony_ci
6965bd8deadSopenharmony_ciRevision History
6975bd8deadSopenharmony_ci
6985bd8deadSopenharmony_ci    November 7, 2002 - Updated implementation details section with most
6995bd8deadSopenharmony_ci    up-to-date rules on PDR usage.  Lifted rule that texture downloads
7005bd8deadSopenharmony_ci    must be 2046 pixels in size or smaller.  Removed support for 8-bit
7015bd8deadSopenharmony_ci    texture downloads.  Increased max TexSubImage pitch to 65535 from 
7025bd8deadSopenharmony_ci    8191.
703