1// Copyright 2021 the V8 project authors. All rights reserved. 2// Use of this source code is governed by a BSD-style license that can be 3// found in the LICENSE file. 4 5#ifndef V8_COMPILER_BACKEND_LOONG64_INSTRUCTION_CODES_LOONG64_H_ 6#define V8_COMPILER_BACKEND_LOONG64_INSTRUCTION_CODES_LOONG64_H_ 7 8namespace v8 { 9namespace internal { 10namespace compiler { 11 12// LOONG64-specific opcodes that specify which assembly sequence to emit. 13// Most opcodes specify a single instruction. 14 15#define TARGET_ARCH_OPCODE_LIST(V) \ 16 V(Loong64Add_d) \ 17 V(Loong64Add_w) \ 18 V(Loong64AddOvf_d) \ 19 V(Loong64Sub_d) \ 20 V(Loong64Sub_w) \ 21 V(Loong64SubOvf_d) \ 22 V(Loong64Mul_d) \ 23 V(Loong64MulOvf_w) \ 24 V(Loong64Mulh_d) \ 25 V(Loong64Mulh_w) \ 26 V(Loong64Mulh_wu) \ 27 V(Loong64Mul_w) \ 28 V(Loong64Div_d) \ 29 V(Loong64Div_w) \ 30 V(Loong64Div_du) \ 31 V(Loong64Div_wu) \ 32 V(Loong64Mod_d) \ 33 V(Loong64Mod_w) \ 34 V(Loong64Mod_du) \ 35 V(Loong64Mod_wu) \ 36 V(Loong64And) \ 37 V(Loong64And32) \ 38 V(Loong64Or) \ 39 V(Loong64Or32) \ 40 V(Loong64Nor) \ 41 V(Loong64Nor32) \ 42 V(Loong64Xor) \ 43 V(Loong64Xor32) \ 44 V(Loong64Alsl_d) \ 45 V(Loong64Alsl_w) \ 46 V(Loong64Sll_d) \ 47 V(Loong64Sll_w) \ 48 V(Loong64Srl_d) \ 49 V(Loong64Srl_w) \ 50 V(Loong64Sra_d) \ 51 V(Loong64Sra_w) \ 52 V(Loong64Rotr_d) \ 53 V(Loong64Rotr_w) \ 54 V(Loong64Bstrpick_d) \ 55 V(Loong64Bstrpick_w) \ 56 V(Loong64Bstrins_d) \ 57 V(Loong64Bstrins_w) \ 58 V(Loong64ByteSwap64) \ 59 V(Loong64ByteSwap32) \ 60 V(Loong64Clz_d) \ 61 V(Loong64Clz_w) \ 62 V(Loong64Mov) \ 63 V(Loong64Tst) \ 64 V(Loong64Cmp) \ 65 V(Loong64Float32Cmp) \ 66 V(Loong64Float32Add) \ 67 V(Loong64Float32Sub) \ 68 V(Loong64Float32Mul) \ 69 V(Loong64Float32Div) \ 70 V(Loong64Float32Abs) \ 71 V(Loong64Float32Neg) \ 72 V(Loong64Float32Sqrt) \ 73 V(Loong64Float32Max) \ 74 V(Loong64Float32Min) \ 75 V(Loong64Float32ToFloat64) \ 76 V(Loong64Float32RoundDown) \ 77 V(Loong64Float32RoundUp) \ 78 V(Loong64Float32RoundTruncate) \ 79 V(Loong64Float32RoundTiesEven) \ 80 V(Loong64Float32ToInt32) \ 81 V(Loong64Float32ToInt64) \ 82 V(Loong64Float32ToUint32) \ 83 V(Loong64Float32ToUint64) \ 84 V(Loong64Float64Cmp) \ 85 V(Loong64Float64Add) \ 86 V(Loong64Float64Sub) \ 87 V(Loong64Float64Mul) \ 88 V(Loong64Float64Div) \ 89 V(Loong64Float64Mod) \ 90 V(Loong64Float64Abs) \ 91 V(Loong64Float64Neg) \ 92 V(Loong64Float64Sqrt) \ 93 V(Loong64Float64Max) \ 94 V(Loong64Float64Min) \ 95 V(Loong64Float64ToFloat32) \ 96 V(Loong64Float64RoundDown) \ 97 V(Loong64Float64RoundUp) \ 98 V(Loong64Float64RoundTruncate) \ 99 V(Loong64Float64RoundTiesEven) \ 100 V(Loong64Float64ToInt32) \ 101 V(Loong64Float64ToInt64) \ 102 V(Loong64Float64ToUint32) \ 103 V(Loong64Float64ToUint64) \ 104 V(Loong64Int32ToFloat32) \ 105 V(Loong64Int32ToFloat64) \ 106 V(Loong64Int64ToFloat32) \ 107 V(Loong64Int64ToFloat64) \ 108 V(Loong64Uint32ToFloat32) \ 109 V(Loong64Uint32ToFloat64) \ 110 V(Loong64Uint64ToFloat32) \ 111 V(Loong64Uint64ToFloat64) \ 112 V(Loong64Float64ExtractLowWord32) \ 113 V(Loong64Float64ExtractHighWord32) \ 114 V(Loong64Float64InsertLowWord32) \ 115 V(Loong64Float64InsertHighWord32) \ 116 V(Loong64BitcastDL) \ 117 V(Loong64BitcastLD) \ 118 V(Loong64Float64SilenceNaN) \ 119 V(Loong64Ld_b) \ 120 V(Loong64Ld_bu) \ 121 V(Loong64St_b) \ 122 V(Loong64Ld_h) \ 123 V(Loong64Ld_hu) \ 124 V(Loong64St_h) \ 125 V(Loong64Ld_w) \ 126 V(Loong64Ld_wu) \ 127 V(Loong64St_w) \ 128 V(Loong64Ld_d) \ 129 V(Loong64St_d) \ 130 V(Loong64Fld_s) \ 131 V(Loong64Fst_s) \ 132 V(Loong64Fld_d) \ 133 V(Loong64Fst_d) \ 134 V(Loong64Push) \ 135 V(Loong64Peek) \ 136 V(Loong64Poke) \ 137 V(Loong64StackClaim) \ 138 V(Loong64Ext_w_b) \ 139 V(Loong64Ext_w_h) \ 140 V(Loong64Dbar) \ 141 V(Loong64S128Const) \ 142 V(Loong64S128Zero) \ 143 V(Loong64S128AllOnes) \ 144 V(Loong64I32x4Splat) \ 145 V(Loong64I32x4ExtractLane) \ 146 V(Loong64I32x4ReplaceLane) \ 147 V(Loong64I32x4Add) \ 148 V(Loong64I32x4Sub) \ 149 V(Loong64F64x2Abs) \ 150 V(Loong64F64x2Neg) \ 151 V(Loong64F32x4Splat) \ 152 V(Loong64F32x4ExtractLane) \ 153 V(Loong64F32x4ReplaceLane) \ 154 V(Loong64F32x4SConvertI32x4) \ 155 V(Loong64F32x4UConvertI32x4) \ 156 V(Loong64I32x4Mul) \ 157 V(Loong64I32x4MaxS) \ 158 V(Loong64I32x4MinS) \ 159 V(Loong64I32x4Eq) \ 160 V(Loong64I32x4Ne) \ 161 V(Loong64I32x4Shl) \ 162 V(Loong64I32x4ShrS) \ 163 V(Loong64I32x4ShrU) \ 164 V(Loong64I32x4MaxU) \ 165 V(Loong64I32x4MinU) \ 166 V(Loong64F64x2Sqrt) \ 167 V(Loong64F64x2Add) \ 168 V(Loong64F64x2Sub) \ 169 V(Loong64F64x2Mul) \ 170 V(Loong64F64x2Div) \ 171 V(Loong64F64x2Min) \ 172 V(Loong64F64x2Max) \ 173 V(Loong64F64x2Eq) \ 174 V(Loong64F64x2Ne) \ 175 V(Loong64F64x2Lt) \ 176 V(Loong64F64x2Le) \ 177 V(Loong64F64x2Splat) \ 178 V(Loong64F64x2ExtractLane) \ 179 V(Loong64F64x2ReplaceLane) \ 180 V(Loong64F64x2Pmin) \ 181 V(Loong64F64x2Pmax) \ 182 V(Loong64F64x2Ceil) \ 183 V(Loong64F64x2Floor) \ 184 V(Loong64F64x2Trunc) \ 185 V(Loong64F64x2NearestInt) \ 186 V(Loong64F64x2ConvertLowI32x4S) \ 187 V(Loong64F64x2ConvertLowI32x4U) \ 188 V(Loong64F64x2PromoteLowF32x4) \ 189 V(Loong64I64x2Splat) \ 190 V(Loong64I64x2ExtractLane) \ 191 V(Loong64I64x2ReplaceLane) \ 192 V(Loong64I64x2Add) \ 193 V(Loong64I64x2Sub) \ 194 V(Loong64I64x2Mul) \ 195 V(Loong64I64x2Neg) \ 196 V(Loong64I64x2Shl) \ 197 V(Loong64I64x2ShrS) \ 198 V(Loong64I64x2ShrU) \ 199 V(Loong64I64x2BitMask) \ 200 V(Loong64I64x2Eq) \ 201 V(Loong64I64x2Ne) \ 202 V(Loong64I64x2GtS) \ 203 V(Loong64I64x2GeS) \ 204 V(Loong64I64x2Abs) \ 205 V(Loong64I64x2SConvertI32x4Low) \ 206 V(Loong64I64x2SConvertI32x4High) \ 207 V(Loong64I64x2UConvertI32x4Low) \ 208 V(Loong64I64x2UConvertI32x4High) \ 209 V(Loong64ExtMulLow) \ 210 V(Loong64ExtMulHigh) \ 211 V(Loong64ExtAddPairwise) \ 212 V(Loong64F32x4Abs) \ 213 V(Loong64F32x4Neg) \ 214 V(Loong64F32x4Sqrt) \ 215 V(Loong64F32x4RecipApprox) \ 216 V(Loong64F32x4RecipSqrtApprox) \ 217 V(Loong64F32x4Add) \ 218 V(Loong64F32x4Sub) \ 219 V(Loong64F32x4Mul) \ 220 V(Loong64F32x4Div) \ 221 V(Loong64F32x4Max) \ 222 V(Loong64F32x4Min) \ 223 V(Loong64F32x4Eq) \ 224 V(Loong64F32x4Ne) \ 225 V(Loong64F32x4Lt) \ 226 V(Loong64F32x4Le) \ 227 V(Loong64F32x4Pmin) \ 228 V(Loong64F32x4Pmax) \ 229 V(Loong64F32x4Ceil) \ 230 V(Loong64F32x4Floor) \ 231 V(Loong64F32x4Trunc) \ 232 V(Loong64F32x4NearestInt) \ 233 V(Loong64F32x4DemoteF64x2Zero) \ 234 V(Loong64I32x4SConvertF32x4) \ 235 V(Loong64I32x4UConvertF32x4) \ 236 V(Loong64I32x4Neg) \ 237 V(Loong64I32x4GtS) \ 238 V(Loong64I32x4GeS) \ 239 V(Loong64I32x4GtU) \ 240 V(Loong64I32x4GeU) \ 241 V(Loong64I32x4Abs) \ 242 V(Loong64I32x4BitMask) \ 243 V(Loong64I32x4DotI16x8S) \ 244 V(Loong64I32x4TruncSatF64x2SZero) \ 245 V(Loong64I32x4TruncSatF64x2UZero) \ 246 V(Loong64I16x8Splat) \ 247 V(Loong64I16x8ExtractLaneU) \ 248 V(Loong64I16x8ExtractLaneS) \ 249 V(Loong64I16x8ReplaceLane) \ 250 V(Loong64I16x8Neg) \ 251 V(Loong64I16x8Shl) \ 252 V(Loong64I16x8ShrS) \ 253 V(Loong64I16x8ShrU) \ 254 V(Loong64I16x8Add) \ 255 V(Loong64I16x8AddSatS) \ 256 V(Loong64I16x8Sub) \ 257 V(Loong64I16x8SubSatS) \ 258 V(Loong64I16x8Mul) \ 259 V(Loong64I16x8MaxS) \ 260 V(Loong64I16x8MinS) \ 261 V(Loong64I16x8Eq) \ 262 V(Loong64I16x8Ne) \ 263 V(Loong64I16x8GtS) \ 264 V(Loong64I16x8GeS) \ 265 V(Loong64I16x8AddSatU) \ 266 V(Loong64I16x8SubSatU) \ 267 V(Loong64I16x8MaxU) \ 268 V(Loong64I16x8MinU) \ 269 V(Loong64I16x8GtU) \ 270 V(Loong64I16x8GeU) \ 271 V(Loong64I16x8RoundingAverageU) \ 272 V(Loong64I16x8Abs) \ 273 V(Loong64I16x8BitMask) \ 274 V(Loong64I16x8Q15MulRSatS) \ 275 V(Loong64I8x16Splat) \ 276 V(Loong64I8x16ExtractLaneU) \ 277 V(Loong64I8x16ExtractLaneS) \ 278 V(Loong64I8x16ReplaceLane) \ 279 V(Loong64I8x16Neg) \ 280 V(Loong64I8x16Shl) \ 281 V(Loong64I8x16ShrS) \ 282 V(Loong64I8x16Add) \ 283 V(Loong64I8x16AddSatS) \ 284 V(Loong64I8x16Sub) \ 285 V(Loong64I8x16SubSatS) \ 286 V(Loong64I8x16MaxS) \ 287 V(Loong64I8x16MinS) \ 288 V(Loong64I8x16Eq) \ 289 V(Loong64I8x16Ne) \ 290 V(Loong64I8x16GtS) \ 291 V(Loong64I8x16GeS) \ 292 V(Loong64I8x16ShrU) \ 293 V(Loong64I8x16AddSatU) \ 294 V(Loong64I8x16SubSatU) \ 295 V(Loong64I8x16MaxU) \ 296 V(Loong64I8x16MinU) \ 297 V(Loong64I8x16GtU) \ 298 V(Loong64I8x16GeU) \ 299 V(Loong64I8x16RoundingAverageU) \ 300 V(Loong64I8x16Abs) \ 301 V(Loong64I8x16Popcnt) \ 302 V(Loong64I8x16BitMask) \ 303 V(Loong64S128And) \ 304 V(Loong64S128Or) \ 305 V(Loong64S128Xor) \ 306 V(Loong64S128Not) \ 307 V(Loong64S128Select) \ 308 V(Loong64S128AndNot) \ 309 V(Loong64I64x2AllTrue) \ 310 V(Loong64I32x4AllTrue) \ 311 V(Loong64I16x8AllTrue) \ 312 V(Loong64I8x16AllTrue) \ 313 V(Loong64V128AnyTrue) \ 314 V(Loong64S32x4InterleaveRight) \ 315 V(Loong64S32x4InterleaveLeft) \ 316 V(Loong64S32x4PackEven) \ 317 V(Loong64S32x4PackOdd) \ 318 V(Loong64S32x4InterleaveEven) \ 319 V(Loong64S32x4InterleaveOdd) \ 320 V(Loong64S32x4Shuffle) \ 321 V(Loong64S16x8InterleaveRight) \ 322 V(Loong64S16x8InterleaveLeft) \ 323 V(Loong64S16x8PackEven) \ 324 V(Loong64S16x8PackOdd) \ 325 V(Loong64S16x8InterleaveEven) \ 326 V(Loong64S16x8InterleaveOdd) \ 327 V(Loong64S16x4Reverse) \ 328 V(Loong64S16x2Reverse) \ 329 V(Loong64S8x16InterleaveRight) \ 330 V(Loong64S8x16InterleaveLeft) \ 331 V(Loong64S8x16PackEven) \ 332 V(Loong64S8x16PackOdd) \ 333 V(Loong64S8x16InterleaveEven) \ 334 V(Loong64S8x16InterleaveOdd) \ 335 V(Loong64I8x16Shuffle) \ 336 V(Loong64I8x16Swizzle) \ 337 V(Loong64S8x16Concat) \ 338 V(Loong64S8x8Reverse) \ 339 V(Loong64S8x4Reverse) \ 340 V(Loong64S8x2Reverse) \ 341 V(Loong64S128LoadSplat) \ 342 V(Loong64S128Load8x8S) \ 343 V(Loong64S128Load8x8U) \ 344 V(Loong64S128Load16x4S) \ 345 V(Loong64S128Load16x4U) \ 346 V(Loong64S128Load32x2S) \ 347 V(Loong64S128Load32x2U) \ 348 V(Loong64S128Load32Zero) \ 349 V(Loong64S128Load64Zero) \ 350 V(Loong64LoadLane) \ 351 V(Loong64StoreLane) \ 352 V(Loong64I32x4SConvertI16x8Low) \ 353 V(Loong64I32x4SConvertI16x8High) \ 354 V(Loong64I32x4UConvertI16x8Low) \ 355 V(Loong64I32x4UConvertI16x8High) \ 356 V(Loong64I16x8SConvertI8x16Low) \ 357 V(Loong64I16x8SConvertI8x16High) \ 358 V(Loong64I16x8SConvertI32x4) \ 359 V(Loong64I16x8UConvertI32x4) \ 360 V(Loong64I16x8UConvertI8x16Low) \ 361 V(Loong64I16x8UConvertI8x16High) \ 362 V(Loong64I8x16SConvertI16x8) \ 363 V(Loong64I8x16UConvertI16x8) \ 364 V(Loong64StoreCompressTagged) \ 365 V(Loong64Word64AtomicLoadUint32) \ 366 V(Loong64Word64AtomicLoadUint64) \ 367 V(Loong64Word64AtomicStoreWord64) \ 368 V(Loong64Word64AtomicAddUint64) \ 369 V(Loong64Word64AtomicSubUint64) \ 370 V(Loong64Word64AtomicAndUint64) \ 371 V(Loong64Word64AtomicOrUint64) \ 372 V(Loong64Word64AtomicXorUint64) \ 373 V(Loong64Word64AtomicExchangeUint64) \ 374 V(Loong64Word64AtomicCompareExchangeUint64) 375 376// Addressing modes represent the "shape" of inputs to an instruction. 377// Many instructions support multiple addressing modes. Addressing modes 378// are encoded into the InstructionCode of the instruction and tell the 379// code generator after register allocation which assembler method to call. 380// 381// We use the following local notation for addressing modes: 382// 383// R = register 384// O = register or stack slot 385// D = double register 386// I = immediate (handle, external, int32) 387// MRI = [register + immediate] 388// MRR = [register + register] 389#define TARGET_ADDRESSING_MODE_LIST(V) \ 390 V(MRI) /* [%r0 + K] */ \ 391 V(MRR) /* [%r0 + %r1] */ \ 392 V(Root) /* [%rr + K] */ 393 394} // namespace compiler 395} // namespace internal 396} // namespace v8 397 398#endif // V8_COMPILER_BACKEND_LOONG64_INSTRUCTION_CODES_LOONG64_H_ 399