xref: /third_party/musl/arch/aarch64/atomic_arch.h (revision 570af302)
1#define a_ll a_ll
2static inline int a_ll(volatile int *p)
3{
4	int v;
5	__asm__ __volatile__ ("ldaxr %w0,%1" : "=r"(v) : "Q"(*p));
6	return v;
7}
8
9#define a_ldar a_ldar
10static inline int a_ldar(volatile int *p)
11{
12	int v;
13	__asm__ __volatile__ ("ldar %w0,%1" : "=r"(v) : "Q"(*p));
14	return v;
15}
16
17#define a_sc a_sc
18static inline int a_sc(volatile int *p, int v)
19{
20	int r;
21	__asm__ __volatile__ ("stlxr %w0,%w2,%1" : "=&r"(r), "=Q"(*p) : "r"(v) : "memory");
22	return !r;
23}
24
25#define a_barrier a_barrier
26static inline void a_barrier()
27{
28	__asm__ __volatile__ ("dmb ish" : : : "memory");
29}
30
31#define a_cas a_cas
32static inline int a_cas(volatile int *p, int t, int s)
33{
34	int old;
35	do {
36		old = a_ll(p);
37		if (old != t) {
38			a_barrier();
39			break;
40		}
41	} while (!a_sc(p, s));
42	return old;
43}
44
45#define a_ll_p a_ll_p
46static inline void *a_ll_p(volatile void *p)
47{
48	void *v;
49	__asm__ __volatile__ ("ldaxr %0, %1" : "=r"(v) : "Q"(*(void *volatile *)p));
50	return v;
51}
52
53#define a_sc_p a_sc_p
54static inline int a_sc_p(volatile int *p, void *v)
55{
56	int r;
57	__asm__ __volatile__ ("stlxr %w0,%2,%1" : "=&r"(r), "=Q"(*(void *volatile *)p) : "r"(v) : "memory");
58	return !r;
59}
60
61#define a_cas_p a_cas_p
62static inline void *a_cas_p(volatile void *p, void *t, void *s)
63{
64	void *old;
65	do {
66		old = a_ll_p(p);
67		if (old != t) {
68			a_barrier();
69			break;
70		}
71	} while (!a_sc_p(p, s));
72	return old;
73}
74
75#define a_ctz_64 a_ctz_64
76static inline int a_ctz_64(uint64_t x)
77{
78	__asm__(
79		"	rbit %0, %1\n"
80		"	clz %0, %0\n"
81		: "=r"(x) : "r"(x));
82	return x;
83}
84
85#define a_clz_64 a_clz_64
86static inline int a_clz_64(uint64_t x)
87{
88	__asm__("clz %0, %1" : "=r"(x) : "r"(x));
89	return x;
90}
91