1/*
2 * Copyright © 2021 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#include <math.h>
25#include <gtest/gtest.h>
26
27#include "util/half_float.h"
28#include "util/u_math.h"
29
30/* math.h has some defines for these, but they have some compiler dependencies
31 * and can potentially raise exceptions.
32 */
33#define TEST_POS_INF (uif(0x7f800000))
34#define TEST_NEG_INF (uif(0xff800000))
35#define TEST_NAN (uif(0x7fc00000))
36
37#define HALF_POS_INF 0x7c00
38#define HALF_NEG_INF 0xfc00
39#define HALF_NAN 0x7e00
40
41#ifndef HAVE_ISSIGNALING
42static bool issignaling(float x)
43{
44   uint32_t ui = fui(x);
45   return (((ui >> 23) & 0xff) == 0xff) && !(ui & (1 << 22));
46}
47#endif
48
49/* Sanity test our test values */
50TEST(half_to_float_test, nan_test)
51{
52   EXPECT_TRUE(isinf(TEST_POS_INF));
53   EXPECT_TRUE(isinf(TEST_NEG_INF));
54
55   EXPECT_TRUE(isnan(TEST_NAN));
56   /* Make sure that our 32-bit float nan test value we're using is a
57    * non-signaling NaN.  The sign of the bit for signaling was apparently
58    * different on some old processors (PA-RISC, MIPS?).  This test value should
59    * cover Intel, ARM, and PPC, for sure.
60    */
61   EXPECT_FALSE(issignaling(TEST_NAN));
62}
63
64static void
65test_half_to_float_limits(float (*func)(uint16_t))
66{
67   /* Positive and negative 0. */
68   EXPECT_EQ(func(0), 0.0f);
69   EXPECT_EQ(fui(func(0x8000)), fui(-0.0f));
70
71   /* Max normal number */
72   EXPECT_EQ(func(0x7bff), 65504.0f);
73
74   float nan = func(HALF_NAN);
75   EXPECT_TRUE(isnan(nan));
76   EXPECT_FALSE(issignaling(nan));
77
78   /* inf */
79   EXPECT_EQ(func(HALF_POS_INF), TEST_POS_INF);
80   /* -inf */
81   EXPECT_EQ(func(HALF_NEG_INF), TEST_NEG_INF);
82}
83
84/* Test the optionally HW instruction-using path. */
85TEST(half_to_float_test, half_to_float_test)
86{
87   test_half_to_float_limits(_mesa_half_to_float);
88}
89
90TEST(half_to_float_test, half_to_float_slow_test)
91{
92   test_half_to_float_limits(_mesa_half_to_float_slow);
93}
94
95static void
96test_float_to_half_limits(uint16_t (*func)(float))
97{
98   /* Positive and negative 0. */
99   EXPECT_EQ(func(0.0f), 0);
100   EXPECT_EQ(func(-0.0f), 0x8000);
101
102   /* Max normal number */
103   EXPECT_EQ(func(65504.0f), 0x7bff);
104
105   uint16_t nan = func(TEST_NAN);
106   EXPECT_EQ((nan & 0xfc00), 0x7c00); /* exponent is all 1s */
107   EXPECT_TRUE(nan & (1 << 9)); /* mantissa is quiet nan */
108
109   EXPECT_EQ(func(TEST_POS_INF), HALF_POS_INF);
110   EXPECT_EQ(func(TEST_NEG_INF), HALF_NEG_INF);
111}
112
113TEST(float_to_half_test, float_to_half_test)
114{
115   test_float_to_half_limits(_mesa_float_to_half);
116}
117
118TEST(float_to_float16_rtne_test, float_to_float16_rtne_test)
119{
120   test_float_to_half_limits(_mesa_float_to_float16_rtne);
121}
122
123/* no rtne_slow variant -- rtne is just _mesa_float_to_half(). */
124
125TEST(float_to_float16_rtz_test, float_to_float16_rtz_test)
126{
127   test_float_to_half_limits(_mesa_float_to_float16_rtz);
128}
129
130TEST(float_to_float16_rtz_slow_test, float_to_float16_rtz_test)
131{
132   test_float_to_half_limits(_mesa_float_to_float16_rtz_slow);
133}
134