1/*
2 * Copyright © 2021 Collabora, Ltd.
3 * Author: Antonio Caggiano <antonio.caggiano@collabora.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 * THE SOFTWARE.
22 */
23
24#include "pan_perf.h"
25
26#include <pan_perf_metrics.h>
27#include <lib/pan_device.h>
28#include <drm-uapi/panfrost_drm.h>
29
30#define PAN_COUNTERS_PER_CATEGORY 64
31#define PAN_SHADER_CORE_INDEX 3
32
33uint32_t
34panfrost_perf_counter_read(const struct panfrost_perf_counter *counter,
35                           const struct panfrost_perf *perf)
36{
37   unsigned offset = perf->category_offset[counter->category_index];
38   offset += counter->offset;
39   assert(offset < perf->n_counter_values);
40
41   uint32_t ret = perf->counter_values[offset];
42
43   // If counter belongs to shader core, accumulate values for all other cores
44   if (counter->category_index == PAN_SHADER_CORE_INDEX) {
45      for (uint32_t core = 1; core < perf->dev->core_id_range; ++core) {
46         ret += perf->counter_values[offset + PAN_COUNTERS_PER_CATEGORY * core];
47      }
48   }
49
50   return ret;
51}
52
53static const struct panfrost_perf_config *
54panfrost_lookup_counters(const char *name)
55{
56        for (unsigned i = 0; i < ARRAY_SIZE(panfrost_perf_configs); ++i) {
57                if (strcmp(panfrost_perf_configs[i]->name, name) == 0)
58                        return panfrost_perf_configs[i];
59        }
60
61        return NULL;
62}
63
64void
65panfrost_perf_init(struct panfrost_perf *perf, struct panfrost_device *dev)
66{
67   perf->dev = dev;
68
69   if (dev->model == NULL)
70           unreachable("Invalid GPU ID");
71
72   perf->cfg = panfrost_lookup_counters(dev->model->performance_counters);
73
74   if (perf->cfg == NULL)
75           unreachable("Performance counters missing!");
76
77   // Generally counter blocks are laid out in the following order:
78   // Job manager, tiler, one or more L2 caches, and one or more shader cores.
79   unsigned l2_slices = panfrost_query_l2_slices(dev);
80   uint32_t n_blocks = 2 + l2_slices + dev->core_id_range;
81   perf->n_counter_values = PAN_COUNTERS_PER_CATEGORY * n_blocks;
82   perf->counter_values = ralloc_array(perf, uint32_t, perf->n_counter_values);
83
84   /* Setup the layout */
85   perf->category_offset[0] = PAN_COUNTERS_PER_CATEGORY * 0;
86   perf->category_offset[1] = PAN_COUNTERS_PER_CATEGORY * 1;
87   perf->category_offset[2] = PAN_COUNTERS_PER_CATEGORY * 2;
88   perf->category_offset[3] = PAN_COUNTERS_PER_CATEGORY * (2 + l2_slices);
89}
90
91static int
92panfrost_perf_query(struct panfrost_perf *perf, uint32_t enable)
93{
94   struct drm_panfrost_perfcnt_enable perfcnt_enable = {enable, 0};
95   return drmIoctl(perf->dev->fd, DRM_IOCTL_PANFROST_PERFCNT_ENABLE, &perfcnt_enable);
96}
97
98int
99panfrost_perf_enable(struct panfrost_perf *perf)
100{
101   return panfrost_perf_query(perf, 1 /* enable */);
102}
103
104int
105panfrost_perf_disable(struct panfrost_perf *perf)
106{
107   return panfrost_perf_query(perf, 0 /* disable */);
108}
109
110int
111panfrost_perf_dump(struct panfrost_perf *perf)
112{
113   // Dump performance counter values to the memory buffer pointed to by counter_values
114   struct drm_panfrost_perfcnt_dump perfcnt_dump = {(uint64_t)(uintptr_t)perf->counter_values};
115   return drmIoctl(perf->dev->fd, DRM_IOCTL_PANFROST_PERFCNT_DUMP, &perfcnt_dump);
116}
117