xref: /third_party/mesa3d/src/intel/tools/aub_write.h (revision bf215546) 
1/*
2 * Copyright © 2007-2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 */
24
25#ifndef INTEL_AUB_WRITE
26#define INTEL_AUB_WRITE
27
28#include <stdarg.h>
29#include <stdint.h>
30#include <stdio.h>
31#include <stdlib.h>
32
33#include "drm-uapi/i915_drm.h"
34
35#include "dev/intel_device_info.h"
36#include "common/intel_gem.h"
37
38#ifdef __cplusplus
39extern "C" {
40#endif
41
42static inline void PRINTFLIKE(2, 3) NORETURN
43_fail(const char *prefix, const char *format, ...)
44{
45   va_list args;
46
47   va_start(args, format);
48   if (prefix)
49      fprintf(stderr, "%s: ", prefix);
50   vfprintf(stderr, format, args);
51   va_end(args);
52
53   abort();
54}
55
56#define _fail_if(cond, prefix, ...) do { \
57   if (cond) \
58      _fail(prefix, __VA_ARGS__); \
59} while (0)
60
61#define MAX_CONTEXT_COUNT 64
62
63struct aub_ppgtt_table {
64   uint64_t phys_addr;
65   struct aub_ppgtt_table *subtables[512];
66};
67
68struct aub_hw_context {
69   bool initialized;
70   uint64_t ring_addr;
71   uint64_t pphwsp_addr;
72};
73
74/* GEM context, as seen from userspace */
75struct aub_context {
76   uint32_t id;
77   struct aub_hw_context hw_contexts[I915_ENGINE_CLASS_VIDEO + 1];
78};
79
80struct aub_file {
81   FILE *file;
82
83   bool has_default_setup;
84
85   /* Set if you want extra logging */
86   FILE *verbose_log_file;
87
88   uint16_t pci_id;
89   struct intel_device_info devinfo;
90
91   int addr_bits;
92
93   struct aub_ppgtt_table pml4;
94   uint64_t phys_addrs_allocator;
95   uint64_t ggtt_addrs_allocator;
96
97   struct {
98      uint64_t hwsp_addr;
99   } engine_setup[I915_ENGINE_CLASS_VIDEO_ENHANCE + 1];
100
101   struct aub_context contexts[MAX_CONTEXT_COUNT];
102   int num_contexts;
103
104   uint32_t next_context_handle;
105};
106
107void aub_file_init(struct aub_file *aub, FILE *file, FILE *debug, uint16_t pci_id, const char *app_name);
108void aub_file_finish(struct aub_file *aub);
109
110static inline bool aub_use_execlists(const struct aub_file *aub)
111{
112   return aub->devinfo.ver >= 8;
113}
114
115uint32_t aub_gtt_size(struct aub_file *aub);
116
117static inline void
118aub_write_reloc(const struct intel_device_info *devinfo, void *p, uint64_t v)
119{
120   if (devinfo->ver >= 8) {
121      *(uint64_t *)p = intel_canonical_address(v);
122   } else {
123      *(uint32_t *)p = v;
124   }
125}
126
127void aub_write_default_setup(struct aub_file *aub);
128void aub_map_ppgtt(struct aub_file *aub, uint64_t start, uint64_t size);
129void aub_write_ggtt(struct aub_file *aub, uint64_t virt_addr, uint64_t size, const void *data);
130void aub_write_trace_block(struct aub_file *aub,
131                           uint32_t type, void *virtual,
132                           uint32_t size, uint64_t gtt_offset);
133void aub_write_exec(struct aub_file *aub, uint32_t ctx_id, uint64_t batch_addr,
134                    uint64_t offset, enum drm_i915_gem_engine_class engine_class);
135void aub_write_context_execlists(struct aub_file *aub, uint64_t context_addr,
136                                 enum drm_i915_gem_engine_class engine_class);
137
138uint32_t aub_write_context_create(struct aub_file *aub, uint32_t *ctx_id);
139
140#ifdef __cplusplus
141}
142#endif
143
144#endif /* INTEL_AUB_WRITE */
145