1/*
2 * Copyright © 2016 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#ifndef INTEL_DECODER_H
25#define INTEL_DECODER_H
26
27#include <stdint.h>
28#include <stdbool.h>
29#include <stdio.h>
30
31#include "dev/intel_device_info.h"
32#include "util/hash_table.h"
33#include "util/bitset.h"
34
35#include "drm-uapi/i915_drm.h"
36
37#ifdef __cplusplus
38extern "C" {
39#endif
40
41struct intel_spec;
42struct intel_group;
43struct intel_field;
44union intel_field_value;
45
46#define I915_ENGINE_CLASS_TO_MASK(x) BITSET_BIT(x)
47
48static inline uint32_t intel_make_gen(uint32_t major, uint32_t minor)
49{
50   return (major << 8) | minor;
51}
52
53struct intel_group *intel_spec_find_struct(struct intel_spec *spec, const char *name);
54struct intel_spec *intel_spec_load(const struct intel_device_info *devinfo);
55struct intel_spec *
56intel_spec_load_from_path(const struct intel_device_info *devinfo,
57                          const char *path);
58struct intel_spec *intel_spec_load_filename(const char *filename);
59void intel_spec_destroy(struct intel_spec *spec);
60uint32_t intel_spec_get_gen(struct intel_spec *spec);
61struct intel_group *intel_spec_find_instruction(struct intel_spec *spec,
62                                                enum drm_i915_gem_engine_class engine,
63                                                const uint32_t *p);
64struct intel_group *intel_spec_find_register(struct intel_spec *spec, uint32_t offset);
65struct intel_group *intel_spec_find_register_by_name(struct intel_spec *spec, const char *name);
66struct intel_enum *intel_spec_find_enum(struct intel_spec *spec, const char *name);
67
68int intel_group_get_length(struct intel_group *group, const uint32_t *p);
69const char *intel_group_get_name(struct intel_group *group);
70uint32_t intel_group_get_opcode(struct intel_group *group);
71struct intel_field *intel_group_find_field(struct intel_group *group, const char *name);
72struct intel_enum *intel_spec_find_enum(struct intel_spec *spec, const char *name);
73
74bool intel_field_is_header(struct intel_field *field);
75
76/* Only allow 5 levels of subgroup'ing
77 */
78#define DECODE_MAX_ARRAY_DEPTH 5
79
80struct intel_field_iterator {
81   struct intel_group *group;
82   char name[128];
83   char value[128];
84   uint64_t raw_value;
85   struct intel_group *struct_desc;
86   const uint32_t *p;
87   int p_bit; /**< bit offset into p */
88   const uint32_t *p_end;
89   int start_bit; /**< current field starts at this bit offset into p */
90   int end_bit; /**< current field ends at this bit offset into p */
91
92   struct intel_field *fields[DECODE_MAX_ARRAY_DEPTH];
93   struct intel_group *groups[DECODE_MAX_ARRAY_DEPTH];
94   int array_iter[DECODE_MAX_ARRAY_DEPTH];
95   int level;
96
97   struct intel_field *field;
98   bool print_colors;
99};
100
101struct intel_spec {
102   uint32_t gen;
103
104   struct hash_table *commands;
105   struct hash_table *structs;
106   struct hash_table *registers_by_name;
107   struct hash_table *registers_by_offset;
108   struct hash_table *enums;
109
110   struct hash_table *access_cache;
111};
112
113struct intel_group {
114   struct intel_spec *spec;
115   char *name;
116
117   struct intel_field *fields; /* linked list of fields */
118   struct intel_field *dword_length_field; /* <instruction> specific */
119
120   uint32_t dw_length;
121   uint32_t engine_mask; /* <instruction> specific */
122   uint32_t bias; /* <instruction> specific */
123   uint32_t array_offset; /* <group> specific */
124   uint32_t array_count; /* number of elements, <group> specific */
125   uint32_t array_item_size; /* <group> specific */
126   bool variable; /* <group> specific */
127   bool fixed_length; /* True for <struct> & <register> */
128
129   struct intel_group *parent;
130   struct intel_group *next;
131
132   uint32_t opcode_mask;
133   uint32_t opcode;
134
135   uint32_t register_offset; /* <register> specific */
136};
137
138struct intel_value {
139   char *name;
140   uint64_t value;
141};
142
143struct intel_enum {
144   char *name;
145   int nvalues;
146   struct intel_value **values;
147};
148
149struct intel_type {
150   enum {
151      INTEL_TYPE_UNKNOWN,
152      INTEL_TYPE_INT,
153      INTEL_TYPE_UINT,
154      INTEL_TYPE_BOOL,
155      INTEL_TYPE_FLOAT,
156      INTEL_TYPE_ADDRESS,
157      INTEL_TYPE_OFFSET,
158      INTEL_TYPE_STRUCT,
159      INTEL_TYPE_UFIXED,
160      INTEL_TYPE_SFIXED,
161      INTEL_TYPE_MBO,
162      INTEL_TYPE_MBZ,
163      INTEL_TYPE_ENUM
164   } kind;
165
166   /* Struct definition for  INTEL_TYPE_STRUCT */
167   union {
168      struct intel_group *intel_struct;
169      struct intel_enum *intel_enum;
170      struct {
171         /* Integer and fractional sizes for INTEL_TYPE_UFIXED and INTEL_TYPE_SFIXED */
172         int i, f;
173      };
174   };
175};
176
177union intel_field_value {
178   bool b32;
179   float f32;
180   uint64_t u64;
181   int64_t i64;
182};
183
184struct intel_field {
185   struct intel_group *parent;
186   struct intel_field *next;
187   struct intel_group *array;
188
189   char *name;
190   int start, end;
191   struct intel_type type;
192   bool has_default;
193   uint32_t default_value;
194
195   struct intel_enum inline_enum;
196};
197
198void intel_field_iterator_init(struct intel_field_iterator *iter,
199                               struct intel_group *group,
200                               const uint32_t *p, int p_bit,
201                               bool print_colors);
202
203bool intel_field_iterator_next(struct intel_field_iterator *iter);
204
205void intel_print_group(FILE *out,
206                       struct intel_group *group,
207                       uint64_t offset, const uint32_t *p, int p_bit,
208                       bool color);
209
210enum intel_batch_decode_flags {
211   /** Print in color! */
212   INTEL_BATCH_DECODE_IN_COLOR  = (1 << 0),
213   /** Print everything, not just headers */
214   INTEL_BATCH_DECODE_FULL      = (1 << 1),
215   /** Print offsets along with the batch */
216   INTEL_BATCH_DECODE_OFFSETS   = (1 << 2),
217   /** Guess when a value is a float and print it as such */
218   INTEL_BATCH_DECODE_FLOATS    = (1 << 3),
219};
220
221struct intel_batch_decode_bo {
222   uint64_t addr;
223   uint32_t size;
224   const void *map;
225};
226
227struct intel_batch_decode_ctx {
228   /**
229    * Return information about the buffer containing the given address.
230    *
231    * If the given address is inside a buffer, the map pointer should be
232    * offset accordingly so it points at the data corresponding to address.
233    */
234   struct intel_batch_decode_bo (*get_bo)(void *user_data, bool ppgtt, uint64_t address);
235   unsigned (*get_state_size)(void *user_data,
236                              uint64_t address,
237                              uint64_t base_address);
238   void *user_data;
239
240   FILE *fp;
241   const struct brw_isa_info *isa;
242   struct intel_device_info devinfo;
243   struct intel_spec *spec;
244   enum intel_batch_decode_flags flags;
245
246   bool use_256B_binding_tables;
247   uint64_t surface_base;
248   uint64_t bt_pool_base;
249   uint64_t dynamic_base;
250   uint64_t instruction_base;
251
252   int max_vbo_decoded_lines;
253
254   enum drm_i915_gem_engine_class engine;
255
256   int n_batch_buffer_start;
257   uint64_t acthd;
258};
259
260void intel_batch_decode_ctx_init(struct intel_batch_decode_ctx *ctx,
261                                 const struct brw_isa_info *isa,
262                                 const struct intel_device_info *devinfo,
263                                 FILE *fp, enum intel_batch_decode_flags flags,
264                                 const char *xml_path,
265                                 struct intel_batch_decode_bo (*get_bo)(void *,
266                                                                        bool,
267                                                                        uint64_t),
268                                 unsigned (*get_state_size)(void *, uint64_t,
269                                                            uint64_t),
270                                 void *user_data);
271void intel_batch_decode_ctx_finish(struct intel_batch_decode_ctx *ctx);
272
273
274void intel_print_batch(struct intel_batch_decode_ctx *ctx,
275                       const uint32_t *batch, uint32_t batch_size,
276                       uint64_t batch_addr, bool from_ring);
277
278#ifdef __cplusplus
279}
280#endif
281
282
283#endif /* INTEL_DECODER_H */
284