1/*
2 * Copyright © 2022 Imagination Technologies Ltd.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a copy
5 * of this software and associated documentation files (the "Software"), to deal
6 * in the Software without restriction, including without limitation the rights
7 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8 * copies of the Software, and to permit persons to whom the Software is
9 * furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24/* This file is based on rgxdefs.h and should only contain object-like macros.
25 * Any function-like macros or inline functions should instead appear in
26 * rogue_hw_utils.h.
27 */
28
29#ifndef ROGUE_HW_DEFS_H
30#define ROGUE_HW_DEFS_H
31
32#include <stdint.h>
33
34#include "util/macros.h"
35
36#define ROGUE_BIF_PM_PHYSICAL_PAGE_SHIFT 12U
37#define ROGUE_BIF_PM_PHYSICAL_PAGE_SIZE \
38   BITFIELD_BIT(ROGUE_BIF_PM_PHYSICAL_PAGE_SHIFT)
39
40/* ISP triangle merging constants. */
41/* tan(15) (0x3E8930A3) */
42#define ROGUE_ISP_MERGE_LOWER_LIMIT_NUMERATOR 0.267949f
43/* tan(60) (0x3FDDB3D7) */
44#define ROGUE_ISP_MERGE_UPPER_LIMIT_NUMERATOR 1.732051f
45#define ROGUE_ISP_MERGE_SCALE_FACTOR 16.0f
46
47#define ROGUE_MAX_INSTR_BYTES 32U
48
49/* MList entry stride in bytes */
50#define ROGUE_MLIST_ENTRY_STRIDE 4U
51
52/* VCE & TE share virtual space and Alist. */
53#define ROGUE_NUM_PM_ADDRESS_SPACES 2U
54
55/* PM Maximum addressable limit (as determined by the size field of the
56 * PM_*_FSTACK registers).
57 */
58#define ROGUE_PM_MAX_PB_VIRT_ADDR_SPACE UINT64_C(0x400000000)
59
60/* Vheap entry size in bytes. */
61#define ROGUE_PM_VHEAP_ENTRY_SIZE 4U
62
63#define ROGUE_RTC_SIZE_IN_BYTES 256U
64
65#define ROGUE_NUM_VCE 1U
66
67#define ROGUE_NUM_TEAC 1U
68
69#define ROGUE_NUM_TE 1U
70
71/* Tail pointer size in bytes. */
72#define ROGUE_TAIL_POINTER_SIZE 8U
73
74/* Tail pointer cache line size. */
75#define ROGUE_TE_TPC_CACHE_LINE_SIZE 64U
76
77#define ROGUE_MAX_VERTEX_SHARED_REGISTERS 1024U
78
79#define ROGUE_MAX_PIXEL_SHARED_REGISTERS 1024U
80
81/* Number of CR_PDS_BGRND values that need setting up. */
82#define ROGUE_NUM_CR_PDS_BGRND_WORDS 3U
83
84/* Number of PBESTATE_REG_WORD values that need setting up. */
85#define ROGUE_NUM_PBESTATE_REG_WORDS 3U
86
87/* Number of PBESTATE_STATE_WORD values that need setting up. */
88#define ROGUE_NUM_PBESTATE_STATE_WORDS 2U
89
90/* Number of TEXSTATE_IMAGE_WORD values that need setting up. */
91#define ROGUE_NUM_TEXSTATE_IMAGE_WORDS 2U
92
93/* Number of TEXSTATE_SAMPLER state words that need setting up. */
94#define ROGUE_NUM_TEXSTATE_SAMPLER_WORDS 2U
95
96#define ROGUE_MAX_RENDER_TARGETS 2048U
97
98/* 12 dwords reserved for shared register management. The first dword is the
99 * number of shared register blocks to reload. Should be a multiple of 4 dwords,
100 * size in bytes.
101 */
102#define ROGUE_LLS_SHARED_REGS_RESERVE_SIZE 48U
103
104#define ROGUE_USC_TASK_PROGRAM_SIZE 512U
105
106#define ROGUE_CSRM_LINE_SIZE_IN_DWORDS (64U * 4U * 4U)
107
108/* The maximum amount of local memory which can be allocated by a single kernel
109 * (in dwords/32-bit registers).
110 *
111 * ROGUE_CDMCTRL_USC_COMMON_SIZE_UNIT_SIZE is in bytes so we divide by four.
112 */
113#define ROGUE_MAX_PER_KERNEL_LOCAL_MEM_SIZE_REGS        \
114   ((ROGUE_CDMCTRL_KERNEL0_USC_COMMON_SIZE_UNIT_SIZE *  \
115     ROGUE_CDMCTRL_KERNEL0_USC_COMMON_SIZE_MAX_SIZE) >> \
116    2)
117
118#define ROGUE_MAX_INSTANCES_PER_TASK \
119   (ROGUE_CDMCTRL_KERNEL8_MAX_INSTANCES_MAX_SIZE + 1U)
120
121/* Optimal number for packing work groups into a slot. */
122#define ROGUE_CDM_MAX_PACKED_WORKGROUPS_PER_TASK 8U
123
124/* The maximum number of pixel task instances which might be running overlapped
125 * with compute. Once we have 8 pixel task instances we have a complete set and
126 * task will be able to run and allocations will be freed.
127 */
128#define ROGUE_MAX_OVERLAPPED_PIXEL_TASK_INSTANCES 7U
129
130#endif /* ROGUE_HW_DEFS_H */
131