1<?xml version="1.0" ?> 2 3<!-- 4Copyright © 2022 Imagination Technologies Ltd. 5 6Permission is hereby granted, free of charge, to any person obtaining a copy 7of this software and associated documentation files (the "Software"), to deal 8in the Software without restriction, including without limitation the rights 9to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10copies of the Software, and to permit persons to whom the Software is 11furnished to do so, subject to the following conditions: 12 13The above copyright notice and this permission notice (including the next 14paragraph) shall be included in all copies or substantial portions of the 15Software. 16 17THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 18IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 19FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 20AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 21LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 22OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 23SOFTWARE. 24--> 25 26<csbgen name="ROGUE" prefix="CR"> 27 28 <define name="PM_VHEAP_TABLE_SIZE" value="0x180" /> 29 30 <enum name="COMP_IADDR_TYPE"> 31 <value name="INDIRECT_1TILE" value="0"/> 32 <value name="INDIRECT_4TILE" value="1"/> 33 </enum> 34 35 <enum name="COMPRESS_SIZE"> 36 <value name="BLOCK_8X8" value="0"/> 37 <value name="BLOCK_16X4" value="1"/> 38 </enum> 39 40 <enum name="DIR_TYPE"> 41 <value name="TL2BR" value="0"/> 42 <value name="TR2BL" value="1"/> 43 <value name="BL2TR" value="2"/> 44 <value name="BR2TL" value="3"/> 45 </enum> 46 47 <enum name="ISP_AA_MODE_TYPE"> 48 <value name="AA_NONE" value="0"/> 49 <value name="AA_2X" value="1"/> 50 <value name="AA_4X" value="2"/> 51 <value name="AA_8X" value="3"/> 52 </enum> 53 54 <enum name="ISP_RENDER_MODE_TYPE"> 55 <value name="NORM" value="0"/> 56 <value name="FAST_2D" value="2"/> 57 <value name="FAST_SCALE" value="3"/> 58 </enum> 59 60 <enum name="MEMLAYOUT"> 61 <value name="LINEAR" value="0"/> 62 <value name="TWIDDLE_2D" value="1"/> 63 <value name="TWIDDLE_3D" value="2"/> 64 <value name="TILED" value="3"/> 65 </enum> 66 67 <enum name="MODE_TYPE"> 68 <value name="DX9" value="0"/> 69 <value name="DX10" value="1"/> 70 <value name="OGL" value="2"/> 71 </enum> 72 73 <enum name="PIPE_NUM"> 74 <value name="PIPE_ONE" value="0"/> 75 <value name="PIPE_TWO" value="1"/> 76 <value name="PIPE_THREE" value="2"/> 77 <value name="PIPE_FOUR" value="3"/> 78 <value name="PIPE_FIVE" value="4"/> 79 <value name="PIPE_SIX" value="5"/> 80 <value name="PIPE_SEVEN" value="6"/> 81 <value name="PIPE_EIGHT" value="7"/> 82 <value name="PIPE_NINE" value="8"/> 83 <value name="PIPE_TEN" value="9"/> 84 <value name="PIPE_ELEVEN" value="10"/> 85 <value name="PIPE_TWELVE" value="11"/> 86 <value name="PIPE_THIRTEEN" value="12"/> 87 <value name="PIPE_FOURTEEN" value="13"/> 88 <value name="PIPE_FIFTEEN" value="14"/> 89 <value name="PIPE_SIXTEEN" value="15"/> 90 </enum> 91 92 <enum name="PIXEL_WIDTH"> 93 <value name="2REGISTERS" value="0"/> 94 <value name="4REGISTERS" value="1"/> 95 <value name="8REGISTERS" value="2"/> 96 <value name="1REGISTER" value="3"/> 97 </enum> 98 99 <enum name="ROTATION_TYPE"> 100 <value name="0_DEG" value="0"/> 101 <value name="90_DEG" value="1"/> 102 <value name="180_DEG" value="2"/> 103 <value name="270_DEG" value="3"/> 104 </enum> 105 106 <enum name="SIZE"> 107 <value name="1_PIXEL" value="0"/> 108 <value name="2_PIXEL" value="1"/> 109 <value name="4_PIXEL" value="2"/> 110 <value name="8_PIXEL" value="3"/> 111 <value name="16_PIXEL" value="4"/> 112 <value name="32_PIXEL" value="5"/> 113 <value name="64_PIXEL" value="6"/> 114 <value name="128_PIXEL" value="7"/> 115 <value name="256_PIXEL" value="8"/> 116 <value name="512_PIXEL" value="9"/> 117 <value name="1K_PIXEL" value="10"/> 118 <value name="2K_PIXEL" value="11"/> 119 <value name="4K_PIXEL" value="12"/> 120 <value name="8K_PIXEL" value="13"/> 121 <value name="16K_PIXEL" value="14"/> 122 </enum> 123 124 <enum name="SWIZ"> 125 <value name="SOURCE_CHAN0" value="0"/> 126 <value name="SOURCE_CHAN1" value="1"/> 127 <value name="SOURCE_CHAN2" value="2"/> 128 <value name="SOURCE_CHAN3" value="3"/> 129 <value name="ONE" value="4"/> 130 <value name="ZERO" value="5"/> 131 </enum> 132 133 <enum name="TFBC_LOSSY"> 134 <value name="LOSSLESS" value="0"/> 135 <value name="LOSSY_75" value="1"/> 136 <value name="LOSSY_50" value="2"/> 137 <value name="LOSSY_25" value="3"/> 138 </enum> 139 140 <enum name="TWOCOMP_GAMMA"> 141 <value name="GAMMA_BOTTOM_CHANNEL" value="0"/> 142 <value name="GAMMA_BOTH_CHANNELS" value="1"/> 143 </enum> 144 145 <enum name="ZLOADFORMAT_TYPE"> 146 <value name="F32Z" value="0"/> 147 <value name="24BITINT" value="1"/> 148 <value name="16BITINT" value="2"/> 149 <value name="F64Z" value="3"/> 150 </enum> 151 152 <enum name="ZSTOREFORMAT_TYPE"> 153 <value name="F32Z" value="0"/> 154 <value name="24BITINT" value="1"/> 155 <value name="16BITINT" value="2"/> 156 <value name="F64Z" value="3"/> 157 </enum> 158 159 <struct name="PM_MTILE_ARRAY" length="2"> 160 <field name="base_addr" start="4" end="39" shift="4" type="address"/> 161 </struct> 162 163 <struct name="PM_VHEAP_TABLE" length="2"> 164 <field name="base_addr" start="4" end="39" shift="4" type="address"/> 165 </struct> 166 167 <struct name="PM_MLIST0_BASE" length="2"> 168 <field name="addr" start="4" end="39" shift="4" type="address"/> 169 </struct> 170 171 <struct name="VDM_CTRL_STREAM_BASE" length="2"> 172 <field name="addr" start="2" end="39" shift="2" type="address"/> 173 </struct> 174 175 <struct name="VDM_CALL_STACK_POINTER" length="2"> 176 <field name="addr" start="3" end="39" shift="3" type="address"/> 177 </struct> 178 179 <struct name="VDM_CONTEXT_STATE_BASE" length="2"> 180 <field name="addr" start="4" end="39" shift="4" type="address"/> 181 </struct> 182 183 <struct name="VDM_CONTEXT_STORE_TASK0" length="2"> 184 <field name="pds_state1" start="32" end="63" type="uint"/> 185 <field name="pds_state0" start="0" end="31" type="uint"/> 186 </struct> 187 188 <struct name="VDM_CONTEXT_STORE_TASK1" length="1"> 189 <field name="pds_state2" start="0" end="31" type="uint"/> 190 </struct> 191 192 <struct name="VDM_CONTEXT_STORE_TASK2" length="2"> 193 <field name="stream_out2" start="32" end="63" type="uint"/> 194 <field name="stream_out1" start="0" end="31" type="uint"/> 195 </struct> 196 197 <struct name="VDM_CONTEXT_RESUME_TASK0" length="2"> 198 <field name="pds_state1" start="32" end="63" type="uint"/> 199 <field name="pds_state0" start="0" end="31" type="uint"/> 200 </struct> 201 202 <struct name="VDM_CONTEXT_RESUME_TASK1" length="1"> 203 <field name="pds_state2" start="0" end="31" type="uint"/> 204 </struct> 205 206 <struct name="VDM_CONTEXT_RESUME_TASK2" length="2"> 207 <field name="stream_out2" start="32" end="63" type="uint"/> 208 <field name="stream_out1" start="0" end="31" type="uint"/> 209 </struct> 210 211 <struct name="CDM_CONTEXT_STATE_BASE" length="2"> 212 <field name="addr" start="4" end="39" shift="4" type="address"/> 213 </struct> 214 215 <struct name="CDM_CONTEXT_PDS0" length="2"> 216 <field name="data_addr" start="36" end="63" shift="4" type="address"/> 217 <field name="code_addr" start="4" end="31" shift="4" type="address"/> 218 </struct> 219 220 <struct name="CDM_CTRL_STREAM_BASE" length="2"> 221 <field name="addr" start="2" end="39" shift="2" type="address"/> 222 </struct> 223 224 <struct name="CDM_CONTEXT_PDS1" length="1"> 225 <field name="pds_seq_dep" start="29" end="29" type="bool"/> 226 <field name="usc_seq_dep" start="28" end="28" type="bool"/> 227 <!-- false=All, true=Any --> 228 <field name="target" start="27" end="27" type="bool"/> 229 <field name="unified_size" start="21" end="26" type="uint"/> 230 <field name="common_shared" start="20" end="20" type="bool"/> 231 <field name="common_size" start="11" end="19" type="uint"> 232 <define name="UNIT_SIZE" value="64"/> 233 </field> 234 <field name="temp_size" start="7" end="10" type="uint"/> 235 <field name="data_size" start="1" end="6" type="uint"> 236 <define name="UNIT_SIZE" value="16"/> 237 </field> 238 <field name="fence" start="0" end="0" type="bool"/> 239 </struct> 240 241 <struct name="CDM_TERMINATE_PDS" length="2"> 242 <field name="data_addr" start="36" end="63" shift="4" type="address"/> 243 <field name="code_addr" start="4" end="31" shift="4" type="address"/> 244 </struct> 245 246 <struct name="CDM_TERMINATE_PDS1" length="1"> 247 <field name="pds_seq_dep" start="29" end="29" type="bool"/> 248 <field name="usc_seq_dep" start="28" end="28" type="bool"/> 249 <field name="target" start="27" end="27" type="bool"/> 250 <field name="unified_size" start="21" end="26" type="uint"/> 251 <field name="common_shared" start="20" end="20" type="bool"/> 252 <field name="common_size" start="11" end="19" type="uint"/> 253 <field name="temp_size" start="7" end="10" type="uint"/> 254 <field name="data_size" start="1" end="6" type="uint"/> 255 <field name="fence" start="0" end="0" type="bool"/> 256 </struct> 257 258 <struct name="CDM_CONTEXT_LOAD_PDS0" length="2"> 259 <field name="data_addr" start="36" end="63" shift="4" type="address"/> 260 <field name="code_addr" start="4" end="31" shift="4" type="address"/> 261 </struct> 262 263 <struct name="COMPUTE_CLUSTER" length="1"> 264 <field name="mask" start="0" end="31" type="uint"/> 265 </struct> 266 267 <struct name="PDS_CTRL" length="2"> 268 <field name="sm_overlap_enable" start="55" end="55" type="bool"/> 269 <condition type="if" check="ROGUEXE"/> 270 <condition type="if" check="COMPUTE"/> 271 <field name="roguexe_max_num_cdm_tasks" start="24" end="31" type="uint"/> 272 <condition type="endif" check="COMPUTE"/> 273 <condition type="if" check="NUM_RASTER_PIPES > 0"/> 274 <field name="roguexe_max_num_pdm_tasks" start="16" end="23" type="uint"/> 275 <condition type="endif" check="NUM_RASTER_PIPES > 0"/> 276 <condition type="if" check="NUM_TA > 0"/> 277 <field name="roguexe_max_num_vdm_tasks" start="8" end="15" type="uint"/> 278 <condition type="endif" check="NUM_TA > 0"/> 279 <condition type="else" check="ROGUEXE"/> 280 <condition type="if" check="COMPUTE"/> 281 <field name="max_num_cdm_tasks" start="24" end="30" type="uint"/> 282 <condition type="endif" check="COMPUTE"/> 283 <field name="max_num_pdm_tasks" start="16" end="22" type="uint"/> 284 <field name="max_num_vdm_tasks" start="8" end="14" type="uint"/> 285 <condition type="endif" check="ROGUEXE"/> 286 </struct> 287 288 <struct name="EVENT_PIXEL_PDS_CODE" length="1"> 289 <field name="addr" start="4" end="31" shift="4" type="address"/> 290 </struct> 291 292 <struct name="EVENT_PIXEL_PDS_DATA" length="1"> 293 <!-- This is an offset actually. Note for when we auto-generate the xmls. --> 294 <field name="addr" start="4" end="31" shift="4" type="address"/> 295 </struct> 296 297 <struct name="EVENT_PIXEL_PDS_INFO" length="1"> 298 <field name="usc_sr_size" start="9" end="14" type="uint"> 299 <define name="UNIT_SIZE" value="16"/> 300 </field> 301 <field name="temp_stride" start="5" end="8" type="uint"> 302 <define name="UNIT_SIZE" value="4"/> 303 </field> 304 <field name="const_size" start="0" end="4" type="uint"> 305 <define name="UNIT_SIZE" value="4"/> 306 </field> 307 </struct> 308 309 <struct name="PDS_BGRND0_BASE" length="2"> 310 <!-- This is an offset actually. Note for when we auto-generate the xmls. --> 311 <field name="texunicode_addr" start="36" end="63" shift="4" type="address"/> 312 <!-- This is an offset actually. Note for when we auto-generate the xmls. --> 313 <field name="shader_addr" start="4" end="31" shift="4" type="address"/> 314 </struct> 315 316 <struct name="PDS_BGRND1_BASE" length="2"> 317 <!-- This is an offset actually. Note for when we auto-generate the xmls. --> 318 <field name="texturedata_addr" start="36" end="63" shift="4" type="address"/> 319 <!-- Unused in the Vulkan driver. --> 320 <field name="varying_addr" start="4" end="31" shift="4" type="address"/> 321 </struct> 322 323 <struct name="PDS_BGRND2_BASE" length="2"> 324 <!-- This is an offset actually. Note for when we auto-generate the xmls. --> 325 <field name="uniformdata_addr" start="4" end="31" shift="4" type="address"/> 326 </struct> 327 328 <struct name="PDS_BGRND3_SIZEINFO" length="2"> 329 <field name="usc_sharedsize" start="55" end="63" type="uint"> 330 <define name="UNIT_SIZE" value="16"/> 331 </field> 332 <field name="pds_batchnum" start="32" end="45" type="uint"/> 333 <field name="pds_uniformsize" start="23" end="31" type="uint"> 334 <define name="UNIT_SIZE" value="4"/> 335 </field> 336 <field name="pds_texturestatesize" start="16" end="22" type="uint"> 337 <define name="UNIT_SIZE" value="4"/> 338 </field> 339 <field name="pds_varyingsize" start="10" end="15" type="uint"> 340 <define name="UNIT_SIZE" value="4"/> 341 </field> 342 <field name="usc_varyingsize" start="4" end="9" type="uint"> 343 <define name="UNIT_SIZE" value="16"/> 344 </field> 345 <field name="pds_tempsize" start="0" end="3" type="uint"> 346 <define name="UNIT_SIZE" value="4"/> 347 </field> 348 </struct> 349 350 <struct name="TE_AA" length="1"> 351 <condition type="if" check="SIMPLE_INTERNAL_PARAMETER_FORMAT && ISP_SAMPLES_PER_PIXEL > 2"/> 352 <field name="y2" start="3" end="3" type="bool"/> 353 <condition type="endif" check="SIMPLE_INTERNAL_PARAMETER_FORMAT && ISP_SAMPLES_PER_PIXEL > 2"/> 354 <field name="y" start="2" end="2" type="bool"/> 355 <field name="x" start="1" end="1" type="bool"/> 356 <field name="x2" start="0" end="0" type="bool"/> 357 </struct> 358 359 <struct name="TE_MTILE1" length="1"> 360 <field name="x1" start="18" end="26" type="uint"/> 361 <field name="x2" start="9" end="17" type="uint"/> 362 <field name="x3" start="0" end="8" type="uint"/> 363 </struct> 364 365 <struct name="TE_MTILE2" length="1"> 366 <field name="y1" start="18" end="26" type="uint"/> 367 <field name="y2" start="9" end="17" type="uint"/> 368 <field name="y3" start="0" end="8" type="uint"/> 369 </struct> 370 371 <struct name="TE_SCREEN" length="1"> 372 <field name="ymax" start="12" end="20" type="uint"/> 373 <field name="xmax" start="0" end="8" type="uint"/> 374 </struct> 375 376 <struct name="TE_PSG" length="1"> 377 <condition type="if" check="ROGUEXE"/> 378 <condition type="if" check="TILE_REGION_PROTECTION"/> 379 <field name="force_protect" start="22" end="22" type="uint"/> 380 <condition type="endif" check="TILE_REGION_PROTECTION"/> 381 <field name="cs_size" start="21" end="21" type="uint"/> 382 <field name="enable_pwr_gate_state" start="20" end="20" type="bool"/> 383 <condition type="endif" check="ROGUEXE"/> 384 <field name="enable_context_state_restore" start="19" end="19" type="bool"/> 385 <field name="zonlyrender" start="18" end="18" type="bool"/> 386 <field name="completeonterminate" start="17" end="17" type="bool"/> 387 <field name="cache_bypass" start="14" end="14" type="bool"/> 388 <field name="forcenewstate" start="13" end="13" type="bool"/> 389 <field name="region_stride" start="0" end="10" type="uint"> 390 <define name="UNIT_SIZE" value="4096"/> 391 </field> 392 </struct> 393 394 <!-- FIXME: This is only a partial definition as (at the time of writing) 395 csbgen doesn't support multiple address fields within structure. 396 --> 397 <!-- FIXME: When csbgen supports conditional structs, make this 398 conditional on NUM_TA > 0. 399 --> 400 <struct name="TE_PSGREGION_ADDR" length="2"> 401 <field name="base" start="6" end="33" shift="6" type="address"/> 402 </struct> 403 404 <!-- FIXME: This is only a partial definition as (at the time of writing) 405 csbgen doesn't support multiple address fields within structure. 406 --> 407 <struct name="TE_TPC_ADDR" length="2"> 408 <field name="base" start="6" end="33" shift="6" type="address"/> 409 </struct> 410 411 <struct name="PPP_MULTISAMPLECTL" length="2"> 412 <condition type="if" check="MAX_MULTISAMPLE == 8"/> 413 <field name="msaa_y7" start="60" end="63" type="uint"/> 414 <field name="msaa_x7" start="56" end="59" type="uint"/> 415 <field name="msaa_y6" start="52" end="55" type="uint"/> 416 <field name="msaa_x6" start="48" end="51" type="uint"/> 417 <field name="msaa_y5" start="44" end="47" type="uint"/> 418 <field name="msaa_x5" start="40" end="43" type="uint"/> 419 <field name="msaa_y4" start="36" end="39" type="uint"/> 420 <field name="msaa_x4" start="32" end="35" type="uint"/> 421 <condition type="endif" check="MAX_MULTISAMPLE == 8"/> 422 <field name="msaa_y3" start="28" end="31" type="uint"/> 423 <field name="msaa_x3" start="24" end="27" type="uint"/> 424 <field name="msaa_y2" start="20" end="23" type="uint"/> 425 <field name="msaa_x2" start="16" end="19" type="uint"/> 426 <field name="msaa_y1" start="12" end="15" type="uint"/> 427 <field name="msaa_x1" start="8" end="11" type="uint"/> 428 <field name="msaa_y0" start="4" end="7" type="uint"/> 429 <field name="msaa_x0" start="0" end="3" type="uint"/> 430 </struct> 431 432 <struct name="PPP_CTRL" length="1"> 433 <field name="vpt_scissor" start="12" end="12" type="bool"/> 434 <field name="flush_mode" start="11" end="11" type="uint"/> 435 <field name="bfcull_restrict_clip" start="10" end="10" type="bool"/> 436 <field name="fixed_point_format" start="9" end="9" type="uint"/> 437 <field name="default_point_size" start="8" end="8" type="bool"/> 438 <field name="bfcull1_disable" start="7" end="7" type="bool"/> 439 <field name="bfcull2_disable" start="6" end="6" type="bool"/> 440 <field name="fccull_disable" start="5" end="5" type="bool"/> 441 <field name="oscull_disable" start="4" end="4" type="bool"/> 442 <field name="socull_disable" start="2" end="2" type="bool"/> 443 <field name="wclampen" start="1" end="1" type="bool"/> 444 <field name="opengl" start="0" end="0" type="bool"/> 445 </struct> 446 447 <struct name="PPP_SCREEN" length="1"> 448 <field name="pixymax" start="16" end="30" type="uint"/> 449 <field name="pixxmax" start="0" end="14" type="uint"/> 450 </struct> 451 452 <!-- FIXME: This is only a partial definition as (at the time of writing) 453 csbgen doesn't support multiple address fields within structure. 454 --> 455 <struct name="TA_RTC_ADDR" length="2"> 456 <field name="base" start="6" end="33" shift="6" type="address"/> 457 </struct> 458 459 <struct name="TA_CONTEXT_STATE_BASE" length="2"> 460 <field name="addr" start="4" end="39" shift="4" type="address"/> 461 </struct> 462 463 <struct name="ISP_RENDER" length="1"> 464 <field name="disable_eomt" start="5" end="5" type="bool"/> 465 <field name="resume" start="4" end="4" type="bool"/> 466 <field name="dir_type" start="2" end="3" type="DIR_TYPE"/> 467 <field name="mode_type" start="0" end="1" type="ISP_RENDER_MODE_TYPE"/> 468 </struct> 469 470 <struct name="ISP_RENDER_ORIGIN" length="1"> 471 <field name="x" start="16" end="25" type="uint"/> 472 <field name="y" start="0" end="9" type="uint"/> 473 </struct> 474 475 <struct name="ISP_MTILE_SIZE" length="1"> 476 <field name="x" start="16" end="25" type="uint"/> 477 <field name="y" start="0" end="9" type="uint"/> 478 </struct> 479 480 <struct name="ISP_BGOBJDEPTH" length="1"> 481 <field name="value" start="0" end="31" type="uint"/> 482 </struct> 483 484 <struct name="ISP_BGOBJVALS" length="1"> 485 <field name="enablebgtag" start="9" end="9" type="bool"/> 486 <field name="mask" start="8" end="8" type="bool"/> 487 <field name="stencil" start="0" end="7" type="uint"/> 488 </struct> 489 490 <struct name="ISP_AA" length="1"> 491 <field name="mode" start="0" end="1" type="ISP_AA_MODE_TYPE"/> 492 </struct> 493 494 <struct name="ISP_CTL" length="1"> 495 <field name="skip_init_hdrs" start="31" end="31" type="bool"/> 496 <field name="line_style" start="30" end="30" type="bool"/> 497 <field name="line_style_pix" start="29" end="29" type="bool"/> 498 <field name="pair_tiles_vert" start="28" end="28" type="bool"/> 499 <field name="pair_tiles" start="27" end="27" type="bool"/> 500 <field name="creq_buf_en" start="26" end="26" type="bool"/> 501 <field name="tile_age_en" start="25" end="25" type="bool"/> 502 <field name="isp_sample_pos_mode" start="23" end="24" type="MODE_TYPE"/> 503 <field name="num_tiles_per_usc" start="21" end="22" type="uint"/> 504 <field name="dbias_is_int" start="20" end="20" type="bool"/> 505 <field name="overlap_check_mode" start="19" end="19" type="bool"/> 506 <field name="pt_upfront_depth_disable" start="18" end="18" type="bool"/> 507 <field name="process_empty_tiles" start="17" end="17" type="bool"/> 508 <field name="sample_pos" start="16" end="16" type="bool"/> 509 <field name="pipe_enable" start="12" end="15" type="PIPE_NUM"/> 510 <field name="valid_id" start="4" end="9" type="uint"/> 511 <field name="upass_start" start="0" end="3" type="uint"/> 512 </struct> 513 514 <struct name="ISP_ZLSCTL" length="2"> 515 <field name="zlsextent_y_s" start="48" end="57" type="uint"/> 516 <field name="zlsextent_x_s" start="38" end="47" type="uint"/> 517 <field name="stencil_extent_enable" start="37" end="37" type="bool"/> 518 <field name="zlsextent_y_z" start="27" end="36" type="uint"/> 519 <field name="zstoreformat" start="25" end="26" type="ZSTOREFORMAT_TYPE"/> 520 <field name="zloadformat" start="23" end="24" type="ZLOADFORMAT_TYPE"/> 521 <field name="fb_storeen" start="22" end="22" type="bool"/> 522 <field name="fb_loaden" start="21" end="21" type="bool"/> 523 <field name="mstoreen" start="20" end="20" type="bool"/> 524 <field name="zstoreen" start="19" end="19" type="bool"/> 525 <field name="sstoreen" start="18" end="18" type="bool"/> 526 <field name="storetwiddled" start="17" end="17" type="bool"/> 527 <field name="mloaden" start="16" end="16" type="bool"/> 528 <field name="zloaden" start="15" end="15" type="bool"/> 529 <field name="sloaden" start="14" end="14" type="bool"/> 530 <field name="loadtwiddled" start="13" end="13" type="bool"/> 531 <field name="zlsextent_x_z" start="3" end="12" type="uint"/> 532 <field name="forcezstore" start="2" end="2" type="bool"/> 533 <field name="forcezload" start="1" end="1" type="bool"/> 534 <field name="zonlyrender" start="0" end="0" type="bool"/> 535 </struct> 536 537 <struct name="ISP_ZLOAD_BASE" length="2"> 538 <field name="addr" start="4" end="39" shift="4" type="address"/> 539 </struct> 540 541 <struct name="ISP_STENCIL_LOAD_BASE" length="2"> 542 <field name="addr" start="4" end="39" shift="4" type="address"/> 543 <field name="enable" start="0" end="0" type="bool"/> 544 </struct> 545 546 <struct name="ISP_SCISSOR_BASE" length="2"> 547 <field name="addr" start="2" end="39" shift="2" type="address"/> 548 </struct> 549 550 <struct name="ISP_DBIAS_BASE" length="2"> 551 <field name="addr" start="2" end="39" shift="2" type="address"/> 552 </struct> 553 554 <struct name="ISP_OCLQRY_BASE" length="2"> 555 <field name="addr" start="4" end="39" shift="4" type="address"/> 556 </struct> 557 558 <struct name="ISP_ZLS_PIXELS" length="1"> 559 <field name="y" start="15" end="29" type="uint"/> 560 <field name="x" start="0" end="14" type="uint"/> 561 </struct> 562 563 <struct name="PBE_WORD0_MRT0" length="2"> 564 <condition type="if" check="TFBC"/> 565 <field name="tfbc_lossy" start="62" end="63" type="TFBC_LOSSY"/> 566 <condition type="endif" check="TFBC"/> 567 <field name="x_rsrvd" start="63" end="63" type="bool"/> 568 <field name="pair_tiles" start="60" end="60" type="uint"/> 569 <field name="comp_iaddr_mode" start="60" end="60" type="COMP_IADDR_TYPE"/> 570 <field name="x_rsrvd2" start="59" end="59" type="bool"/> 571 <field name="comp_cor_enable" start="59" end="59" type="bool"/> 572 <field name="dither" start="58" end="58" type="bool"/> 573 <field name="tilerelative" start="57" end="57" type="bool"/> 574 <field name="downscale" start="56" end="56" type="bool"/> 575 <field name="size_z" start="52" end="55" type="SIZE"/> 576 <field name="rotation" start="50" end="51" type="ROTATION_TYPE"/> 577 <field name="linestride" start="34" end="49" type="uint"/> 578 <field name="memlayout" start="32" end="33" type="MEMLAYOUT"/> 579 <field name="swiz_chan3" start="29" end="31" type="SWIZ"/> 580 <field name="swiz_chan2" start="26" end="28" type="SWIZ"/> 581 <field name="swiz_chan1" start="23" end="25" type="SWIZ"/> 582 <field name="swiz_chan0" start="20" end="22" type="SWIZ"/> 583 <field name="minclip_x" start="6" end="19" type="uint"/> 584 <field name="twocomp_gamma" start="5" end="5" type="TWOCOMP_GAMMA"/> 585 <field name="gamma" start="4" end="4" type="bool"/> 586 <field name="compression" start="3" end="3" type="bool"/> 587 <field name="compress_size" start="2" end="2" type="COMPRESS_SIZE"/> 588 <field name="comp_indirect_table" start="1" end="1" type="bool"/> 589 <condition type="if" check="PBE_YFLIP"/> 590 <field name="y_flip" start="0" end="0" type="bool"/> 591 <condition type="endif" check="PBE_YFLIP"/> 592 </struct> 593 594 <struct name="FRAG_SCREEN" length="1"> 595 <field name="ymax" start="16" end="30" type="uint"/> 596 <field name="xmax" start="0" end="14" type="uint"/> 597 </struct> 598 599 <struct name="TPU" length="1"> 600 <condition type="if" check="PDSL0SIZE > 0"/> 601 <field name="mcu_pds_l0_off" start="8" end="8" type="bool"/> 602 <condition type="endif" check="PDSL0SIZE > 0"/> 603 <condition type="if" check="TPU_CEM_DATAMASTER_GLOBAL_REGISTERS"/> 604 <field name="tag_cem_64_face_packing" start="7" end="7" type="bool"/> 605 <condition type="endif" check="TPU_CEM_DATAMASTER_GLOBAL_REGISTERS"/> 606 <field name="tag_enable_mmu_prefetch" start="6" end="6" type="bool"/> 607 <field name="tag_cem_4k_face_packing" start="5" end="5" type="bool"/> 608 <field name="madd_config_l0off" start="4" end="4" type="bool"/> 609 <field name="tag_cem_face_packing" start="3" end="3" type="bool"/> 610 <field name="tag_cemedge_dontfilter" start="2" end="2" type="bool"/> 611 <condition type="if" check="TPU_CEM_USG_NORMALISATION"/> 612 <field name="tag_cemgrad_dontnegate" start="1" end="1" type="bool"/> 613 <condition type="endif" check="TPU_CEM_USG_NORMALISATION"/> 614 <field name="madd_config_dxt35_transovr" start="0" end="0" type="bool"/> 615 </struct> 616 617 <struct name="TPU_BORDER_COLOUR_TABLE_PDM" length="2"> 618 <field name="border_colour_table_address" start="0" end="37" shift="2" type="address"/> 619 </struct> 620 621 <struct name="TPU_BORDER_COLOUR_TABLE_VDM" length="2"> 622 <field name="border_colour_table_address" start="0" end="37" shift="2" type="address"/> 623 </struct> 624 625 <struct name="TPU_BORDER_COLOUR_TABLE_CDM" length="2"> 626 <field name="border_colour_table_address" start="0" end="37" shift="2" type="address"/> 627 </struct> 628 629 <struct name="USC_PIXEL_OUTPUT_CTRL" length="1"> 630 <field name="partition_mask" start="3" end="20" type="uint"/> 631 <field name="enable_4th_partition" start="2" end="2" type="bool"/> 632 <field name="width" start="0" end="1" type="PIXEL_WIDTH"/> 633 </struct> 634 635</csbgen> 636