1/* 2 * Copyright © 2014-2017 Broadcom 3 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 */ 24 25#ifndef V3D_CONTEXT_H 26#define V3D_CONTEXT_H 27 28#ifdef V3D_VERSION 29#include "broadcom/common/v3d_macros.h" 30#endif 31 32#include <stdio.h> 33 34#include "pipe/p_context.h" 35#include "pipe/p_state.h" 36#include "util/bitset.h" 37#include "util/slab.h" 38#include "xf86drm.h" 39#include "drm-uapi/v3d_drm.h" 40#include "v3d_screen.h" 41#include "broadcom/common/v3d_limits.h" 42 43#include "broadcom/simulator/v3d_simulator.h" 44#include "broadcom/compiler/v3d_compiler.h" 45 46struct v3d_job; 47struct v3d_bo; 48void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo); 49 50#include "v3d_bufmgr.h" 51#include "v3d_resource.h" 52#include "v3d_cl.h" 53 54#ifdef USE_V3D_SIMULATOR 55#define using_v3d_simulator true 56#else 57#define using_v3d_simulator false 58#endif 59 60#define V3D_DIRTY_BLEND (1ull << 0) 61#define V3D_DIRTY_RASTERIZER (1ull << 1) 62#define V3D_DIRTY_ZSA (1ull << 2) 63#define V3D_DIRTY_COMPTEX (1ull << 3) 64#define V3D_DIRTY_VERTTEX (1ull << 4) 65#define V3D_DIRTY_GEOMTEX (1ull << 5) 66#define V3D_DIRTY_FRAGTEX (1ull << 6) 67 68#define V3D_DIRTY_SHADER_IMAGE (1ull << 9) 69#define V3D_DIRTY_BLEND_COLOR (1ull << 10) 70#define V3D_DIRTY_STENCIL_REF (1ull << 11) 71#define V3D_DIRTY_SAMPLE_STATE (1ull << 12) 72#define V3D_DIRTY_FRAMEBUFFER (1ull << 13) 73#define V3D_DIRTY_STIPPLE (1ull << 14) 74#define V3D_DIRTY_VIEWPORT (1ull << 15) 75#define V3D_DIRTY_CONSTBUF (1ull << 16) 76#define V3D_DIRTY_VTXSTATE (1ull << 17) 77#define V3D_DIRTY_VTXBUF (1ull << 18) 78#define V3D_DIRTY_SCISSOR (1ull << 19) 79#define V3D_DIRTY_FLAT_SHADE_FLAGS (1ull << 20) 80#define V3D_DIRTY_PRIM_MODE (1ull << 21) 81#define V3D_DIRTY_CLIP (1ull << 22) 82#define V3D_DIRTY_UNCOMPILED_CS (1ull << 23) 83#define V3D_DIRTY_UNCOMPILED_VS (1ull << 24) 84#define V3D_DIRTY_UNCOMPILED_GS (1ull << 25) 85#define V3D_DIRTY_UNCOMPILED_FS (1ull << 26) 86 87#define V3D_DIRTY_COMPILED_CS (1ull << 29) 88#define V3D_DIRTY_COMPILED_VS (1ull << 30) 89#define V3D_DIRTY_COMPILED_GS_BIN (1ULL << 31) 90#define V3D_DIRTY_COMPILED_GS (1ULL << 32) 91#define V3D_DIRTY_COMPILED_FS (1ull << 33) 92 93#define V3D_DIRTY_FS_INPUTS (1ull << 38) 94#define V3D_DIRTY_GS_INPUTS (1ull << 39) 95#define V3D_DIRTY_STREAMOUT (1ull << 40) 96#define V3D_DIRTY_OQ (1ull << 41) 97#define V3D_DIRTY_CENTROID_FLAGS (1ull << 42) 98#define V3D_DIRTY_NOPERSPECTIVE_FLAGS (1ull << 43) 99#define V3D_DIRTY_SSBO (1ull << 44) 100 101#define V3D_MAX_FS_INPUTS 64 102 103#define MAX_JOB_SCISSORS 16 104 105enum v3d_sampler_state_variant { 106 V3D_SAMPLER_STATE_BORDER_0000, 107 V3D_SAMPLER_STATE_BORDER_0001, 108 V3D_SAMPLER_STATE_BORDER_1111, 109 V3D_SAMPLER_STATE_F16, 110 V3D_SAMPLER_STATE_F16_UNORM, 111 V3D_SAMPLER_STATE_F16_SNORM, 112 V3D_SAMPLER_STATE_F16_BGRA, 113 V3D_SAMPLER_STATE_F16_BGRA_UNORM, 114 V3D_SAMPLER_STATE_F16_BGRA_SNORM, 115 V3D_SAMPLER_STATE_F16_A, 116 V3D_SAMPLER_STATE_F16_A_SNORM, 117 V3D_SAMPLER_STATE_F16_A_UNORM, 118 V3D_SAMPLER_STATE_F16_LA, 119 V3D_SAMPLER_STATE_F16_LA_UNORM, 120 V3D_SAMPLER_STATE_F16_LA_SNORM, 121 V3D_SAMPLER_STATE_32, 122 V3D_SAMPLER_STATE_32_UNORM, 123 V3D_SAMPLER_STATE_32_SNORM, 124 V3D_SAMPLER_STATE_32_A, 125 V3D_SAMPLER_STATE_32_A_UNORM, 126 V3D_SAMPLER_STATE_32_A_SNORM, 127 V3D_SAMPLER_STATE_1010102U, 128 V3D_SAMPLER_STATE_16U, 129 V3D_SAMPLER_STATE_16I, 130 V3D_SAMPLER_STATE_8I, 131 V3D_SAMPLER_STATE_8U, 132 133 V3D_SAMPLER_STATE_VARIANT_COUNT, 134}; 135 136enum v3d_flush_cond { 137 /* Flush job unless we are flushing for transform feedback, where we 138 * handle flushing in the driver via the 'Wait for TF' packet. 139 */ 140 V3D_FLUSH_DEFAULT, 141 /* Always flush the job, even for cases where we would normally not 142 * do it, such as transform feedback. 143 */ 144 V3D_FLUSH_ALWAYS, 145 /* Flush job if it is not the current FBO job. This is intended to 146 * skip automatic flushes of the current job for resources that we 147 * expect to be externally synchronized by the application using 148 * glMemoryBarrier(), such as SSBOs and shader images. 149 */ 150 V3D_FLUSH_NOT_CURRENT_JOB, 151}; 152 153struct v3d_sampler_view { 154 struct pipe_sampler_view base; 155 uint32_t p0; 156 uint32_t p1; 157 /* Precomputed swizzles to pass in to the shader key. */ 158 uint8_t swizzle[4]; 159 160 uint8_t texture_shader_state[32]; 161 /* V3D 4.x: Texture state struct. */ 162 struct v3d_bo *bo; 163 164 enum v3d_sampler_state_variant sampler_variant; 165 166 /* Actual texture to be read by this sampler view. May be different 167 * from base.texture in the case of having a shadow tiled copy of a 168 * raster texture. 169 */ 170 struct pipe_resource *texture; 171 172 /* A serial ID used to identify cases where a new BO has been created 173 * and we need to rebind a sampler view that was created against the 174 * previous BO to to point to the new one. 175 */ 176 uint32_t serial_id; 177}; 178 179struct v3d_sampler_state { 180 struct pipe_sampler_state base; 181 uint32_t p0; 182 uint32_t p1; 183 184 /* V3D 3.x: Packed texture state. */ 185 uint8_t texture_shader_state[32]; 186 /* V3D 4.x: Sampler state struct. */ 187 struct pipe_resource *sampler_state; 188 uint32_t sampler_state_offset[V3D_SAMPLER_STATE_VARIANT_COUNT]; 189 190 bool border_color_variants; 191}; 192 193struct v3d_texture_stateobj { 194 struct pipe_sampler_view *textures[V3D_MAX_TEXTURE_SAMPLERS]; 195 unsigned num_textures; 196 struct pipe_sampler_state *samplers[V3D_MAX_TEXTURE_SAMPLERS]; 197 unsigned num_samplers; 198 struct v3d_cl_reloc texture_state[V3D_MAX_TEXTURE_SAMPLERS]; 199}; 200 201struct v3d_shader_uniform_info { 202 enum quniform_contents *contents; 203 uint32_t *data; 204 uint32_t count; 205}; 206 207struct v3d_uncompiled_shader { 208 /** A name for this program, so you can track it in shader-db output. */ 209 uint32_t program_id; 210 /** How many variants of this program were compiled, for shader-db. */ 211 uint32_t compiled_variant_count; 212 struct pipe_shader_state base; 213 uint32_t num_tf_outputs; 214 struct v3d_varying_slot *tf_outputs; 215 uint16_t tf_specs[16]; 216 uint16_t tf_specs_psiz[16]; 217 uint32_t num_tf_specs; 218}; 219 220struct v3d_compiled_shader { 221 struct pipe_resource *resource; 222 uint32_t offset; 223 224 union { 225 struct v3d_prog_data *base; 226 struct v3d_vs_prog_data *vs; 227 struct v3d_gs_prog_data *gs; 228 struct v3d_fs_prog_data *fs; 229 struct v3d_compute_prog_data *compute; 230 } prog_data; 231 232 /** 233 * V3D_DIRTY_* flags that, when set in v3d->dirty, mean that the 234 * uniforms have to be rewritten (and therefore the shader state 235 * reemitted). 236 */ 237 uint64_t uniform_dirty_bits; 238}; 239 240struct v3d_program_stateobj { 241 struct v3d_uncompiled_shader *bind_vs, *bind_gs, *bind_fs, *bind_compute; 242 struct v3d_compiled_shader *cs, *vs, *gs_bin, *gs, *fs, *compute; 243 244 struct hash_table *cache[MESA_SHADER_STAGES]; 245 246 struct v3d_bo *spill_bo; 247 int spill_size_per_thread; 248}; 249 250struct v3d_constbuf_stateobj { 251 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS]; 252 uint32_t enabled_mask; 253 uint32_t dirty_mask; 254}; 255 256struct v3d_vertexbuf_stateobj { 257 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS]; 258 unsigned count; 259 uint32_t enabled_mask; 260 uint32_t dirty_mask; 261}; 262 263struct v3d_vertex_stateobj { 264 struct pipe_vertex_element pipe[V3D_MAX_VS_INPUTS / 4]; 265 unsigned num_elements; 266 267 uint8_t attrs[16 * (V3D_MAX_VS_INPUTS / 4)]; 268 struct pipe_resource *defaults; 269 uint32_t defaults_offset; 270}; 271 272struct v3d_stream_output_target { 273 struct pipe_stream_output_target base; 274 /* Number of transform feedback vertices written to this target */ 275 uint32_t recorded_vertex_count; 276}; 277 278struct v3d_streamout_stateobj { 279 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS]; 280 /* Number of vertices we've written into the buffer so far. */ 281 uint32_t offsets[PIPE_MAX_SO_BUFFERS]; 282 unsigned num_targets; 283}; 284 285struct v3d_ssbo_stateobj { 286 struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS]; 287 uint32_t enabled_mask; 288}; 289 290/* Hash table key for v3d->jobs */ 291struct v3d_job_key { 292 struct pipe_surface *cbufs[V3D_MAX_DRAW_BUFFERS]; 293 struct pipe_surface *zsbuf; 294 struct pipe_surface *bbuf; 295}; 296 297enum v3d_ez_state { 298 V3D_EZ_UNDECIDED = 0, 299 V3D_EZ_GT_GE, 300 V3D_EZ_LT_LE, 301 V3D_EZ_DISABLED, 302}; 303 304struct v3d_image_view { 305 struct pipe_image_view base; 306 /* V3D 4.x texture shader state struct */ 307 struct pipe_resource *tex_state; 308 uint32_t tex_state_offset; 309}; 310 311struct v3d_shaderimg_stateobj { 312 struct v3d_image_view si[PIPE_MAX_SHADER_IMAGES]; 313 uint32_t enabled_mask; 314}; 315 316struct v3d_perfmon_state { 317 /* The kernel perfmon id */ 318 uint32_t kperfmon_id; 319 /* True if at least one job was submitted with this perfmon. */ 320 bool job_submitted; 321 /* Fence to be signaled when the last job submitted with this perfmon 322 * is executed by the GPU. 323 */ 324 struct v3d_fence *last_job_fence; 325 uint8_t counters[DRM_V3D_MAX_PERF_COUNTERS]; 326 uint64_t values[DRM_V3D_MAX_PERF_COUNTERS]; 327}; 328 329/** 330 * A complete bin/render job. 331 * 332 * This is all of the state necessary to submit a bin/render to the kernel. 333 * We want to be able to have multiple in progress at a time, so that we don't 334 * need to flush an existing CL just to switch to rendering to a new render 335 * target (which would mean reading back from the old render target when 336 * starting to render to it again). 337 */ 338struct v3d_job { 339 struct v3d_context *v3d; 340 struct v3d_cl bcl; 341 struct v3d_cl rcl; 342 struct v3d_cl indirect; 343 struct v3d_bo *tile_alloc; 344 struct v3d_bo *tile_state; 345 346 struct drm_v3d_submit_cl submit; 347 348 /** 349 * Set of all BOs referenced by the job. This will be used for making 350 * the list of BOs that the kernel will need to have paged in to 351 * execute our job. 352 */ 353 struct set *bos; 354 355 /** Sum of the sizes of the BOs referenced by the job. */ 356 uint32_t referenced_size; 357 358 struct set *write_prscs; 359 struct set *tf_write_prscs; 360 361 /* Size of the submit.bo_handles array. */ 362 uint32_t bo_handles_size; 363 364 /** @{ 365 * Surfaces to submit rendering for. 366 * For blit operations, bbuf is the source surface, and cbufs[0] is 367 * the destination surface. 368 */ 369 uint32_t nr_cbufs; 370 struct pipe_surface *cbufs[V3D_MAX_DRAW_BUFFERS]; 371 struct pipe_surface *zsbuf; 372 struct pipe_surface *bbuf; 373 /** @} */ 374 /** @{ 375 * Bounding box of the scissor across all queued drawing. 376 * 377 * Note that the max values are exclusive. 378 */ 379 uint32_t draw_min_x; 380 uint32_t draw_min_y; 381 uint32_t draw_max_x; 382 uint32_t draw_max_y; 383 384 /** @} */ 385 /** @{ 386 * List of scissor rects used for all queued drawing. All scissor 387 * rects will be contained in the draw_{min/max}_{x/y} bounding box. 388 * 389 * This is used as an optimization when all drawing is scissored to 390 * limit tile flushing only to tiles that intersect a scissor rect. 391 * If scissor is used together with non-scissored drawing, then 392 * the optimization is disabled. 393 */ 394 struct { 395 bool disabled; 396 uint32_t count; 397 struct { 398 uint32_t min_x, min_y; 399 uint32_t max_x, max_y; 400 } rects[MAX_JOB_SCISSORS]; 401 } scissor; 402 403 /** @} */ 404 /** @{ 405 * Width/height of the color framebuffer being rendered to, 406 * for V3D_TILE_RENDERING_MODE_CONFIG. 407 */ 408 uint32_t draw_width; 409 uint32_t draw_height; 410 uint32_t num_layers; 411 412 /** @} */ 413 /** @{ Tile information, depending on MSAA and float color buffer. */ 414 uint32_t draw_tiles_x; /** @< Number of tiles wide for framebuffer. */ 415 uint32_t draw_tiles_y; /** @< Number of tiles high for framebuffer. */ 416 417 uint32_t tile_width; /** @< Width of a tile. */ 418 uint32_t tile_height; /** @< Height of a tile. */ 419 /** maximum internal_bpp of all color render targets. */ 420 uint32_t internal_bpp; 421 422 /** Whether the current rendering is in a 4X MSAA tile buffer. */ 423 bool msaa; 424 /** @} */ 425 426 /* Bitmask of PIPE_CLEAR_* of buffers that were cleared before the 427 * first rendering. 428 */ 429 uint32_t clear; 430 /* Bitmask of PIPE_CLEAR_* of buffers that have been read by a draw 431 * call without having been cleared first. 432 */ 433 uint32_t load; 434 /* Bitmask of PIPE_CLEAR_* of buffers that have been rendered to 435 * (either clears or draws) and should be stored. 436 */ 437 uint32_t store; 438 uint32_t clear_color[V3D_MAX_DRAW_BUFFERS][4]; 439 float clear_z; 440 uint8_t clear_s; 441 442 /* If TLB double-buffering is enabled for this job */ 443 bool double_buffer; 444 445 /** 446 * Set if some drawing (triangles, blits, or just a glClear()) has 447 * been done to the FBO, meaning that we need to 448 * DRM_IOCTL_V3D_SUBMIT_CL. 449 */ 450 bool needs_flush; 451 452 /* Set if any shader has dirtied cachelines in the TMU that need to be 453 * flushed before job end. 454 */ 455 bool tmu_dirty_rcl; 456 457 /** 458 * Set if a packet enabling TF has been emitted in the job (V3D 4.x). 459 */ 460 bool tf_enabled; 461 462 bool needs_primitives_generated; 463 464 /** 465 * Current EZ state for drawing. Updated at the start of draw after 466 * we've decided on the shader being rendered. 467 */ 468 enum v3d_ez_state ez_state; 469 /** 470 * The first EZ state that was used for drawing with a decided EZ 471 * direction (so either UNDECIDED, GT, or LT). 472 */ 473 enum v3d_ez_state first_ez_state; 474 475 /** 476 * If we have already decided if we need to disable early Z/S 477 * completely for this job. 478 */ 479 bool decided_global_ez_enable; 480 481 /** 482 * If this job has been configured to use early Z/S clear. 483 */ 484 bool early_zs_clear; 485 486 /** 487 * Number of draw calls (not counting full buffer clears) queued in 488 * the current job. 489 */ 490 uint32_t draw_calls_queued; 491 492 /** 493 * Number of draw calls (not counting full buffer clears) queued in 494 * the current job during active transform feedback. 495 */ 496 uint32_t tf_draw_calls_queued; 497 498 struct v3d_job_key key; 499}; 500 501struct v3d_context { 502 struct pipe_context base; 503 504 int fd; 505 struct v3d_screen *screen; 506 507 /** The 3D rendering job for the currently bound FBO. */ 508 struct v3d_job *job; 509 510 /* Map from struct v3d_job_key to the job for that FBO. 511 */ 512 struct hash_table *jobs; 513 514 /** 515 * Map from v3d_resource to a job writing to that resource. 516 * 517 * Primarily for flushing jobs rendering to textures that are now 518 * being read from. 519 */ 520 struct hash_table *write_jobs; 521 522 struct slab_child_pool transfer_pool; 523 struct blitter_context *blitter; 524 525 /** bitfield of V3D_DIRTY_* */ 526 uint64_t dirty; 527 528 uint32_t next_uncompiled_program_id; 529 uint64_t next_compiled_program_id; 530 531 struct v3d_compiler_state *compiler_state; 532 533 uint8_t prim_mode; 534 535 /** Maximum index buffer valid for the current shader_rec. */ 536 uint32_t max_index; 537 538 /** Sync object that our RCL or TFU job will update as its out_sync. */ 539 uint32_t out_sync; 540 541 /* Stream uploader used by gallium internals. This could also be used 542 * by driver internals, but we tend to use the v3d_cl.h interfaces 543 * instead. 544 */ 545 struct u_upload_mgr *uploader; 546 /* State uploader used inside the driver. This is for packing bits of 547 * long-term state inside buffers, since the kernel interfaces 548 * allocate a page at a time. 549 */ 550 struct u_upload_mgr *state_uploader; 551 552 struct pipe_shader_state *sand8_blit_vs; 553 struct pipe_shader_state *sand8_blit_fs_luma; 554 struct pipe_shader_state *sand8_blit_fs_chroma; 555 556 /** @{ Current pipeline state objects */ 557 struct pipe_scissor_state scissor; 558 struct v3d_blend_state *blend; 559 struct v3d_rasterizer_state *rasterizer; 560 struct v3d_depth_stencil_alpha_state *zsa; 561 562 struct v3d_program_stateobj prog; 563 uint32_t compute_num_workgroups[3]; 564 struct v3d_bo *compute_shared_memory; 565 566 struct v3d_vertex_stateobj *vtx; 567 568 struct { 569 struct pipe_blend_color f; 570 uint16_t hf[4]; 571 } blend_color; 572 struct pipe_stencil_ref stencil_ref; 573 unsigned sample_mask; 574 struct pipe_framebuffer_state framebuffer; 575 576 /* Per render target, whether we should swap the R and B fields in the 577 * shader's color output and in blending. If render targets disagree 578 * on the R/B swap and use the constant color, then we would need to 579 * fall back to in-shader blending. 580 */ 581 uint8_t swap_color_rb; 582 583 /* Per render target, whether we should treat the dst alpha values as 584 * one in blending. 585 * 586 * For RGBX formats, the tile buffer's alpha channel will be 587 * undefined. 588 */ 589 uint8_t blend_dst_alpha_one; 590 591 bool active_queries; 592 593 /** 594 * If a compute job writes a resource read by a non-compute stage we 595 * should sync on the last compute job. 596 */ 597 bool sync_on_last_compute_job; 598 599 uint32_t tf_prims_generated; 600 uint32_t prims_generated; 601 602 uint32_t n_primitives_generated_queries_in_flight; 603 604 struct pipe_poly_stipple stipple; 605 struct pipe_clip_state clip; 606 struct pipe_viewport_state viewport; 607 struct v3d_ssbo_stateobj ssbo[PIPE_SHADER_TYPES]; 608 struct v3d_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES]; 609 struct v3d_constbuf_stateobj constbuf[PIPE_SHADER_TYPES]; 610 struct v3d_texture_stateobj tex[PIPE_SHADER_TYPES]; 611 struct v3d_vertexbuf_stateobj vertexbuf; 612 struct v3d_streamout_stateobj streamout; 613 struct v3d_bo *current_oq; 614 struct pipe_resource *prim_counts; 615 uint32_t prim_counts_offset; 616 struct util_debug_callback debug; 617 struct v3d_perfmon_state *active_perfmon; 618 struct v3d_perfmon_state *last_perfmon; 619 /** @} */ 620}; 621 622struct v3d_rasterizer_state { 623 struct pipe_rasterizer_state base; 624 625 float point_size; 626 627 uint8_t depth_offset[9]; 628 uint8_t depth_offset_z16[9]; 629}; 630 631struct v3d_depth_stencil_alpha_state { 632 struct pipe_depth_stencil_alpha_state base; 633 634 enum v3d_ez_state ez_state; 635 636 uint8_t stencil_front[6]; 637 uint8_t stencil_back[6]; 638}; 639 640struct v3d_blend_state { 641 struct pipe_blend_state base; 642 643 /* Per-RT mask of whether blending is enabled. */ 644 uint8_t blend_enables; 645}; 646 647#define perf_debug(...) do { \ 648 if (unlikely(V3D_DEBUG & V3D_DEBUG_PERF)) \ 649 fprintf(stderr, __VA_ARGS__); \ 650 if (unlikely(v3d->debug.debug_message)) \ 651 util_debug_message(&v3d->debug, PERF_INFO, __VA_ARGS__); \ 652} while (0) 653 654static inline struct v3d_context * 655v3d_context(struct pipe_context *pcontext) 656{ 657 return (struct v3d_context *)pcontext; 658} 659 660static inline struct v3d_sampler_view * 661v3d_sampler_view(struct pipe_sampler_view *psview) 662{ 663 return (struct v3d_sampler_view *)psview; 664} 665 666static inline struct v3d_sampler_state * 667v3d_sampler_state(struct pipe_sampler_state *psampler) 668{ 669 return (struct v3d_sampler_state *)psampler; 670} 671 672static inline struct v3d_stream_output_target * 673v3d_stream_output_target(struct pipe_stream_output_target *ptarget) 674{ 675 return (struct v3d_stream_output_target *)ptarget; 676} 677 678static inline uint32_t 679v3d_stream_output_target_get_vertex_count(struct pipe_stream_output_target *ptarget) 680{ 681 return v3d_stream_output_target(ptarget)->recorded_vertex_count; 682} 683 684int v3d_get_driver_query_group_info(struct pipe_screen *pscreen, 685 unsigned index, 686 struct pipe_driver_query_group_info *info); 687int v3d_get_driver_query_info(struct pipe_screen *pscreen, unsigned index, 688 struct pipe_driver_query_info *info); 689 690struct pipe_context *v3d_context_create(struct pipe_screen *pscreen, 691 void *priv, unsigned flags); 692void v3d_program_init(struct pipe_context *pctx); 693void v3d_program_fini(struct pipe_context *pctx); 694void v3d_query_init(struct pipe_context *pctx); 695 696static inline int 697v3d_ioctl(int fd, unsigned long request, void *arg) 698{ 699 if (using_v3d_simulator) 700 return v3d_simulator_ioctl(fd, request, arg); 701 else 702 return drmIoctl(fd, request, arg); 703} 704 705static inline bool 706v3d_transform_feedback_enabled(struct v3d_context *v3d) 707{ 708 return (v3d->prog.bind_vs->num_tf_specs != 0 || 709 (v3d->prog.bind_gs && v3d->prog.bind_gs->num_tf_specs != 0)) && 710 v3d->active_queries; 711} 712 713void v3d_set_shader_uniform_dirty_flags(struct v3d_compiled_shader *shader); 714struct v3d_cl_reloc v3d_write_uniforms(struct v3d_context *v3d, 715 struct v3d_job *job, 716 struct v3d_compiled_shader *shader, 717 enum pipe_shader_type stage); 718 719void v3d_flush(struct pipe_context *pctx); 720void v3d_job_init(struct v3d_context *v3d); 721struct v3d_job *v3d_job_create(struct v3d_context *v3d); 722void v3d_job_free(struct v3d_context *v3d, struct v3d_job *job); 723struct v3d_job *v3d_get_job(struct v3d_context *v3d, 724 uint32_t nr_cbufs, 725 struct pipe_surface **cbufs, 726 struct pipe_surface *zsbuf, 727 struct pipe_surface *bbuf); 728struct v3d_job *v3d_get_job_for_fbo(struct v3d_context *v3d); 729void v3d_job_add_bo(struct v3d_job *job, struct v3d_bo *bo); 730void v3d_job_add_write_resource(struct v3d_job *job, struct pipe_resource *prsc); 731void v3d_job_add_tf_write_resource(struct v3d_job *job, struct pipe_resource *prsc); 732void v3d_job_submit(struct v3d_context *v3d, struct v3d_job *job); 733void v3d_flush_jobs_using_bo(struct v3d_context *v3d, struct v3d_bo *bo); 734void v3d_flush_jobs_writing_resource(struct v3d_context *v3d, 735 struct pipe_resource *prsc, 736 enum v3d_flush_cond flush_cond, 737 bool is_compute_pipeline); 738void v3d_flush_jobs_reading_resource(struct v3d_context *v3d, 739 struct pipe_resource *prsc, 740 enum v3d_flush_cond flush_cond, 741 bool is_compute_pipeline); 742void v3d_update_compiled_shaders(struct v3d_context *v3d, uint8_t prim_mode); 743void v3d_update_compiled_cs(struct v3d_context *v3d); 744 745bool v3d_rt_format_supported(const struct v3d_device_info *devinfo, 746 enum pipe_format f); 747bool v3d_tex_format_supported(const struct v3d_device_info *devinfo, 748 enum pipe_format f); 749uint8_t v3d_get_rt_format(const struct v3d_device_info *devinfo, enum pipe_format f); 750uint8_t v3d_get_tex_format(const struct v3d_device_info *devinfo, enum pipe_format f); 751uint8_t v3d_get_tex_return_size(const struct v3d_device_info *devinfo, 752 enum pipe_format f, 753 enum pipe_tex_compare compare); 754uint8_t v3d_get_tex_return_channels(const struct v3d_device_info *devinfo, 755 enum pipe_format f); 756const uint8_t *v3d_get_format_swizzle(const struct v3d_device_info *devinfo, 757 enum pipe_format f); 758void v3d_get_internal_type_bpp_for_output_format(const struct v3d_device_info *devinfo, 759 uint32_t format, 760 uint32_t *type, 761 uint32_t *bpp); 762bool v3d_tfu_supports_tex_format(const struct v3d_device_info *devinfo, 763 uint32_t tex_format, 764 bool for_mipmap); 765bool v3d_format_supports_tlb_msaa_resolve(const struct v3d_device_info *devinfo, 766 enum pipe_format f); 767 768void v3d_init_query_functions(struct v3d_context *v3d); 769void v3d_blit(struct pipe_context *pctx, const struct pipe_blit_info *blit_info); 770void v3d_blitter_save(struct v3d_context *v3d, bool op_blit); 771bool v3d_generate_mipmap(struct pipe_context *pctx, 772 struct pipe_resource *prsc, 773 enum pipe_format format, 774 unsigned int base_level, 775 unsigned int last_level, 776 unsigned int first_layer, 777 unsigned int last_layer); 778 779void 780v3d_fence_unreference(struct v3d_fence **fence); 781 782struct v3d_fence *v3d_fence_create(struct v3d_context *v3d); 783 784bool v3d_fence_wait(struct v3d_screen *screen, 785 struct v3d_fence *fence, 786 uint64_t timeout_ns); 787 788void v3d_update_primitive_counters(struct v3d_context *v3d); 789 790bool v3d_line_smoothing_enabled(struct v3d_context *v3d); 791 792float v3d_get_real_line_width(struct v3d_context *v3d); 793 794void v3d_ensure_prim_counts_allocated(struct v3d_context *ctx); 795 796void v3d_flag_dirty_sampler_state(struct v3d_context *v3d, 797 enum pipe_shader_type shader); 798 799void v3d_create_texture_shader_state_bo(struct v3d_context *v3d, 800 struct v3d_sampler_view *so); 801 802void v3d_get_tile_buffer_size(bool is_msaa, 803 bool double_buffer, 804 uint32_t nr_cbufs, 805 struct pipe_surface **cbufs, 806 struct pipe_surface *bbuf, 807 uint32_t *tile_width, 808 uint32_t *tile_height, 809 uint32_t *max_bpp); 810 811#ifdef ENABLE_SHADER_CACHE 812struct v3d_compiled_shader *v3d_disk_cache_retrieve(struct v3d_context *v3d, 813 const struct v3d_key *key); 814 815void v3d_disk_cache_store(struct v3d_context *v3d, 816 const struct v3d_key *key, 817 const struct v3d_compiled_shader *shader, 818 uint64_t *qpu_insts, 819 uint32_t qpu_size); 820#endif /* ENABLE_SHADER_CACHE */ 821 822#ifdef v3dX 823# include "v3dx_context.h" 824#else 825# define v3dX(x) v3d33_##x 826# include "v3dx_context.h" 827# undef v3dX 828 829# define v3dX(x) v3d41_##x 830# include "v3dx_context.h" 831# undef v3dX 832#endif 833 834#endif /* V3D_CONTEXT_H */ 835