1/**************************************************************************
2 *
3 * Copyright 2017 Advanced Micro Devices, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28#ifndef _RADEON_VCN_DEC_H
29#define _RADEON_VCN_DEC_H
30
31#include "radeon_vcn.h"
32#include "util/list.h"
33
34#include "ac_vcn_dec.h"
35
36#define NUM_BUFFERS                                         4
37
38struct rvcn_dec_dynamic_dpb_t2 {
39   struct list_head list;
40   uint8_t index;
41   struct rvid_buffer dpb;
42};
43
44struct radeon_decoder {
45   struct pipe_video_codec base;
46
47   unsigned stream_handle;
48   unsigned stream_type;
49   unsigned frame_number;
50   unsigned db_alignment;
51   unsigned dpb_size;
52   unsigned last_width;
53   unsigned last_height;
54   unsigned addr_gfx_mode;
55
56   struct pipe_screen *screen;
57   struct radeon_winsys *ws;
58   struct radeon_cmdbuf cs;
59
60   void *msg;
61   uint32_t *fb;
62   uint8_t *it;
63   uint8_t *probs;
64   void *bs_ptr;
65   rvcn_decode_buffer_t *decode_buffer;
66   bool vcn_dec_sw_ring;
67   struct rvcn_sq_var sq;
68
69   struct rvid_buffer msg_fb_it_probs_buffers[NUM_BUFFERS];
70   struct rvid_buffer bs_buffers[NUM_BUFFERS];
71   struct rvid_buffer dpb;
72   struct rvid_buffer ctx;
73   struct rvid_buffer sessionctx;
74
75   unsigned bs_size;
76   unsigned cur_buffer;
77   void *render_pic_list[32];
78   unsigned h264_valid_ref_num[17];
79   unsigned h264_valid_poc_num[34];
80   unsigned av1_version;
81   bool show_frame;
82   unsigned ref_idx;
83   bool tmz_ctx;
84   struct {
85      unsigned data0;
86      unsigned data1;
87      unsigned cmd;
88      unsigned cntl;
89   } reg;
90   struct jpeg_params jpg;
91   enum {
92      DPB_MAX_RES = 0,
93      DPB_DYNAMIC_TIER_1,
94      DPB_DYNAMIC_TIER_2
95   } dpb_type;
96
97   struct {
98      enum {
99         CODEC_8_BITS = 0,
100         CODEC_10_BITS
101      } bts;
102      uint8_t index;
103      unsigned ref_size;
104      uint8_t ref_list[16];
105   } ref_codec;
106
107   struct list_head dpb_ref_list;
108   struct list_head dpb_unref_list;
109
110   void (*send_cmd)(struct radeon_decoder *dec, struct pipe_video_buffer *target,
111                    struct pipe_picture_desc *picture);
112   /* Additional contexts for mJPEG */
113   struct radeon_cmdbuf *jcs;
114   struct radeon_winsys_ctx **jctx;
115   unsigned cb_idx;
116   unsigned njctx;
117};
118
119void send_cmd_dec(struct radeon_decoder *dec, struct pipe_video_buffer *target,
120                  struct pipe_picture_desc *picture);
121
122void send_cmd_jpeg(struct radeon_decoder *dec, struct pipe_video_buffer *target,
123                   struct pipe_picture_desc *picture);
124
125struct pipe_video_codec *radeon_create_decoder(struct pipe_context *context,
126                                               const struct pipe_video_codec *templat);
127
128#endif
129