1/************************************************************************** 2 * 3 * Copyright 2013 Advanced Micro Devices, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28/* 29 * Authors: 30 * Christian König <christian.koenig@amd.com> 31 * 32 */ 33 34#include <stdio.h> 35 36#include "pipe/p_video_codec.h" 37 38#include "util/u_video.h" 39#include "util/u_memory.h" 40 41#include "vl/vl_video_buffer.h" 42 43#include "r600_pipe_common.h" 44#include "radeon_video.h" 45#include "radeon_vce.h" 46 47#define FW_40_2_2 ((40 << 24) | (2 << 16) | (2 << 8)) 48#define FW_50_0_1 ((50 << 24) | (0 << 16) | (1 << 8)) 49#define FW_50_1_2 ((50 << 24) | (1 << 16) | (2 << 8)) 50#define FW_50_10_2 ((50 << 24) | (10 << 16) | (2 << 8)) 51#define FW_50_17_3 ((50 << 24) | (17 << 16) | (3 << 8)) 52#define FW_52_0_3 ((52 << 24) | (0 << 16) | (3 << 8)) 53#define FW_52_4_3 ((52 << 24) | (4 << 16) | (3 << 8)) 54#define FW_52_8_3 ((52 << 24) | (8 << 16) | (3 << 8)) 55#define FW_53 (53 << 24) 56 57/* version specific function for getting parameters */ 58static void (*get_pic_param)(struct rvce_encoder *enc, 59 struct pipe_h264_enc_picture_desc *pic) = NULL; 60 61/** 62 * flush commands to the hardware 63 */ 64static void flush(struct rvce_encoder *enc) 65{ 66 enc->ws->cs_flush(&enc->cs, PIPE_FLUSH_ASYNC, NULL); 67 enc->task_info_idx = 0; 68 enc->bs_idx = 0; 69} 70 71#if 0 72static void dump_feedback(struct rvce_encoder *enc, struct rvid_buffer *fb) 73{ 74 uint32_t *ptr = enc->ws->buffer_map(fb->res->buf, &enc->cs, PIPE_MAP_READ_WRITE); 75 unsigned i = 0; 76 fprintf(stderr, "\n"); 77 fprintf(stderr, "encStatus:\t\t\t%08x\n", ptr[i++]); 78 fprintf(stderr, "encHasBitstream:\t\t%08x\n", ptr[i++]); 79 fprintf(stderr, "encHasAudioBitstream:\t\t%08x\n", ptr[i++]); 80 fprintf(stderr, "encBitstreamOffset:\t\t%08x\n", ptr[i++]); 81 fprintf(stderr, "encBitstreamSize:\t\t%08x\n", ptr[i++]); 82 fprintf(stderr, "encAudioBitstreamOffset:\t%08x\n", ptr[i++]); 83 fprintf(stderr, "encAudioBitstreamSize:\t\t%08x\n", ptr[i++]); 84 fprintf(stderr, "encExtrabytes:\t\t\t%08x\n", ptr[i++]); 85 fprintf(stderr, "encAudioExtrabytes:\t\t%08x\n", ptr[i++]); 86 fprintf(stderr, "videoTimeStamp:\t\t\t%08x\n", ptr[i++]); 87 fprintf(stderr, "audioTimeStamp:\t\t\t%08x\n", ptr[i++]); 88 fprintf(stderr, "videoOutputType:\t\t%08x\n", ptr[i++]); 89 fprintf(stderr, "attributeFlags:\t\t\t%08x\n", ptr[i++]); 90 fprintf(stderr, "seiPrivatePackageOffset:\t%08x\n", ptr[i++]); 91 fprintf(stderr, "seiPrivatePackageSize:\t\t%08x\n", ptr[i++]); 92 fprintf(stderr, "\n"); 93 enc->ws->buffer_unmap(fb->res->buf); 94} 95#endif 96 97/** 98 * reset the CPB handling 99 */ 100static void reset_cpb(struct rvce_encoder *enc) 101{ 102 unsigned i; 103 104 list_inithead(&enc->cpb_slots); 105 for (i = 0; i < enc->cpb_num; ++i) { 106 struct rvce_cpb_slot *slot = &enc->cpb_array[i]; 107 slot->index = i; 108 slot->picture_type = PIPE_H2645_ENC_PICTURE_TYPE_SKIP; 109 slot->frame_num = 0; 110 slot->pic_order_cnt = 0; 111 list_addtail(&slot->list, &enc->cpb_slots); 112 } 113} 114 115/** 116 * sort l0 and l1 to the top of the list 117 */ 118static void sort_cpb(struct rvce_encoder *enc) 119{ 120 struct rvce_cpb_slot *i, *l0 = NULL, *l1 = NULL; 121 122 LIST_FOR_EACH_ENTRY(i, &enc->cpb_slots, list) { 123 if (i->frame_num == enc->pic.ref_idx_l0_list[0]) 124 l0 = i; 125 126 if (i->frame_num == enc->pic.ref_idx_l1_list[0]) 127 l1 = i; 128 129 if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P && l0) 130 break; 131 132 if (enc->pic.picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B && 133 l0 && l1) 134 break; 135 } 136 137 if (l1) { 138 list_del(&l1->list); 139 list_add(&l1->list, &enc->cpb_slots); 140 } 141 142 if (l0) { 143 list_del(&l0->list); 144 list_add(&l0->list, &enc->cpb_slots); 145 } 146} 147 148/** 149 * get number of cpbs based on dpb 150 */ 151static unsigned get_cpb_num(struct rvce_encoder *enc) 152{ 153 unsigned w = align(enc->base.width, 16) / 16; 154 unsigned h = align(enc->base.height, 16) / 16; 155 unsigned dpb; 156 157 switch (enc->base.level) { 158 case 10: 159 dpb = 396; 160 break; 161 case 11: 162 dpb = 900; 163 break; 164 case 12: 165 case 13: 166 case 20: 167 dpb = 2376; 168 break; 169 case 21: 170 dpb = 4752; 171 break; 172 case 22: 173 case 30: 174 dpb = 8100; 175 break; 176 case 31: 177 dpb = 18000; 178 break; 179 case 32: 180 dpb = 20480; 181 break; 182 case 40: 183 case 41: 184 dpb = 32768; 185 break; 186 case 42: 187 dpb = 34816; 188 break; 189 case 50: 190 dpb = 110400; 191 break; 192 default: 193 case 51: 194 case 52: 195 dpb = 184320; 196 break; 197 } 198 199 return MIN2(dpb / (w * h), 16); 200} 201 202/** 203 * Get the slot for the currently encoded frame 204 */ 205struct rvce_cpb_slot *current_slot(struct rvce_encoder *enc) 206{ 207 return list_entry(enc->cpb_slots.prev, struct rvce_cpb_slot, list); 208} 209 210/** 211 * Get the slot for L0 212 */ 213struct rvce_cpb_slot *l0_slot(struct rvce_encoder *enc) 214{ 215 return list_entry(enc->cpb_slots.next, struct rvce_cpb_slot, list); 216} 217 218/** 219 * Get the slot for L1 220 */ 221struct rvce_cpb_slot *l1_slot(struct rvce_encoder *enc) 222{ 223 return list_entry(enc->cpb_slots.next->next, struct rvce_cpb_slot, list); 224} 225 226/** 227 * Calculate the offsets into the CPB 228 */ 229void rvce_frame_offset(struct rvce_encoder *enc, struct rvce_cpb_slot *slot, 230 signed *luma_offset, signed *chroma_offset) 231{ 232 unsigned pitch, vpitch, fsize; 233 234 pitch = align(enc->luma->u.legacy.level[0].nblk_x * enc->luma->bpe, 128); 235 vpitch = align(enc->luma->u.legacy.level[0].nblk_y, 16); 236 fsize = pitch * (vpitch + vpitch / 2); 237 238 *luma_offset = slot->index * fsize; 239 *chroma_offset = *luma_offset + pitch * vpitch; 240} 241 242/** 243 * destroy this video encoder 244 */ 245static void rvce_destroy(struct pipe_video_codec *encoder) 246{ 247 struct rvce_encoder *enc = (struct rvce_encoder*)encoder; 248 if (enc->stream_handle) { 249 struct rvid_buffer fb; 250 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING); 251 enc->fb = &fb; 252 enc->session(enc); 253 enc->feedback(enc); 254 enc->destroy(enc); 255 flush(enc); 256 rvid_destroy_buffer(&fb); 257 } 258 rvid_destroy_buffer(&enc->cpb); 259 enc->ws->cs_destroy(&enc->cs); 260 FREE(enc->cpb_array); 261 FREE(enc); 262} 263 264static void rvce_begin_frame(struct pipe_video_codec *encoder, 265 struct pipe_video_buffer *source, 266 struct pipe_picture_desc *picture) 267{ 268 struct rvce_encoder *enc = (struct rvce_encoder*)encoder; 269 struct vl_video_buffer *vid_buf = (struct vl_video_buffer *)source; 270 struct pipe_h264_enc_picture_desc *pic = (struct pipe_h264_enc_picture_desc *)picture; 271 272 bool need_rate_control = 273 enc->pic.rate_ctrl[0].rate_ctrl_method != pic->rate_ctrl[0].rate_ctrl_method || 274 enc->pic.quant_i_frames != pic->quant_i_frames || 275 enc->pic.quant_p_frames != pic->quant_p_frames || 276 enc->pic.quant_b_frames != pic->quant_b_frames; 277 278 enc->pic = *pic; 279 get_pic_param(enc, pic); 280 281 enc->get_buffer(vid_buf->resources[0], &enc->handle, &enc->luma); 282 enc->get_buffer(vid_buf->resources[1], NULL, &enc->chroma); 283 284 if (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_IDR) 285 reset_cpb(enc); 286 else if (pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_P || 287 pic->picture_type == PIPE_H2645_ENC_PICTURE_TYPE_B) 288 sort_cpb(enc); 289 290 if (!enc->stream_handle) { 291 struct rvid_buffer fb; 292 enc->stream_handle = rvid_alloc_stream_handle(); 293 rvid_create_buffer(enc->screen, &fb, 512, PIPE_USAGE_STAGING); 294 enc->fb = &fb; 295 enc->session(enc); 296 enc->create(enc); 297 enc->config(enc); 298 enc->feedback(enc); 299 flush(enc); 300 //dump_feedback(enc, &fb); 301 rvid_destroy_buffer(&fb); 302 need_rate_control = false; 303 } 304 305 if (need_rate_control) { 306 enc->session(enc); 307 enc->config(enc); 308 flush(enc); 309 } 310} 311 312static void rvce_encode_bitstream(struct pipe_video_codec *encoder, 313 struct pipe_video_buffer *source, 314 struct pipe_resource *destination, 315 void **fb) 316{ 317 struct rvce_encoder *enc = (struct rvce_encoder*)encoder; 318 enc->get_buffer(destination, &enc->bs_handle, NULL); 319 enc->bs_size = destination->width0; 320 321 *fb = enc->fb = CALLOC_STRUCT(rvid_buffer); 322 if (!rvid_create_buffer(enc->screen, enc->fb, 512, PIPE_USAGE_STAGING)) { 323 RVID_ERR("Can't create feedback buffer.\n"); 324 return; 325 } 326 if (!radeon_emitted(&enc->cs, 0)) 327 enc->session(enc); 328 enc->encode(enc); 329 enc->feedback(enc); 330} 331 332static void rvce_end_frame(struct pipe_video_codec *encoder, 333 struct pipe_video_buffer *source, 334 struct pipe_picture_desc *picture) 335{ 336 struct rvce_encoder *enc = (struct rvce_encoder*)encoder; 337 struct rvce_cpb_slot *slot = list_entry(enc->cpb_slots.prev, 338 struct rvce_cpb_slot, 339 list); 340 341 if (!enc->dual_inst || enc->bs_idx > 1) 342 flush(enc); 343 344 /* update the CPB backtrack with the just encoded frame */ 345 slot->picture_type = enc->pic.picture_type; 346 slot->frame_num = enc->pic.frame_num; 347 slot->pic_order_cnt = enc->pic.pic_order_cnt; 348 if (!enc->pic.not_referenced) { 349 list_del(&slot->list); 350 list_add(&slot->list, &enc->cpb_slots); 351 } 352} 353 354static void rvce_get_feedback(struct pipe_video_codec *encoder, 355 void *feedback, unsigned *size) 356{ 357 struct rvce_encoder *enc = (struct rvce_encoder*)encoder; 358 struct rvid_buffer *fb = feedback; 359 360 if (size) { 361 uint32_t *ptr = enc->ws->buffer_map(enc->ws, 362 fb->res->buf, &enc->cs, 363 PIPE_MAP_READ_WRITE | RADEON_MAP_TEMPORARY); 364 365 if (ptr[1]) { 366 *size = ptr[4] - ptr[9]; 367 } else { 368 *size = 0; 369 } 370 371 enc->ws->buffer_unmap(enc->ws, fb->res->buf); 372 } 373 //dump_feedback(enc, fb); 374 rvid_destroy_buffer(fb); 375 FREE(fb); 376} 377 378/** 379 * flush any outstanding command buffers to the hardware 380 */ 381static void rvce_flush(struct pipe_video_codec *encoder) 382{ 383 struct rvce_encoder *enc = (struct rvce_encoder*)encoder; 384 385 flush(enc); 386} 387 388static void rvce_cs_flush(void *ctx, unsigned flags, 389 struct pipe_fence_handle **fence) 390{ 391 // just ignored 392} 393 394struct pipe_video_codec *rvce_create_encoder(struct pipe_context *context, 395 const struct pipe_video_codec *templ, 396 struct radeon_winsys* ws, 397 rvce_get_buffer get_buffer) 398{ 399 struct r600_common_screen *rscreen = (struct r600_common_screen *)context->screen; 400 struct r600_common_context *rctx = (struct r600_common_context*)context; 401 struct rvce_encoder *enc; 402 struct pipe_video_buffer *tmp_buf, templat = {}; 403 struct radeon_surf *tmp_surf; 404 unsigned cpb_size; 405 406 if (!rscreen->info.vce_fw_version) { 407 RVID_ERR("Kernel doesn't supports VCE!\n"); 408 return NULL; 409 410 } else if (!rvce_is_fw_version_supported(rscreen)) { 411 RVID_ERR("Unsupported VCE fw version loaded!\n"); 412 return NULL; 413 } 414 415 enc = CALLOC_STRUCT(rvce_encoder); 416 if (!enc) 417 return NULL; 418 419 enc->use_vui = true; 420 421 enc->base = *templ; 422 enc->base.context = context; 423 424 enc->base.destroy = rvce_destroy; 425 enc->base.begin_frame = rvce_begin_frame; 426 enc->base.encode_bitstream = rvce_encode_bitstream; 427 enc->base.end_frame = rvce_end_frame; 428 enc->base.flush = rvce_flush; 429 enc->base.get_feedback = rvce_get_feedback; 430 enc->get_buffer = get_buffer; 431 432 enc->screen = context->screen; 433 enc->ws = ws; 434 435 if (!ws->cs_create(&enc->cs, rctx->ctx, AMD_IP_VCE, rvce_cs_flush, enc, false)) { 436 RVID_ERR("Can't get command submission context.\n"); 437 goto error; 438 } 439 440 templat.buffer_format = PIPE_FORMAT_NV12; 441 templat.width = enc->base.width; 442 templat.height = enc->base.height; 443 templat.interlaced = false; 444 if (!(tmp_buf = context->create_video_buffer(context, &templat))) { 445 RVID_ERR("Can't create video buffer.\n"); 446 goto error; 447 } 448 449 enc->cpb_num = get_cpb_num(enc); 450 if (!enc->cpb_num) 451 goto error; 452 453 get_buffer(((struct vl_video_buffer *)tmp_buf)->resources[0], NULL, &tmp_surf); 454 455 cpb_size = align(tmp_surf->u.legacy.level[0].nblk_x * tmp_surf->bpe, 128) * 456 align(tmp_surf->u.legacy.level[0].nblk_y, 32); 457 458 cpb_size = cpb_size * 3 / 2; 459 cpb_size = cpb_size * enc->cpb_num; 460 if (enc->dual_pipe) 461 cpb_size += RVCE_MAX_AUX_BUFFER_NUM * 462 RVCE_MAX_BITSTREAM_OUTPUT_ROW_SIZE * 2; 463 tmp_buf->destroy(tmp_buf); 464 if (!rvid_create_buffer(enc->screen, &enc->cpb, cpb_size, PIPE_USAGE_DEFAULT)) { 465 RVID_ERR("Can't create CPB buffer.\n"); 466 goto error; 467 } 468 469 enc->cpb_array = CALLOC(enc->cpb_num, sizeof(struct rvce_cpb_slot)); 470 if (!enc->cpb_array) 471 goto error; 472 473 reset_cpb(enc); 474 475 goto error; 476 477 return &enc->base; 478 479error: 480 enc->ws->cs_destroy(&enc->cs); 481 482 rvid_destroy_buffer(&enc->cpb); 483 484 FREE(enc->cpb_array); 485 FREE(enc); 486 return NULL; 487} 488 489/** 490 * check if kernel has the right fw version loaded 491 */ 492bool rvce_is_fw_version_supported(struct r600_common_screen *rscreen) 493{ 494 switch (rscreen->info.vce_fw_version) { 495 case FW_40_2_2: 496 case FW_50_0_1: 497 case FW_50_1_2: 498 case FW_50_10_2: 499 case FW_50_17_3: 500 case FW_52_0_3: 501 case FW_52_4_3: 502 case FW_52_8_3: 503 return true; 504 default: 505 if ((rscreen->info.vce_fw_version & (0xff << 24)) == FW_53) 506 return true; 507 else 508 return false; 509 } 510} 511 512/** 513 * Add the buffer as relocation to the current command submission 514 */ 515void rvce_add_buffer(struct rvce_encoder *enc, struct pb_buffer *buf, 516 unsigned usage, enum radeon_bo_domain domain, 517 signed offset) 518{ 519 int reloc_idx; 520 521 reloc_idx = enc->ws->cs_add_buffer(&enc->cs, buf, usage | RADEON_USAGE_SYNCHRONIZED, 522 domain); 523 if (enc->use_vm) { 524 uint64_t addr; 525 addr = enc->ws->buffer_get_virtual_address(buf); 526 addr = addr + offset; 527 RVCE_CS(addr >> 32); 528 RVCE_CS(addr); 529 } else { 530 offset += enc->ws->buffer_get_reloc_offset(buf); 531 RVCE_CS(reloc_idx * 4); 532 RVCE_CS(offset); 533 } 534} 535