1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Jerome Glisse 25 */ 26#ifndef EVERGREEND_H 27#define EVERGREEND_H 28 29/* evergreen values */ 30#define EVERGREEN_CONFIG_REG_OFFSET 0X00008000 31#define EVERGREEN_CONFIG_REG_END 0X0000AC00 32#define EVERGREEN_CONTEXT_REG_OFFSET 0X00028000 33#define EVERGREEN_CONTEXT_REG_END 0X00029000 34#define EVERGREEN_RESOURCE_OFFSET 0x00030000 35#define EVERGREEN_RESOURCE_END 0x00038000 36#define EVERGREEN_LOOP_CONST_OFFSET 0x0003A200 37#define EVERGREEN_LOOP_CONST_END 0x0003A500 38#define EVERGREEN_BOOL_CONST_OFFSET 0x0003A500 39#define EVERGREEN_BOOL_CONST_END 0x0003A518 40#define EVERGREEN_SAMPLER_OFFSET 0X0003C000 41#define EVERGREEN_SAMPLER_END 0X0003C600 42 43#define EVERGREEN_CTL_CONST_OFFSET 0x0003CFF0 44#define EVERGREEN_CTL_CONST_END 0x0003FF0C 45 46#define EVENT_TYPE_CS_PARTIAL_FLUSH 0x07 47#define EVENT_TYPE_PS_PARTIAL_FLUSH 0x10 48#define EVENT_TYPE_ZPASS_DONE 0x15 49#define EVENT_TYPE_CACHE_FLUSH_AND_INV_EVENT 0x16 50#define EVENT_TYPE_SO_VGTSTREAMOUT_FLUSH 0x1f 51#define EVENT_TYPE_VGT_FLUSH 0x24 52#define EVENT_TYPE_FLUSH_AND_INV_DB_META 0x2c 53#define EVENT_TYPE_CS_DONE 0x2f 54#define EVENT_TYPE_PS_DONE 0x30 55 56#define EVENT_TYPE(x) ((x) << 0) 57#define EVENT_INDEX(x) ((x) << 8) 58 /* 0 - any non-TS event 59 * 1 - ZPASS_DONE 60 * 2 - SAMPLE_PIPELINESTAT 61 * 3 - SAMPLE_STREAMOUTSTAT* 62 * 4 - *S_PARTIAL_FLUSH 63 * 5 - TS events 64 * 6 - EOS events 65 */ 66 67#define R600_TEXEL_PITCH_ALIGNMENT_MASK 0x7 68 69#define PKT3_NOP 0x10 70#define PKT3_DEALLOC_STATE 0x14 71#define PKT3_DISPATCH_DIRECT 0x15 72#define PKT3_DISPATCH_INDIRECT 0x16 73#define PKT3_INDIRECT_BUFFER_END 0x17 74#define PKT3_SET_PREDICATION 0x20 75#define PKT3_REG_RMW 0x21 76#define PKT3_COND_EXEC 0x22 77#define PKT3_PRED_EXEC 0x23 78#define PKT3_DRAW_INDEX_2 0x27 79#define PKT3_CONTEXT_CONTROL 0x28 80#define PKT3_DRAW_INDEX_IMMD_BE 0x29 81#define PKT3_INDEX_TYPE 0x2A 82#define PKT3_DRAW_INDEX 0x2B 83#define PKT3_DRAW_INDEX_AUTO 0x2D 84#define PKT3_DRAW_INDEX_IMMD 0x2E 85#define PKT3_NUM_INSTANCES 0x2F 86#define PKT3_STRMOUT_BUFFER_UPDATE 0x34 87#define PKT3_INDIRECT_BUFFER_MP 0x38 88#define PKT3_MEM_SEMAPHORE 0x39 89#define PKT3_MPEG_INDEX 0x3A 90#define PKT3_WAIT_REG_MEM 0x3C 91#define WAIT_REG_MEM_EQUAL 3 92#define PKT3_MEM_WRITE 0x3D 93#define MEM_WRITE_CONFIRM (1 << 17) 94#define MEM_WRITE_32_BITS (1 << 18) 95#define PKT3_INDIRECT_BUFFER 0x32 96#define PKT3_PFP_SYNC_ME 0x42 97#define PKT3_SURFACE_SYNC 0x43 98#define PKT3_ME_INITIALIZE 0x44 99#define PKT3_COND_WRITE 0x45 100#define PKT3_EVENT_WRITE 0x46 101#define PKT3_EVENT_WRITE_EOP 0x47 102#define PKT3_EVENT_WRITE_EOS 0x48 103#define PKT3_ONE_REG_WRITE 0x57 104#define PKT3_SET_CONFIG_REG 0x68 105#define PKT3_SET_CONTEXT_REG 0x69 106#define PKT3_SET_ALU_CONST 0x6A 107#define PKT3_SET_BOOL_CONST 0x6B 108#define PKT3_SET_LOOP_CONST 0x6C 109#define PKT3_SET_RESOURCE 0x6D 110#define PKT3_SET_SAMPLER 0x6E 111#define PKT3_SET_CTL_CONST 0x6F 112#define PKT3_SURFACE_BASE_UPDATE 0x73 113 114#define PKT_TYPE_S(x) (((unsigned)(x) & 0x3) << 30) 115#define PKT_TYPE_G(x) (((x) >> 30) & 0x3) 116#define PKT_TYPE_C 0x3FFFFFFF 117#define PKT_COUNT_S(x) (((unsigned)(x) & 0x3FFF) << 16) 118#define PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) 119#define PKT_COUNT_C 0xC000FFFF 120#define PKT0_BASE_INDEX_S(x) (((unsigned)(x) & 0xFFFF) << 0) 121#define PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) 122#define PKT0_BASE_INDEX_C 0xFFFF0000 123#define PKT3_IT_OPCODE_S(x) (((unsigned)(x) & 0xFF) << 8) 124#define PKT3_IT_OPCODE_G(x) (((x) >> 8) & 0xFF) 125#define PKT3_IT_OPCODE_C 0xFFFF00FF 126#define PKT3_PREDICATE(x) (((x) >> 0) & 0x1) 127#define PKT0(index, count) (PKT_TYPE_S(0) | PKT0_BASE_INDEX_S(index) | PKT_COUNT_S(count)) 128 129#define PKT3_CP_DMA 0x41 130/* 1. header 131 * 2. SRC_ADDR_LO [31:0] or DATA [31:0] 132 * 3. CP_SYNC [31] | SRC_SEL [30:29] | ENGINE [27] | DST_SEL [21:20] | SRC_ADDR_HI [7:0] 133 * 4. DST_ADDR_LO [31:0] 134 * 5. DST_ADDR_HI [7:0] 135 * 6. COMMAND [29:22] | BYTE_COUNT [20:0] 136 */ 137#define PKT3_CP_DMA_CP_SYNC (1 << 31) 138#define PKT3_CP_DMA_SRC_SEL(x) ((x) << 29) 139/* 0 - SRC_ADDR 140 * 1 - GDS (program SAS to 1 as well) 141 * 2 - DATA 142 */ 143#define PKT3_CP_DMA_DST_SEL(x) ((x) << 20) 144/* 0 - DST_ADDR 145 * 1 - GDS (program DAS to 1 as well) 146 */ 147/* COMMAND */ 148#define PKT3_CP_DMA_CMD_SRC_SWAP(x) ((x) << 23) 149/* 0 - none 150 * 1 - 8 in 16 151 * 2 - 8 in 32 152 * 3 - 8 in 64 153 */ 154#define PKT3_CP_DMA_CMD_DST_SWAP(x) ((x) << 24) 155/* 0 - none 156 * 1 - 8 in 16 157 * 2 - 8 in 32 158 * 3 - 8 in 64 159 */ 160#define PKT3_CP_DMA_CMD_SAS (1 << 26) 161/* 0 - memory 162 * 1 - register 163 */ 164#define PKT3_CP_DMA_CMD_DAS (1 << 27) 165/* 0 - memory 166 * 1 - register 167 */ 168#define PKT3_CP_DMA_CMD_SAIC (1 << 28) 169#define PKT3_CP_DMA_CMD_DAIC (1 << 29) 170 171#define PKT3_SET_APPEND_CNT 0x75 172/* 1. header 173 * 2. COMMAND 174 * 1:0 - SOURCE SEL 175 * 15:2 - Reserved 176 * 31:16 - WR_REG_OFFSET - context register to write source data to. 177 * (one of R_02872C_GDS_APPEND_COUNT_0-11) 178 * 3. CONTROL 179 * (for source == mem) 180 * 31:2 SRC_ADDRESS_LO 181 * 0:1 SWAP 182 * (for source == GDS) 183 * 31:0 GDS offset 184 * (for source == DATA) 185 * 31:0 DATA 186 * (for source == REG) 187 * 31:0 REG 188 * 4. SRC_ADDRESS_HI[7:0] 189 * kernel driver 2.44 only supports SRC == MEM. 190 */ 191#define PKT3_SET_APPEND_CNT_SRC_SELECT(x) ((x) << 0) 192/* source is from the data in CONTROL */ 193#define PKT3_SAC_SRC_SEL_DATA 0x0 194/* source is from register */ 195#define PKT3_SAC_SRC_SEL_REG 0x1 196/* source is from GDS offset in CONTROL */ 197#define PKT3_SAC_SRC_SEL_GDS 0x2 198/* source is from memory address */ 199#define PKT3_SAC_SRC_SEL_MEM 0x3 200 201/* Registers */ 202#define R_0084FC_CP_STRMOUT_CNTL 0x0084FC 203#define S_0084FC_OFFSET_UPDATE_DONE(x) (((unsigned)(x) & 0x1) << 0) 204#define R_028B94_VGT_STRMOUT_CONFIG 0x028B94 205#define S_028B94_STREAMOUT_0_EN(x) (((unsigned)(x) & 0x1) << 0) 206#define G_028B94_STREAMOUT_0_EN(x) (((x) >> 0) & 0x1) 207#define C_028B94_STREAMOUT_0_EN 0xFFFFFFFE 208#define S_028B94_STREAMOUT_1_EN(x) (((unsigned)(x) & 0x1) << 1) 209#define G_028B94_STREAMOUT_1_EN(x) (((x) >> 1) & 0x1) 210#define C_028B94_STREAMOUT_1_EN 0xFFFFFFFD 211#define S_028B94_STREAMOUT_2_EN(x) (((unsigned)(x) & 0x1) << 2) 212#define G_028B94_STREAMOUT_2_EN(x) (((x) >> 2) & 0x1) 213#define C_028B94_STREAMOUT_2_EN 0xFFFFFFFB 214#define S_028B94_STREAMOUT_3_EN(x) (((unsigned)(x) & 0x1) << 3) 215#define G_028B94_STREAMOUT_3_EN(x) (((x) >> 3) & 0x1) 216#define C_028B94_STREAMOUT_3_EN 0xFFFFFFF7 217#define S_028B94_RAST_STREAM(x) (((unsigned)(x) & 0x07) << 4) 218#define G_028B94_RAST_STREAM(x) (((x) >> 4) & 0x07) 219#define C_028B94_RAST_STREAM 0xFFFFFF8F 220#define S_028B94_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x0F) << 8) /* SI+ */ 221#define G_028B94_RAST_STREAM_MASK(x) (((x) >> 8) & 0x0F) 222#define C_028B94_RAST_STREAM_MASK 0xFFFFF0FF 223#define S_028B94_USE_RAST_STREAM_MASK(x) (((unsigned)(x) & 0x1) << 31) /* SI+ */ 224#define G_028B94_USE_RAST_STREAM_MASK(x) (((x) >> 31) & 0x1) 225#define C_028B94_USE_RAST_STREAM_MASK 0x7FFFFFFF 226#define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 227#define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) 228#define G_028B98_STREAM_0_BUFFER_EN(x) (((x) >> 0) & 0x0F) 229#define C_028B98_STREAM_0_BUFFER_EN 0xFFFFFFF0 230#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) 231#define G_028B98_STREAM_1_BUFFER_EN(x) (((x) >> 4) & 0x0F) 232#define C_028B98_STREAM_1_BUFFER_EN 0xFFFFFF0F 233#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) 234#define G_028B98_STREAM_2_BUFFER_EN(x) (((x) >> 8) & 0x0F) 235#define C_028B98_STREAM_2_BUFFER_EN 0xFFFFF0FF 236#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) 237#define G_028B98_STREAM_3_BUFFER_EN(x) (((x) >> 12) & 0x0F) 238#define C_028B98_STREAM_3_BUFFER_EN 0xFFFF0FFF 239 240#define EG_R_028A4C_PA_SC_MODE_CNTL_1 0x028A4C 241#define EG_S_028A4C_PS_ITER_SAMPLE(x) (((unsigned)(x) & 0x1) << 16) 242#define EG_S_028A4C_FORCE_EOV_CNTDWN_ENABLE(x) (((unsigned)(x) & 0x1) << 25) 243#define EG_S_028A4C_FORCE_EOV_REZ_ENABLE(x) (((unsigned)(x) & 0x1) << 26) 244#define CM_R_028804_DB_EQAA 0x00028804 245#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) 246#define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x07) 247#define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8 248#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x07) << 4) 249#define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x07) 250#define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F 251#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 8) 252#define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x07) 253#define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF 254#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 12) 255#define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x07) 256#define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF 257#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) 258#define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1) 259#define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF 260#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) 261#define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1) 262#define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF 263#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) 264#define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1) 265#define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF 266#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) 267#define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1) 268#define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF 269#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) 270#define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1) 271#define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF 272#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) 273#define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1) 274#define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF 275#define S_028804_OVERRASTERIZATION_AMOUNT(x) (((unsigned)(x) & 0x07) << 24) 276#define G_028804_OVERRASTERIZATION_AMOUNT(x) (((x) >> 24) & 0x07) 277#define C_028804_OVERRASTERIZATION_AMOUNT 0xF8FFFFFF 278#define S_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((unsigned)(x) & 0x1) << 27) 279#define G_028804_ENABLE_POSTZ_OVERRASTERIZATION(x) (((x) >> 27) & 0x1) 280#define C_028804_ENABLE_POSTZ_OVERRASTERIZATION 0xF7FFFFFF 281#define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc 282#define S_028BDC_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) 283#define G_028BDC_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) 284#define C_028BDC_EXPAND_LINE_WIDTH 0xFFFFFDFF 285#define S_028BDC_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) 286#define G_028BDC_LAST_PIXEL(x) (((x) >> 10) & 0x1) 287#define C_028BDC_LAST_PIXEL 0xFFFFFBFF 288#define S_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((unsigned)(x) & 0x1) << 11) 289#define G_028BDC_PERPENDICULAR_ENDCAP_ENA(x) (((x) >> 11) & 0x1) 290#define C_028BDC_PERPENDICULAR_ENDCAP_ENA 0xFFFFF7FF 291#define S_028BDC_DX10_DIAMOND_TEST_ENA(x) (((unsigned)(x) & 0x1) << 12) 292#define G_028BDC_DX10_DIAMOND_TEST_ENA(x) (((x) >> 12) & 0x1) 293#define C_028BDC_DX10_DIAMOND_TEST_ENA 0xFFFFEFFF 294#define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0 295#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) 296#define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07) 297#define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8 298#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) 299#define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) 300#define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF 301#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0x0F) << 13) 302#define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F) 303#define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF 304#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x07) << 20) 305#define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07) 306#define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF 307#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x03) << 24) 308#define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03) 309#define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF 310#define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8 311#define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08 312#define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18 313#define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28 314#define R_008960_VGT_STRMOUT_BUFFER_FILLED_SIZE_0 0x008960 /* read-only */ 315#define R_008964_VGT_STRMOUT_BUFFER_FILLED_SIZE_1 0x008964 /* read-only */ 316#define R_008968_VGT_STRMOUT_BUFFER_FILLED_SIZE_2 0x008968 /* read-only */ 317#define R_00896C_VGT_STRMOUT_BUFFER_FILLED_SIZE_3 0x00896C /* read-only */ 318#define R_008C00_SQ_CONFIG 0x00008C00 319#define S_008C00_VC_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 320#define G_008C00_VC_ENABLE(x) (((x) >> 0) & 0x1) 321#define C_008C00_VC_ENABLE(x) 0xFFFFFFFE 322#define S_008C00_EXPORT_SRC_C(x) (((unsigned)(x) & 0x1) << 1) 323#define G_008C00_EXPORT_SRC_C(x) (((x) >> 1) & 0x1) 324#define C_008C00_EXPORT_SRC_C(x) 0xFFFFFFFD 325/* different */ 326#define S_008C00_CS_PRIO(x) (((unsigned)(x) & 0x3) << 18) 327#define G_008C00_CS_PRIO(x) (((x) >> 18) & 0x3) 328#define C_008C00_CS_PRIO(x) 0xFFF3FFFF 329#define S_008C00_LS_PRIO(x) (((unsigned)(x) & 0x3) << 20) 330#define G_008C00_LS_PRIO(x) (((x) >> 20) & 0x3) 331#define C_008C00_LS_PRIO(x) 0xFFCFFFFF 332#define S_008C00_HS_PRIO(x) (((unsigned)(x) & 0x3) << 22) 333#define G_008C00_HS_PRIO(x) (((x) >> 22) & 0x3) 334#define C_008C00_HS_PRIO(x) 0xFF3FFFFF 335#define S_008C00_PS_PRIO(x) (((unsigned)(x) & 0x3) << 24) 336#define G_008C00_PS_PRIO(x) (((x) >> 24) & 0x3) 337#define C_008C00_PS_PRIO(x) 0xFCFFFFFF 338#define S_008C00_VS_PRIO(x) (((unsigned)(x) & 0x3) << 26) 339#define G_008C00_VS_PRIO(x) (((x) >> 26) & 0x3) 340#define C_008C00_VS_PRIO(x) 0xF3FFFFFF 341#define S_008C00_GS_PRIO(x) (((unsigned)(x) & 0x3) << 28) 342#define G_008C00_GS_PRIO(x) (((x) >> 28) & 0x3) 343#define C_008C00_GS_PRIO(x) 0xCFFFFFFF 344#define S_008C00_ES_PRIO(x) (((unsigned)(x) & 0x3) << 30) 345#define G_008C00_ES_PRIO(x) (((x) >> 30) & 0x3) 346#define C_008C00_ES_PRIO(x) 0x3FFFFFFF 347#define R_008C04_SQ_GPR_RESOURCE_MGMT_1 0x00008C04 348#define S_008C04_NUM_PS_GPRS(x) (((unsigned)(x) & 0xFF) << 0) 349#define G_008C04_NUM_PS_GPRS(x) (((x) >> 0) & 0xFF) 350#define C_008C04_NUM_PS_GPRS(x) 0xFFFFFF00 351#define S_008C04_NUM_VS_GPRS(x) (((unsigned)(x) & 0xFF) << 16) 352#define G_008C04_NUM_VS_GPRS(x) (((x) >> 16) & 0xFF) 353#define C_008C04_NUM_VS_GPRS(x) 0xFF00FFFF 354#define S_008C04_NUM_CLAUSE_TEMP_GPRS(x) (((unsigned)(x) & 0xF) << 28) 355#define G_008C04_NUM_CLAUSE_TEMP_GPRS(x) (((x) >> 28) & 0xF) 356#define C_008C04_NUM_CLAUSE_TEMP_GPRS(x) 0x0FFFFFFF 357#define R_008C08_SQ_GPR_RESOURCE_MGMT_2 0x00008C08 358#define S_008C08_NUM_GS_GPRS(x) (((unsigned)(x) & 0xFF) << 0) 359#define G_008C08_NUM_GS_GPRS(x) (((x) >> 0) & 0xFF) 360#define C_008C08_NUM_GS_GPRS(x) 0xFFFFFF00 361#define S_008C08_NUM_ES_GPRS(x) (((unsigned)(x) & 0xFF) << 16) 362#define G_008C08_NUM_ES_GPRS(x) (((x) >> 16) & 0xFF) 363#define C_008C08_NUM_ES_GPRS(x) 0xFF00FFFF 364#define R_008C0C_SQ_GPR_RESOURCE_MGMT_3 0x00008C0C 365#define S_008C0C_NUM_HS_GPRS(x) (((unsigned)(x) & 0xFF) << 0) 366#define G_008C0C_NUM_HS_GPRS(x) (((x) >> 0) & 0xFF) 367#define C_008C0C_NUM_HS_GPRS(x) 0xFFFFFF00 368#define S_008C0C_NUM_LS_GPRS(x) (((unsigned)(x) & 0xFF) << 16) 369#define G_008C0C_NUM_LS_GPRS(x) (((x) >> 16) & 0xFF) 370#define C_008C0C_NUM_LS_GPRS(x) 0xFF00FFFF 371 372#define R_008C10_SQ_GLOBAL_GPR_RESOURCE_MGMT_1 0x00008C10 373#define R_008C14_SQ_GLOBAL_GPR_RESOURCE_MGMT_2 0x00008C14 374 375#define R_008C18_SQ_THREAD_RESOURCE_MGMT_1 0x00008C18 376#define S_008C18_NUM_PS_THREADS(x) (((unsigned)(x) & 0xFF) << 0) 377#define G_008C18_NUM_PS_THREADS(x) (((x) >> 0) & 0xFF) 378#define C_008C18_NUM_PS_THREADS(x) 0xFFFFFF00 379#define S_008C18_NUM_VS_THREADS(x) (((unsigned)(x) & 0xFF) << 8) 380#define G_008C18_NUM_VS_THREADS(x) (((x) >> 8) & 0xFF) 381#define C_008C18_NUM_VS_THREADS(x) 0xFFFF00FF 382#define S_008C18_NUM_GS_THREADS(x) (((unsigned)(x) & 0xFF) << 16) 383#define G_008C18_NUM_GS_THREADS(x) (((x) >> 16) & 0xFF) 384#define C_008C18_NUM_GS_THREADS(x) 0xFF00FFFF 385#define S_008C18_NUM_ES_THREADS(x) (((unsigned)(x) & 0xFF) << 24) 386#define G_008C18_NUM_ES_THREADS(x) (((x) >> 24) & 0xFF) 387#define C_008C18_NUM_ES_THREADS(x) 0x00FFFFFF 388#define R_008C1C_SQ_THREAD_RESOURCE_MGMT_2 0x00008C1C 389#define S_008C1C_NUM_HS_THREADS(x) (((unsigned)(x) & 0xFF) << 0) 390#define G_008C1C_NUM_HS_THREADS(x) (((x) >> 0) & 0xFF) 391#define C_008C1C_NUM_HS_THREADS(x) 0xFFFFFF00 392#define S_008C1C_NUM_LS_THREADS(x) (((unsigned)(x) & 0xFF) << 8) 393#define G_008C1C_NUM_LS_THREADS(x) (((x) >> 8) & 0xFF) 394#define C_008C1C_NUM_LS_THREADS(x) 0xFFFF00FF 395#define R_008C20_SQ_STACK_RESOURCE_MGMT_1 0x00008C20 396#define S_008C20_NUM_PS_STACK_ENTRIES(x) (((unsigned)(x) & 0xFFF) << 0) 397#define G_008C20_NUM_PS_STACK_ENTRIES(x) (((x) >> 0) & 0xFFF) 398#define C_008C20_NUM_PS_STACK_ENTRIES(x) 0xFFFFF000 399#define S_008C20_NUM_VS_STACK_ENTRIES(x) (((unsigned)(x) & 0xFFF) << 16) 400#define G_008C20_NUM_VS_STACK_ENTRIES(x) (((x) >> 16) & 0xFFF) 401#define C_008C20_NUM_VS_STACK_ENTRIES(x) 0xF000FFFF 402#define R_008C24_SQ_STACK_RESOURCE_MGMT_2 0x00008C24 403#define S_008C24_NUM_GS_STACK_ENTRIES(x) (((unsigned)(x) & 0xFFF) << 0) 404#define G_008C24_NUM_GS_STACK_ENTRIES(x) (((x) >> 0) & 0xFFF) 405#define C_008C24_NUM_GS_STACK_ENTRIES(x) 0xFFFFF000 406#define S_008C24_NUM_ES_STACK_ENTRIES(x) (((unsigned)(x) & 0xFFF) << 16) 407#define G_008C24_NUM_ES_STACK_ENTRIES(x) (((x) >> 16) & 0xFFF) 408#define C_008C24_NUM_ES_STACK_ENTRIES(x) 0xF000FFFF 409#define R_008C28_SQ_STACK_RESOURCE_MGMT_3 0x00008C28 410#define S_008C28_NUM_HS_STACK_ENTRIES(x) (((unsigned)(x) & 0xFFF) << 0) 411#define G_008C28_NUM_HS_STACK_ENTRIES(x) (((x) >> 0) & 0xFFF) 412#define C_008C28_NUM_HS_STACK_ENTRIES(x) 0xFFFFF000 413#define S_008C28_NUM_LS_STACK_ENTRIES(x) (((unsigned)(x) & 0xFFF) << 16) 414#define G_008C28_NUM_LS_STACK_ENTRIES(x) (((x) >> 16) & 0xFFF) 415#define C_008C28_NUM_LS_STACK_ENTRIES(x) 0xF000FFFF 416#define R_008E2C_SQ_LDS_RESOURCE_MGMT 0x00008E2C 417#define S_008E2C_NUM_PS_LDS(x) (((unsigned)(x) & 0xFFFF) << 0) 418#define G_008E2C_NUM_PS_LDS(x) (((x) >> 0) & 0xFFFF) 419#define C_008E2C_NUM_PS_LDS(x) 0x0000FFFF 420#define S_008E2C_NUM_LS_LDS(x) (((unsigned)(x) & 0xFFFF) << 16) 421#define G_008E2C_NUM_LS_LDS(x) (((x) >> 16) & 0xFFFF) 422#define C_008E2C_NUM_LS_LDS(x) 0xFFFF0000 423 424#define R_008C40_SQ_ESGS_RING_BASE 0x00008C40 425#define R_008C44_SQ_ESGS_RING_SIZE 0x00008C44 426#define R_008C48_SQ_GSVS_RING_BASE 0x00008C48 427#define R_008C4C_SQ_GSVS_RING_SIZE 0x00008C4C 428 429#define R_008CF0_SQ_MS_FIFO_SIZES 0x00008CF0 430#define S_008CF0_CACHE_FIFO_SIZE(x) (((unsigned)(x) & 0xFF) << 0) 431#define G_008CF0_CACHE_FIFO_SIZE(x) (((x) >> 0) & 0xFF) 432#define C_008CF0_CACHE_FIFO_SIZE(x) 0xFFFFFF00 433#define S_008CF0_FETCH_FIFO_HIWATER(x) (((unsigned)(x) & 0x1F) << 8) 434#define G_008CF0_FETCH_FIFO_HIWATER(x) (((x) >> 8) & 0x1F) 435#define C_008CF0_FETCH_FIFO_HIWATER(x) 0xFFFFE0FF 436#define S_008CF0_DONE_FIFO_HIWATER(x) (((unsigned)(x) & 0xFF) << 16) 437#define G_008CF0_DONE_FIFO_HIWATER(x) (((x) >> 16) & 0xFF) 438#define C_008CF0_DONE_FIFO_HIWATER(x) 0xFF00FFFF 439#define S_008CF0_ALU_UPDATE_FIFO_HIWATER(x) (((unsigned)(x) & 0x1F) << 24) 440#define G_008CF0_ALU_UPDATE_FIFO_HIWATER(x) (((x) >> 24) & 0x1F) 441#define C_008CF0_ALU_UPDATE_FIFO_HIWATER(x) 0xE0FFFFFF 442 443#define R_008E20_SQ_STATIC_THREAD_MGMT1 0x8E20 444#define R_008E24_SQ_STATIC_THREAD_MGMT2 0x8E24 445#define R_008E28_SQ_STATIC_THREAD_MGMT3 0x8E28 446 447#define R_00899C_VGT_COMPUTE_START_X 0x0000899C 448#define R_0089A0_VGT_COMPUTE_START_Y 0x000089A0 449#define R_0089A4_VGT_COMPUTE_START_Z 0x000089A4 450#define R_0089AC_VGT_COMPUTE_THREAD_GROUP_SIZE 0x000089AC 451 452#define R_009100_SPI_CONFIG_CNTL 0x00009100 453#define R_00913C_SPI_CONFIG_CNTL_1 0x0000913C 454#define S_00913C_VTX_DONE_DELAY(x) (((unsigned)(x) & 0xF) << 0) 455#define G_00913C_VTX_DONE_DELAY(x) (((x) >> 0) & 0xF ) 456#define C_00913C_VTX_DONE_DELAY(x) 0xFFFFFFF0 457 458 459#define R_028C64_CB_COLOR0_PITCH 0x028C64 460#define S_028C64_PITCH_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) 461#define G_028C64_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF) 462#define C_028C64_PITCH_TILE_MAX 0xFFFFF800 463#define R_028C68_CB_COLOR0_SLICE 0x028C68 464#define S_028C68_SLICE_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 465#define G_028C68_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 466#define C_028C68_SLICE_TILE_MAX 0xFFC00000 467#define R_028C70_CB_COLOR0_INFO 0x028C70 468#define S_028C70_ENDIAN(x) (((unsigned)(x) & 0x3) << 0) 469#define G_028C70_ENDIAN(x) (((x) >> 0) & 0x3) 470#define C_028C70_ENDIAN 0xFFFFFFFC 471#define S_028C70_FORMAT(x) (((unsigned)(x) & 0x3F) << 2) 472#define G_028C70_FORMAT(x) (((x) >> 2) & 0x3F) 473#define C_028C70_FORMAT 0xFFFFFF03 474#define V_028C70_COLOR_INVALID 0x00000000 475#define V_028C70_COLOR_8 0x00000001 476#define V_028C70_COLOR_4_4 0x00000002 477#define V_028C70_COLOR_3_3_2 0x00000003 478#define V_028C70_COLOR_16 0x00000005 479#define V_028C70_COLOR_16_FLOAT 0x00000006 480#define V_028C70_COLOR_8_8 0x00000007 481#define V_028C70_COLOR_5_6_5 0x00000008 482#define V_028C70_COLOR_6_5_5 0x00000009 483#define V_028C70_COLOR_1_5_5_5 0x0000000A 484#define V_028C70_COLOR_4_4_4_4 0x0000000B 485#define V_028C70_COLOR_5_5_5_1 0x0000000C 486#define V_028C70_COLOR_32 0x0000000D 487#define V_028C70_COLOR_32_FLOAT 0x0000000E 488#define V_028C70_COLOR_16_16 0x0000000F 489#define V_028C70_COLOR_16_16_FLOAT 0x00000010 490#define V_028C70_COLOR_8_24 0x00000011 491#define V_028C70_COLOR_8_24_FLOAT 0x00000012 492#define V_028C70_COLOR_24_8 0x00000013 493#define V_028C70_COLOR_24_8_FLOAT 0x00000014 494#define V_028C70_COLOR_10_11_11 0x00000015 495#define V_028C70_COLOR_10_11_11_FLOAT 0x00000016 496#define V_028C70_COLOR_11_11_10 0x00000017 497#define V_028C70_COLOR_11_11_10_FLOAT 0x00000018 498#define V_028C70_COLOR_2_10_10_10 0x00000019 499#define V_028C70_COLOR_8_8_8_8 0x0000001A 500#define V_028C70_COLOR_10_10_10_2 0x0000001B 501#define V_028C70_COLOR_X24_8_32_FLOAT 0x0000001C 502#define V_028C70_COLOR_32_32 0x0000001D 503#define V_028C70_COLOR_32_32_FLOAT 0x0000001E 504#define V_028C70_COLOR_16_16_16_16 0x0000001F 505#define V_028C70_COLOR_16_16_16_16_FLOAT 0x00000020 506#define V_028C70_COLOR_32_32_32_32 0x00000022 507#define V_028C70_COLOR_32_32_32_32_FLOAT 0x00000023 508#define V_028C70_COLOR_32_32_32_FLOAT 0x00000030 509#define S_028C70_ARRAY_MODE(x) (((unsigned)(x) & 0xF) << 8) 510#define G_028C70_ARRAY_MODE(x) (((x) >> 8) & 0xF) 511#define C_028C70_ARRAY_MODE 0xFFFFF0FF 512#define V_028C70_ARRAY_LINEAR_GENERAL 0x00000000 513#define V_028C70_ARRAY_LINEAR_ALIGNED 0x00000001 514#define V_028C70_ARRAY_1D_TILED_THIN1 0x00000002 515#define V_028C70_ARRAY_2D_TILED_THIN1 0x00000004 516#define S_028C70_NUMBER_TYPE(x) (((unsigned)(x) & 0x7) << 12) 517#define G_028C70_NUMBER_TYPE(x) (((x) >> 12) & 0x7) 518#define C_028C70_NUMBER_TYPE 0xFFFF8FFF 519#define V_028C70_NUMBER_UNORM 0x00000000 520#define V_028C70_NUMBER_SNORM 0x00000001 521#define V_028C70_NUMBER_USCALED 0x00000002 522#define V_028C70_NUMBER_SSCALED 0x00000003 523#define V_028C70_NUMBER_UINT 0x00000004 524#define V_028C70_NUMBER_SINT 0x00000005 525#define V_028C70_NUMBER_SRGB 0x00000006 526#define V_028C70_NUMBER_FLOAT 0x00000007 527#define S_028C70_COMP_SWAP(x) (((unsigned)(x) & 0x3) << 15) 528#define G_028C70_COMP_SWAP(x) (((x) >> 15) & 0x3) 529#define C_028C70_COMP_SWAP 0xFFFE7FFF 530#define V_028C70_SWAP_STD 0x00000000 531#define V_028C70_SWAP_ALT 0x00000001 532#define V_028C70_SWAP_STD_REV 0x00000002 533#define V_028C70_SWAP_ALT_REV 0x00000003 534#define S_028C70_FAST_CLEAR(x) (((unsigned)(x) & 0x1) << 17) 535#define G_028C70_FAST_CLEAR(x) (((x) >> 17) & 0x1) 536#define C_028C70_FAST_CLEAR 0xFFFDFFFF 537#define S_028C70_COMPRESSION(x) (((unsigned)(x) & 0x1) << 18) 538#define G_028C70_COMPRESSION(x) (((x) >> 18) & 0x1) 539#define C_028C70_COMPRESSION 0xFFFBFFFF 540#define S_028C70_BLEND_CLAMP(x) (((unsigned)(x) & 0x1) << 19) 541#define G_028C70_BLEND_CLAMP(x) (((x) >> 19) & 0x1) 542#define C_028C70_BLEND_CLAMP 0xFFF7FFFF 543#define S_028C70_BLEND_BYPASS(x) (((unsigned)(x) & 0x1) << 20) 544#define G_028C70_BLEND_BYPASS(x) (((x) >> 20) & 0x1) 545#define C_028C70_BLEND_BYPASS 0xFFEFFFFF 546#define S_028C70_SIMPLE_FLOAT(x) (((unsigned)(x) & 0x1) << 21) 547#define G_028C70_SIMPLE_FLOAT(x) (((x) >> 21) & 0x1) 548#define C_028C70_SIMPLE_FLOAT 0xFFDFFFFF 549#define S_028C70_ROUND_MODE(x) (((unsigned)(x) & 0x1) << 22) 550#define G_028C70_ROUND_MODE(x) (((x) >> 22) & 0x1) 551#define C_028C70_ROUND_MODE 0xFFBFFFFF 552#define S_028C70_TILE_COMPACT(x) (((unsigned)(x) & 0x1) << 23) 553#define G_028C70_TILE_COMPACT(x) (((x) >> 23) & 0x1) 554#define C_028C70_TILE_COMPACT 0xFF7FFFFF 555#define S_028C70_SOURCE_FORMAT(x) (((unsigned)(x) & 0x3) << 24) 556#define G_028C70_SOURCE_FORMAT(x) (((x) >> 24) & 0x3) 557#define C_028C70_SOURCE_FORMAT 0xFCFFFFFF 558#define V_028C70_EXPORT_4C_32BPC 0x0 559#define V_028C70_EXPORT_4C_16BPC 0x1 560#define V_028C70_EXPORT_2C_32BPC 0x2 /* Do not use */ 561#define S_028C70_RAT(x) (((unsigned)(x) & 0x1) << 26) 562#define G_028C70_RAT(x) (((x) >> 26) & 0x1) 563#define C_028C70_RAT 0xFBFFFFFF 564/* RESOURCE_TYPE is only used for compute shaders */ 565#define S_028C70_RESOURCE_TYPE(x) (((unsigned)(x) & 0x7) << 27) 566#define G_028C70_RESOURCE_TYPE(x) (((x) >> 27) & 0x7) 567#define C_028C70_RESOURCE_TYPE 0xC7FFFFFF 568#define V_028C70_BUFFER 0x0 569#define V_028C70_TEXTURE1D 0x1 570#define V_028C70_TEXTURE1DARRAY 0x2 571#define V_028C70_TEXTURE2D 0x3 572#define V_028C70_TEXTURE2DARRAY 0x4 573#define V_028C70_TEXTURE3D 0x5 574 575#define R_028C74_CB_COLOR0_ATTRIB 0x028C74 576#define S_028C74_NON_DISP_TILING_ORDER(x) (((unsigned)(x) & 0x1) << 4) 577#define G_028C74_NON_DISP_TILING_ORDER(x) (((x) >> 4) & 0x1) 578#define C_028C74_NON_DISP_TILING_ORDER 0xFFFFFFEF 579#define S_028C74_TILE_SPLIT(x) (((unsigned)(x) & 0xf) << 5) 580#define S_028C74_NUM_BANKS(x) (((unsigned)(x) & 0x3) << 10) 581#define S_028C74_BANK_WIDTH(x) (((unsigned)(x) & 0x3) << 13) 582#define S_028C74_BANK_HEIGHT(x) (((unsigned)(x) & 0x3) << 16) 583#define S_028C74_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x3) << 19) 584#define S_028C74_FMASK_BANK_HEIGHT(x) (((unsigned)(x) & 0x3) << 22) 585#define S_028C74_NUM_SAMPLES(x) (((unsigned)(x) & 0x7) << 24) /* cayman only */ 586#define S_028C74_NUM_FRAGMENTS(x) (((unsigned)(x) & 0x3) << 27) /* cayman only */ 587#define S_028C74_FORCE_DST_ALPHA_1(x) (((unsigned)(x) & 0x1) << 31) /* cayman only */ 588 589#define R_028C78_CB_COLOR0_DIM 0x028C78 590#define S_028C78_WIDTH_MAX(x) (((unsigned)(x) & 0xFFFF) << 0) 591#define G_028C78_WIDTH_MAX(x) (((x) >> 0) & 0xFFFF) 592#define C_028C78_WIDTH_MAX 0xFFFF0000 593#define S_028C78_HEIGHT_MAX(x) (((unsigned)(x) & 0xFFFF) << 16) 594#define G_028C78_HEIGHT_MAX(x) (((x) >> 16) & 0xFFFF) 595#define C_028C78_HEIGHT_MAX 0x0000FFFF 596 597 598/* alpha same */ 599#define R_028410_SX_ALPHA_TEST_CONTROL 0x028410 600#define S_028410_ALPHA_FUNC(x) (((unsigned)(x) & 0x7) << 0) 601#define G_028410_ALPHA_FUNC(x) (((x) >> 0) & 0x7) 602#define C_028410_ALPHA_FUNC 0xFFFFFFF8 603#define S_028410_ALPHA_TEST_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 604#define G_028410_ALPHA_TEST_ENABLE(x) (((x) >> 3) & 0x1) 605#define C_028410_ALPHA_TEST_ENABLE 0xFFFFFFF7 606#define S_028410_ALPHA_TEST_BYPASS(x) (((unsigned)(x) & 0x1) << 8) 607#define G_028410_ALPHA_TEST_BYPASS(x) (((x) >> 8) & 0x1) 608#define C_028410_ALPHA_TEST_BYPASS 0xFFFFFEFF 609 610#define R_0286EC_SPI_COMPUTE_NUM_THREAD_X 0x0286EC 611#define R_0286F0_SPI_COMPUTE_NUM_THREAD_Y 0x0286F0 612#define R_0286F4_SPI_COMPUTE_NUM_THREAD_Z 0x0286F4 613#define R_028B6C_VGT_TF_PARAM 0x028B6C 614#define S_028B6C_TYPE(x) (((unsigned)(x) & 0x03) << 0) 615#define G_028B6C_TYPE(x) (((x) >> 0) & 0x03) 616#define C_028B6C_TYPE 0xFFFFFFFC 617#define V_028B6C_TESS_ISOLINE 0x00 618#define V_028B6C_TESS_TRIANGLE 0x01 619#define V_028B6C_TESS_QUAD 0x02 620#define S_028B6C_PARTITIONING(x) (((unsigned)(x) & 0x07) << 2) 621#define G_028B6C_PARTITIONING(x) (((x) >> 2) & 0x07) 622#define C_028B6C_PARTITIONING 0xFFFFFFE3 623#define V_028B6C_PART_INTEGER 0x00 624#define V_028B6C_PART_POW2 0x01 625#define V_028B6C_PART_FRAC_ODD 0x02 626#define V_028B6C_PART_FRAC_EVEN 0x03 627#define S_028B6C_TOPOLOGY(x) (((unsigned)(x) & 0x07) << 5) 628#define G_028B6C_TOPOLOGY(x) (((x) >> 5) & 0x07) 629#define C_028B6C_TOPOLOGY 0xFFFFFF1F 630#define V_028B6C_OUTPUT_POINT 0x00 631#define V_028B6C_OUTPUT_LINE 0x01 632#define V_028B6C_OUTPUT_TRIANGLE_CW 0x02 633#define V_028B6C_OUTPUT_TRIANGLE_CCW 0x03 634#define S_028B6C_RESERVED_REDUC_AXIS(x) (((unsigned)(x) & 0x1) << 8) 635#define G_028B6C_RESERVED_REDUC_AXIS(x) (((x) >> 8) & 0x1) 636#define C_028B6C_RESERVED_REDUC_AXIS 0xFFFFFEFF 637#define S_028B6C_BUFFER_ACCESS_MODE(x) (((unsigned)(x) & 0x1) << 9) 638#define G_028B6C_BUFFER_ACCESS_MODE(x) (((x) >> 9) & 0x1) 639#define C_028B6C_BUFFER_ACCESS_MODE 0xFFFFFDFF 640#define V_028B6C_PATCH_MAJOR 0x00 641#define V_028B6C_TF_MAJOR 0x01 642#define S_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((unsigned)(x) & 0xf) << 10) 643#define G_028B6C_NUM_DS_WAVES_PER_SIMD(x) (((x) >> 10) & 0xF) 644#define C_028B6C_NUM_DS_WAVES_PER_SIMD 0xFFFFC3FF 645 646#define R_028B74_VGT_DISPATCH_INITIATOR 0x028B74 647 648#define R_028800_DB_DEPTH_CONTROL 0x028800 649#define S_028800_STENCIL_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 650#define G_028800_STENCIL_ENABLE(x) (((x) >> 0) & 0x1) 651#define C_028800_STENCIL_ENABLE 0xFFFFFFFE 652#define S_028800_Z_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 653#define G_028800_Z_ENABLE(x) (((x) >> 1) & 0x1) 654#define C_028800_Z_ENABLE 0xFFFFFFFD 655#define S_028800_Z_WRITE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 656#define G_028800_Z_WRITE_ENABLE(x) (((x) >> 2) & 0x1) 657#define C_028800_Z_WRITE_ENABLE 0xFFFFFFFB 658#define S_028800_ZFUNC(x) (((unsigned)(x) & 0x7) << 4) 659#define G_028800_ZFUNC(x) (((x) >> 4) & 0x7) 660#define C_028800_ZFUNC 0xFFFFFF8F 661#define S_028800_BACKFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 7) 662#define G_028800_BACKFACE_ENABLE(x) (((x) >> 7) & 0x1) 663#define C_028800_BACKFACE_ENABLE 0xFFFFFF7F 664#define S_028800_STENCILFUNC(x) (((unsigned)(x) & 0x7) << 8) 665#define G_028800_STENCILFUNC(x) (((x) >> 8) & 0x7) 666#define C_028800_STENCILFUNC 0xFFFFF8FF 667#define V_028800_STENCILFUNC_NEVER 0x00000000 668#define V_028800_STENCILFUNC_LESS 0x00000001 669#define V_028800_STENCILFUNC_EQUAL 0x00000002 670#define V_028800_STENCILFUNC_LEQUAL 0x00000003 671#define V_028800_STENCILFUNC_GREATER 0x00000004 672#define V_028800_STENCILFUNC_NOTEQUAL 0x00000005 673#define V_028800_STENCILFUNC_GEQUAL 0x00000006 674#define V_028800_STENCILFUNC_ALWAYS 0x00000007 675#define S_028800_STENCILFAIL(x) (((unsigned)(x) & 0x7) << 11) 676#define G_028800_STENCILFAIL(x) (((x) >> 11) & 0x7) 677#define C_028800_STENCILFAIL 0xFFFFC7FF 678#define V_028800_STENCIL_KEEP 0x00000000 679#define V_028800_STENCIL_ZERO 0x00000001 680#define V_028800_STENCIL_REPLACE 0x00000002 681#define V_028800_STENCIL_INCR 0x00000003 682#define V_028800_STENCIL_DECR 0x00000004 683#define V_028800_STENCIL_INVERT 0x00000005 684#define V_028800_STENCIL_INCR_WRAP 0x00000006 685#define V_028800_STENCIL_DECR_WRAP 0x00000007 686#define S_028800_STENCILZPASS(x) (((unsigned)(x) & 0x7) << 14) 687#define G_028800_STENCILZPASS(x) (((x) >> 14) & 0x7) 688#define C_028800_STENCILZPASS 0xFFFE3FFF 689#define S_028800_STENCILZFAIL(x) (((unsigned)(x) & 0x7) << 17) 690#define G_028800_STENCILZFAIL(x) (((x) >> 17) & 0x7) 691#define C_028800_STENCILZFAIL 0xFFF1FFFF 692#define S_028800_STENCILFUNC_BF(x) (((unsigned)(x) & 0x7) << 20) 693#define G_028800_STENCILFUNC_BF(x) (((x) >> 20) & 0x7) 694#define C_028800_STENCILFUNC_BF 0xFF8FFFFF 695#define S_028800_STENCILFAIL_BF(x) (((unsigned)(x) & 0x7) << 23) 696#define G_028800_STENCILFAIL_BF(x) (((x) >> 23) & 0x7) 697#define C_028800_STENCILFAIL_BF 0xFC7FFFFF 698#define S_028800_STENCILZPASS_BF(x) (((unsigned)(x) & 0x7) << 26) 699#define G_028800_STENCILZPASS_BF(x) (((x) >> 26) & 0x7) 700#define C_028800_STENCILZPASS_BF 0xE3FFFFFF 701#define S_028800_STENCILZFAIL_BF(x) (((unsigned)(x) & 0x7) << 29) 702#define G_028800_STENCILZFAIL_BF(x) (((x) >> 29) & 0x7) 703#define C_028800_STENCILZFAIL_BF 0x1FFFFFFF 704 705#define R_028808_CB_COLOR_CONTROL 0x028808 706#define S_028808_DEGAMMA_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 707#define G_028808_DEGAMMA_ENABLE(x) (((x) >> 3) & 0x1) 708#define C_028808_DEGAMMA_ENABLE 0xFFFFFFF7 709#define S_028808_MODE(x) (((unsigned)(x) & 0x7) << 4) 710#define G_028808_MODE(x) (((x) >> 4) & 0x7) 711#define C_028808_MODE 0xFFFFFF8F 712#define V_028808_CB_DISABLE 0x00000000 713#define V_028808_CB_NORMAL 0x00000001 714#define V_028808_CB_ELIMINATE_FAST_CLEAR 0x00000002 715#define V_028808_CB_RESOLVE 0x00000003 716#define V_028808_CB_DECOMPRESS 0x00000004 717#define V_028808_CB_FMASK_DECOMPRESS 0x00000005 718#define S_028808_ROP3(x) (((unsigned)(x) & 0xFF) << 16) 719#define G_028808_ROP3(x) (((x) >> 16) & 0xFF) 720#define C_028808_ROP3 0xFF00FFFF 721#define R_028810_PA_CL_CLIP_CNTL 0x028810 722#define S_028810_UCP_ENA_0(x) (((unsigned)(x) & 0x1) << 0) 723#define G_028810_UCP_ENA_0(x) (((x) >> 0) & 0x1) 724#define C_028810_UCP_ENA_0 0xFFFFFFFE 725#define S_028810_UCP_ENA_1(x) (((unsigned)(x) & 0x1) << 1) 726#define G_028810_UCP_ENA_1(x) (((x) >> 1) & 0x1) 727#define C_028810_UCP_ENA_1 0xFFFFFFFD 728#define S_028810_UCP_ENA_2(x) (((unsigned)(x) & 0x1) << 2) 729#define G_028810_UCP_ENA_2(x) (((x) >> 2) & 0x1) 730#define C_028810_UCP_ENA_2 0xFFFFFFFB 731#define S_028810_UCP_ENA_3(x) (((unsigned)(x) & 0x1) << 3) 732#define G_028810_UCP_ENA_3(x) (((x) >> 3) & 0x1) 733#define C_028810_UCP_ENA_3 0xFFFFFFF7 734#define S_028810_UCP_ENA_4(x) (((unsigned)(x) & 0x1) << 4) 735#define G_028810_UCP_ENA_4(x) (((x) >> 4) & 0x1) 736#define C_028810_UCP_ENA_4 0xFFFFFFEF 737#define S_028810_UCP_ENA_5(x) (((unsigned)(x) & 0x1) << 5) 738#define G_028810_UCP_ENA_5(x) (((x) >> 5) & 0x1) 739#define C_028810_UCP_ENA_5 0xFFFFFFDF 740#define S_028810_PS_UCP_Y_SCALE_NEG(x) (((unsigned)(x) & 0x1) << 13) 741#define G_028810_PS_UCP_Y_SCALE_NEG(x) (((x) >> 13) & 0x1) 742#define C_028810_PS_UCP_Y_SCALE_NEG 0xFFFFDFFF 743#define S_028810_PS_UCP_MODE(x) (((unsigned)(x) & 0x3) << 14) 744#define G_028810_PS_UCP_MODE(x) (((x) >> 14) & 0x3) 745#define C_028810_PS_UCP_MODE 0xFFFF3FFF 746#define S_028810_CLIP_DISABLE(x) (((unsigned)(x) & 0x1) << 16) 747#define G_028810_CLIP_DISABLE(x) (((x) >> 16) & 0x1) 748#define C_028810_CLIP_DISABLE 0xFFFEFFFF 749#define S_028810_UCP_CULL_ONLY_ENA(x) (((unsigned)(x) & 0x1) << 17) 750#define G_028810_UCP_CULL_ONLY_ENA(x) (((x) >> 17) & 0x1) 751#define C_028810_UCP_CULL_ONLY_ENA 0xFFFDFFFF 752#define S_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((unsigned)(x) & 0x1) << 18) 753#define G_028810_BOUNDARY_EDGE_FLAG_ENA(x) (((x) >> 18) & 0x1) 754#define C_028810_BOUNDARY_EDGE_FLAG_ENA 0xFFFBFFFF 755#define S_028810_DX_CLIP_SPACE_DEF(x) (((unsigned)(x) & 0x1) << 19) 756#define G_028810_DX_CLIP_SPACE_DEF(x) (((x) >> 19) & 0x1) 757#define C_028810_DX_CLIP_SPACE_DEF 0xFFF7FFFF 758#define S_028810_DIS_CLIP_ERR_DETECT(x) (((unsigned)(x) & 0x1) << 20) 759#define G_028810_DIS_CLIP_ERR_DETECT(x) (((x) >> 20) & 0x1) 760#define C_028810_DIS_CLIP_ERR_DETECT 0xFFEFFFFF 761#define S_028810_VTX_KILL_OR(x) (((unsigned)(x) & 0x1) << 21) 762#define G_028810_VTX_KILL_OR(x) (((x) >> 21) & 0x1) 763#define C_028810_VTX_KILL_OR 0xFFDFFFFF 764#define S_028810_DX_RASTERIZATION_KILL(x) (((unsigned)(x) & 0x1) << 22) 765#define G_028810_DX_RASTERIZATION_KILL(x) (((x) >> 22) & 0x1) 766#define C_028810_DX_RASTERIZATION_KILL 0xFFBFFFFF 767#define S_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((unsigned)(x) & 0x1) << 24) 768#define G_028810_DX_LINEAR_ATTR_CLIP_ENA(x) (((x) >> 24) & 0x1) 769#define C_028810_DX_LINEAR_ATTR_CLIP_ENA 0xFEFFFFFF 770#define S_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((unsigned)(x) & 0x1) << 25) 771#define G_028810_VTE_VPORT_PROVOKE_DISABLE(x) (((x) >> 25) & 0x1) 772#define C_028810_VTE_VPORT_PROVOKE_DISABLE 0xFDFFFFFF 773#define S_028810_ZCLIP_NEAR_DISABLE(x) (((unsigned)(x) & 0x1) << 26) 774#define G_028810_ZCLIP_NEAR_DISABLE(x) (((x) >> 26) & 0x1) 775#define C_028810_ZCLIP_NEAR_DISABLE 0xFBFFFFFF 776#define S_028810_ZCLIP_FAR_DISABLE(x) (((unsigned)(x) & 0x1) << 27) 777#define G_028810_ZCLIP_FAR_DISABLE(x) (((x) >> 27) & 0x1) 778#define C_028810_ZCLIP_FAR_DISABLE 0xF7FFFFFF 779 780#define R_028040_DB_Z_INFO 0x028040 781#define S_028040_FORMAT(x) (((unsigned)(x) & 0x3) << 0) 782#define G_028040_FORMAT(x) (((x) >> 0) & 0x3) 783#define C_028040_FORMAT 0xFFFFFFFC 784#define V_028040_Z_INVALID 0x00000000 785#define V_028040_Z_16 0x00000001 786#define V_028040_Z_24 0x00000002 787#define V_028040_Z_32_FLOAT 0x00000003 788#define S_028040_NUM_SAMPLES(x) (((unsigned)(x) & 0x3) << 2) /* cayman only */ 789#define S_028040_ARRAY_MODE(x) (((unsigned)(x) & 0xF) << 4) 790#define G_028040_ARRAY_MODE(x) (((x) >> 4) & 0xF) 791#define C_028040_ARRAY_MODE 0xFFFFFF0F 792#define S_028040_READ_SIZE(x) (((unsigned)(x) & 0x1) << 28) 793#define G_028040_READ_SIZE(x) (((x) >> 28) & 0x1) 794#define C_028040_READ_SIZE 0xEFFFFFFF 795#define S_028040_TILE_SURFACE_ENABLE(x) (((unsigned)(x) & 0x1) << 29) 796#define G_028040_TILE_SURFACE_ENABLE(x) (((x) >> 29) & 0x1) 797#define C_028040_TILE_SURFACE_ENABLE 0xDFFFFFFF 798#define S_028040_ZRANGE_PRECISION(x) (((unsigned)(x) & 0x1) << 31) 799#define G_028040_ZRANGE_PRECISION(x) (((x) >> 31) & 0x1) 800#define C_028040_ZRANGE_PRECISION 0x7FFFFFFF 801#define S_028040_TILE_SPLIT(x) (((unsigned)(x) & 0x7) << 8) 802#define S_028040_NUM_BANKS(x) (((unsigned)(x) & 0x3) << 12) 803#define S_028040_BANK_WIDTH(x) (((unsigned)(x) & 0x3) << 16) 804#define S_028040_BANK_HEIGHT(x) (((unsigned)(x) & 0x3) << 20) 805#define S_028040_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x3) << 24) 806 807#define R_028044_DB_STENCIL_INFO 0x028044 808#define S_028044_FORMAT(x) (((unsigned)(x) & 0x1) << 0) 809#define V_028044_STENCIL_INVALID 0 810#define V_028044_STENCIL_8 1 811#define G_028044_FORMAT(x) (((x) >> 0) & 0x1) 812#define C_028044_FORMAT 0xFFFFFFFE 813#define S_028044_TILE_SPLIT(x) (((unsigned)(x) & 0x7) << 8) 814 815#define R_028058_DB_DEPTH_SIZE 0x028058 816#define S_028058_PITCH_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 0) 817#define G_028058_PITCH_TILE_MAX(x) (((x) >> 0) & 0x7FF) 818#define C_028058_PITCH_TILE_MAX 0xFFFFF800 819#define S_028058_HEIGHT_TILE_MAX(x) (((unsigned)(x) & 0x7FF) << 11) 820#define G_028058_HEIGHT_TILE_MAX(x) (((x) >> 11) & 0x7FF) 821#define C_028058_HEIGHT_TILE_MAX 0xFFC007FF 822 823#define R_02805C_DB_DEPTH_SLICE 0x02805C 824#define S_02805C_SLICE_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 825#define G_02805C_SLICE_TILE_MAX(x) (((x) >> 0) & 0x3FFFFF) 826#define C_02805C_SLICE_TILE_MAX 0xFFC00000 827 828#define R_028430_DB_STENCILREFMASK 0x028430 829#define S_028430_STENCILREF(x) (((unsigned)(x) & 0xFF) << 0) 830#define G_028430_STENCILREF(x) (((x) >> 0) & 0xFF) 831#define C_028430_STENCILREF 0xFFFFFF00 832#define S_028430_STENCILMASK(x) (((unsigned)(x) & 0xFF) << 8) 833#define G_028430_STENCILMASK(x) (((x) >> 8) & 0xFF) 834#define C_028430_STENCILMASK 0xFFFF00FF 835#define S_028430_STENCILWRITEMASK(x) (((unsigned)(x) & 0xFF) << 16) 836#define G_028430_STENCILWRITEMASK(x) (((x) >> 16) & 0xFF) 837#define C_028430_STENCILWRITEMASK 0xFF00FFFF 838#define R_028434_DB_STENCILREFMASK_BF 0x028434 839#define S_028434_STENCILREF_BF(x) (((unsigned)(x) & 0xFF) << 0) 840#define G_028434_STENCILREF_BF(x) (((x) >> 0) & 0xFF) 841#define C_028434_STENCILREF_BF 0xFFFFFF00 842#define S_028434_STENCILMASK_BF(x) (((unsigned)(x) & 0xFF) << 8) 843#define G_028434_STENCILMASK_BF(x) (((x) >> 8) & 0xFF) 844#define C_028434_STENCILMASK_BF 0xFFFF00FF 845#define S_028434_STENCILWRITEMASK_BF(x) (((unsigned)(x) & 0xFF) << 16) 846#define G_028434_STENCILWRITEMASK_BF(x) (((x) >> 16) & 0xFF) 847#define C_028434_STENCILWRITEMASK_BF 0xFF00FFFF 848#define R_028780_CB_BLEND0_CONTROL 0x028780 849#define S_028780_COLOR_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 0) 850#define G_028780_COLOR_SRCBLEND(x) (((x) >> 0) & 0x1F) 851#define C_028780_COLOR_SRCBLEND 0xFFFFFFE0 852#define V_028780_BLEND_ZERO 0x00000000 853#define V_028780_BLEND_ONE 0x00000001 854#define V_028780_BLEND_SRC_COLOR 0x00000002 855#define V_028780_BLEND_ONE_MINUS_SRC_COLOR 0x00000003 856#define V_028780_BLEND_SRC_ALPHA 0x00000004 857#define V_028780_BLEND_ONE_MINUS_SRC_ALPHA 0x00000005 858#define V_028780_BLEND_DST_ALPHA 0x00000006 859#define V_028780_BLEND_ONE_MINUS_DST_ALPHA 0x00000007 860#define V_028780_BLEND_DST_COLOR 0x00000008 861#define V_028780_BLEND_ONE_MINUS_DST_COLOR 0x00000009 862#define V_028780_BLEND_SRC_ALPHA_SATURATE 0x0000000A 863#define V_028780_BLEND_BOTH_SRC_ALPHA 0x0000000B 864#define V_028780_BLEND_BOTH_INV_SRC_ALPHA 0x0000000C 865#define V_028780_BLEND_CONST_COLOR 0x0000000D 866#define V_028780_BLEND_ONE_MINUS_CONST_COLOR 0x0000000E 867#define V_028780_BLEND_SRC1_COLOR 0x0000000F 868#define V_028780_BLEND_INV_SRC1_COLOR 0x00000010 869#define V_028780_BLEND_SRC1_ALPHA 0x00000011 870#define V_028780_BLEND_INV_SRC1_ALPHA 0x00000012 871#define V_028780_BLEND_CONST_ALPHA 0x00000013 872#define V_028780_BLEND_ONE_MINUS_CONST_ALPHA 0x00000014 873#define S_028780_COLOR_COMB_FCN(x) (((unsigned)(x) & 0x7) << 5) 874#define G_028780_COLOR_COMB_FCN(x) (((x) >> 5) & 0x7) 875#define C_028780_COLOR_COMB_FCN 0xFFFFFF1F 876#define V_028780_COMB_DST_PLUS_SRC 0x00000000 877#define V_028780_COMB_SRC_MINUS_DST 0x00000001 878#define V_028780_COMB_MIN_DST_SRC 0x00000002 879#define V_028780_COMB_MAX_DST_SRC 0x00000003 880#define V_028780_COMB_DST_MINUS_SRC 0x00000004 881#define S_028780_COLOR_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 8) 882#define G_028780_COLOR_DESTBLEND(x) (((x) >> 8) & 0x1F) 883#define C_028780_COLOR_DESTBLEND 0xFFFFE0FF 884#define S_028780_OPACITY_WEIGHT(x) (((unsigned)(x) & 0x1) << 13) 885#define G_028780_OPACITY_WEIGHT(x) (((x) >> 13) & 0x1) 886#define C_028780_OPACITY_WEIGHT 0xFFFFDFFF 887#define S_028780_ALPHA_SRCBLEND(x) (((unsigned)(x) & 0x1F) << 16) 888#define G_028780_ALPHA_SRCBLEND(x) (((x) >> 16) & 0x1F) 889#define C_028780_ALPHA_SRCBLEND 0xFFE0FFFF 890#define S_028780_ALPHA_COMB_FCN(x) (((unsigned)(x) & 0x7) << 21) 891#define G_028780_ALPHA_COMB_FCN(x) (((x) >> 21) & 0x7) 892#define C_028780_ALPHA_COMB_FCN 0xFF1FFFFF 893#define S_028780_ALPHA_DESTBLEND(x) (((unsigned)(x) & 0x1F) << 24) 894#define G_028780_ALPHA_DESTBLEND(x) (((x) >> 24) & 0x1F) 895#define C_028780_ALPHA_DESTBLEND 0xE0FFFFFF 896#define S_028780_SEPARATE_ALPHA_BLEND(x) (((unsigned)(x) & 0x1) << 29) 897#define G_028780_SEPARATE_ALPHA_BLEND(x) (((x) >> 29) & 0x1) 898#define C_028780_SEPARATE_ALPHA_BLEND 0xDFFFFFFF 899#define S_028780_BLEND_CONTROL_ENABLE(x) (((unsigned)(x) & 0x1) << 30) 900#define G_028780_BLEND_CONTROL_ENABLE(x) (((x) >> 30) & 0x1) 901#define C_028780_BLEND_CONTROL_ENABLE 0xEFFFFFFF 902#define R_028814_PA_SU_SC_MODE_CNTL 0x028814 903#define S_028814_CULL_FRONT(x) (((unsigned)(x) & 0x1) << 0) 904#define G_028814_CULL_FRONT(x) (((x) >> 0) & 0x1) 905#define C_028814_CULL_FRONT 0xFFFFFFFE 906#define S_028814_CULL_BACK(x) (((unsigned)(x) & 0x1) << 1) 907#define G_028814_CULL_BACK(x) (((x) >> 1) & 0x1) 908#define C_028814_CULL_BACK 0xFFFFFFFD 909#define S_028814_FACE(x) (((unsigned)(x) & 0x1) << 2) 910#define G_028814_FACE(x) (((x) >> 2) & 0x1) 911#define C_028814_FACE 0xFFFFFFFB 912#define S_028814_POLY_MODE(x) (((unsigned)(x) & 0x3) << 3) 913#define G_028814_POLY_MODE(x) (((x) >> 3) & 0x3) 914#define C_028814_POLY_MODE 0xFFFFFFE7 915#define S_028814_POLYMODE_FRONT_PTYPE(x) (((unsigned)(x) & 0x7) << 5) 916#define G_028814_POLYMODE_FRONT_PTYPE(x) (((x) >> 5) & 0x7) 917#define C_028814_POLYMODE_FRONT_PTYPE 0xFFFFFF1F 918#define S_028814_POLYMODE_BACK_PTYPE(x) (((unsigned)(x) & 0x7) << 8) 919#define G_028814_POLYMODE_BACK_PTYPE(x) (((x) >> 8) & 0x7) 920#define C_028814_POLYMODE_BACK_PTYPE 0xFFFFF8FF 921#define S_028814_POLY_OFFSET_FRONT_ENABLE(x) (((unsigned)(x) & 0x1) << 11) 922#define G_028814_POLY_OFFSET_FRONT_ENABLE(x) (((x) >> 11) & 0x1) 923#define C_028814_POLY_OFFSET_FRONT_ENABLE 0xFFFFF7FF 924#define S_028814_POLY_OFFSET_BACK_ENABLE(x) (((unsigned)(x) & 0x1) << 12) 925#define G_028814_POLY_OFFSET_BACK_ENABLE(x) (((x) >> 12) & 0x1) 926#define C_028814_POLY_OFFSET_BACK_ENABLE 0xFFFFEFFF 927#define S_028814_POLY_OFFSET_PARA_ENABLE(x) (((unsigned)(x) & 0x1) << 13) 928#define G_028814_POLY_OFFSET_PARA_ENABLE(x) (((x) >> 13) & 0x1) 929#define C_028814_POLY_OFFSET_PARA_ENABLE 0xFFFFDFFF 930#define S_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((unsigned)(x) & 0x1) << 16) 931#define G_028814_VTX_WINDOW_OFFSET_ENABLE(x) (((x) >> 16) & 0x1) 932#define C_028814_VTX_WINDOW_OFFSET_ENABLE 0xFFFEFFFF 933#define S_028814_PROVOKING_VTX_LAST(x) (((unsigned)(x) & 0x1) << 19) 934#define G_028814_PROVOKING_VTX_LAST(x) (((x) >> 19) & 0x1) 935#define C_028814_PROVOKING_VTX_LAST 0xFFF7FFFF 936#define S_028814_PERSP_CORR_DIS(x) (((unsigned)(x) & 0x1) << 20) 937#define G_028814_PERSP_CORR_DIS(x) (((x) >> 20) & 0x1) 938#define C_028814_PERSP_CORR_DIS 0xFFEFFFFF 939#define S_028814_MULTI_PRIM_IB_ENA(x) (((unsigned)(x) & 0x1) << 21) 940#define G_028814_MULTI_PRIM_IB_ENA(x) (((x) >> 21) & 0x1) 941#define C_028814_MULTI_PRIM_IB_ENA 0xFFDFFFFF 942 943#define R_028ABC_DB_HTILE_SURFACE 0x028ABC 944#define S_028ABC_HTILE_WIDTH(x) (((unsigned)(x) & 0x1) << 0) 945#define G_028ABC_HTILE_WIDTH(x) (((x) >> 0) & 0x1) 946#define C_028ABC_HTILE_WIDTH 0xFFFFFFFE 947#define S_028ABC_HTILE_HEIGHT(x) (((unsigned)(x) & 0x1) << 1) 948#define G_028ABC_HTILE_HEIGHT(x) (((x) >> 1) & 0x1) 949#define C_028ABC_HTILE_HEIGHT 0xFFFFFFFD 950#define S_028ABC_LINEAR(x) (((unsigned)(x) & 0x1) << 2) 951#define G_028ABC_LINEAR(x) (((x) >> 2) & 0x1) 952#define C_028ABC_LINEAR 0xFFFFFFFB 953#define S_028ABC_FULL_CACHE(x) (((unsigned)(x) & 0x1) << 3) 954#define G_028ABC_FULL_CACHE(x) (((x) >> 3) & 0x1) 955#define C_028ABC_FULL_CACHE 0xFFFFFFF7 956#define S_028ABC_HTILE_USES_PRELOAD_WIN(x) (((unsigned)(x) & 0x1) << 4) 957#define G_028ABC_HTILE_USES_PRELOAD_WIN(x) (((x) >> 4) & 0x1) 958#define C_028ABC_HTILE_USES_PRELOAD_WIN 0xFFFFFFEF 959#define S_028ABC_PRELOAD(x) (((unsigned)(x) & 0x1) << 5) 960#define G_028ABC_PRELOAD(x) (((x) >> 5) & 0x1) 961#define C_028ABC_PRELOAD 0xFFFFFFDF 962#define S_028ABC_PREFETCH_WIDTH(x) (((unsigned)(x) & 0x3F) << 6) 963#define G_028ABC_PREFETCH_WIDTH(x) (((x) >> 6) & 0x3F) 964#define C_028ABC_PREFETCH_WIDTH 0xFFFFF03F 965#define S_028ABC_PREFETCH_HEIGHT(x) (((unsigned)(x) & 0x3F) << 12) 966#define G_028ABC_PREFETCH_HEIGHT(x) (((x) >> 12) & 0x3F) 967#define C_028ABC_PREFETCH_HEIGHT 0xFFFC0FFF 968#define R_02880C_DB_SHADER_CONTROL 0x02880C 969#define S_02880C_Z_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 970#define G_02880C_Z_EXPORT_ENABLE(x) (((x) >> 0) & 0x1) 971#define C_02880C_Z_EXPORT_ENABLE 0xFFFFFFFE 972#define S_02880C_STENCIL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 973#define G_02880C_STENCIL_EXPORT_ENABLE(x) (((x) >> 1) & 0x1) 974#define C_02880C_STENCIL_EXPORT_ENABLE 0xFFFFFFFD 975#define S_02880C_Z_ORDER(x) (((unsigned)(x) & 0x3) << 4) 976#define G_02880C_Z_ORDER(x) (((x) >> 4) & 0x3) 977#define C_02880C_Z_ORDER 0xFFFFFCFF 978#define V_02880C_LATE_Z 0 979#define V_02880C_EARLY_Z_THEN_LATE_Z 1 980#define V_02880C_RE_Z 2 981#define V_02880C_EARLY_Z_THEN_RE_Z 3 982#define S_02880C_KILL_ENABLE(x) (((unsigned)(x) & 0x1) << 6) 983#define G_02880C_KILL_ENABLE(x) (((x) >> 6) & 0x1) 984#define C_02880C_KILL_ENABLE 0xFFFFFFBF 985#define S_02880C_MASK_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 8) 986#define G_02880C_MASK_EXPORT_ENABLE(x) (((x) >> 8) & 0x1) 987#define C_02880C_MASK_EXPORT_ENABLE 0XFFFFFEFF 988#define S_02880C_DUAL_EXPORT_ENABLE(x) (((unsigned)(x) & 0x1) << 9) 989#define G_02880C_DUAL_EXPORT_ENABLE(x) (((x) >> 9) & 0x1) 990#define C_02880C_DUAL_EXPORT_ENABLE 0xFFFFFDFF 991#define S_02880C_EXEC_ON_HIER_FAIL(x) (((unsigned)(x) & 0x1) << 10) 992#define G_02880C_EXEC_ON_HIER_FAIL(x) (((x) >> 10) & 0x1) 993#define C_02880C_EXEC_ON_HIER_FAIL 0xFFFFFBFF 994#define S_02880C_EXEC_ON_NOOP(x) (((unsigned)(x) & 0x1) << 11) 995#define G_02880C_EXEC_ON_NOOP(x) (((x) >> 11) & 0x1) 996#define C_02880C_EXEC_ON_NOOP 0xFFFFF7FF 997#define S_02880C_DB_SOURCE_FORMAT(x) (((unsigned)(x) & 0x3) << 13) 998#define G_02880C_DB_SOURCE_FORMAT(x) (((x) >> 13) & 0x3) 999#define C_02880C_DB_SOURCE_FORMAT 0xFFFF9FFF 1000#define V_02880C_EXPORT_DB_FULL 0x00 1001#define V_02880C_EXPORT_DB_FOUR16 0x01 1002#define V_02880C_EXPORT_DB_TWO 0x02 1003#define S_02880C_ALPHA_TO_MASK_DISABLE(x) (((unsigned)(x) & 0x1) << 12) 1004#define S_02880C_DEPTH_BEFORE_SHADER(x) (((unsigned)(x) & 0x1) << 15) 1005#define S_02880C_CONSERVATIVE_Z_EXPORT(x) (((unsigned)(x) & 0x03) << 16) 1006#define G_02880C_CONSERVATIVE_Z_EXPORT(x) (((x) >> 16) & 0x03) 1007#define C_02880C_CONSERVATIVE_Z_EXPORT 0xFFFCFFFF 1008#define V_02880C_EXPORT_ANY_Z 0 1009#define V_02880C_EXPORT_LESS_THAN_Z 1 1010#define V_02880C_EXPORT_GREATER_THAN_Z 2 1011#define V_02880C_EXPORT_RESERVED 3 1012 1013#define R_028A00_PA_SU_POINT_SIZE 0x028A00 1014#define S_028A00_HEIGHT(x) (((unsigned)(x) & 0xFFFF) << 0) 1015#define G_028A00_HEIGHT(x) (((x) >> 0) & 0xFFFF) 1016#define C_028A00_HEIGHT 0xFFFF0000 1017#define S_028A00_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 16) 1018#define G_028A00_WIDTH(x) (((x) >> 16) & 0xFFFF) 1019#define C_028A00_WIDTH 0x0000FFFF 1020#define R_028A0C_PA_SC_LINE_STIPPLE 0x028A0C 1021#define S_028A0C_LINE_PATTERN(x) (((unsigned)(x) & 0xFFFF) << 0) 1022#define S_028A0C_REPEAT_COUNT(x) (((unsigned)(x) & 0xFF) << 16) 1023#define S_028A0C_PATTERN_BIT_ORDER(x) (((unsigned)(x) & 0x1) << 28) 1024#define S_028A0C_AUTO_RESET_CNTL(x) (((unsigned)(x) & 0x3) << 29) 1025#define R_028A40_VGT_GS_MODE 0x028A40 1026#define S_028A40_MODE(x) (((unsigned)(x) & 0x3) << 0) 1027#define G_028A40_MODE(x) (((x) >> 0) & 0x3) 1028#define C_028A40_MODE 0xFFFFFFFC 1029#define V_028A40_GS_OFF 0 1030#define V_028A40_GS_SCENARIO_A 1 1031#define V_028A40_GS_SCENARIO_B 2 1032#define V_028A40_GS_SCENARIO_G 3 1033#define V_028A40_GS_SCENARIO_C 4 1034#define V_028A40_SPRITE_EN 5 1035#define S_028A40_ES_PASSTHRU(x) (((unsigned)(x) & 0x1) << 2) 1036#define G_028A40_ES_PASSTHRU(x) (((x) >> 2) & 0x1) 1037#define C_028A40_ES_PASSTHRU 0xFFFFFFFB 1038#define S_028A40_CUT_MODE(x) (((unsigned)(x) & 0x3) << 3) 1039#define G_028A40_CUT_MODE(x) (((x) >> 3) & 0x3) 1040#define C_028A40_CUT_MODE 0xFFFFFFE7 1041#define V_028A40_GS_CUT_1024 0 1042#define V_028A40_GS_CUT_512 1 1043#define V_028A40_GS_CUT_256 2 1044#define V_028A40_GS_CUT_128 3 1045#define S_028A40_COMPUTE_MODE(x) (x << 14) 1046#define S_028A40_PARTIAL_THD_AT_EOI(x) (x << 17) 1047#define R_028A6C_VGT_GS_OUT_PRIM_TYPE 0x028A6C 1048#define S_028A6C_OUTPRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 1049#define V_028A6C_OUTPRIM_TYPE_POINTLIST 0 1050#define V_028A6C_OUTPRIM_TYPE_LINESTRIP 1 1051#define V_028A6C_OUTPRIM_TYPE_TRISTRIP 2 1052#define R_008040_WAIT_UNTIL 0x008040 1053#define S_008040_WAIT_CP_DMA_IDLE(x) (((unsigned)(x) & 0x1) << 8) 1054#define G_008040_WAIT_CP_DMA_IDLE(x) (((x) >> 8) & 0x1) 1055#define C_008040_WAIT_CP_DMA_IDLE 0xFFFFFEFF 1056#define S_008040_WAIT_CMDFIFO(x) (((unsigned)(x) & 0x1) << 10) 1057#define G_008040_WAIT_CMDFIFO(x) (((x) >> 10) & 0x1) 1058#define C_008040_WAIT_CMDFIFO 0xFFFFFBFF 1059#define S_008040_WAIT_2D_IDLE(x) (((unsigned)(x) & 0x1) << 14) 1060#define G_008040_WAIT_2D_IDLE(x) (((x) >> 14) & 0x1) 1061#define C_008040_WAIT_2D_IDLE 0xFFFFBFFF 1062#define S_008040_WAIT_3D_IDLE(x) (((unsigned)(x) & 0x1) << 15) 1063#define G_008040_WAIT_3D_IDLE(x) (((x) >> 15) & 0x1) 1064#define C_008040_WAIT_3D_IDLE 0xFFFF7FFF 1065#define S_008040_WAIT_2D_IDLECLEAN(x) (((unsigned)(x) & 0x1) << 16) 1066#define G_008040_WAIT_2D_IDLECLEAN(x) (((x) >> 16) & 0x1) 1067#define C_008040_WAIT_2D_IDLECLEAN 0xFFFEFFFF 1068#define S_008040_WAIT_3D_IDLECLEAN(x) (((unsigned)(x) & 0x1) << 17) 1069#define G_008040_WAIT_3D_IDLECLEAN(x) (((x) >> 17) & 0x1) 1070#define C_008040_WAIT_3D_IDLECLEAN 0xFFFDFFFF 1071#define S_008040_WAIT_EXTERN_SIG(x) (((unsigned)(x) & 0x1) << 19) 1072#define G_008040_WAIT_EXTERN_SIG(x) (((x) >> 19) & 0x1) 1073#define C_008040_WAIT_EXTERN_SIG 0xFFF7FFFF 1074#define S_008040_CMDFIFO_ENTRIES(x) (((unsigned)(x) & 0x1F) << 20) 1075#define G_008040_CMDFIFO_ENTRIES(x) (((x) >> 20) & 0x1F) 1076#define C_008040_CMDFIFO_ENTRIES 0xFE0FFFFF 1077 1078/* diff */ 1079#define R_0286CC_SPI_PS_IN_CONTROL_0 0x0286CC 1080#define S_0286CC_NUM_INTERP(x) (((unsigned)(x) & 0x3F) << 0) 1081#define G_0286CC_NUM_INTERP(x) (((x) >> 0) & 0x3F) 1082#define C_0286CC_NUM_INTERP 0xFFFFFFC0 1083#define S_0286CC_POSITION_ENA(x) (((unsigned)(x) & 0x1) << 8) 1084#define G_0286CC_POSITION_ENA(x) (((x) >> 8) & 0x1) 1085#define C_0286CC_POSITION_ENA 0xFFFFFEFF 1086#define S_0286CC_POSITION_CENTROID(x) (((unsigned)(x) & 0x1) << 9) 1087#define G_0286CC_POSITION_CENTROID(x) (((x) >> 9) & 0x1) 1088#define C_0286CC_POSITION_CENTROID 0xFFFFFDFF 1089#define S_0286CC_POSITION_ADDR(x) (((unsigned)(x) & 0x1F) << 10) 1090#define G_0286CC_POSITION_ADDR(x) (((x) >> 10) & 0x1F) 1091#define C_0286CC_POSITION_ADDR 0xFFFF83FF 1092#define S_0286CC_PARAM_GEN(x) (((unsigned)(x) & 0xF) << 15) 1093#define G_0286CC_PARAM_GEN(x) (((x) >> 15) & 0xF) 1094#define C_0286CC_PARAM_GEN 0xFFF87FFF 1095#define S_0286CC_PERSP_GRADIENT_ENA(x) (((unsigned)(x) & 0x1) << 28) 1096#define G_0286CC_PERSP_GRADIENT_ENA(x) (((x) >> 28) & 0x1) 1097#define C_0286CC_PERSP_GRADIENT_ENA 0xEFFFFFFF 1098#define S_0286CC_LINEAR_GRADIENT_ENA(x) (((unsigned)(x) & 0x1) << 29) 1099#define G_0286CC_LINEAR_GRADIENT_ENA(x) (((x) >> 29) & 0x1) 1100#define C_0286CC_LINEAR_GRADIENT_ENA 0xDFFFFFFF 1101#define S_0286CC_POSITION_SAMPLE(x) (((unsigned)(x) & 0x1) << 30) 1102#define G_0286CC_POSITION_SAMPLE(x) (((x) >> 30) & 0x1) 1103#define C_0286CC_POSITION_SAMPLE 0xBFFFFFFF 1104#define R_0286D0_SPI_PS_IN_CONTROL_1 0x0286D0 1105#define S_0286D0_FRONT_FACE_ENA(x) (((unsigned)(x) & 0x1) << 8) 1106#define G_0286D0_FRONT_FACE_ENA(x) (((x) >> 8) & 0x1) 1107#define C_0286D0_FRONT_FACE_ENA 0xFFFFFEFF 1108#define S_0286D0_FRONT_FACE_CHAN(x) (((unsigned)(x) & 0x3) << 9) 1109#define G_0286D0_FRONT_FACE_CHAN(x) (((x) >> 9) & 0x3) 1110#define C_0286D0_FRONT_FACE_CHAN 0xFFFFF9FF 1111#define S_0286D0_FRONT_FACE_ALL_BITS(x) (((unsigned)(x) & 0x1) << 11) 1112#define G_0286D0_FRONT_FACE_ALL_BITS(x) (((x) >> 11) & 0x1) 1113#define C_0286D0_FRONT_FACE_ALL_BITS 0xFFFFF7FF 1114#define S_0286D0_FRONT_FACE_ADDR(x) (((unsigned)(x) & 0x1F) << 12) 1115#define G_0286D0_FRONT_FACE_ADDR(x) (((x) >> 12) & 0x1F) 1116#define C_0286D0_FRONT_FACE_ADDR 0xFFFE0FFF 1117#define S_0286D0_FOG_ADDR(x) (((unsigned)(x) & 0x7F) << 17) 1118#define G_0286D0_FOG_ADDR(x) (((x) >> 17) & 0x7F) 1119#define C_0286D0_FOG_ADDR 0xFF01FFFF 1120#define S_0286D0_FIXED_PT_POSITION_ENA(x) (((unsigned)(x) & 0x1) << 24) 1121#define G_0286D0_FIXED_PT_POSITION_ENA(x) (((x) >> 24) & 0x1) 1122#define C_0286D0_FIXED_PT_POSITION_ENA 0xFEFFFFFF 1123#define S_0286D0_FIXED_PT_POSITION_ADDR(x) (((unsigned)(x) & 0x1F) << 25) 1124#define G_0286D0_FIXED_PT_POSITION_ADDR(x) (((x) >> 25) & 0x1F) 1125#define C_0286D0_FIXED_PT_POSITION_ADDR 0xC1FFFFFF 1126#define R_0286C4_SPI_VS_OUT_CONFIG 0x0286C4 1127#define S_0286C4_VS_PER_COMPONENT(x) (((unsigned)(x) & 0x1) << 0) 1128#define G_0286C4_VS_PER_COMPONENT(x) (((x) >> 0) & 0x1) 1129#define C_0286C4_VS_PER_COMPONENT 0xFFFFFFFE 1130#define S_0286C4_VS_EXPORT_COUNT(x) (((unsigned)(x) & 0x1F) << 1) 1131#define G_0286C4_VS_EXPORT_COUNT(x) (((x) >> 1) & 0x1F) 1132#define C_0286C4_VS_EXPORT_COUNT 0xFFFFFFC1 1133#define S_0286C4_VS_EXPORTS_FOG(x) (((unsigned)(x) & 0x1) << 8) 1134#define G_0286C4_VS_EXPORTS_FOG(x) (((x) >> 8) & 0x1) 1135#define C_0286C4_VS_EXPORTS_FOG 0xFFFFFEFF 1136#define S_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((unsigned)(x) & 0x1F) << 9) 1137#define G_0286C4_VS_OUT_FOG_VEC_ADDR(x) (((x) >> 9) & 0x1F) 1138#define C_0286C4_VS_OUT_FOG_VEC_ADDR 0xFFFFC1FF 1139 1140#define R_0286E0_SPI_BARYC_CNTL 0x0286E0 1141#define S_0286E0_PERSP_CENTER_ENA(x) (((unsigned)(x) & 0x3) << 0) 1142#define G_0286E0_PERSP_CENTER_ENA(x) (((x) >> 0) & 0x3) 1143#define C_0286E0_PERSP_CENTER_ENA 0xFFFFFFFC 1144#define S_0286E0_PERSP_CENTROID_ENA(x) (((unsigned)(x) & 0x3) << 4) 1145#define G_0286E0_PERSP_CENTROID_ENA(x) (((x) >> 4) & 0x3) 1146#define C_0286E0_PERSP_CENTROID_ENA 0xFFFFFFCF 1147#define S_0286E0_PERSP_SAMPLE_ENA(x) (((unsigned)(x) & 0x3) << 8) 1148#define G_0286E0_PERSP_SAMPLE_ENA(x) (((x) >> 8) & 0x3) 1149#define C_0286E0_PERSP_SAMPLE_ENA 0xFFFFFCFF 1150#define S_0286E0_PERSP_PULL_MODEL_ENA(x) (((unsigned)(x) & 0x3) << 12) 1151#define G_0286E0_PERSP_PULL_MODEL_ENA(x) (((x) >> 12) & 0x3) 1152#define C_0286E0_PERSP_PULL_MODEL_ENA 0xFFFFCFFF 1153#define S_0286E0_LINEAR_CENTER_ENA(x) (((unsigned)(x) & 0x3) << 16) 1154#define G_0286E0_LINEAR_CENTER_ENA(x) (((x) >> 16) & 0x3) 1155#define C_0286E0_LINEAR_CENTER_ENA 0xFFFCFFFF 1156#define S_0286E0_LINEAR_CENTROID_ENA(x) (((unsigned)(x) & 0x3) << 20) 1157#define G_0286E0_LINEAR_CENTROID_ENA(x) (((x) >> 20) & 0x3) 1158#define C_0286E0_LINEAR_CENTROID_ENA 0xFFCFFFFF 1159#define S_0286E0_LINEAR_SAMPLE_ENA(x) (((unsigned)(x) & 0x3) << 24) 1160#define G_0286E0_LINEAR_SAMPLE_ENA(x) (((x) >> 24) & 0x3) 1161#define C_0286E0_LINEAR_SAMPLE_ENA 0xFCFFFFFF 1162 1163 1164/* new - diff */ 1165#define R_028250_PA_SC_VPORT_SCISSOR_0_TL 0x028250 1166#define S_028250_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 1167#define G_028250_TL_X(x) (((x) >> 0) & 0x7FFF) 1168#define C_028250_TL_X 0xFFFF8000 1169#define S_028250_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 1170#define G_028250_TL_Y(x) (((x) >> 16) & 0x7FFF) 1171#define C_028250_TL_Y 0x8000FFFF 1172#define S_028250_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 1173#define G_028250_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 1174#define C_028250_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 1175#define R_028254_PA_SC_VPORT_SCISSOR_0_BR 0x028254 1176#define S_028254_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 1177#define G_028254_BR_X(x) (((x) >> 0) & 0x7FFF) 1178#define C_028254_BR_X 0xFFFF8000 1179#define S_028254_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 1180#define G_028254_BR_Y(x) (((x) >> 16) & 0x7FFF) 1181#define C_028254_BR_Y 0x8000FFFF 1182/* diff */ 1183#define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 1184#define S_028240_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 1185#define G_028240_TL_X(x) (((x) >> 0) & 0x7FFF) 1186#define C_028240_TL_X 0xFFFF8000 1187#define S_028240_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 1188#define G_028240_TL_Y(x) (((x) >> 16) & 0x7FFF) 1189#define C_028240_TL_Y 0x8000FFFF 1190#define S_028240_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 1191#define G_028240_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 1192#define C_028240_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 1193#define R_028244_PA_SC_GENERIC_SCISSOR_BR 0x028244 1194#define S_028244_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 1195#define G_028244_BR_X(x) (((x) >> 0) & 0x7FFF) 1196#define C_028244_BR_X 0xFFFF8000 1197#define S_028244_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 1198#define G_028244_BR_Y(x) (((x) >> 16) & 0x7FFF) 1199#define C_028244_BR_Y 0x8000FFFF 1200/* diff */ 1201#define R_028030_PA_SC_SCREEN_SCISSOR_TL 0x028030 1202#define S_028030_TL_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1203#define G_028030_TL_X(x) (((x) >> 0) & 0xFFFF) 1204#define C_028030_TL_X 0xFFFF0000 1205#define S_028030_TL_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1206#define G_028030_TL_Y(x) (((x) >> 16) & 0xFFFF) 1207#define C_028030_TL_Y 0x0000FFFF 1208#define R_028034_PA_SC_SCREEN_SCISSOR_BR 0x028034 1209#define S_028034_BR_X(x) (((unsigned)(x) & 0xFFFF) << 0) 1210#define G_028034_BR_X(x) (((x) >> 0) & 0xFFFF) 1211#define C_028034_BR_X 0xFFFF0000 1212#define S_028034_BR_Y(x) (((unsigned)(x) & 0xFFFF) << 16) 1213#define G_028034_BR_Y(x) (((x) >> 16) & 0xFFFF) 1214#define C_028034_BR_Y 0x0000FFFF 1215/* diff */ 1216#define R_028204_PA_SC_WINDOW_SCISSOR_TL 0x028204 1217#define S_028204_TL_X(x) (((unsigned)(x) & 0x7FFF) << 0) 1218#define G_028204_TL_X(x) (((x) >> 0) & 0x7FFF) 1219#define C_028204_TL_X 0xFFFF8000 1220#define S_028204_TL_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 1221#define G_028204_TL_Y(x) (((x) >> 16) & 0x7FFF) 1222#define C_028204_TL_Y 0x8000FFFF 1223#define S_028204_WINDOW_OFFSET_DISABLE(x) (((unsigned)(x) & 0x1) << 31) 1224#define G_028204_WINDOW_OFFSET_DISABLE(x) (((x) >> 31) & 0x1) 1225#define C_028204_WINDOW_OFFSET_DISABLE 0x7FFFFFFF 1226#define R_028208_PA_SC_WINDOW_SCISSOR_BR 0x028208 1227#define S_028208_BR_X(x) (((unsigned)(x) & 0x7FFF) << 0) 1228#define G_028208_BR_X(x) (((x) >> 0) & 0x7FFF) 1229#define C_028208_BR_X 0xFFFF8000 1230#define S_028208_BR_Y(x) (((unsigned)(x) & 0x7FFF) << 16) 1231#define G_028208_BR_Y(x) (((x) >> 16) & 0x7FFF) 1232#define C_028208_BR_Y 0x8000FFFF 1233 1234#define R_028A78_VGT_DMA_MAX_SIZE 0x028A78 1235#define R_028A7C_VGT_DMA_INDEX_TYPE 0x028A7C 1236#define R_028A88_VGT_NUM_INSTANCES 0x028A88 1237#define R_0287E4_VGT_DMA_BASE_HI 0x0287E4 1238#define R_0287E8_VGT_DMA_BASE 0x0287E8 1239#define R_0287F0_VGT_DRAW_INITIATOR 0x0287F0 1240#define S_0287F0_SOURCE_SELECT(x) (((unsigned)(x) & 0x3) << 0) 1241#define G_0287F0_SOURCE_SELECT(x) (((x) >> 0) & 0x3) 1242#define C_0287F0_SOURCE_SELECT 0xFFFFFFFC 1243#define S_0287F0_MAJOR_MODE(x) (((unsigned)(x) & 0x3) << 2) 1244#define G_0287F0_MAJOR_MODE(x) (((x) >> 2) & 0x3) 1245#define C_0287F0_MAJOR_MODE 0xFFFFFFF3 1246#define S_0287F0_SPRITE_EN(x) (((unsigned)(x) & 0x1) << 4) 1247#define G_0287F0_SPRITE_EN(x) (((x) >> 4) & 0x1) 1248#define C_0287F0_SPRITE_EN 0xFFFFFFEF 1249#define S_0287F0_NOT_EOP(x) (((unsigned)(x) & 0x1) << 5) 1250#define G_0287F0_NOT_EOP(x) (((x) >> 5) & 0x1) 1251#define C_0287F0_NOT_EOP 0xFFFFFFDF 1252#define S_0287F0_USE_OPAQUE(x) (((unsigned)(x) & 0x1) << 6) 1253#define G_0287F0_USE_OPAQUE(x) (((x) >> 6) & 0x1) 1254#define C_0287F0_USE_OPAQUE 0xFFFFFFBF 1255 1256#define R_030000_SQ_TEX_RESOURCE_WORD0_0 0x030000 1257#define S_030000_DIM(x) (((unsigned)(x) & 0x7) << 0) 1258#define G_030000_DIM(x) (((x) >> 0) & 0x7) 1259#define C_030000_DIM 0xFFFFFFF8 1260#define V_030000_SQ_TEX_DIM_1D 0x00000000 1261#define V_030000_SQ_TEX_DIM_2D 0x00000001 1262#define V_030000_SQ_TEX_DIM_3D 0x00000002 1263#define V_030000_SQ_TEX_DIM_CUBEMAP 0x00000003 1264#define V_030000_SQ_TEX_DIM_1D_ARRAY 0x00000004 1265#define V_030000_SQ_TEX_DIM_2D_ARRAY 0x00000005 1266#define V_030000_SQ_TEX_DIM_2D_MSAA 0x00000006 1267#define V_030000_SQ_TEX_DIM_2D_ARRAY_MSAA 0x00000007 1268#define S_030000_NON_DISP_TILING_ORDER(x) (((unsigned)(x) & 0x1) << 5) 1269#define G_030000_NON_DISP_TILING_ORDER(x) (((x) >> 5) & 0x1) 1270#define C_030000_NON_DISP_TILING_ORDER 0xFFFFFFDF 1271#define CM_S_030000_NON_DISP_TILING_ORDER(x) (((unsigned)(x) & 0x3) << 4) 1272#define CM_G_030000_NON_DISP_TILING_ORDER(x) (((x) >> 4) & 0x3) 1273#define CM_C_030000_NON_DISP_TILING_ORDER 0xFFFFFFCF 1274#define S_030000_PITCH(x) (((unsigned)(x) & 0xFFF) << 6) 1275#define G_030000_PITCH(x) (((x) >> 6) & 0xFFF) 1276#define C_030000_PITCH 0xFFFC003F 1277#define S_030000_TEX_WIDTH(x) (((unsigned)(x) & 0x3FFF) << 18) 1278#define G_030000_TEX_WIDTH(x) (((x) >> 18) & 0x3FFF) 1279#define C_030000_TEX_WIDTH 0x0003FFFF 1280#define R_030004_SQ_TEX_RESOURCE_WORD1_0 0x030004 1281#define S_030004_TEX_HEIGHT(x) (((unsigned)(x) & 0x3FFF) << 0) 1282#define G_030004_TEX_HEIGHT(x) (((x) >> 0) & 0x3FFF) 1283#define C_030004_TEX_HEIGHT 0xFFFFC000 1284#define S_030004_TEX_DEPTH(x) (((unsigned)(x) & 0x1FFF) << 14) 1285#define G_030004_TEX_DEPTH(x) (((x) >> 14) & 0x1FFF) 1286#define C_030004_TEX_DEPTH 0xF8003FFF 1287#define S_030004_ARRAY_MODE(x) (((unsigned)(x) & 0xF) << 28) 1288#define G_030004_ARRAY_MODE(x) (((x) >> 28) & 0xF) 1289#define C_030004_ARRAY_MODE 0x0FFFFFFF 1290#define R_030008_SQ_TEX_RESOURCE_WORD2_0 0x030008 1291#define S_030008_BASE_ADDRESS(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 1292#define G_030008_BASE_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) 1293#define C_030008_BASE_ADDRESS 0x00000000 1294#define R_03000C_SQ_TEX_RESOURCE_WORD3_0 0x03000C 1295#define S_03000C_MIP_ADDRESS(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 1296#define G_03000C_MIP_ADDRESS(x) (((x) >> 0) & 0xFFFFFFFF) 1297#define C_03000C_MIP_ADDRESS 0x00000000 1298#define R_030010_SQ_TEX_RESOURCE_WORD4_0 0x030010 1299#define S_030010_FORMAT_COMP_X(x) (((unsigned)(x) & 0x3) << 0) 1300#define G_030010_FORMAT_COMP_X(x) (((x) >> 0) & 0x3) 1301#define C_030010_FORMAT_COMP_X 0xFFFFFFFC 1302#define V_030010_SQ_FORMAT_COMP_UNSIGNED 0x00000000 1303#define V_030010_SQ_FORMAT_COMP_SIGNED 0x00000001 1304#define V_030010_SQ_FORMAT_COMP_UNSIGNED_BIASED 0x00000002 1305#define S_030010_FORMAT_COMP_Y(x) (((unsigned)(x) & 0x3) << 2) 1306#define G_030010_FORMAT_COMP_Y(x) (((x) >> 2) & 0x3) 1307#define C_030010_FORMAT_COMP_Y 0xFFFFFFF3 1308#define S_030010_FORMAT_COMP_Z(x) (((unsigned)(x) & 0x3) << 4) 1309#define G_030010_FORMAT_COMP_Z(x) (((x) >> 4) & 0x3) 1310#define C_030010_FORMAT_COMP_Z 0xFFFFFFCF 1311#define S_030010_FORMAT_COMP_W(x) (((unsigned)(x) & 0x3) << 6) 1312#define G_030010_FORMAT_COMP_W(x) (((x) >> 6) & 0x3) 1313#define C_030010_FORMAT_COMP_W 0xFFFFFF3F 1314#define S_030010_NUM_FORMAT_ALL(x) (((unsigned)(x) & 0x3) << 8) 1315#define G_030010_NUM_FORMAT_ALL(x) (((x) >> 8) & 0x3) 1316#define C_030010_NUM_FORMAT_ALL 0xFFFFFCFF 1317#define V_030010_SQ_NUM_FORMAT_NORM 0x00000000 1318#define V_030010_SQ_NUM_FORMAT_INT 0x00000001 1319#define V_030010_SQ_NUM_FORMAT_SCALED 0x00000002 1320#define S_030010_SRF_MODE_ALL(x) (((unsigned)(x) & 0x1) << 10) 1321#define G_030010_SRF_MODE_ALL(x) (((x) >> 10) & 0x1) 1322#define C_030010_SRF_MODE_ALL 0xFFFFFBFF 1323#define V_030010_SRF_MODE_ZERO_CLAMP_MINUS_ONE 0x00000000 1324#define V_030010_SRF_MODE_NO_ZERO 0x00000001 1325#define S_030010_FORCE_DEGAMMA(x) (((unsigned)(x) & 0x1) << 11) 1326#define G_030010_FORCE_DEGAMMA(x) (((x) >> 11) & 0x1) 1327#define C_030010_FORCE_DEGAMMA 0xFFFFF7FF 1328#define S_030010_ENDIAN_SWAP(x) (((unsigned)(x) & 0x3) << 12) 1329#define G_030010_ENDIAN_SWAP(x) (((x) >> 12) & 0x3) 1330#define C_030010_ENDIAN_SWAP 0xFFFFCFFF 1331#define S_030010_LOG2_NUM_FRAGMENTS(x) (((unsigned)(x) & 0x3) << 14) /* cayman only */ 1332#define S_030010_DST_SEL_X(x) (((unsigned)(x) & 0x7) << 16) 1333#define G_030010_DST_SEL_X(x) (((x) >> 16) & 0x7) 1334#define C_030010_DST_SEL_X 0xFFF8FFFF 1335#define V_030010_SQ_SEL_X 0x00000000 1336#define V_030010_SQ_SEL_Y 0x00000001 1337#define V_030010_SQ_SEL_Z 0x00000002 1338#define V_030010_SQ_SEL_W 0x00000003 1339#define V_030010_SQ_SEL_0 0x00000004 1340#define V_030010_SQ_SEL_1 0x00000005 1341#define S_030010_DST_SEL_Y(x) (((unsigned)(x) & 0x7) << 19) 1342#define G_030010_DST_SEL_Y(x) (((x) >> 19) & 0x7) 1343#define C_030010_DST_SEL_Y 0xFFC7FFFF 1344#define S_030010_DST_SEL_Z(x) (((unsigned)(x) & 0x7) << 22) 1345#define G_030010_DST_SEL_Z(x) (((x) >> 22) & 0x7) 1346#define C_030010_DST_SEL_Z 0xFE3FFFFF 1347#define S_030010_DST_SEL_W(x) (((unsigned)(x) & 0x7) << 25) 1348#define G_030010_DST_SEL_W(x) (((x) >> 25) & 0x7) 1349#define C_030010_DST_SEL_W 0xF1FFFFFF 1350#define S_030010_BASE_LEVEL(x) (((unsigned)(x) & 0xF) << 28) 1351#define G_030010_BASE_LEVEL(x) (((x) >> 28) & 0xF) 1352#define C_030010_BASE_LEVEL 0x0FFFFFFF 1353#define R_030014_SQ_TEX_RESOURCE_WORD5_0 0x030014 1354#define S_030014_LAST_LEVEL(x) (((unsigned)(x) & 0xF) << 0) 1355#define G_030014_LAST_LEVEL(x) (((x) >> 0) & 0xF) 1356#define C_030014_LAST_LEVEL 0xFFFFFFF0 1357#define S_030014_BASE_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 4) 1358#define G_030014_BASE_ARRAY(x) (((x) >> 4) & 0x1FFF) 1359#define C_030014_BASE_ARRAY 0xFFFE000F 1360#define S_030014_LAST_ARRAY(x) (((unsigned)(x) & 0x1FFF) << 17) 1361#define G_030014_LAST_ARRAY(x) (((x) >> 17) & 0x1FFF) 1362#define C_030014_LAST_ARRAY 0xC001FFFF 1363#define R_030018_SQ_TEX_RESOURCE_WORD6_0 0x030018 1364/* FMASK_BANK_HEIGHT and MAX_ANISO_RATIO share the first two bits. 1365 * The former is only used with MSAA textures. */ 1366#define S_030018_MAX_ANISO_RATIO(x) (((unsigned)(x) & 0x7) << 0) 1367#define G_030018_MAX_ANISO_RATIO(x) (((x) >> 0) & 0x7) 1368#define C_030018_MAX_ANISO_RATIO 0xFFFFFFF8 1369#define S_030018_FMASK_BANK_HEIGHT(x) (((unsigned)(x) & 0x3) << 0) 1370#define S_030018_PERF_MODULATION(x) (((unsigned)(x) & 0x7) << 3) 1371#define G_030018_PERF_MODULATION(x) (((x) >> 3) & 0x7) 1372#define C_030018_PERF_MODULATION 0xFFFFFFC7 1373#define S_030018_INTERLACED(x) (((unsigned)(x) & 0x1) << 6) 1374#define G_030018_INTERLACED(x) (((x) >> 6) & 0x1) 1375#define C_030018_INTERLACED 0xFFFFFFBF 1376#define S_030018_TILE_SPLIT(x) (((unsigned)(x) & 0x7) << 29) 1377#define R_03001C_SQ_TEX_RESOURCE_WORD7_0 0x03001C 1378#define S_03001C_DATA_FORMAT(x) (((unsigned)(x) & 0x3F) << 0) 1379#define G_03001C_DATA_FORMAT(x) (((x) >> 0) & 0x3F) 1380#define C_03001C_DATA_FORMAT 0xFFFFFFC0 1381#define S_03001C_MACRO_TILE_ASPECT(x) (((unsigned)(x) & 0x3) << 6) 1382#define S_03001C_BANK_WIDTH(x) (((unsigned)(x) & 0x3) << 8) 1383#define S_03001C_BANK_HEIGHT(x) (((unsigned)(x) & 0x3) << 10) 1384#define S_03001C_DEPTH_SAMPLE_ORDER(x) (((unsigned)(x) & 0x1) << 15) 1385#define S_03001C_NUM_BANKS(x) (((unsigned)(x) & 0x3) << 16) 1386#define S_03001C_TYPE(x) (((unsigned)(x) & 0x3) << 30) 1387#define G_03001C_TYPE(x) (((x) >> 30) & 0x3) 1388#define C_03001C_TYPE 0x3FFFFFFF 1389#define V_03001C_SQ_TEX_VTX_INVALID_TEXTURE 0x00000000 1390#define V_03001C_SQ_TEX_VTX_INVALID_BUFFER 0x00000001 1391#define V_03001C_SQ_TEX_VTX_VALID_TEXTURE 0x00000002 1392#define V_03001C_SQ_TEX_VTX_VALID_BUFFER 0x00000003 1393 1394#define R_030008_SQ_VTX_CONSTANT_WORD2_0 0x030008 1395#define S_030008_BASE_ADDRESS_HI(x) (((unsigned)(x) & 0xFF) << 0) 1396#define G_030008_BASE_ADDRESS_HI(x) (((x) >> 0) & 0xFF) 1397#define C_030008_BASE_ADDRESS_HI 0xFFFFFF00 1398#define S_030008_STRIDE(x) (((unsigned)(x) & 0x7FF) << 8) 1399#define G_030008_STRIDE(x) (((x) >> 8) & 0x7FF) 1400#define C_030008_STRIDE 0xFFF800FF 1401#define S_030008_CLAMP_X(x) (((unsigned)(x) & 0x1) << 19) 1402#define G_030008_CLAMP_X(x) (((x) >> 19) & 0x1) 1403#define C_030008_CLAMP_X 0xFFF7FFFF 1404#define S_030008_DATA_FORMAT(x) (((unsigned)(x) & 0x3F) << 20) 1405#define G_030008_DATA_FORMAT(x) (((x) >> 20) & 0x3F) 1406#define C_030008_DATA_FORMAT 0xFC0FFFFF 1407#define S_030008_NUM_FORMAT_ALL(x) (((unsigned)(x) & 0x3) << 26) 1408#define G_030008_NUM_FORMAT_ALL(x) (((x) >> 26) & 0x3) 1409#define C_030008_NUM_FORMAT_ALL 0xF3FFFFFF 1410#define V_030008_SQ_NUM_FORMAT_NORM 0x00000000 1411#define V_030008_SQ_NUM_FORMAT_INT 0x00000001 1412#define V_030008_SQ_NUM_FORMAT_SCALED 0x00000002 1413#define S_030008_FORMAT_COMP_ALL(x) (((unsigned)(x) & 0x1) << 28) 1414#define G_030008_FORMAT_COMP_ALL(x) (((x) >> 28) & 0x1) 1415#define C_030008_FORMAT_COMP_ALL 0xEFFFFFFF 1416#define S_030008_SRF_MODE_ALL(x) (((unsigned)(x) & 0x1) << 29) 1417#define G_030008_SRF_MODE_ALL(x) (((x) >> 29) & 0x1) 1418#define C_030008_SRF_MODE_ALL 0xDFFFFFFF 1419#define S_030008_ENDIAN_SWAP(x) (((unsigned)(x) & 0x3) << 30) 1420#define G_030008_ENDIAN_SWAP(x) (((x) >> 30) & 0x3) 1421#define C_030008_ENDIAN_SWAP 0x3FFFFFFF 1422 1423#define R_03000C_SQ_VTX_CONSTANT_WORD3_0 0x03000C 1424#define S_03000C_UNCACHED(x) (((unsigned)(x) & 0x1) << 2) 1425#define S_03000C_DST_SEL_X(x) (((unsigned)(x) & 0x7) << 3) 1426#define G_03000C_DST_SEL_X(x) (((x) >> 3) & 0x7) 1427#define V_03000C_SQ_SEL_X 0x00000000 1428#define V_03000C_SQ_SEL_Y 0x00000001 1429#define V_03000C_SQ_SEL_Z 0x00000002 1430#define V_03000C_SQ_SEL_W 0x00000003 1431#define V_03000C_SQ_SEL_0 0x00000004 1432#define V_03000C_SQ_SEL_1 0x00000005 1433#define S_03000C_DST_SEL_Y(x) (((unsigned)(x) & 0x7) << 6) 1434#define G_03000C_DST_SEL_Y(x) (((x) >> 6) & 0x7) 1435#define S_03000C_DST_SEL_Z(x) (((unsigned)(x) & 0x7) << 9) 1436#define G_03000C_DST_SEL_Z(x) (((x) >> 9) & 0x7) 1437#define S_03000C_DST_SEL_W(x) (((unsigned)(x) & 0x7) << 12) 1438#define G_03000C_DST_SEL_W(x) (((x) >> 12) & 0x7) 1439 1440#define R_00A400_TD_PS_SAMPLER0_BORDER_INDEX 0x00A400 1441#define R_00A404_TD_PS_SAMPLER0_BORDER_RED 0x00A404 1442#define R_00A408_TD_PS_SAMPLER0_BORDER_GREEN 0x00A408 1443#define R_00A40C_TD_PS_SAMPLER0_BORDER_BLUE 0x00A40C 1444#define R_00A410_TD_PS_SAMPLER0_BORDER_ALPHA 0x00A410 1445#define R_00A414_TD_VS_SAMPLER0_BORDER_INDEX 0x00A414 1446#define R_00A418_TD_VS_SAMPLER0_BORDER_RED 0x00A418 1447#define R_00A41C_TD_VS_SAMPLER0_BORDER_GREEN 0x00A41C 1448#define R_00A420_TD_VS_SAMPLER0_BORDER_BLUE 0x00A420 1449#define R_00A424_TD_VS_SAMPLER0_BORDER_ALPHA 0x00A424 1450#define R_00A428_TD_GS_SAMPLER0_BORDER_INDEX 0x00A428 1451#define R_00A42C_TD_GS_SAMPLER0_BORDER_RED 0x00A42C 1452#define R_00A430_TD_GS_SAMPLER0_BORDER_GREEN 0x00A430 1453#define R_00A434_TD_GS_SAMPLER0_BORDER_BLUE 0x00A434 1454#define R_00A438_TD_GS_SAMPLER0_BORDER_ALPHA 0x00A438 1455#define R_00A43C_TD_HS_SAMPLER0_BORDER_COLOR_INDEX 0x00A43C 1456#define R_00A440_TD_HS_SAMPLER0_BORDER_COLOR_RED 0x00A440 1457#define R_00A444_TD_HS_SAMPLER0_BORDER_COLOR_GREEN 0x00A444 1458#define R_00A448_TD_HS_SAMPLER0_BORDER_COLOR_BLUE 0x00A448 1459#define R_00A44C_TD_HS_SAMPLER0_BORDER_COLOR_ALPHA 0x00A44C 1460#define R_00A450_TD_LS_SAMPLER0_BORDER_COLOR_INDEX 0x00A450 1461#define R_00A454_TD_LS_SAMPLER0_BORDER_COLOR_RED 0x00A454 1462#define R_00A458_TD_LS_SAMPLER0_BORDER_COLOR_GREEN 0x00A458 1463#define R_00A45C_TD_LS_SAMPLER0_BORDER_COLOR_BLUE 0x00A45C 1464#define R_00A460_TD_LS_SAMPLER0_BORDER_COLOR_ALPHA 0x00A460 1465#define R_00A464_TD_CS_SAMPLER0_BORDER_INDEX 0x00A464 1466#define R_00A468_TD_CS_SAMPLER0_BORDER_RED 0x00A468 1467#define R_00A46C_TD_CS_SAMPLER0_BORDER_GREEN 0x00A46C 1468#define R_00A470_TD_CS_SAMPLER0_BORDER_BLUE 0x00A470 1469#define R_00A474_TD_CS_SAMPLER0_BORDER_ALPHA 0x00A474 1470 1471#define R_03C000_SQ_TEX_SAMPLER_WORD0_0 0x03C000 1472#define S_03C000_CLAMP_X(x) (((unsigned)(x) & 0x7) << 0) 1473#define G_03C000_CLAMP_X(x) (((x) >> 0) & 0x7) 1474#define C_03C000_CLAMP_X 0xFFFFFFF8 1475#define V_03C000_SQ_TEX_WRAP 0x00000000 1476#define V_03C000_SQ_TEX_MIRROR 0x00000001 1477#define V_03C000_SQ_TEX_CLAMP_LAST_TEXEL 0x00000002 1478#define V_03C000_SQ_TEX_MIRROR_ONCE_LAST_TEXEL 0x00000003 1479#define V_03C000_SQ_TEX_CLAMP_HALF_BORDER 0x00000004 1480#define V_03C000_SQ_TEX_MIRROR_ONCE_HALF_BORDER 0x00000005 1481#define V_03C000_SQ_TEX_CLAMP_BORDER 0x00000006 1482#define V_03C000_SQ_TEX_MIRROR_ONCE_BORDER 0x00000007 1483#define S_03C000_CLAMP_Y(x) (((unsigned)(x) & 0x7) << 3) 1484#define G_03C000_CLAMP_Y(x) (((x) >> 3) & 0x7) 1485#define C_03C000_CLAMP_Y 0xFFFFFFC7 1486#define S_03C000_CLAMP_Z(x) (((unsigned)(x) & 0x7) << 6) 1487#define G_03C000_CLAMP_Z(x) (((x) >> 6) & 0x7) 1488#define C_03C000_CLAMP_Z 0xFFFFFE3F 1489#define S_03C000_XY_MAG_FILTER(x) (((unsigned)(x) & 0x3) << 9) 1490#define G_03C000_XY_MAG_FILTER(x) (((x) >> 9) & 0x3) 1491#define C_03C000_XY_MAG_FILTER 0xFFFFF9FF 1492#define V_03C000_SQ_TEX_XY_FILTER_POINT 0x00000000 1493#define V_03C000_SQ_TEX_XY_FILTER_BILINEAR 0x00000001 1494#define S_03C000_XY_MIN_FILTER(x) (((unsigned)(x) & 0x3) << 11) 1495#define G_03C000_XY_MIN_FILTER(x) (((x) >> 11) & 0x3) 1496#define C_03C000_XY_MIN_FILTER 0xFFFFE7FF 1497#define S_03C000_Z_FILTER(x) (((unsigned)(x) & 0x3) << 13) 1498#define G_03C000_Z_FILTER(x) (((x) >> 13) & 0x3) 1499#define C_03C000_Z_FILTER 0xFFFF9FFF 1500#define V_03C000_SQ_TEX_Z_FILTER_NONE 0x00000000 1501#define V_03C000_SQ_TEX_Z_FILTER_POINT 0x00000001 1502#define V_03C000_SQ_TEX_Z_FILTER_LINEAR 0x00000002 1503#define S_03C000_MIP_FILTER(x) (((unsigned)(x) & 0x3) << 15) 1504#define G_03C000_MIP_FILTER(x) (((x) >> 15) & 0x3) 1505#define C_03C000_MIP_FILTER 0xFFFE7FFF 1506#define S_03C000_MAX_ANISO_RATIO(x) (((unsigned)(x) & 0x7) << 17) 1507#define G_03C000_MAX_ANISO_RATIO(x) (((x) >> 17) & 0x7) 1508#define C_03C000_MAX_ANISO_RATIO 0xFFF1FFFF 1509#define S_03C000_BORDER_COLOR_TYPE(x) (((unsigned)(x) & 0x3) << 20) 1510#define G_03C000_BORDER_COLOR_TYPE(x) (((x) >> 20) & 0x3) 1511#define C_03C000_BORDER_COLOR_TYPE 0xFFCFFFFF 1512#define V_03C000_SQ_TEX_BORDER_COLOR_TRANS_BLACK 0x00000000 1513#define V_03C000_SQ_TEX_BORDER_COLOR_OPAQUE_BLACK 0x00000001 1514#define V_03C000_SQ_TEX_BORDER_COLOR_OPAQUE_WHITE 0x00000002 1515#define V_03C000_SQ_TEX_BORDER_COLOR_REGISTER 0x00000003 1516#define S_03C000_DEPTH_COMPARE_FUNCTION(x) (((unsigned)(x) & 0x7) << 22) 1517#define G_03C000_DEPTH_COMPARE_FUNCTION(x) (((x) >> 22) & 0x7) 1518#define C_03C000_DEPTH_COMPARE_FUNCTION 0xFE3FFFFF 1519#define V_03C000_SQ_TEX_DEPTH_COMPARE_NEVER 0x00000000 1520#define V_03C000_SQ_TEX_DEPTH_COMPARE_LESS 0x00000001 1521#define V_03C000_SQ_TEX_DEPTH_COMPARE_EQUAL 0x00000002 1522#define V_03C000_SQ_TEX_DEPTH_COMPARE_LESSEQUAL 0x00000003 1523#define V_03C000_SQ_TEX_DEPTH_COMPARE_GREATER 0x00000004 1524#define V_03C000_SQ_TEX_DEPTH_COMPARE_NOTEQUAL 0x00000005 1525#define V_03C000_SQ_TEX_DEPTH_COMPARE_GREATEREQUAL 0x00000006 1526#define V_03C000_SQ_TEX_DEPTH_COMPARE_ALWAYS 0x00000007 1527#define S_03C000_CHROMA_KEY(x) (((unsigned)(x) & 0x3) << 25) 1528#define G_03C000_CHROMA_KEY(x) (((x) >> 25) & 0x3) 1529#define C_03C000_CHROMA_KEY 0xF9FFFFFF 1530#define V_03C000_SQ_TEX_CHROMA_KEY_DISABLE 0x00000000 1531#define V_03C000_SQ_TEX_CHROMA_KEY_KILL 0x00000001 1532#define V_03C000_SQ_TEX_CHROMA_KEY_BLEND 0x00000002 1533 1534#define R_03C004_SQ_TEX_SAMPLER_WORD1_0 0x03C004 1535#define S_03C004_MIN_LOD(x) (((unsigned)(x) & 0xFFF) << 0) 1536#define G_03C004_MIN_LOD(x) (((x) >> 0) & 0xFFF) 1537#define C_03C004_MIN_LOD 0xFFFFF000 1538#define S_03C004_MAX_LOD(x) (((unsigned)(x) & 0xFFF) << 12) 1539#define G_03C004_MAX_LOD(x) (((x) >> 12) & 0xFFF) 1540#define C_03C004_MAX_LOD 0xFF000FFF 1541 1542#define S_03C004_PERF_MIP(x) (((unsigned)(x) & 0xF) << 24) 1543#define G_03C004_PERF_MIP(x) (((x) >> 24) & 0xF) 1544#define C_03C004_PERF_MIP 0xF0FFFFFF 1545#define S_03C004_PERF_Z(x) (((unsigned)(x) & 0xF) << 28) 1546#define G_03C004_PERF_Z(x) (((x) >> 24) & 0xF) 1547#define C_03C004_PERF_Z 0x0FFFFFFF 1548 1549#define R_03C008_SQ_TEX_SAMPLER_WORD2_0 0x03C008 1550#define S_03C008_LOD_BIAS(x) (((unsigned)(x) & 0x3FFF) << 0) 1551#define G_03C008_LOD_BIAS(x) (((x) >> 0) & 0x3FFF) 1552#define C_03C008_LOD_BIAS 0xFFFFC000 1553#define S_03C008_LOD_BIAS_SEC(x) (((unsigned)(x) & 0x3F) << 14) 1554#define G_03C008_LOD_BIAS_SEC(x) (((x) >> 14) & 0x3F) 1555#define C_03C008_LOD_BIAS_SEC 0xFFF03FFF 1556#define S_03C008_MC_COORD_TRUNCATE(x) (((unsigned)(x) & 0x1) << 20) 1557#define G_03C008_MC_COORD_TRUNCATE(x) (((x) >> 20) & 0x1) 1558#define C_03C008_MC_COORD_TRUNCATE 0xFFEFFFFF 1559#define S_03C008_FORCE_DEGAMMA(x) (((unsigned)(x) & 0x1) << 21) 1560#define G_03C008_FORCE_DEGAMMA(x) (((x) >> 21) & 0x1) 1561#define C_03C008_FORCE_DEGAMMA 0xFFDFFFFF 1562#define S_03C008_ANISO_BIAS(x) (((unsigned)(x) & 0x3f) << 22) 1563#define G_03C008_ANISO_BIAS(x) (((x) >> 22) & 0x3f) 1564#define C_03C008_ANISO_BIAS (~(0x3f << 22)) 1565#define S_03C008_TRUNCATE_COORD(x) (((unsigned)(x) & 0x1) << 28) 1566#define G_03C008_TRUNCATE_COORD(x) (((x) >> 28) & 0x1) 1567#define C_03C008_TRUNCATE_COORD (~(1 << 28)) 1568#define S_03C008_DISABLE_CUBE_WRAP(x) (((unsigned)(x) & 0x1) << 29) 1569#define G_03C008_DISABLE_CUBE_WRAP(x) (((x) >> 29) & 0x1) 1570#define C_03C008_DISABLE_CUBE_WRAP (~(1 << 29)) 1571#define S_03C008_TYPE(x) (((unsigned)(x) & 0x1) << 31) 1572#define G_03C008_TYPE(x) (((x) >> 31) & 0x1) 1573#define C_03C008_TYPE 0x7FFFFFFF 1574 1575#define R_008958_VGT_PRIMITIVE_TYPE 0x008958 1576#define S_008958_PRIM_TYPE(x) (((unsigned)(x) & 0x3F) << 0) 1577#define G_008958_PRIM_TYPE(x) (((x) >> 0) & 0x3F) 1578#define C_008958_PRIM_TYPE 0xFFFFFFC0 1579#define V_008958_DI_PT_NONE 0x00000000 1580#define V_008958_DI_PT_POINTLIST 0x00000001 1581#define V_008958_DI_PT_LINELIST 0x00000002 1582#define V_008958_DI_PT_LINESTRIP 0x00000003 1583#define V_008958_DI_PT_TRILIST 0x00000004 1584#define V_008958_DI_PT_TRIFAN 0x00000005 1585#define V_008958_DI_PT_TRISTRIP 0x00000006 1586#define V_008958_DI_PT_UNUSED_0 0x00000007 1587#define V_008958_DI_PT_UNUSED_1 0x00000008 1588#define V_008958_DI_PT_PATCH 0x00000009 1589#define V_008958_DI_PT_LINELIST_ADJ 0x0000000A 1590#define V_008958_DI_PT_LINESTRIP_ADJ 0x0000000B 1591#define V_008958_DI_PT_TRILIST_ADJ 0x0000000C 1592#define V_008958_DI_PT_TRISTRIP_ADJ 0x0000000D 1593#define V_008958_DI_PT_UNUSED_3 0x0000000E 1594#define V_008958_DI_PT_UNUSED_4 0x0000000F 1595#define V_008958_DI_PT_TRI_WITH_WFLAGS 0x00000010 1596#define V_008958_DI_PT_RECTLIST 0x00000011 1597#define V_008958_DI_PT_LINELOOP 0x00000012 1598#define V_008958_DI_PT_QUADLIST 0x00000013 1599#define V_008958_DI_PT_QUADSTRIP 0x00000014 1600#define V_008958_DI_PT_POLYGON 0x00000015 1601#define V_008958_DI_PT_2D_COPY_RECT_LIST_V0 0x00000016 1602#define V_008958_DI_PT_2D_COPY_RECT_LIST_V1 0x00000017 1603#define V_008958_DI_PT_2D_COPY_RECT_LIST_V2 0x00000018 1604#define V_008958_DI_PT_2D_COPY_RECT_LIST_V3 0x00000019 1605#define V_008958_DI_PT_2D_FILL_RECT_LIST 0x0000001A 1606#define V_008958_DI_PT_2D_LINE_STRIP 0x0000001B 1607#define V_008958_DI_PT_2D_TRI_STRIP 0x0000001C 1608#define R_02881C_PA_CL_VS_OUT_CNTL 0x02881C 1609#define S_02881C_CLIP_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 0) 1610#define G_02881C_CLIP_DIST_ENA_0(x) (((x) >> 0) & 0x1) 1611#define C_02881C_CLIP_DIST_ENA_0 0xFFFFFFFE 1612#define S_02881C_CLIP_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 1) 1613#define G_02881C_CLIP_DIST_ENA_1(x) (((x) >> 1) & 0x1) 1614#define C_02881C_CLIP_DIST_ENA_1 0xFFFFFFFD 1615#define S_02881C_CLIP_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 2) 1616#define G_02881C_CLIP_DIST_ENA_2(x) (((x) >> 2) & 0x1) 1617#define C_02881C_CLIP_DIST_ENA_2 0xFFFFFFFB 1618#define S_02881C_CLIP_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 3) 1619#define G_02881C_CLIP_DIST_ENA_3(x) (((x) >> 3) & 0x1) 1620#define C_02881C_CLIP_DIST_ENA_3 0xFFFFFFF7 1621#define S_02881C_CLIP_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 4) 1622#define G_02881C_CLIP_DIST_ENA_4(x) (((x) >> 4) & 0x1) 1623#define C_02881C_CLIP_DIST_ENA_4 0xFFFFFFEF 1624#define S_02881C_CLIP_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 5) 1625#define G_02881C_CLIP_DIST_ENA_5(x) (((x) >> 5) & 0x1) 1626#define C_02881C_CLIP_DIST_ENA_5 0xFFFFFFDF 1627#define S_02881C_CLIP_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 6) 1628#define G_02881C_CLIP_DIST_ENA_6(x) (((x) >> 6) & 0x1) 1629#define C_02881C_CLIP_DIST_ENA_6 0xFFFFFFBF 1630#define S_02881C_CLIP_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 7) 1631#define G_02881C_CLIP_DIST_ENA_7(x) (((x) >> 7) & 0x1) 1632#define C_02881C_CLIP_DIST_ENA_7 0xFFFFFF7F 1633#define S_02881C_CULL_DIST_ENA_0(x) (((unsigned)(x) & 0x1) << 8) 1634#define G_02881C_CULL_DIST_ENA_0(x) (((x) >> 8) & 0x1) 1635#define C_02881C_CULL_DIST_ENA_0 0xFFFFFEFF 1636#define S_02881C_CULL_DIST_ENA_1(x) (((unsigned)(x) & 0x1) << 9) 1637#define G_02881C_CULL_DIST_ENA_1(x) (((x) >> 9) & 0x1) 1638#define C_02881C_CULL_DIST_ENA_1 0xFFFFFDFF 1639#define S_02881C_CULL_DIST_ENA_2(x) (((unsigned)(x) & 0x1) << 10) 1640#define G_02881C_CULL_DIST_ENA_2(x) (((x) >> 10) & 0x1) 1641#define C_02881C_CULL_DIST_ENA_2 0xFFFFFBFF 1642#define S_02881C_CULL_DIST_ENA_3(x) (((unsigned)(x) & 0x1) << 11) 1643#define G_02881C_CULL_DIST_ENA_3(x) (((x) >> 11) & 0x1) 1644#define C_02881C_CULL_DIST_ENA_3 0xFFFFF7FF 1645#define S_02881C_CULL_DIST_ENA_4(x) (((unsigned)(x) & 0x1) << 12) 1646#define G_02881C_CULL_DIST_ENA_4(x) (((x) >> 12) & 0x1) 1647#define C_02881C_CULL_DIST_ENA_4 0xFFFFEFFF 1648#define S_02881C_CULL_DIST_ENA_5(x) (((unsigned)(x) & 0x1) << 13) 1649#define G_02881C_CULL_DIST_ENA_5(x) (((x) >> 13) & 0x1) 1650#define C_02881C_CULL_DIST_ENA_5 0xFFFFDFFF 1651#define S_02881C_CULL_DIST_ENA_6(x) (((unsigned)(x) & 0x1) << 14) 1652#define G_02881C_CULL_DIST_ENA_6(x) (((x) >> 14) & 0x1) 1653#define C_02881C_CULL_DIST_ENA_6 0xFFFFBFFF 1654#define S_02881C_CULL_DIST_ENA_7(x) (((unsigned)(x) & 0x1) << 15) 1655#define G_02881C_CULL_DIST_ENA_7(x) (((x) >> 15) & 0x1) 1656#define C_02881C_CULL_DIST_ENA_7 0xFFFF7FFF 1657#define S_02881C_USE_VTX_POINT_SIZE(x) (((unsigned)(x) & 0x1) << 16) 1658#define G_02881C_USE_VTX_POINT_SIZE(x) (((x) >> 16) & 0x1) 1659#define C_02881C_USE_VTX_POINT_SIZE 0xFFFEFFFF 1660#define S_02881C_USE_VTX_EDGE_FLAG(x) (((unsigned)(x) & 0x1) << 17) 1661#define G_02881C_USE_VTX_EDGE_FLAG(x) (((x) >> 17) & 0x1) 1662#define C_02881C_USE_VTX_EDGE_FLAG 0xFFFDFFFF 1663#define S_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((unsigned)(x) & 0x1) << 18) 1664#define G_02881C_USE_VTX_RENDER_TARGET_INDX(x) (((x) >> 18) & 0x1) 1665#define C_02881C_USE_VTX_RENDER_TARGET_INDX 0xFFFBFFFF 1666#define S_02881C_USE_VTX_VIEWPORT_INDX(x) (((unsigned)(x) & 0x1) << 19) 1667#define G_02881C_USE_VTX_VIEWPORT_INDX(x) (((x) >> 19) & 0x1) 1668#define C_02881C_USE_VTX_VIEWPORT_INDX 0xFFF7FFFF 1669#define S_02881C_USE_VTX_KILL_FLAG(x) (((unsigned)(x) & 0x1) << 20) 1670#define G_02881C_USE_VTX_KILL_FLAG(x) (((x) >> 20) & 0x1) 1671#define C_02881C_USE_VTX_KILL_FLAG 0xFFEFFFFF 1672#define S_02881C_VS_OUT_MISC_VEC_ENA(x) (((unsigned)(x) & 0x1) << 21) 1673#define G_02881C_VS_OUT_MISC_VEC_ENA(x) (((x) >> 21) & 0x1) 1674#define C_02881C_VS_OUT_MISC_VEC_ENA 0xFFDFFFFF 1675#define S_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((unsigned)(x) & 0x1) << 22) 1676#define G_02881C_VS_OUT_CCDIST0_VEC_ENA(x) (((x) >> 22) & 0x1) 1677#define C_02881C_VS_OUT_CCDIST0_VEC_ENA 0xFFBFFFFF 1678#define S_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((unsigned)(x) & 0x1) << 23) 1679#define G_02881C_VS_OUT_CCDIST1_VEC_ENA(x) (((x) >> 23) & 0x1) 1680#define C_02881C_VS_OUT_CCDIST1_VEC_ENA 0xFF7FFFFF 1681/* diff */ 1682#define R_028860_SQ_PGM_RESOURCES_VS 0x028860 1683#define S_028860_NUM_GPRS(x) (((unsigned)(x) & 0xFF) << 0) 1684#define G_028860_NUM_GPRS(x) (((x) >> 0) & 0xFF) 1685#define C_028860_NUM_GPRS 0xFFFFFF00 1686#define S_028860_STACK_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 1687#define G_028860_STACK_SIZE(x) (((x) >> 8) & 0xFF) 1688#define C_028860_STACK_SIZE 0xFFFF00FF 1689#define S_028860_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 1690#define G_028860_DX10_CLAMP(x) (((x) >> 21) & 0x1) 1691#define C_028860_DX10_CLAMP 0xFFDFFFFF 1692#define S_028860_UNCACHED_FIRST_INST(x) (((unsigned)(x) & 0x1) << 28) 1693#define G_028860_UNCACHED_FIRST_INST(x) (((x) >> 28) & 0x1) 1694#define C_028860_UNCACHED_FIRST_INST 0xEFFFFFFF 1695 1696#define R_028878_SQ_PGM_RESOURCES_GS 0x028878 1697#define S_028878_NUM_GPRS(x) (((unsigned)(x) & 0xFF) << 0) 1698#define G_028878_NUM_GPRS(x) (((x) >> 0) & 0xFF) 1699#define C_028878_NUM_GPRS 0xFFFFFF00 1700#define S_028878_STACK_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 1701#define G_028878_STACK_SIZE(x) (((x) >> 8) & 0xFF) 1702#define C_028878_STACK_SIZE 0xFFFF00FF 1703#define S_028878_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 1704#define G_028878_DX10_CLAMP(x) (((x) >> 21) & 0x1) 1705#define C_028878_DX10_CLAMP 0xFFDFFFFF 1706#define S_028878_UNCACHED_FIRST_INST(x) (((unsigned)(x) & 0x1) << 28) 1707#define G_028878_UNCACHED_FIRST_INST(x) (((x) >> 28) & 0x1) 1708#define C_028878_UNCACHED_FIRST_INST 0xEFFFFFFF 1709#define R_02887C_SQ_PGM_RESOURCES_2_GS 0x02887C 1710 1711#define R_028890_SQ_PGM_RESOURCES_ES 0x028890 1712#define S_028890_NUM_GPRS(x) (((unsigned)(x) & 0xFF) << 0) 1713#define G_028890_NUM_GPRS(x) (((x) >> 0) & 0xFF) 1714#define C_028890_NUM_GPRS 0xFFFFFF00 1715#define S_028890_STACK_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 1716#define G_028890_STACK_SIZE(x) (((x) >> 8) & 0xFF) 1717#define C_028890_STACK_SIZE 0xFFFF00FF 1718#define S_028890_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 1719#define G_028890_DX10_CLAMP(x) (((x) >> 21) & 0x1) 1720#define C_028890_DX10_CLAMP 0xFFDFFFFF 1721#define S_028890_UNCACHED_FIRST_INST(x) (((unsigned)(x) & 0x1) << 28) 1722#define G_028890_UNCACHED_FIRST_INST(x) (((x) >> 28) & 0x1) 1723#define C_028890_UNCACHED_FIRST_INST 0xEFFFFFFF 1724#define R_028894_SQ_PGM_RESOURCES_2_ES 0x028894 1725 1726#define R_028864_SQ_PGM_RESOURCES_2_VS 0x028864 1727#define S_028864_SINGLE_ROUND(x) (((unsigned)(x) & 0x3) << 0) 1728#define G_028864_SINGLE_ROUND(x) (((x) >> 0) & 0x3) 1729#define C_028864_SINGLE_ROUND 0xFFFFFFFC 1730#define V_SQ_ROUND_NEAREST_EVEN 0x00 1731#define V_SQ_ROUND_PLUS_INFINITY 0x01 1732#define V_SQ_ROUND_MINUS_INFINITY 0x02 1733#define V_SQ_ROUND_TO_ZERO 0x03 1734#define S_028864_DOUBLE_ROUND(x) (((unsigned)(x) & 0x3) << 2) 1735#define G_028864_DOUBLE_ROUND(x) (((x) >> 2) & 0x3) 1736#define C_028864_DOUBLE_ROUND 0xFFFFFFF3 1737#define S_028864_ALLOW_SINGLE_DENORM_IN(x) (((unsigned)(x) & 0x1) << 4) 1738#define G_028864_ALLOW_SINGLE_DENORM_IN(x) (((x) >> 4) & 0x1) 1739#define C_028864_ALLOW_SINGLE_DENORM_IN 0xFFFFFFEF 1740#define S_028864_ALLOW_SINGLE_DENORM_OUT(x) (((unsigned)(x) & 0x1) << 5) 1741#define G_028864_ALLOW_SINGLE_DENORM_OUT(x) (((x) >> 5) & 0x1) 1742#define C_028864_ALLOW_SINGLE_DENORM_OUT 0xFFFFFFDF 1743#define S_028864_ALLOW_DOUBLE_DENORM_IN(x) (((unsigned)(x) & 0x1) << 6) 1744#define G_028864_ALLOW_DOUBLE_DENORM_IN(x) (((x) >> 6) & 0x1) 1745#define C_028864_ALLOW_DOUBLE_DENORM_IN 0xFFFFFFBF 1746#define S_028864_ALLOW_DOUBLE_DENORM_OUT(x) (((unsigned)(x) & 0x1) << 7) 1747#define G_028864_ALLOW_DOUBLE_DENORM_OUT(x) (((x) >> 7) & 0x1) 1748#define C_028864_ALLOW_DOUBLE_DENORM_OUT 0xFFFFFF7F 1749 1750#define R_028844_SQ_PGM_RESOURCES_PS 0x028844 1751#define S_028844_NUM_GPRS(x) (((unsigned)(x) & 0xFF) << 0) 1752#define G_028844_NUM_GPRS(x) (((x) >> 0) & 0xFF) 1753#define C_028844_NUM_GPRS 0xFFFFFF00 1754#define S_028844_STACK_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 1755#define G_028844_STACK_SIZE(x) (((x) >> 8) & 0xFF) 1756#define C_028844_STACK_SIZE 0xFFFF00FF 1757#define S_028844_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 1758#define G_028844_DX10_CLAMP(x) (((x) >> 21) & 0x1) 1759#define C_028844_DX10_CLAMP 0xFFDFFFFF 1760#define S_028844_PRIME_CACHE_ON_DRAW(x) (((unsigned)(x) & 0x1) << 23) 1761#define G_028844_PRIME_CACHE_ON_DRAW(x) (((x) >> 23) & 0x1) 1762#define C_028844_PRIME_CACHE_ON_DRAW 0xFF7FFFFF 1763#define S_028844_UNCACHED_FIRST_INST(x) (((unsigned)(x) & 0x1) << 28) 1764#define G_028844_UNCACHED_FIRST_INST(x) (((x) >> 28) & 0x1) 1765#define C_028844_UNCACHED_FIRST_INST 0xEFFFFFFF 1766#define S_028844_CLAMP_CONSTS(x) (((unsigned)(x) & 0x1) << 31) 1767#define G_028844_CLAMP_CONSTS(x) (((x) >> 31) & 0x1) 1768#define C_028844_CLAMP_CONSTS 0x7FFFFFFF 1769 1770#define R_028848_SQ_PGM_RESOURCES_2_PS 0x028848 1771#define S_028848_SINGLE_ROUND(x) (((unsigned)(x) & 0x3) << 0) 1772#define G_028848_SINGLE_ROUND(x) (((x) >> 0) & 0x3) 1773#define C_028848_SINGLE_ROUND 0xFFFFFFFC 1774#define S_028848_DOUBLE_ROUND(x) (((unsigned)(x) & 0x3) << 2) 1775#define G_028848_DOUBLE_ROUND(x) (((x) >> 2) & 0x3) 1776#define C_028848_DOUBLE_ROUND 0xFFFFFFF3 1777#define S_028848_ALLOW_SINGLE_DENORM_IN(x) (((unsigned)(x) & 0x1) << 4) 1778#define G_028848_ALLOW_SINGLE_DENORM_IN(x) (((x) >> 4) & 0x1) 1779#define C_028848_ALLOW_SINGLE_DENORM_IN 0xFFFFFFEF 1780#define S_028848_ALLOW_SINGLE_DENORM_OUT(x) (((unsigned)(x) & 0x1) << 5) 1781#define G_028848_ALLOW_SINGLE_DENORM_OUT(x) (((x) >> 5) & 0x1) 1782#define C_028848_ALLOW_SINGLE_DENORM_OUT 0xFFFFFFDF 1783#define S_028848_ALLOW_DOUBLE_DENORM_IN(x) (((unsigned)(x) & 0x1) << 6) 1784#define G_028848_ALLOW_DOUBLE_DENORM_IN(x) (((x) >> 6) & 0x1) 1785#define C_028848_ALLOW_DOUBLE_DENORM_IN 0xFFFFFFBF 1786#define S_028848_ALLOW_DOUBLE_DENORM_OUT(x) (((unsigned)(x) & 0x1) << 7) 1787#define G_028848_ALLOW_DOUBLE_DENORM_OUT(x) (((x) >> 7) & 0x1) 1788#define C_028848_ALLOW_DOUBLE_DENORM_OUT 0xFFFFFF7F 1789 1790#define R_0288BC_SQ_PGM_RESOURCES_HS 0x0288BC 1791#define S_0288BC_NUM_GPRS(x) (((unsigned)(x) & 0xFF) << 0) 1792#define G_0288BC_NUM_GPRS(x) (((x) >> 0) & 0xFF) 1793#define C_0288BC_NUM_GPRS 0xFFFFFF00 1794#define S_0288BC_STACK_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 1795#define G_0288BC_STACK_SIZE(x) (((x) >> 8) & 0xFF) 1796#define C_0288BC_STACK_SIZE 0xFFFF00FF 1797#define S_0288BC_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 1798#define G_0288BC_DX10_CLAMP(x) (((x) >> 21) & 0x1) 1799#define C_0288BC_DX10_CLAMP 0xFFDFFFFF 1800#define S_0288BC_PRIME_CACHE_ON_DRAW(x) (((unsigned)(x) & 0x1) << 23) 1801#define G_0288BC_PRIME_CACHE_ON_DRAW(x) (((x) >> 23) & 0x1) 1802#define C_028844_PRIME_CACHE_ON_DRAW 0xFF7FFFFF 1803#define S_0288BC_UNCACHED_FIRST_INST(x) (((unsigned)(x) & 0x1) << 28) 1804#define G_0288BC_UNCACHED_FIRST_INST(x) (((x) >> 28) & 0x1) 1805#define C_0288BC_UNCACHED_FIRST_INST 0xEFFFFFFF 1806 1807#define R_0288C0_SQ_PGM_RESOURCES_2_HS 0x0288c0 1808 1809#define R_0288D4_SQ_PGM_RESOURCES_LS 0x0288d4 1810#define S_0288D4_NUM_GPRS(x) (((unsigned)(x) & 0xFF) << 0) 1811#define G_0288D4_NUM_GPRS(x) (((x) >> 0) & 0xFF) 1812#define C_0288D4_NUM_GPRS 0xFFFFFF00 1813#define S_0288D4_STACK_SIZE(x) (((unsigned)(x) & 0xFF) << 8) 1814#define G_0288D4_STACK_SIZE(x) (((x) >> 8) & 0xFF) 1815#define C_0288D4_STACK_SIZE 0xFFFF00FF 1816#define S_0288D4_DX10_CLAMP(x) (((unsigned)(x) & 0x1) << 21) 1817#define G_0288D4_DX10_CLAMP(x) (((x) >> 21) & 0x1) 1818#define C_0288D4_DX10_CLAMP 0xFFDFFFFF 1819#define S_0288D4_PRIME_CACHE_ON_DRAW(x) (((unsigned)(x) & 0x1) << 23) 1820#define G_0288D4_PRIME_CACHE_ON_DRAW(x) (((x) >> 23) & 0x1) 1821#define S_0288D4_UNCACHED_FIRST_INST(x) (((unsigned)(x) & 0x1) << 28) 1822#define G_0288D4_UNCACHED_FIRST_INST(x) (((x) >> 28) & 0x1) 1823#define C_0288D4_UNCACHED_FIRST_INST 0xEFFFFFFF 1824 1825#define R_0288D8_SQ_PGM_RESOURCES_2_LS 0x0288d8 1826 1827#define R_028644_SPI_PS_INPUT_CNTL_0 0x028644 1828#define S_028644_SEMANTIC(x) (((unsigned)(x) & 0xFF) << 0) 1829#define G_028644_SEMANTIC(x) (((x) >> 0) & 0xFF) 1830#define C_028644_SEMANTIC 0xFFFFFF00 1831#define S_028644_DEFAULT_VAL(x) (((unsigned)(x) & 0x3) << 8) 1832#define G_028644_DEFAULT_VAL(x) (((x) >> 8) & 0x3) 1833#define C_028644_DEFAULT_VAL 0xFFFFFCFF 1834#define S_028644_FLAT_SHADE(x) (((unsigned)(x) & 0x1) << 10) 1835#define G_028644_FLAT_SHADE(x) (((x) >> 10) & 0x1) 1836#define C_028644_FLAT_SHADE 0xFFFFFBFF 1837#define S_028644_SEL_CENTROID(x) (((unsigned)(x) & 0x1) << 11) 1838#define G_028644_SEL_CENTROID(x) (((x) >> 11) & 0x1) 1839#define C_028644_SEL_CENTROID 0xFFFFF7FF 1840#define S_028644_SEL_LINEAR(x) (((unsigned)(x) & 0x1) << 12) 1841#define G_028644_SEL_LINEAR(x) (((x) >> 12) & 0x1) 1842#define C_028644_SEL_LINEAR 0xFFFFEFFF 1843#define S_028644_CYL_WRAP(x) (((unsigned)(x) & 0xF) << 13) 1844#define G_028644_CYL_WRAP(x) (((x) >> 13) & 0xF) 1845#define C_028644_CYL_WRAP 0xFFFE1FFF 1846#define S_028644_PT_SPRITE_TEX(x) (((unsigned)(x) & 0x1) << 17) 1847#define G_028644_PT_SPRITE_TEX(x) (((x) >> 17) & 0x1) 1848#define C_028644_PT_SPRITE_TEX 0xFFFDFFFF 1849#define S_028644_SEL_SAMPLE(x) (((unsigned)(x) & 0x1) << 18) 1850#define G_028644_SEL_SAMPLE(x) (((x) >> 18) & 0x1) 1851#define C_028644_SEL_SAMPLE 0xFFFBFFFF 1852#define R_0286D4_SPI_INTERP_CONTROL_0 0x0286D4 1853#define S_0286D4_FLAT_SHADE_ENA(x) (((unsigned)(x) & 0x1) << 0) 1854#define G_0286D4_FLAT_SHADE_ENA(x) (((x) >> 0) & 0x1) 1855#define C_0286D4_FLAT_SHADE_ENA 0xFFFFFFFE 1856#define S_0286D4_PNT_SPRITE_ENA(x) (((unsigned)(x) & 0x1) << 1) 1857#define G_0286D4_PNT_SPRITE_ENA(x) (((x) >> 1) & 0x1) 1858#define C_0286D4_PNT_SPRITE_ENA 0xFFFFFFFD 1859#define S_0286D4_PNT_SPRITE_OVRD_X(x) (((unsigned)(x) & 0x7) << 2) 1860#define G_0286D4_PNT_SPRITE_OVRD_X(x) (((x) >> 2) & 0x7) 1861#define C_0286D4_PNT_SPRITE_OVRD_X 0xFFFFFFE3 1862#define S_0286D4_PNT_SPRITE_OVRD_Y(x) (((unsigned)(x) & 0x7) << 5) 1863#define G_0286D4_PNT_SPRITE_OVRD_Y(x) (((x) >> 5) & 0x7) 1864#define C_0286D4_PNT_SPRITE_OVRD_Y 0xFFFFFF1F 1865#define S_0286D4_PNT_SPRITE_OVRD_Z(x) (((unsigned)(x) & 0x7) << 8) 1866#define G_0286D4_PNT_SPRITE_OVRD_Z(x) (((x) >> 8) & 0x7) 1867#define C_0286D4_PNT_SPRITE_OVRD_Z 0xFFFFF8FF 1868#define S_0286D4_PNT_SPRITE_OVRD_W(x) (((unsigned)(x) & 0x7) << 11) 1869#define G_0286D4_PNT_SPRITE_OVRD_W(x) (((x) >> 11) & 0x7) 1870#define C_0286D4_PNT_SPRITE_OVRD_W 0xFFFFC7FF 1871#define S_0286D4_PNT_SPRITE_TOP_1(x) (((unsigned)(x) & 0x1) << 14) 1872#define G_0286D4_PNT_SPRITE_TOP_1(x) (((x) >> 14) & 0x1) 1873#define C_0286D4_PNT_SPRITE_TOP_1 0xFFFFBFFF 1874 1875#define SQ_TEX_INST_LD 0x03 1876#define SQ_TEX_INST_GET_GRADIENTS_H 0x7 1877#define SQ_TEX_INST_GET_GRADIENTS_V 0x8 1878 1879#define SQ_TEX_INST_SAMPLE 0x10 1880#define SQ_TEX_INST_SAMPLE_L 0x11 1881#define SQ_TEX_INST_SAMPLE_C 0x18 1882 1883#define R_008A14_PA_CL_ENHANCE 0x00008A14 1884#define R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ 0x00008D8C 1885#define R_028000_DB_RENDER_CONTROL 0x00028000 1886#define S_028000_DEPTH_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 1887#define S_028000_STENCIL_CLEAR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 1888#define S_028000_DEPTH_COPY_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 1889#define S_028000_STENCIL_COPY_ENABLE(x) (((unsigned)(x) & 0x1) << 3) 1890#define S_028000_RESUMMARIZE_ENABLE(x) (((unsigned)(x) & 0x1) << 4) 1891#define S_028000_STENCIL_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 5) 1892#define S_028000_DEPTH_COMPRESS_DISABLE(x) (((unsigned)(x) & 0x1) << 6) 1893#define S_028000_COPY_CENTROID(x) (((unsigned)(x) & 0x1) << 7) 1894#define S_028000_COPY_SAMPLE(x) (((unsigned)(x) & 0x7) << 8) 1895#define S_028000_COLOR_DISABLE(x) (((unsigned)(x) & 0x1) << 12) 1896#define R_028004_DB_COUNT_CONTROL 0x00028004 1897#define S_028004_ZPASS_INCREMENT_DISABLE(x) (((unsigned)(x) & 0x1) << 0) 1898#define S_028004_PERFECT_ZPASS_COUNTS(x) (((unsigned)(x) & 0x1) << 1) 1899#define S_028004_SAMPLE_RATE(x) (((unsigned)(x) & 0x7) << 4) /* cayman only */ 1900#define R_028008_DB_DEPTH_VIEW 0x00028008 1901#define S_028008_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) 1902#define G_028008_SLICE_START(x) (((x) >> 0) & 0x7FF) 1903#define C_028008_SLICE_START 0xFFFFF800 1904#define S_028008_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) 1905#define G_028008_SLICE_MAX(x) (((x) >> 13) & 0x7FF) 1906#define C_028008_SLICE_MAX 0xFF001FFF 1907#define R_02800C_DB_RENDER_OVERRIDE 0x0002800C 1908#define V_02800C_FORCE_OFF 0 1909#define V_02800C_FORCE_ENABLE 1 1910#define V_02800C_FORCE_DISABLE 2 1911#define S_02800C_FORCE_HIZ_ENABLE(x) (((unsigned)(x) & 0x3) << 0) 1912#define G_02800C_FORCE_HIZ_ENABLE(x) (((x) >> 0) & 0x3) 1913#define C_02800C_FORCE_HIZ_ENABLE 0xFFFFFFFC 1914#define S_02800C_FORCE_HIS_ENABLE0(x) (((unsigned)(x) & 0x3) << 2) 1915#define G_02800C_FORCE_HIS_ENABLE0(x) (((x) >> 2) & 0x3) 1916#define C_02800C_FORCE_HIS_ENABLE0 0xFFFFFFF3 1917#define S_02800C_FORCE_HIS_ENABLE1(x) (((unsigned)(x) & 0x3) << 4) 1918#define G_02800C_FORCE_HIS_ENABLE1(x) (((x) >> 4) & 0x3) 1919#define C_02800C_FORCE_HIS_ENABLE1 0xFFFFFFCF 1920#define S_02800C_FORCE_SHADER_Z_ORDER(x) (((unsigned)(x) & 0x1) << 6) 1921#define G_02800C_FORCE_SHADER_Z_ORDER(x) (((x) >> 6) & 0x1) 1922#define C_02800C_FORCE_SHADER_Z_ORDER 0xFFFFFFBF 1923#define S_02800C_FAST_Z_DISABLE(x) (((unsigned)(x) & 0x1) << 7) 1924#define G_02800C_FAST_Z_DISABLE(x) (((x) >> 7) & 0x1) 1925#define C_02800C_FAST_Z_DISABLE 0xFFFFFF7F 1926#define S_02800C_FAST_STENCIL_DISABLE(x) (((unsigned)(x) & 0x1) << 8) 1927#define G_02800C_FAST_STENCIL_DISABLE(x) (((x) >> 8) & 0x1) 1928#define C_02800C_FAST_STENCIL_DISABLE 0xFFFFFEFF 1929#define S_02800C_NOOP_CULL_DISABLE(x) (((unsigned)(x) & 0x1) << 9) 1930#define G_02800C_NOOP_CULL_DISABLE(x) (((x) >> 9) & 0x1) 1931#define C_02800C_NOOP_CULL_DISABLE 0xFFFFFDFF 1932#define S_02800C_FORCE_COLOR_KILL(x) (((unsigned)(x) & 0x1) << 10) 1933#define G_02800C_FORCE_COLOR_KILL(x) (((x) >> 10) & 0x1) 1934#define C_02800C_FORCE_COLOR_KILL 0xFFFFFBFF 1935#define S_02800C_FORCE_Z_READ(x) (((unsigned)(x) & 0x1) << 11) 1936#define G_02800C_FORCE_Z_READ(x) (((x) >> 11) & 0x1) 1937#define C_02800C_FORCE_Z_READ 0xFFFFF7FF 1938#define S_02800C_FORCE_STENCIL_READ(x) (((unsigned)(x) & 0x1) << 12) 1939#define G_02800C_FORCE_STENCIL_READ(x) (((x) >> 12) & 0x1) 1940#define C_02800C_FORCE_STENCIL_READ 0xFFFFEFFF 1941#define S_02800C_FORCE_FULL_Z_RANGE(x) (((unsigned)(x) & 0x3) << 13) 1942#define G_02800C_FORCE_FULL_Z_RANGE(x) (((x) >> 13) & 0x3) 1943#define C_02800C_FORCE_FULL_Z_RANGE 0xFFFF9FFF 1944#define S_02800C_FORCE_QC_SMASK_CONFLICT(x) (((unsigned)(x) & 0x1) << 15) 1945#define G_02800C_FORCE_QC_SMASK_CONFLICT(x) (((x) >> 15) & 0x1) 1946#define C_02800C_FORCE_QC_SMASK_CONFLICT 0xFFFF7FFF 1947#define S_02800C_DISABLE_VIEWPORT_CLAMP(x) (((unsigned)(x) & 0x1) << 16) 1948#define G_02800C_DISABLE_VIEWPORT_CLAMP(x) (((x) >> 16) & 0x1) 1949#define C_02800C_DISABLE_VIEWPORT_CLAMP 0xFFFEFFFF 1950#define S_02800C_IGNORE_SC_ZRANGE(x) (((unsigned)(x) & 0x1) << 17) 1951#define G_02800C_IGNORE_SC_ZRANGE(x) (((x) >> 17) & 0x1) 1952#define C_02800C_IGNORE_SC_ZRANGE 0xFFFDFFFF 1953#define S_02800C_DISABLE_PIXEL_RATE_TILES(x) (((unsigned)(x) & 0x1) << 26) 1954#define G_02800C_DISABLE_PIXEL_RATE_TILES(x) (((x) >> 26) & 0x1) 1955#define C_02800C_DISABLE_PIXEL_RATE_TILES 0xFFFDFFFF 1956#define R_028010_DB_RENDER_OVERRIDE2 0x00028010 1957#define R_028014_DB_HTILE_DATA_BASE 0x00028014 1958#define R_028028_DB_STENCIL_CLEAR 0x00028028 1959#define R_02802C_DB_DEPTH_CLEAR 0x0002802C 1960#define R_028048_DB_Z_READ_BASE 0x00028048 1961#define R_02804C_DB_STENCIL_READ_BASE 0x0002804C 1962#define R_028050_DB_Z_WRITE_BASE 0x00028050 1963#define R_028054_DB_STENCIL_WRITE_BASE 0x00028054 1964#define R_028140_ALU_CONST_BUFFER_SIZE_PS_0 0x00028140 1965#define R_028144_ALU_CONST_BUFFER_SIZE_PS_1 0x00028144 1966#define R_028180_ALU_CONST_BUFFER_SIZE_VS_0 0x00028180 1967#define R_028184_ALU_CONST_BUFFER_SIZE_VS_1 0x00028184 1968#define R_0281C0_ALU_CONST_BUFFER_SIZE_GS_0 0x000281C0 1969#define R_028F80_ALU_CONST_BUFFER_SIZE_HS_0 0x00028F80 1970#define R_028FC0_ALU_CONST_BUFFER_SIZE_LS_0 0x00028FC0 1971#define R_028200_PA_SC_WINDOW_OFFSET 0x00028200 1972#define R_02820C_PA_SC_CLIPRECT_RULE 0x0002820C 1973#define R_028210_PA_SC_CLIPRECT_0_TL 0x00028210 1974#define R_028214_PA_SC_CLIPRECT_0_BR 0x00028214 1975#define R_028218_PA_SC_CLIPRECT_1_TL 0x00028218 1976#define R_02821C_PA_SC_CLIPRECT_1_BR 0x0002821C 1977#define R_028220_PA_SC_CLIPRECT_2_TL 0x00028220 1978#define R_028224_PA_SC_CLIPRECT_2_BR 0x00028224 1979#define R_028228_PA_SC_CLIPRECT_3_TL 0x00028228 1980#define R_02822C_PA_SC_CLIPRECT_3_BR 0x0002822C 1981#define R_028230_PA_SC_EDGERULE 0x00028230 1982#define R_028234_PA_SU_HARDWARE_SCREEN_OFFSET 0x00028234 1983#define R_028238_CB_TARGET_MASK 0x00028238 1984#define R_02823C_CB_SHADER_MASK 0x0002823C 1985#define R_028350_SX_MISC 0x00028350 1986#define S_028350_MULTIPASS(x) (((unsigned)(x) & 0x1) << 0) 1987#define G_028350_MULTIPASS(x) (((x) >> 0) & 0x1) 1988#define C_028350_MULTIPASS 0xFFFFFFFE 1989#define R_028354_SX_SURFACE_SYNC 0x00028354 1990#define S_028354_SURFACE_SYNC_MASK(x) (((unsigned)(x) & 0x1FF) << 0) 1991#define R_028380_SQ_VTX_SEMANTIC_0 0x00028380 1992#define R_028384_SQ_VTX_SEMANTIC_1 0x00028384 1993#define R_028388_SQ_VTX_SEMANTIC_2 0x00028388 1994#define R_02838C_SQ_VTX_SEMANTIC_3 0x0002838C 1995#define R_028390_SQ_VTX_SEMANTIC_4 0x00028390 1996#define R_028394_SQ_VTX_SEMANTIC_5 0x00028394 1997#define R_028398_SQ_VTX_SEMANTIC_6 0x00028398 1998#define R_02839C_SQ_VTX_SEMANTIC_7 0x0002839C 1999#define R_0283A0_SQ_VTX_SEMANTIC_8 0x000283A0 2000#define R_0283A4_SQ_VTX_SEMANTIC_9 0x000283A4 2001#define R_0283A8_SQ_VTX_SEMANTIC_10 0x000283A8 2002#define R_0283AC_SQ_VTX_SEMANTIC_11 0x000283AC 2003#define R_0283B0_SQ_VTX_SEMANTIC_12 0x000283B0 2004#define R_0283B4_SQ_VTX_SEMANTIC_13 0x000283B4 2005#define R_0283B8_SQ_VTX_SEMANTIC_14 0x000283B8 2006#define R_0283BC_SQ_VTX_SEMANTIC_15 0x000283BC 2007#define R_0283C0_SQ_VTX_SEMANTIC_16 0x000283C0 2008#define R_0283C4_SQ_VTX_SEMANTIC_17 0x000283C4 2009#define R_0283C8_SQ_VTX_SEMANTIC_18 0x000283C8 2010#define R_0283CC_SQ_VTX_SEMANTIC_19 0x000283CC 2011#define R_0283D0_SQ_VTX_SEMANTIC_20 0x000283D0 2012#define R_0283D4_SQ_VTX_SEMANTIC_21 0x000283D4 2013#define R_0283D8_SQ_VTX_SEMANTIC_22 0x000283D8 2014#define R_0283DC_SQ_VTX_SEMANTIC_23 0x000283DC 2015#define R_0283E0_SQ_VTX_SEMANTIC_24 0x000283E0 2016#define R_0283E4_SQ_VTX_SEMANTIC_25 0x000283E4 2017#define R_0283E8_SQ_VTX_SEMANTIC_26 0x000283E8 2018#define R_0283EC_SQ_VTX_SEMANTIC_27 0x000283EC 2019#define R_0283F0_SQ_VTX_SEMANTIC_28 0x000283F0 2020#define R_0283F4_SQ_VTX_SEMANTIC_29 0x000283F4 2021#define R_0283F8_SQ_VTX_SEMANTIC_30 0x000283F8 2022#define R_0283FC_SQ_VTX_SEMANTIC_31 0x000283FC 2023#define R_0288F0_SQ_VTX_SEMANTIC_CLEAR 0x000288F0 2024#define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 2025#define R_0282D4_PA_SC_VPORT_ZMAX_0 0x0282D4 2026#define R_028400_VGT_MAX_VTX_INDX 0x00028400 2027#define R_028404_VGT_MIN_VTX_INDX 0x00028404 2028#define R_028408_VGT_INDX_OFFSET 0x00028408 2029#define R_02840C_VGT_MULTI_PRIM_IB_RESET_INDX 0x0002840C 2030#define R_028414_CB_BLEND_RED 0x00028414 2031#define R_028418_CB_BLEND_GREEN 0x00028418 2032#define R_02841C_CB_BLEND_BLUE 0x0002841C 2033#define R_028420_CB_BLEND_ALPHA 0x00028420 2034#define R_028438_SX_ALPHA_REF 0x00028438 2035#define R_02843C_PA_CL_VPORT_XSCALE_0 0x0002843C 2036#define R_028440_PA_CL_VPORT_XOFFSET_0 0x00028440 2037#define R_028444_PA_CL_VPORT_YSCALE_0 0x00028444 2038#define R_028448_PA_CL_VPORT_YOFFSET_0 0x00028448 2039#define R_02844C_PA_CL_VPORT_ZSCALE_0 0x0002844C 2040#define R_028450_PA_CL_VPORT_ZOFFSET_0 0x00028450 2041#define R_0285BC_PA_CL_UCP0_X 0x000285BC 2042#define R_0285C0_PA_CL_UCP0_Y 0x000285C0 2043#define R_0285C4_PA_CL_UCP0_Z 0x000285C4 2044#define R_0285C8_PA_CL_UCP0_W 0x000285C8 2045#define R_0285CC_PA_CL_UCP1_X 0x000285CC 2046#define R_0285D0_PA_CL_UCP1_Y 0x000285D0 2047#define R_0285D4_PA_CL_UCP1_Z 0x000285D4 2048#define R_0285D8_PA_CL_UCP1_W 0x000285D8 2049#define R_0285DC_PA_CL_UCP2_X 0x000285DC 2050#define R_0285E0_PA_CL_UCP2_Y 0x000285E0 2051#define R_0285E4_PA_CL_UCP2_Z 0x000285E4 2052#define R_0285E8_PA_CL_UCP2_W 0x000285E8 2053#define R_0285EC_PA_CL_UCP3_X 0x000285EC 2054#define R_0285F0_PA_CL_UCP3_Y 0x000285F0 2055#define R_0285F4_PA_CL_UCP3_Z 0x000285F4 2056#define R_0285F8_PA_CL_UCP3_W 0x000285F8 2057#define R_0285FC_PA_CL_UCP4_X 0x000285FC 2058#define R_028600_PA_CL_UCP4_Y 0x00028600 2059#define R_028604_PA_CL_UCP4_Z 0x00028604 2060#define R_028608_PA_CL_UCP4_W 0x00028608 2061#define R_02860C_PA_CL_UCP5_X 0x0002860C 2062#define R_028610_PA_CL_UCP5_Y 0x00028610 2063#define R_028614_PA_CL_UCP5_Z 0x00028614 2064#define R_028618_PA_CL_UCP5_W 0x00028618 2065#define R_02861C_SPI_VS_OUT_ID_0 0x0002861C 2066#define R_028620_SPI_VS_OUT_ID_1 0x00028620 2067#define R_028624_SPI_VS_OUT_ID_2 0x00028624 2068#define R_028628_SPI_VS_OUT_ID_3 0x00028628 2069#define R_02862C_SPI_VS_OUT_ID_4 0x0002862C 2070#define R_028630_SPI_VS_OUT_ID_5 0x00028630 2071#define R_028634_SPI_VS_OUT_ID_6 0x00028634 2072#define R_028638_SPI_VS_OUT_ID_7 0x00028638 2073#define R_02863C_SPI_VS_OUT_ID_8 0x0002863C 2074#define R_028640_SPI_VS_OUT_ID_9 0x00028640 2075#define R_028648_SPI_PS_INPUT_CNTL_1 0x00028648 2076#define R_02864C_SPI_PS_INPUT_CNTL_2 0x0002864C 2077#define R_028650_SPI_PS_INPUT_CNTL_3 0x00028650 2078#define R_028654_SPI_PS_INPUT_CNTL_4 0x00028654 2079#define R_028658_SPI_PS_INPUT_CNTL_5 0x00028658 2080#define R_02865C_SPI_PS_INPUT_CNTL_6 0x0002865C 2081#define R_028660_SPI_PS_INPUT_CNTL_7 0x00028660 2082#define R_028664_SPI_PS_INPUT_CNTL_8 0x00028664 2083#define R_028668_SPI_PS_INPUT_CNTL_9 0x00028668 2084#define R_02866C_SPI_PS_INPUT_CNTL_10 0x0002866C 2085#define R_028670_SPI_PS_INPUT_CNTL_11 0x00028670 2086#define R_028674_SPI_PS_INPUT_CNTL_12 0x00028674 2087#define R_028678_SPI_PS_INPUT_CNTL_13 0x00028678 2088#define R_02867C_SPI_PS_INPUT_CNTL_14 0x0002867C 2089#define R_028680_SPI_PS_INPUT_CNTL_15 0x00028680 2090#define R_028684_SPI_PS_INPUT_CNTL_16 0x00028684 2091#define R_028688_SPI_PS_INPUT_CNTL_17 0x00028688 2092#define R_02868C_SPI_PS_INPUT_CNTL_18 0x0002868C 2093#define R_028690_SPI_PS_INPUT_CNTL_19 0x00028690 2094#define R_028694_SPI_PS_INPUT_CNTL_20 0x00028694 2095#define R_028698_SPI_PS_INPUT_CNTL_21 0x00028698 2096#define R_02869C_SPI_PS_INPUT_CNTL_22 0x0002869C 2097#define R_0286A0_SPI_PS_INPUT_CNTL_23 0x000286A0 2098#define R_0286A4_SPI_PS_INPUT_CNTL_24 0x000286A4 2099#define R_0286A8_SPI_PS_INPUT_CNTL_25 0x000286A8 2100#define R_0286AC_SPI_PS_INPUT_CNTL_26 0x000286AC 2101#define R_0286B0_SPI_PS_INPUT_CNTL_27 0x000286B0 2102#define R_0286B4_SPI_PS_INPUT_CNTL_28 0x000286B4 2103#define R_0286B8_SPI_PS_INPUT_CNTL_29 0x000286B8 2104#define R_0286BC_SPI_PS_INPUT_CNTL_30 0x000286BC 2105#define R_0286C0_SPI_PS_INPUT_CNTL_31 0x000286C0 2106#define R_0286C8_SPI_THREAD_GROUPING 0x000286C8 2107#define R_0286D8_SPI_INPUT_Z 0x000286D8 2108#define S_0286D8_PROVIDE_Z_TO_SPI(x) (((unsigned)(x) & 0x1) << 0) 2109#define R_0286DC_SPI_FOG_CNTL 0x000286DC 2110#define R_0286E4_SPI_PS_IN_CONTROL_2 0x000286E4 2111#define R_0286E8_SPI_COMPUTE_INPUT_CNTL 0x000286E8 2112#define S_0286E8_TID_IN_GROUP_ENA(x) (((unsigned)(x) & 0x1) << 0) 2113#define S_0286E8_TGID_ENA(x) (((unsigned)(x) & 0x1) << 1) 2114#define S_0286E8_DISABLE_INDEX_PACK(x) (((unsigned)(x) & 0x1) << 2) 2115#define R_028720_GDS_ADDR_BASE 0x00028720 2116#define R_028724_GDS_ADDR_SIZE 0x00028724 2117#define R_028728_GDS_ORDERED_WAVE_PER_SE 0x00028728 2118#define R_02872C_GDS_APPEND_COUNT_0 0x0002872C 2119#define R_028730_GDS_APPEND_COUNT_1 0x00028730 2120#define R_028734_GDS_APPEND_COUNT_2 0x00028734 2121#define R_028738_GDS_APPEND_COUNT_3 0x00028738 2122#define R_02873C_GDS_APPEND_COUNT_4 0x0002873C 2123#define R_028740_GDS_APPEND_COUNT_5 0x00028740 2124#define R_028748_GDS_APPEND_COUNT_6 0x00028744 2125#define R_028744_GDS_APPEND_COUNT_7 0x00028748 2126#define R_028744_GDS_APPEND_COUNT_8 0x0002874C 2127#define R_028744_GDS_APPEND_COUNT_9 0x00028750 2128#define R_028744_GDS_APPEND_COUNT_10 0x00028754 2129#define R_028744_GDS_APPEND_COUNT_11 0x00028758 2130 2131#define R_028784_CB_BLEND1_CONTROL 0x00028784 2132#define R_028788_CB_BLEND2_CONTROL 0x00028788 2133#define R_02878C_CB_BLEND3_CONTROL 0x0002878C 2134#define R_028790_CB_BLEND4_CONTROL 0x00028790 2135#define R_028794_CB_BLEND5_CONTROL 0x00028794 2136#define R_028798_CB_BLEND6_CONTROL 0x00028798 2137#define R_02879C_CB_BLEND7_CONTROL 0x0002879C 2138#define R_028818_PA_CL_VTE_CNTL 0x00028818 2139#define S_028818_VPORT_X_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 0) 2140#define G_028818_VPORT_X_SCALE_ENA(x) (((x) >> 0 & 0x1) 2141#define C_028818_VPORT_X_SCALE_ENA 0xFFFFFFFE 2142#define S_028818_VPORT_X_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 1) 2143#define G_028818_VPORT_X_OFFSET_ENA(x) (((x) >> 1 & 0x1) 2144#define C_028818_VPORT_X_OFFSET_ENA 0xFFFFFFFD 2145#define S_028818_VPORT_Y_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 2) 2146#define G_028818_VPORT_Y_SCALE_ENA(x) (((x) >> 2 & 0x1) 2147#define C_028818_VPORT_Y_SCALE_ENA 0xFFFFFFFB 2148#define S_028818_VPORT_Y_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 3) 2149#define G_028818_VPORT_Y_OFFSET_ENA(x) (((x) >> 3 & 0x1) 2150#define C_028818_VPORT_Y_OFFSET_ENA 0xFFFFFFF7 2151#define S_028818_VPORT_Z_SCALE_ENA(x) (((unsigned)(x) & 0x1) << 4) 2152#define G_028818_VPORT_Z_SCALE_ENA(x) (((x) >> 4 & 0x1) 2153#define C_028818_VPORT_Z_SCALE_ENA 0xFFFFFFEF 2154#define S_028818_VPORT_Z_OFFSET_ENA(x) (((unsigned)(x) & 0x1) << 5) 2155#define G_028818_VPORT_Z_OFFSET_ENA(x) (((x) >> 5 & 0x1) 2156#define C_028818_VPORT_Z_OFFSET_ENA 0xFFFFFFDF 2157#define S_028818_VTX_XY_FMT(x) (((unsigned)(x) & 0x1) << 8) 2158#define G_028818_VTX_XY_FMT(x) (((x) >> 8) & 0x1) 2159#define C_028818_VTX_XY_FMT 0xFFFFFEFF 2160#define S_028818_VTX_Z_FMT(x) (((unsigned)(x) & 0x1) << 9) 2161#define G_028818_VTX_Z_FMT(x) (((x) >> 9) & 0x1) 2162#define C_028818_VTX_Z_FMT 0xFFFFFDFF 2163#define S_028818_VTX_W0_FMT(x) (((unsigned)(x) & 0x1) << 10) 2164#define G_028818_VTX_W0_FMT(x) (((x) >> 10) & 0x1) 2165#define C_028818_VTX_W0_FMT 0xFFFFFBFF 2166 2167#define R_028820_PA_CL_NANINF_CNTL 0x00028820 2168#define R_028830_SQ_LSTMP_RING_ITEMSIZE 0x00028830 2169#define R_028838_SQ_DYN_GPR_RESOURCE_LIMIT_1 0x00028838 2170#define S_028838_PS_GPRS(x) (((unsigned)(x) & 0x1F) << 0) 2171#define S_028838_VS_GPRS(x) (((unsigned)(x) & 0x1F) << 5) 2172#define S_028838_GS_GPRS(x) (((unsigned)(x) & 0x1F) << 10) 2173#define S_028838_ES_GPRS(x) (((unsigned)(x) & 0x1F) << 15) 2174#define S_028838_HS_GPRS(x) (((unsigned)(x) & 0x1F) << 20) 2175#define S_028838_LS_GPRS(x) (((unsigned)(x) & 0x1F) << 25) 2176#define R_028840_SQ_PGM_START_PS 0x00028840 2177#define R_02884C_SQ_PGM_EXPORTS_PS 0x0002884C 2178#define S_02884C_EXPORT_COLORS(x) (((unsigned)(x) & 0xF) << 1) 2179#define G_02884C_EXPORT_COLORS(x) (((x) >> 1) & 0xF) 2180#define C_02884C_EXPORT_COLORS 0xFFFFFFE1 2181#define S_02884C_EXPORT_Z(x) (((unsigned)(x) & 0x1) << 0) 2182#define G_02884C_EXPORT_Z(x) (((x) >> 0) & 0x1) 2183#define C_02884C_EXPORT_Z 0xFFFFFFFE 2184#define R_02885C_SQ_PGM_START_VS 0x0002885C 2185#define R_028874_SQ_PGM_START_GS 0x00028874 2186#define R_02888C_SQ_PGM_START_ES 0x0002888C 2187#define R_0288A4_SQ_PGM_START_FS 0x000288A4 2188#define R_0288B8_SQ_PGM_START_HS 0x000288B8 2189#define R_0288D0_SQ_PGM_START_LS 0x000288D0 2190#define R_0288A8_SQ_PGM_RESOURCES_FS 0x000288A8 2191#define R_0288E8_SQ_LDS_ALLOC 0x000288E8 2192#define R_0288EC_SQ_LDS_ALLOC_PS 0x000288EC 2193#define R_028900_SQ_ESGS_RING_ITEMSIZE 0x00028900 2194#define R_028904_SQ_GSVS_RING_ITEMSIZE 0x00028904 2195#define R_008C50_SQ_ESTMP_RING_BASE 0x00008C50 2196#define R_028908_SQ_ESTMP_RING_ITEMSIZE 0x00028908 2197#define R_008C54_SQ_ESTMP_RING_SIZE 0x00008C54 2198#define R_008C58_SQ_GSTMP_RING_BASE 0x00008C58 2199#define R_02890C_SQ_GSTMP_RING_ITEMSIZE 0x0002890C 2200#define R_008C5C_SQ_GSTMP_RING_SIZE 0x00008C5C 2201#define R_008C60_SQ_VSTMP_RING_BASE 0x00008C60 2202#define R_028910_SQ_VSTMP_RING_ITEMSIZE 0x00028910 2203#define R_008C64_SQ_VSTMP_RING_SIZE 0x00008C64 2204#define R_008C68_SQ_PSTMP_RING_BASE 0x00008C68 2205#define R_028914_SQ_PSTMP_RING_ITEMSIZE 0x00028914 2206#define R_008C6C_SQ_PSTMP_RING_SIZE 0x00008C6C 2207#define R_008E10_SQ_LSTMP_RING_BASE 0x00008E10 2208#define R_028830_SQ_LSTMP_RING_ITEMSIZE 0x00028830 2209#define R_008E14_SQ_LSTMP_RING_SIZE 0x00008E14 2210#define R_008E18_SQ_HSTMP_RING_BASE 0x00008E18 2211#define R_028834_SQ_HSTMP_RING_ITEMSIZE 0x00028834 2212#define R_008E1C_SQ_HSTMP_RING_SIZE 0x00008E1C 2213#define R_02891C_SQ_GS_VERT_ITEMSIZE 0x0002891C 2214#define R_028920_SQ_GS_VERT_ITEMSIZE_1 0x00028920 2215#define R_028924_SQ_GS_VERT_ITEMSIZE_2 0x00028924 2216#define R_028928_SQ_GS_VERT_ITEMSIZE_3 0x00028928 2217#define R_02892C_SQ_GSVS_RING_OFFSET_1 0x0002892C 2218#define R_028930_SQ_GSVS_RING_OFFSET_2 0x00028930 2219#define R_028934_SQ_GSVS_RING_OFFSET_3 0x00028934 2220#define R_028940_ALU_CONST_CACHE_PS_0 0x00028940 2221#define R_028944_ALU_CONST_CACHE_PS_1 0x00028944 2222#define R_028980_ALU_CONST_CACHE_VS_0 0x00028980 2223#define R_028984_ALU_CONST_CACHE_VS_1 0x00028984 2224#define R_0289C0_ALU_CONST_CACHE_GS_0 0x000289C0 2225#define R_028F00_ALU_CONST_CACHE_HS_0 0x00028F00 2226#define R_028F40_ALU_CONST_CACHE_LS_0 0x00028F40 2227#define R_028A04_PA_SU_POINT_MINMAX 0x00028A04 2228#define S_028A04_MIN_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 2229#define G_028A04_MIN_SIZE(x) (((x) >> 0) & 0xFFFF) 2230#define C_028A04_MIN_SIZE 0xFFFF0000 2231#define S_028A04_MAX_SIZE(x) (((unsigned)(x) & 0xFFFF) << 16) 2232#define G_028A04_MAX_SIZE(x) (((x) >> 16) & 0xFFFF) 2233#define C_028A04_MAX_SIZE 0x0000FFFF 2234#define R_028A08_PA_SU_LINE_CNTL 0x00028A08 2235#define S_028A08_WIDTH(x) (((unsigned)(x) & 0xFFFF) << 0) 2236#define G_028A08_WIDTH(x) (((x) >> 0) & 0xFFFF) 2237#define C_028A08_WIDTH 0xFFFF0000 2238#define R_028A10_VGT_OUTPUT_PATH_CNTL 0x00028A10 2239#define R_028A14_VGT_HOS_CNTL 0x00028A14 2240#define R_028A18_VGT_HOS_MAX_TESS_LEVEL 0x00028A18 2241#define R_028A1C_VGT_HOS_MIN_TESS_LEVEL 0x00028A1C 2242#define R_028A20_VGT_HOS_REUSE_DEPTH 0x00028A20 2243#define R_028A24_VGT_GROUP_PRIM_TYPE 0x00028A24 2244#define R_028A28_VGT_GROUP_FIRST_DECR 0x00028A28 2245#define R_028A2C_VGT_GROUP_DECR 0x00028A2C 2246#define R_028A30_VGT_GROUP_VECT_0_CNTL 0x00028A30 2247#define R_028A34_VGT_GROUP_VECT_1_CNTL 0x00028A34 2248#define R_028A38_VGT_GROUP_VECT_0_FMT_CNTL 0x00028A38 2249#define R_028A3C_VGT_GROUP_VECT_1_FMT_CNTL 0x00028A3C 2250#define R_028A48_PA_SC_MODE_CNTL_0 0x00028A48 2251#define S_028A48_MSAA_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 2252#define S_028A48_VPORT_SCISSOR_ENABLE(x) (((unsigned)(x) & 0x1) << 1) 2253#define S_028A48_LINE_STIPPLE_ENABLE(x) (((unsigned)(x) & 0x1) << 2) 2254#define R_028A4C_PA_SC_MODE_CNTL_1 0x00028A4C 2255 2256#define R_028A54_GS_PER_ES 0x00028A54 2257#define R_028A58_ES_PER_GS 0x00028A58 2258#define R_028A5C_GS_PER_VS 0x00028A5C 2259 2260#define R_028A84_VGT_PRIMITIVEID_EN 0x028A84 2261#define S_028A84_PRIMITIVEID_EN(x) (((unsigned)(x) & 0x1) << 0) 2262#define G_028A84_PRIMITIVEID_EN(x) (((x) >> 0) & 0x1) 2263#define C_028A84_PRIMITIVEID_EN 0xFFFFFFFE 2264#define R_028A94_VGT_MULTI_PRIM_IB_RESET_EN 0x00028A94 2265#define S_028A94_RESET_EN(x) (((unsigned)(x) & 0x1) << 0) 2266#define G_028A94_RESET_EN(x) (((x) >> 0) & 0x1) 2267#define C_028A94_RESET_EN 0xFFFFFFFE 2268#define R_028AB4_VGT_REUSE_OFF 0x00028AB4 2269#define R_028AB8_VGT_VTX_CNT_EN 0x00028AB8 2270#define R_028AC0_DB_SRESULTS_COMPARE_STATE0 0x00028AC0 2271#define R_028AC4_DB_SRESULTS_COMPARE_STATE1 0x00028AC4 2272#define R_028AC8_DB_PRELOAD_CONTROL 0x00028AC8 2273#define S_028AC8_MAX_X(x) (((unsigned)(x) & 0xff) << 16) 2274#define S_028AC8_MAX_Y(x) (((unsigned)(x) & 0xff) << 24) 2275#define R_028AD0_VGT_STRMOUT_BUFFER_SIZE_0 0x028AD0 2276#define R_028AD4_VGT_STRMOUT_VTX_STRIDE_0 0x028AD4 2277#define R_028AD8_VGT_STRMOUT_BUFFER_BASE_0 0x028AD8 2278#define R_028ADC_VGT_STRMOUT_BUFFER_OFFSET_0 0x028ADC 2279#define R_028AE0_VGT_STRMOUT_BUFFER_SIZE_1 0x028AE0 2280#define R_028AE4_VGT_STRMOUT_VTX_STRIDE_1 0x028AE4 2281#define R_028AE8_VGT_STRMOUT_BUFFER_BASE_1 0x028AE8 2282#define R_028AEC_VGT_STRMOUT_BUFFER_OFFSET_1 0x028AEC 2283#define R_028AF0_VGT_STRMOUT_BUFFER_SIZE_2 0x028AF0 2284#define R_028AF4_VGT_STRMOUT_VTX_STRIDE_2 0x028AF4 2285#define R_028AF8_VGT_STRMOUT_BUFFER_BASE_2 0x028AF8 2286#define R_028AFC_VGT_STRMOUT_BUFFER_OFFSET_2 0x028AFC 2287#define R_028B00_VGT_STRMOUT_BUFFER_SIZE_3 0x028B00 2288#define R_028B04_VGT_STRMOUT_VTX_STRIDE_3 0x028B04 2289#define R_028B08_VGT_STRMOUT_BUFFER_BASE_3 0x028B08 2290#define R_028B0C_VGT_STRMOUT_BUFFER_OFFSET_3 0x028B0C 2291#define R_028B10_VGT_STRMOUT_BASE_OFFSET_0 0x028B10 2292#define R_028B14_VGT_STRMOUT_BASE_OFFSET_1 0x028B14 2293#define R_028B18_VGT_STRMOUT_BASE_OFFSET_2 0x028B18 2294#define R_028B1C_VGT_STRMOUT_BASE_OFFSET_3 0x028B1C 2295#define R_028B28_VGT_STRMOUT_DRAW_OPAQUE_OFFSET 0x028B28 2296#define R_028B2C_VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE 0x028B2C 2297#define R_028B30_VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE 0x028B30 2298#define R_028B38_VGT_GS_MAX_VERT_OUT 0x028B38 2299#define S_028B38_MAX_VERT_OUT(x) (((unsigned)(x) & 0x7FF) << 0) 2300#define R_028B44_VGT_STRMOUT_BASE_OFFSET_HI_0 0x028B44 2301#define R_028B48_VGT_STRMOUT_BASE_OFFSET_HI_1 0x028B48 2302#define R_028B4C_VGT_STRMOUT_BASE_OFFSET_HI_2 0x028B4C 2303#define R_028B50_VGT_STRMOUT_BASE_OFFSET_HI_3 0x028B50 2304#define R_028B54_VGT_SHADER_STAGES_EN 0x00028B54 2305#define S_028B54_LS_EN(x) (((unsigned)(x) & 0x3) << 0) 2306#define V_028B54_LS_STAGE_OFF 0x00 2307#define V_028B54_LS_STAGE_ON 0x01 2308#define V_028B54_CS_STAGE_ON 0x02 2309#define S_028B54_HS_EN(x) (((unsigned)(x) & 0x1) << 2) 2310#define S_028B54_ES_EN(x) (((unsigned)(x) & 0x3) << 3) 2311#define V_028B54_ES_STAGE_OFF 0x00 2312#define V_028B54_ES_STAGE_DS 0x01 2313#define V_028B54_ES_STAGE_REAL 0x02 2314#define S_028B54_GS_EN(x) (((unsigned)(x) & 0x1) << 5) 2315#define S_028B54_VS_EN(x) (((unsigned)(x) & 0x3) << 6) 2316#define V_028B54_VS_STAGE_REAL 0x00 2317#define V_028B54_VS_STAGE_DS 0x01 2318#define V_028B54_VS_STAGE_COPY_SHADER 0x02 2319#define R_028B58_VGT_LS_HS_CONFIG 0x00028B58 2320#define S_028B58_NUM_PATCHES(x) (((unsigned)(x) & 0xFF) << 0) 2321#define G_028B58_NUM_PATCHES(x) (((x) >> 0) & 0xFF) 2322#define C_028B58_NUM_PATCHES 0xFFFFFF00 2323#define S_028B58_HS_NUM_INPUT_CP(x) (((unsigned)(x) & 0x3F) << 8) 2324#define G_028B58_HS_NUM_INPUT_CP(x) (((x) >> 8) & 0x3F) 2325#define C_028B58_HS_NUM_INPUT_CP 0xFFFFC0FF 2326#define S_028B58_HS_NUM_OUTPUT_CP(x) (((unsigned)(x) & 0x3F) << 14) 2327#define G_028B58_HS_NUM_OUTPUT_CP(x) (((x) >> 14) & 0x3F) 2328#define C_028B58_HS_NUM_OUTPUT_CP 0xFFF03FFF 2329#define R_028B5C_VGT_LS_SIZE 0x00028B5C 2330#define S_028B5C_SIZE(x) (((unsigned)(x) & 0xFF) << 0) 2331#define G_028B5C_SIZE(x) (((x) >> 0) & 0xFF) 2332#define C_028B5C_SIZE 0xFFFFFF00 2333#define S_028B5C_PATCH_CP_SIZE(x) (((unsigned)(x) & 0x1FFF) << 8) 2334#define G_028B5C_PATCH_CP_SIZE(x) (((x) >> 8) & 0x1FFF) 2335#define C_028B5C_PATCH_CP_SIZE 0xFFE000FF 2336#define R_028B60_VGT_HS_SIZE 0x00028B60 2337#define S_028B60_SIZE(x) (((unsigned)(x) & 0xFF) << 0) 2338#define G_028B60_SIZE(x) (((x) >> 0) & 0xFF) 2339#define C_028B60_SIZE 0xFFFFFF00 2340#define S_028B60_PATCH_CP_SIZE(x) (((unsigned)(x) & 0x1FFF) << 8) 2341#define G_028B60_PATCH_CP_SIZE(x) (((x) >> 8) & 0x1FFF) 2342#define C_028B60_PATCH_CP_SIZE 0xFFE000FF 2343#define R_028B64_VGT_LS_HS_ALLOC 0x00028B64 2344#define S_028B64_HS_TOTAL_OUTPUT(x) (((unsigned)(x) & 0x1FFF) << 0) 2345#define G_028B64_HS_TOTAL_OUTPUT(x) (((x) >> 0) & 0x1FFF) 2346#define C_028B64_HS_TOTAL_OUTPUT 0xFFFFE000 2347#define S_028B64_LS_HS_TOTAL_OUTPUT(x) (((unsigned)(x) & 0x1FFF) << 13) 2348#define G_028B64_LS_HS_TOTAL_OUTPUT(x) (((x) >> 13) & 0x1FFF) 2349#define C_028B64_LS_HS_TOTAL_OUTPUT 0xFC001FFF 2350#define R_028B68_VGT_HS_PATCH_CONST 0x00028B68 2351#define S_028B68_SIZE(x) (((unsigned)(x) & 0x1FFF) << 0) 2352#define G_028B68_SIZE(x) (((x) >> 0) & 0x1FFF) 2353#define C_028B68_SIZE 0xFFFFE000 2354#define S_028B68_STRIDE(x) (((unsigned)(x) & 0x1FFF) << 13) 2355#define G_028B68_STRIDE(x) (((x) >> 13) & 0x1FFF) 2356#define C_028B68_STRIDE 0xFC001FFF 2357#define R_028B70_DB_ALPHA_TO_MASK 0x00028B70 2358#define S_028B70_ALPHA_TO_MASK_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 2359#define S_028B70_ALPHA_TO_MASK_OFFSET0(x) (((unsigned)(x) & 0x3) << 8) 2360#define S_028B70_ALPHA_TO_MASK_OFFSET1(x) (((unsigned)(x) & 0x3) << 10) 2361#define S_028B70_ALPHA_TO_MASK_OFFSET2(x) (((unsigned)(x) & 0x3) << 12) 2362#define S_028B70_ALPHA_TO_MASK_OFFSET3(x) (((unsigned)(x) & 0x3) << 14) 2363#define S_028B70_OFFSET_ROUND(x) (((unsigned)(x) & 0x1) << 16) 2364#define R_028B78_PA_SU_POLY_OFFSET_DB_FMT_CNTL 0x00028B78 2365#define S_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((unsigned)(x) & 0xFF) << 0) 2366#define G_028B78_POLY_OFFSET_NEG_NUM_DB_BITS(x) (((x) >> 0) & 0xFF) 2367#define C_028B78_POLY_OFFSET_NEG_NUM_DB_BITS 0xFFFFFF00 2368#define S_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((unsigned)(x) & 0x1) << 8) 2369#define G_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT(x) (((x) >> 8) & 0x1) 2370#define C_028B78_POLY_OFFSET_DB_IS_FLOAT_FMT 0xFFFFFEFF 2371#define R_028B7C_PA_SU_POLY_OFFSET_CLAMP 0x00028B7C 2372#define R_028B80_PA_SU_POLY_OFFSET_FRONT_SCALE 0x00028B80 2373#define S_028B80_SCALE(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 2374#define G_028B80_SCALE(x) (((x) >> 0) & 0xFFFFFFFF) 2375#define C_028B80_SCALE 0x00000000 2376#define R_028B84_PA_SU_POLY_OFFSET_FRONT_OFFSET 0x00028B84 2377#define S_028B84_OFFSET(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 2378#define G_028B84_OFFSET(x) (((x) >> 0) & 0xFFFFFFFF) 2379#define C_028B84_OFFSET 0x00000000 2380#define R_028B88_PA_SU_POLY_OFFSET_BACK_SCALE 0x00028B88 2381#define S_028B88_SCALE(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 2382#define G_028B88_SCALE(x) (((x) >> 0) & 0xFFFFFFFF) 2383#define C_028B88_SCALE 0x00000000 2384#define R_028B8C_PA_SU_POLY_OFFSET_BACK_OFFSET 0x00028B8C 2385#define S_028B8C_OFFSET(x) (((unsigned)(x) & 0xFFFFFFFF) << 0) 2386#define G_028B8C_OFFSET(x) (((x) >> 0) & 0xFFFFFFFF) 2387#define C_028B8C_OFFSET 0x00000000 2388#define R_028B90_VGT_GS_INSTANCE_CNT 0x00028B90 2389#define S_028B90_ENABLE(x) (((unsigned)(x) & 0x1) << 0) 2390#define S_028B90_CNT(x) (((unsigned)(x) & 0x7F) << 2) 2391#define R_028B98_VGT_STRMOUT_BUFFER_CONFIG 0x028B98 2392#define S_028B98_STREAM_0_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 0) 2393#define S_028B98_STREAM_1_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 4) 2394#define S_028B98_STREAM_2_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 8) 2395#define S_028B98_STREAM_3_BUFFER_EN(x) (((unsigned)(x) & 0x0F) << 12) 2396#define R_028B9C_CB_IMMED0_BASE 0x00028B9C 2397#define R_028BA0_CB_IMMED1_BASE 0x00028BA0 2398#define R_028BA4_CB_IMMED2_BASE 0x00028BA4 2399#define R_028BA4_CB_IMMED3_BASE 0x00028BA8 2400#define R_028BA4_CB_IMMED4_BASE 0x00028BAC 2401#define R_028BA4_CB_IMMED5_BASE 0x00028BB0 2402#define R_028BA4_CB_IMMED6_BASE 0x00028BB4 2403#define R_028BA4_CB_IMMED7_BASE 0x00028BB8 2404#define R_028BA4_CB_IMMED8_BASE 0x00028BBC 2405#define R_028BA4_CB_IMMED9_BASE 0x00028BC0 2406#define R_028BA4_CB_IMMED10_BASE 0x00028BC4 2407#define R_028BA4_CB_IMMED11_BASE 0x00028BC8 2408#define R_028C00_PA_SC_LINE_CNTL 0x00028C00 2409#define S_028C00_EXPAND_LINE_WIDTH(x) (((unsigned)(x) & 0x1) << 9) 2410#define G_028C00_EXPAND_LINE_WIDTH(x) (((x) >> 9) & 0x1) 2411#define C_028C00_EXPAND_LINE_WIDTH 0xFFFFFDFF 2412#define S_028C00_LAST_PIXEL(x) (((unsigned)(x) & 0x1) << 10) 2413#define G_028C00_LAST_PIXEL(x) (((x) >> 10) & 0x1) 2414#define C_028C00_LAST_PIXEL 0xFFFFFBFF 2415#define R_028C04_PA_SC_AA_CONFIG 0x00028C04 2416#define S_028C04_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x3) << 0) 2417#define S_028C04_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) 2418#define S_028C04_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0xf) << 13) 2419#define R_028C08_PA_SU_VTX_CNTL 0x00028C08 2420#define S_028C08_PIX_CENTER_HALF(x) (((unsigned)(x) & 0x1) << 0) 2421#define G_028C08_PIX_CENTER_HALF(x) (((x) >> 0) & 0x1) 2422#define C_028C08_PIX_CENTER_HALF 0xFFFFFFFE 2423#define S_028C08_QUANT_MODE(x) (((unsigned)(x) & 0x7) << 3) 2424#define G_028C08_QUANT_MODE(x) (((x) >> 3) & 0x7) 2425#define C_028C08_QUANT_MODE 0xFFFFFFC7 2426#define V_028C08_X_1_16TH 0x00 2427#define V_028C08_X_1_8TH 0x01 2428#define V_028C08_X_1_4TH 0x02 2429#define V_028C08_X_1_2 0x03 2430#define V_028C08_X_1 0x04 2431#define V_028C08_X_1_256TH 0x05 2432#define V_028C08_X_1_1024TH 0x06 2433#define V_028C08_X_1_4096TH 0x07 2434#define R_028C0C_PA_CL_GB_VERT_CLIP_ADJ 0x00028C0C 2435#define R_028C10_PA_CL_GB_VERT_DISC_ADJ 0x00028C10 2436#define R_028C14_PA_CL_GB_HORZ_CLIP_ADJ 0x00028C14 2437#define R_028C18_PA_CL_GB_HORZ_DISC_ADJ 0x00028C18 2438#define R_028C1C_PA_SC_AA_SAMPLE_LOCS_0 0x00028C1C 2439#define R_028C20_PA_SC_AA_SAMPLE_LOCS_1 0x00028C20 2440#define R_028C24_PA_SC_AA_SAMPLE_LOCS_2 0x00028C24 2441#define R_028C28_PA_SC_AA_SAMPLE_LOCS_3 0x00028C28 2442#define R_028C2C_PA_SC_AA_SAMPLE_LOCS_4 0x00028C2C 2443#define R_028C30_PA_SC_AA_SAMPLE_LOCS_5 0x00028C30 2444#define R_028C34_PA_SC_AA_SAMPLE_LOCS_6 0x00028C34 2445#define R_028C38_PA_SC_AA_SAMPLE_LOCS_7 0x00028C38 2446#define R_028C3C_PA_SC_AA_MASK 0x00028C3C 2447#define R_028C60_CB_COLOR0_BASE 0x00028C60 2448#define R_028C6C_CB_COLOR0_VIEW 0x00028C6C 2449#define S_028C6C_SLICE_START(x) (((unsigned)(x) & 0x7FF) << 0) 2450#define G_028C6C_SLICE_START(x) (((x) >> 0) & 0x7FF) 2451#define C_028C6C_SLICE_START 0xFFFFF800 2452#define S_028C6C_SLICE_MAX(x) (((unsigned)(x) & 0x7FF) << 13) 2453#define G_028C6C_SLICE_MAX(x) (((x) >> 13) & 0x7FF) 2454#define C_028C6C_SLICE_MAX 0xFF001FFF 2455#define R_028C7C_CB_COLOR0_CMASK 0x028C7C 2456#define R_028C80_CB_COLOR0_CMASK_SLICE 0x028C80 2457#define S_028C80_TILE_MAX(x) (((unsigned)(x) & 0x3FFF) << 0) 2458#define R_028C84_CB_COLOR0_FMASK 0x028C84 2459#define R_028C88_CB_COLOR0_FMASK_SLICE 0x028C88 2460#define S_028C88_TILE_MAX(x) (((unsigned)(x) & 0x3FFFFF) << 0) 2461#define R_028C8C_CB_COLOR0_CLEAR_WORD0 0x028C8C 2462#define R_028C90_CB_COLOR0_CLEAR_WORD1 0x028C90 2463#define R_028C94_CB_COLOR0_CLEAR_WORD2 0x028C94 2464#define R_028C98_CB_COLOR0_CLEAR_WORD3 0x028C98 2465#define R_028C9C_CB_COLOR1_BASE 0x00028C9C 2466#define R_028CA0_CB_COLOR1_PITCH 0x00028CA0 2467#define R_028CA4_CB_COLOR1_SLICE 0x00028CA4 2468#define R_028CA8_CB_COLOR1_VIEW 0x00028CA8 2469#define R_028CAC_CB_COLOR1_INFO 0x00028CAC 2470#define R_028CB0_CB_COLOR1_ATTRIB 0x00028CB0 2471#define R_028CB4_CB_COLOR1_DIM 0x00028CB4 2472#define R_028CB8_CB_COLOR1_CMASK 0x028CB8 2473#define R_028CBC_CB_COLOR1_CMASK_SLICE 0x028CBC 2474#define R_028CC0_CB_COLOR1_FMASK 0x028CC0 2475#define R_028CC4_CB_COLOR1_FMASK_SLICE 0x028CC4 2476#define R_028CC8_CB_COLOR1_CLEAR_WORD0 0x028CC8 2477#define R_028CCC_CB_COLOR1_CLEAR_WORD1 0x028CCC 2478#define R_028CD0_CB_COLOR1_CLEAR_WORD2 0x028CD0 2479#define R_028CD4_CB_COLOR1_CLEAR_WORD3 0x028CD4 2480#define R_028CD8_CB_COLOR2_BASE 0x00028CD8 2481#define R_028CDC_CB_COLOR2_PITCH 0x00028CDC 2482#define R_028CE0_CB_COLOR2_SLICE 0x00028CE0 2483#define R_028CE4_CB_COLOR2_VIEW 0x00028CE4 2484#define R_028CE8_CB_COLOR2_INFO 0x00028CE8 2485#define R_028CEC_CB_COLOR2_ATTRIB 0x00028CEC 2486#define R_028CF0_CB_COLOR2_DIM 0x00028CF0 2487#define R_028CF4_CB_COLOR2_CMASK 0x028CF4 2488#define R_028CF8_CB_COLOR2_CMASK_SLICE 0x028CF8 2489#define R_028CFC_CB_COLOR2_FMASK 0x028CFC 2490#define R_028D00_CB_COLOR2_FMASK_SLICE 0x028D00 2491#define R_028D04_CB_COLOR2_CLEAR_WORD0 0x028D04 2492#define R_028D08_CB_COLOR2_CLEAR_WORD1 0x028D08 2493#define R_028D0C_CB_COLOR2_CLEAR_WORD2 0x028D0C 2494#define R_028D10_CB_COLOR2_CLEAR_WORD3 0x028D10 2495#define R_028D14_CB_COLOR3_BASE 0x00028D14 2496#define R_028D18_CB_COLOR3_PITCH 0x00028D18 2497#define R_028D1C_CB_COLOR3_SLICE 0x00028D1C 2498#define R_028D20_CB_COLOR3_VIEW 0x00028D20 2499#define R_028D24_CB_COLOR3_INFO 0x00028D24 2500#define R_028D28_CB_COLOR3_ATTRIB 0x00028D28 2501#define R_028D2C_CB_COLOR3_DIM 0x00028D2C 2502#define R_028D30_CB_COLOR3_CMASK 0x028D30 2503#define R_028D34_CB_COLOR3_CMASK_SLICE 0x028D34 2504#define R_028D38_CB_COLOR3_FMASK 0x028D38 2505#define R_028D3C_CB_COLOR3_FMASK_SLICE 0x028D3C 2506#define R_028D40_CB_COLOR3_CLEAR_WORD0 0x028D40 2507#define R_028D44_CB_COLOR3_CLEAR_WORD1 0x028D44 2508#define R_028D48_CB_COLOR3_CLEAR_WORD2 0x028D48 2509#define R_028D4C_CB_COLOR3_CLEAR_WORD3 0x028D4C 2510#define R_028D50_CB_COLOR4_BASE 0x00028D50 2511#define R_028D54_CB_COLOR4_PITCH 0x00028D54 2512#define R_028D58_CB_COLOR4_SLICE 0x00028D58 2513#define R_028D5C_CB_COLOR4_VIEW 0x00028D5C 2514#define R_028D60_CB_COLOR4_INFO 0x00028D60 2515#define R_028D64_CB_COLOR4_ATTRIB 0x00028D64 2516#define R_028D68_CB_COLOR4_DIM 0x00028D68 2517#define R_028D6C_CB_COLOR4_CMASK 0x028D6C 2518#define R_028D70_CB_COLOR4_CMASK_SLICE 0x028D70 2519#define R_028D74_CB_COLOR4_FMASK 0x028D74 2520#define R_028D78_CB_COLOR4_FMASK_SLICE 0x028D78 2521#define R_028D7C_CB_COLOR4_CLEAR_WORD0 0x028D7C 2522#define R_028D80_CB_COLOR4_CLEAR_WORD1 0x028D80 2523#define R_028D84_CB_COLOR4_CLEAR_WORD2 0x028D84 2524#define R_028D88_CB_COLOR4_CLEAR_WORD3 0x028D88 2525#define R_028D8C_CB_COLOR5_BASE 0x00028D8C 2526#define R_028D90_CB_COLOR5_PITCH 0x00028D90 2527#define R_028D94_CB_COLOR5_SLICE 0x00028D94 2528#define R_028D98_CB_COLOR5_VIEW 0x00028D98 2529#define R_028D9C_CB_COLOR5_INFO 0x00028D9C 2530#define R_028DA0_CB_COLOR5_ATTRIB 0x00028DA0 2531#define R_028DA4_CB_COLOR5_DIM 0x00028DA4 2532#define R_028DA8_CB_COLOR5_CMASK 0x028DA8 2533#define R_028DAC_CB_COLOR5_CMASK_SLICE 0x028DAC 2534#define R_028DB0_CB_COLOR5_FMASK 0x028DB0 2535#define R_028DB4_CB_COLOR5_FMASK_SLICE 0x028DB4 2536#define R_028DB8_CB_COLOR5_CLEAR_WORD0 0x028DB8 2537#define R_028DBC_CB_COLOR5_CLEAR_WORD1 0x028DBC 2538#define R_028DC0_CB_COLOR5_CLEAR_WORD2 0x028DC0 2539#define R_028DC4_CB_COLOR5_CLEAR_WORD3 0x028DC4 2540#define R_028DC8_CB_COLOR6_BASE 0x00028DC8 2541#define R_028DCC_CB_COLOR6_PITCH 0x00028DCC 2542#define R_028DD0_CB_COLOR6_SLICE 0x00028DD0 2543#define R_028DD4_CB_COLOR6_VIEW 0x00028DD4 2544#define R_028DD8_CB_COLOR6_INFO 0x00028DD8 2545#define R_028DDC_CB_COLOR6_ATTRIB 0x00028DDC 2546#define R_028DE0_CB_COLOR6_DIM 0x00028DE0 2547#define R_028DE4_CB_COLOR6_CMASK 0x028DE4 2548#define R_028DE8_CB_COLOR6_CMASK_SLICE 0x028DE8 2549#define R_028DEC_CB_COLOR6_FMASK 0x028DEC 2550#define R_028DF0_CB_COLOR6_FMASK_SLICE 0x028DF0 2551#define R_028DF4_CB_COLOR6_CLEAR_WORD0 0x028DF4 2552#define R_028DF8_CB_COLOR6_CLEAR_WORD1 0x028DF8 2553#define R_028DFC_CB_COLOR6_CLEAR_WORD2 0x028DFC 2554#define R_028E00_CB_COLOR6_CLEAR_WORD3 0x028E00 2555#define R_028E04_CB_COLOR7_BASE 0x00028E04 2556#define R_028E08_CB_COLOR7_PITCH 0x00028E08 2557#define R_028E0C_CB_COLOR7_SLICE 0x00028E0C 2558#define R_028E10_CB_COLOR7_VIEW 0x00028E10 2559#define R_028E14_CB_COLOR7_INFO 0x00028E14 2560#define R_028E18_CB_COLOR7_ATTRIB 0x00028E18 2561#define R_028E1C_CB_COLOR7_DIM 0x00028E1C 2562#define R_028E20_CB_COLOR7_CMASK 0x028E20 2563#define R_028E24_CB_COLOR7_CMASK_SLICE 0x028E24 2564#define R_028E28_CB_COLOR7_FMASK 0x028E28 2565#define R_028E2C_CB_COLOR7_FMASK_SLICE 0x028E2C 2566#define R_028E30_CB_COLOR7_CLEAR_WORD0 0x028E30 2567#define R_028E34_CB_COLOR7_CLEAR_WORD1 0x028E34 2568#define R_028E38_CB_COLOR7_CLEAR_WORD2 0x028E38 2569#define R_028E3C_CB_COLOR7_CLEAR_WORD3 0x028E3C 2570#define R_028E40_CB_COLOR8_BASE 0x00028E40 2571#define R_028E44_CB_COLOR8_PITCH 0x00028E44 2572#define R_028E48_CB_COLOR8_SLICE 0x00028E48 2573#define R_028E4C_CB_COLOR8_VIEW 0x00028E4C 2574#define R_028E50_CB_COLOR8_INFO 0x00028E50 2575#define R_028E54_CB_COLOR8_ATTRIB 0x00028E54 2576#define R_028E58_CB_COLOR8_DIM 0x00028E58 2577#define R_028E5C_CB_COLOR9_BASE 0x00028E5C 2578#define R_028E60_CB_COLOR9_PITCH 0x00028E60 2579#define R_028E64_CB_COLOR9_SLICE 0x00028E64 2580#define R_028E68_CB_COLOR9_VIEW 0x00028E68 2581#define R_028E6C_CB_COLOR9_INFO 0x00028E6C 2582#define R_028E70_CB_COLOR9_ATTRIB 0x00028E70 2583#define R_028E74_CB_COLOR9_DIM 0x00028E74 2584#define R_028E78_CB_COLOR10_BASE 0x00028E78 2585#define R_028E7C_CB_COLOR10_PITCH 0x00028E7C 2586#define R_028E80_CB_COLOR10_SLICE 0x00028E80 2587#define R_028E84_CB_COLOR10_VIEW 0x00028E84 2588#define R_028E88_CB_COLOR10_INFO 0x00028E88 2589#define R_028E8C_CB_COLOR10_ATTRIB 0x00028E8C 2590#define R_028E90_CB_COLOR10_DIM 0x00028E90 2591#define R_028E94_CB_COLOR11_BASE 0x00028E94 2592#define R_028E98_CB_COLOR11_PITCH 0x00028E98 2593#define R_028E9C_CB_COLOR11_SLICE 0x00028E9C 2594#define R_028EA0_CB_COLOR11_VIEW 0x00028EA0 2595#define R_028EA4_CB_COLOR11_INFO 0x00028EA4 2596#define R_028EA8_CB_COLOR11_ATTRIB 0x00028EA8 2597#define R_028EAC_CB_COLOR11_DIM 0x00028EAC 2598#define R_030000_RESOURCE0_WORD0 0x00030000 2599#define R_030004_RESOURCE0_WORD1 0x00030004 2600#define R_030008_RESOURCE0_WORD2 0x00030008 2601#define R_03000C_RESOURCE0_WORD3 0x0003000C 2602#define R_030010_RESOURCE0_WORD4 0x00030010 2603#define R_030014_RESOURCE0_WORD5 0x00030014 2604#define R_030018_RESOURCE0_WORD6 0x00030018 2605#define R_03001C_RESOURCE0_WORD7 0x0003001C 2606#define R_0085F0_CP_COHER_CNTL 0x0085F0 2607#define S_0085F0_DEST_BASE_0_ENA(x) (((unsigned)(x) & 0x1) << 0) 2608#define G_0085F0_DEST_BASE_0_ENA(x) (((x) >> 0) & 0x1) 2609#define C_0085F0_DEST_BASE_0_ENA 0xFFFFFFFE 2610#define S_0085F0_DEST_BASE_1_ENA(x) (((unsigned)(x) & 0x1) << 1) 2611#define G_0085F0_DEST_BASE_1_ENA(x) (((x) >> 1) & 0x1) 2612#define C_0085F0_DEST_BASE_1_ENA 0xFFFFFFFD 2613#define S_0085F0_SO0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 2) 2614#define G_0085F0_SO0_DEST_BASE_ENA(x) (((x) >> 2) & 0x1) 2615#define C_0085F0_SO0_DEST_BASE_ENA 0xFFFFFFFB 2616#define S_0085F0_SO1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 3) 2617#define G_0085F0_SO1_DEST_BASE_ENA(x) (((x) >> 3) & 0x1) 2618#define C_0085F0_SO1_DEST_BASE_ENA 0xFFFFFFF7 2619#define S_0085F0_SO2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 4) 2620#define G_0085F0_SO2_DEST_BASE_ENA(x) (((x) >> 4) & 0x1) 2621#define C_0085F0_SO2_DEST_BASE_ENA 0xFFFFFFEF 2622#define S_0085F0_SO3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 5) 2623#define G_0085F0_SO3_DEST_BASE_ENA(x) (((x) >> 5) & 0x1) 2624#define C_0085F0_SO3_DEST_BASE_ENA 0xFFFFFFDF 2625#define S_0085F0_CB0_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 6) 2626#define G_0085F0_CB0_DEST_BASE_ENA(x) (((x) >> 6) & 0x1) 2627#define C_0085F0_CB0_DEST_BASE_ENA 0xFFFFFFBF 2628#define S_0085F0_CB1_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 7) 2629#define G_0085F0_CB1_DEST_BASE_ENA(x) (((x) >> 7) & 0x1) 2630#define C_0085F0_CB1_DEST_BASE_ENA 0xFFFFFF7F 2631#define S_0085F0_CB2_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 8) 2632#define G_0085F0_CB2_DEST_BASE_ENA(x) (((x) >> 8) & 0x1) 2633#define C_0085F0_CB2_DEST_BASE_ENA 0xFFFFFEFF 2634#define S_0085F0_CB3_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 9) 2635#define G_0085F0_CB3_DEST_BASE_ENA(x) (((x) >> 9) & 0x1) 2636#define C_0085F0_CB3_DEST_BASE_ENA 0xFFFFFDFF 2637#define S_0085F0_CB4_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 10) 2638#define G_0085F0_CB4_DEST_BASE_ENA(x) (((x) >> 10) & 0x1) 2639#define C_0085F0_CB4_DEST_BASE_ENA 0xFFFFFBFF 2640#define S_0085F0_CB5_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 11) 2641#define G_0085F0_CB5_DEST_BASE_ENA(x) (((x) >> 11) & 0x1) 2642#define C_0085F0_CB5_DEST_BASE_ENA 0xFFFFF7FF 2643#define S_0085F0_CB6_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 12) 2644#define G_0085F0_CB6_DEST_BASE_ENA(x) (((x) >> 12) & 0x1) 2645#define C_0085F0_CB6_DEST_BASE_ENA 0xFFFFEFFF 2646#define S_0085F0_CB7_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 13) 2647#define G_0085F0_CB7_DEST_BASE_ENA(x) (((x) >> 13) & 0x1) 2648#define C_0085F0_CB7_DEST_BASE_ENA 0xFFFFDFFF 2649#define S_0085F0_DB_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 14) 2650#define G_0085F0_DB_DEST_BASE_ENA(x) (((x) >> 14) & 0x1) 2651#define C_0085F0_DB_DEST_BASE_ENA 0xFFFFBFFF 2652#define S_0085F0_CB8_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 15) 2653#define G_0085F0_CB8_DEST_BASE_ENA(x) (((x) >> 15) & 0x1) 2654#define S_0085F0_CB9_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 16) 2655#define G_0085F0_CB9_DEST_BASE_ENA(x) (((x) >> 16) & 0x1) 2656#define S_0085F0_CB10_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 17) 2657#define G_0085F0_CB10_DEST_BASE_ENA(x) (((x) >> 17) & 0x1) 2658#define S_0085F0_CB11_DEST_BASE_ENA(x) (((unsigned)(x) & 0x1) << 18) 2659#define G_0085F0_CB11_DEST_BASE_ENA(x) (((x) >> 18) & 0x1) 2660#define S_0085F0_TC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 23) 2661#define G_0085F0_TC_ACTION_ENA(x) (((x) >> 23) & 0x1) 2662#define C_0085F0_TC_ACTION_ENA 0xFF7FFFFF 2663#define S_0085F0_VC_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 24) 2664#define G_0085F0_VC_ACTION_ENA(x) (((x) >> 24) & 0x1) 2665#define C_0085F0_VC_ACTION_ENA 0xFEFFFFFF 2666#define S_0085F0_CB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 25) 2667#define G_0085F0_CB_ACTION_ENA(x) (((x) >> 25) & 0x1) 2668#define C_0085F0_CB_ACTION_ENA 0xFDFFFFFF 2669#define S_0085F0_DB_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 26) 2670#define G_0085F0_DB_ACTION_ENA(x) (((x) >> 26) & 0x1) 2671#define C_0085F0_DB_ACTION_ENA 0xFBFFFFFF 2672#define S_0085F0_SH_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 27) 2673#define G_0085F0_SH_ACTION_ENA(x) (((x) >> 27) & 0x1) 2674#define C_0085F0_SH_ACTION_ENA 0xF7FFFFFF 2675#define S_0085F0_SMX_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 28) 2676#define G_0085F0_SMX_ACTION_ENA(x) (((x) >> 28) & 0x1) 2677#define C_0085F0_SMX_ACTION_ENA 0xEFFFFFFF 2678#define S_0085F0_CR0_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 29) 2679#define G_0085F0_CR0_ACTION_ENA(x) (((x) >> 29) & 0x1) 2680#define C_0085F0_CR0_ACTION_ENA 0xDFFFFFFF 2681#define S_0085F0_CR1_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 30) 2682#define G_0085F0_CR1_ACTION_ENA(x) (((x) >> 30) & 0x1) 2683#define C_0085F0_CR1_ACTION_ENA 0xBFFFFFFF 2684#define S_0085F0_CR2_ACTION_ENA(x) (((unsigned)(x) & 0x1) << 31) 2685#define G_0085F0_CR2_ACTION_ENA(x) (((x) >> 31) & 0x1) 2686#define C_0085F0_CR2_ACTION_ENA 0x7FFFFFFF 2687#define R_0085F4_CP_COHER_SIZE 0x0085F4 2688#define R_0085F8_CP_COHER_BASE 0x0085F8 2689#define R_008970_VGT_NUM_INDICES 0x008970 2690 2691#define R_03CFF0_SQ_VTX_BASE_VTX_LOC 0x03CFF0 2692#define R_03CFF4_SQ_VTX_START_INST_LOC 0x03CFF4 2693 2694#define R_03A200_SQ_LOOP_CONST_0 0x3A200 2695 2696#define ENDIAN_NONE 0 2697#define ENDIAN_8IN16 1 2698#define ENDIAN_8IN32 2 2699#define ENDIAN_8IN64 3 2700 2701#define CM_R_0286F8_SPI_GPR_MGMT 0x286f8 2702#define CM_R_0286FC_SPI_LDS_MGMT 0x286fc 2703#define S_0286FC_NUM_PS_LDS(x) ((x) & 0xff) 2704#define S_0286FC_NUM_LS_LDS(x) ((x) & 0xff) << 8 2705#define CM_R_028700_SPI_STACK_MGMT 0x28700 2706#define CM_R_028704_SPI_WAVE_MGMT_1 0x28704 2707#define CM_R_028708_SPI_WAVE_MGMT_2 0x28708 2708 2709#define CM_R_028804_DB_EQAA 0x00028804 2710#define S_028804_MAX_ANCHOR_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) 2711#define G_028804_MAX_ANCHOR_SAMPLES(x) (((x) >> 0) & 0x07) 2712#define C_028804_MAX_ANCHOR_SAMPLES 0xFFFFFFF8 2713#define S_028804_PS_ITER_SAMPLES(x) (((unsigned)(x) & 0x07) << 4) 2714#define G_028804_PS_ITER_SAMPLES(x) (((x) >> 4) & 0x07) 2715#define C_028804_PS_ITER_SAMPLES 0xFFFFFF8F 2716#define S_028804_MASK_EXPORT_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 8) 2717#define G_028804_MASK_EXPORT_NUM_SAMPLES(x) (((x) >> 8) & 0x07) 2718#define C_028804_MASK_EXPORT_NUM_SAMPLES 0xFFFFF8FF 2719#define S_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 12) 2720#define G_028804_ALPHA_TO_MASK_NUM_SAMPLES(x) (((x) >> 12) & 0x07) 2721#define C_028804_ALPHA_TO_MASK_NUM_SAMPLES 0xFFFF8FFF 2722#define S_028804_HIGH_QUALITY_INTERSECTIONS(x) (((unsigned)(x) & 0x1) << 16) 2723#define G_028804_HIGH_QUALITY_INTERSECTIONS(x) (((x) >> 16) & 0x1) 2724#define C_028804_HIGH_QUALITY_INTERSECTIONS 0xFFFEFFFF 2725#define S_028804_INCOHERENT_EQAA_READS(x) (((unsigned)(x) & 0x1) << 17) 2726#define G_028804_INCOHERENT_EQAA_READS(x) (((x) >> 17) & 0x1) 2727#define C_028804_INCOHERENT_EQAA_READS 0xFFFDFFFF 2728#define S_028804_INTERPOLATE_COMP_Z(x) (((unsigned)(x) & 0x1) << 18) 2729#define G_028804_INTERPOLATE_COMP_Z(x) (((x) >> 18) & 0x1) 2730#define C_028804_INTERPOLATE_COMP_Z 0xFFFBFFFF 2731#define S_028804_INTERPOLATE_SRC_Z(x) (((unsigned)(x) & 0x1) << 19) 2732#define G_028804_INTERPOLATE_SRC_Z(x) (((x) >> 19) & 0x1) 2733#define C_028804_INTERPOLATE_SRC_Z 0xFFF7FFFF 2734#define S_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((unsigned)(x) & 0x1) << 20) 2735#define G_028804_STATIC_ANCHOR_ASSOCIATIONS(x) (((x) >> 20) & 0x1) 2736#define C_028804_STATIC_ANCHOR_ASSOCIATIONS 0xFFEFFFFF 2737#define S_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((unsigned)(x) & 0x1) << 21) 2738#define G_028804_ALPHA_TO_MASK_EQAA_DISABLE(x) (((x) >> 21) & 0x1) 2739#define C_028804_ALPHA_TO_MASK_EQAA_DISABLE 0xFFDFFFFF 2740 2741#define CM_R_028BD4_PA_SC_CENTROID_PRIORITY_0 0x00028BD4 2742#define CM_R_028BD8_PA_SC_CENTROID_PRIORITY_1 0x00028BD8 2743#define CM_R_028BDC_PA_SC_LINE_CNTL 0x28bdc 2744#define CM_R_028BE0_PA_SC_AA_CONFIG 0x28be0 2745#define S_028BE0_MSAA_NUM_SAMPLES(x) (((unsigned)(x) & 0x07) << 0) 2746#define G_028BE0_MSAA_NUM_SAMPLES(x) (((x) >> 0) & 0x07) 2747#define C_028BE0_MSAA_NUM_SAMPLES 0xFFFFFFF8 2748#define S_028BE0_AA_MASK_CENTROID_DTMN(x) (((unsigned)(x) & 0x1) << 4) 2749#define G_028BE0_AA_MASK_CENTROID_DTMN(x) (((x) >> 4) & 0x1) 2750#define C_028BE0_AA_MASK_CENTROID_DTMN 0xFFFFFFEF 2751#define S_028BE0_MAX_SAMPLE_DIST(x) (((unsigned)(x) & 0x0F) << 13) 2752#define G_028BE0_MAX_SAMPLE_DIST(x) (((x) >> 13) & 0x0F) 2753#define C_028BE0_MAX_SAMPLE_DIST 0xFFFE1FFF 2754#define S_028BE0_MSAA_EXPOSED_SAMPLES(x) (((unsigned)(x) & 0x07) << 20) 2755#define G_028BE0_MSAA_EXPOSED_SAMPLES(x) (((x) >> 20) & 0x07) 2756#define C_028BE0_MSAA_EXPOSED_SAMPLES 0xFF8FFFFF 2757#define S_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((unsigned)(x) & 0x03) << 24) 2758#define G_028BE0_DETAIL_TO_EXPOSED_MODE(x) (((x) >> 24) & 0x03) 2759#define C_028BE0_DETAIL_TO_EXPOSED_MODE 0xFCFFFFFF 2760#define CM_R_028BE4_PA_SU_VTX_CNTL 0x28be4 2761#define CM_R_028BE8_PA_CL_GB_VERT_CLIP_ADJ 0x28be8 2762#define CM_R_028BEC_PA_CL_GB_VERT_DISC_ADJ 0x28bec 2763#define CM_R_028BF0_PA_CL_GB_HORZ_CLIP_ADJ 0x28bf0 2764#define CM_R_028BF4_PA_CL_GB_HORZ_DISC_ADJ 0x28bf4 2765 2766#define CM_R_028BF8_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0 0x28bf8 2767#define CM_R_028BFC_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1 0x28bfc 2768#define CM_R_028C00_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2 0x28c00 2769#define CM_R_028C04_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3 0x28c04 2770 2771#define CM_R_028C08_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0 0x28c08 2772#define CM_R_028C0C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1 0x28c0c 2773#define CM_R_028C10_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2 0x28c10 2774#define CM_R_028C14_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3 0x28c14 2775 2776#define CM_R_028C18_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0 0x28c18 2777#define CM_R_028C1C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1 0x28c1c 2778#define CM_R_028C20_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2 0x28c20 2779#define CM_R_028C24_PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3 0x28c24 2780 2781#define CM_R_028C28_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0 0x28c28 2782#define CM_R_028C2C_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1 0x28c2c 2783#define CM_R_028C30_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2 0x28c30 2784#define CM_R_028C34_PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3 0x28c34 2785 2786#define CM_R_028C38_PA_SC_AA_MASK_X0Y0_X1Y0 0x28c38 2787#define CM_R_028C3C_PA_SC_AA_MASK_X0Y1_X1Y1 0x28c3c 2788 2789#define CM_R_028AA8_IA_MULTI_VGT_PARAM 0x028AA8 2790#define S_028AA8_PRIMGROUP_SIZE(x) (((unsigned)(x) & 0xFFFF) << 0) 2791#define G_028AA8_PRIMGROUP_SIZE(x) (((x) >> 0) & 0xFFFF) 2792#define C_028AA8_PRIMGROUP_SIZE 0xFFFF0000 2793#define S_028AA8_PARTIAL_VS_WAVE_ON(x) (((unsigned)(x) & 0x1) << 16) 2794#define G_028AA8_PARTIAL_VS_WAVE_ON(x) (((x) >> 16) & 0x1) 2795#define C_028AA8_PARTIAL_VS_WAVE_ON 0xFFFEFFFF 2796#define S_028AA8_SWITCH_ON_EOP(x) (((unsigned)(x) & 0x1) << 17) 2797#define G_028AA8_SWITCH_ON_EOP(x) (((x) >> 17) & 0x1) 2798#define C_028AA8_SWITCH_ON_EOP 0xFFFDFFFF 2799 2800/* async DMA packets */ 2801#define DMA_PACKET(cmd, sub_cmd, n) ((((unsigned)(cmd) & 0xF) << 28) | \ 2802 (((unsigned)(sub_cmd) & 0xFF) << 20) |\ 2803 (((unsigned)(n) & 0xFFFFF) << 0)) 2804/* async DMA Packet types */ 2805#define DMA_PACKET_WRITE 0x2 2806#define DMA_PACKET_COPY 0x3 2807#define EG_DMA_COPY_MAX_SIZE 0xfffff 2808#define EG_DMA_COPY_DWORD_ALIGNED 0x00 2809#define EG_DMA_COPY_BYTE_ALIGNED 0x40 2810#define EG_DMA_COPY_TILED 0x8 2811#define DMA_PACKET_INDIRECT_BUFFER 0x4 2812#define DMA_PACKET_SEMAPHORE 0x5 2813#define DMA_PACKET_FENCE 0x6 2814#define DMA_PACKET_TRAP 0x7 2815#define DMA_PACKET_SRBM_WRITE 0x9 2816#define DMA_PACKET_CONSTANT_FILL 0xd 2817#define DMA_PACKET_NOP 0xf 2818 2819#define EG_FETCH_CONSTANTS_OFFSET_PS 0 2820#define EG_FETCH_CONSTANTS_OFFSET_VS 176 2821#define EG_FETCH_CONSTANTS_OFFSET_GS 336 2822#define EG_FETCH_CONSTANTS_OFFSET_HS 496 2823#define EG_FETCH_CONSTANTS_OFFSET_LS 656 2824#define EG_FETCH_CONSTANTS_OFFSET_CS 816 2825#define EG_FETCH_CONSTANTS_OFFSET_FS 992 2826 2827#endif 2828