1/* 2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2009 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24#include "draw/draw_context.h" 25 26#include "util/u_framebuffer.h" 27#include "util/half_float.h" 28#include "util/u_helpers.h" 29#include "util/u_math.h" 30#include "util/u_memory.h" 31#include "util/u_pack_color.h" 32#include "util/u_transfer.h" 33#include "util/u_blend.h" 34 35#include "tgsi/tgsi_parse.h" 36 37#include "pipe/p_config.h" 38 39#include "r300_cb.h" 40#include "r300_context.h" 41#include "r300_emit.h" 42#include "r300_reg.h" 43#include "r300_screen.h" 44#include "r300_screen_buffer.h" 45#include "r300_state_inlines.h" 46#include "r300_fs.h" 47#include "r300_texture.h" 48#include "r300_vs.h" 49#include "nir.h" 50#include "nir/nir_to_tgsi.h" 51 52/* r300_state: Functions used to initialize state context by translating 53 * Gallium state objects into semi-native r300 state objects. */ 54 55#define UPDATE_STATE(cso, atom) \ 56 if (cso != atom.state) { \ 57 atom.state = cso; \ 58 r300_mark_atom_dirty(r300, &(atom)); \ 59 } 60 61static boolean blend_discard_if_src_alpha_0(unsigned srcRGB, unsigned srcA, 62 unsigned dstRGB, unsigned dstA) 63{ 64 /* If the blend equation is ADD or REVERSE_SUBTRACT, 65 * SRC_ALPHA == 0, and the following state is set, the colorbuffer 66 * will not be changed. 67 * Notice that the dst factors are the src factors inverted. */ 68 return (srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 69 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 70 srcRGB == PIPE_BLENDFACTOR_ZERO) && 71 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 72 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 73 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 74 srcA == PIPE_BLENDFACTOR_ZERO) && 75 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 76 dstRGB == PIPE_BLENDFACTOR_ONE) && 77 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 78 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 79 dstA == PIPE_BLENDFACTOR_ONE); 80} 81 82static boolean blend_discard_if_src_alpha_1(unsigned srcRGB, unsigned srcA, 83 unsigned dstRGB, unsigned dstA) 84{ 85 /* If the blend equation is ADD or REVERSE_SUBTRACT, 86 * SRC_ALPHA == 1, and the following state is set, the colorbuffer 87 * will not be changed. 88 * Notice that the dst factors are the src factors inverted. */ 89 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 90 srcRGB == PIPE_BLENDFACTOR_ZERO) && 91 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 92 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 93 srcA == PIPE_BLENDFACTOR_ZERO) && 94 (dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 95 dstRGB == PIPE_BLENDFACTOR_ONE) && 96 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 97 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 98 dstA == PIPE_BLENDFACTOR_ONE); 99} 100 101static boolean blend_discard_if_src_color_0(unsigned srcRGB, unsigned srcA, 102 unsigned dstRGB, unsigned dstA) 103{ 104 /* If the blend equation is ADD or REVERSE_SUBTRACT, 105 * SRC_COLOR == (0,0,0), and the following state is set, the colorbuffer 106 * will not be changed. 107 * Notice that the dst factors are the src factors inverted. */ 108 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 109 srcRGB == PIPE_BLENDFACTOR_ZERO) && 110 (srcA == PIPE_BLENDFACTOR_ZERO) && 111 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 112 dstRGB == PIPE_BLENDFACTOR_ONE) && 113 (dstA == PIPE_BLENDFACTOR_ONE); 114} 115 116static boolean blend_discard_if_src_color_1(unsigned srcRGB, unsigned srcA, 117 unsigned dstRGB, unsigned dstA) 118{ 119 /* If the blend equation is ADD or REVERSE_SUBTRACT, 120 * SRC_COLOR == (1,1,1), and the following state is set, the colorbuffer 121 * will not be changed. 122 * Notice that the dst factors are the src factors inverted. */ 123 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 124 srcRGB == PIPE_BLENDFACTOR_ZERO) && 125 (srcA == PIPE_BLENDFACTOR_ZERO) && 126 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 127 dstRGB == PIPE_BLENDFACTOR_ONE) && 128 (dstA == PIPE_BLENDFACTOR_ONE); 129} 130 131static boolean blend_discard_if_src_alpha_color_0(unsigned srcRGB, unsigned srcA, 132 unsigned dstRGB, unsigned dstA) 133{ 134 /* If the blend equation is ADD or REVERSE_SUBTRACT, 135 * SRC_ALPHA_COLOR == (0,0,0,0), and the following state is set, 136 * the colorbuffer will not be changed. 137 * Notice that the dst factors are the src factors inverted. */ 138 return (srcRGB == PIPE_BLENDFACTOR_SRC_COLOR || 139 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 140 srcRGB == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 141 srcRGB == PIPE_BLENDFACTOR_ZERO) && 142 (srcA == PIPE_BLENDFACTOR_SRC_COLOR || 143 srcA == PIPE_BLENDFACTOR_SRC_ALPHA || 144 srcA == PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE || 145 srcA == PIPE_BLENDFACTOR_ZERO) && 146 (dstRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 147 dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 148 dstRGB == PIPE_BLENDFACTOR_ONE) && 149 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 150 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 151 dstA == PIPE_BLENDFACTOR_ONE); 152} 153 154static boolean blend_discard_if_src_alpha_color_1(unsigned srcRGB, unsigned srcA, 155 unsigned dstRGB, unsigned dstA) 156{ 157 /* If the blend equation is ADD or REVERSE_SUBTRACT, 158 * SRC_ALPHA_COLOR == (1,1,1,1), and the following state is set, 159 * the colorbuffer will not be changed. 160 * Notice that the dst factors are the src factors inverted. */ 161 return (srcRGB == PIPE_BLENDFACTOR_INV_SRC_COLOR || 162 srcRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 163 srcRGB == PIPE_BLENDFACTOR_ZERO) && 164 (srcA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 165 srcA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 166 srcA == PIPE_BLENDFACTOR_ZERO) && 167 (dstRGB == PIPE_BLENDFACTOR_SRC_COLOR || 168 dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 169 dstRGB == PIPE_BLENDFACTOR_ONE) && 170 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 171 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 172 dstA == PIPE_BLENDFACTOR_ONE); 173} 174 175static unsigned blend_discard_conditionally(unsigned eqRGB, unsigned eqA, 176 unsigned dstRGB, unsigned dstA, 177 unsigned srcRGB, unsigned srcA) 178{ 179 unsigned blend_control = 0; 180 181 /* Optimization: discard pixels which don't change the colorbuffer. 182 * 183 * The code below is non-trivial and some math is involved. 184 * 185 * Discarding pixels must be disabled when FP16 AA is enabled. 186 * This is a hardware bug. Also, this implementation wouldn't work 187 * with FP blending enabled and equation clamping disabled. 188 * 189 * Equations other than ADD are rarely used and therefore won't be 190 * optimized. */ 191 if ((eqRGB == PIPE_BLEND_ADD || eqRGB == PIPE_BLEND_REVERSE_SUBTRACT) && 192 (eqA == PIPE_BLEND_ADD || eqA == PIPE_BLEND_REVERSE_SUBTRACT)) { 193 /* ADD: X+Y 194 * REVERSE_SUBTRACT: Y-X 195 * 196 * The idea is: 197 * If X = src*srcFactor = 0 and Y = dst*dstFactor = 1, 198 * then CB will not be changed. 199 * 200 * Given the srcFactor and dstFactor variables, we can derive 201 * what src and dst should be equal to and discard appropriate 202 * pixels. 203 */ 204 if (blend_discard_if_src_alpha_0(srcRGB, srcA, dstRGB, dstA)) { 205 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_0; 206 } else if (blend_discard_if_src_alpha_1(srcRGB, srcA, 207 dstRGB, dstA)) { 208 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_ALPHA_1; 209 } else if (blend_discard_if_src_color_0(srcRGB, srcA, 210 dstRGB, dstA)) { 211 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_0; 212 } else if (blend_discard_if_src_color_1(srcRGB, srcA, 213 dstRGB, dstA)) { 214 blend_control |= R300_DISCARD_SRC_PIXELS_SRC_COLOR_1; 215 } else if (blend_discard_if_src_alpha_color_0(srcRGB, srcA, 216 dstRGB, dstA)) { 217 blend_control |= 218 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_0; 219 } else if (blend_discard_if_src_alpha_color_1(srcRGB, srcA, 220 dstRGB, dstA)) { 221 blend_control |= 222 R300_DISCARD_SRC_PIXELS_SRC_ALPHA_COLOR_1; 223 } 224 } 225 return blend_control; 226} 227 228/* The hardware colormask is clunky a must be swizzled depending on the format. 229 * This was figured out by trial-and-error. */ 230static unsigned bgra_cmask(unsigned mask) 231{ 232 return ((mask & PIPE_MASK_R) << 2) | 233 ((mask & PIPE_MASK_B) >> 2) | 234 (mask & (PIPE_MASK_G | PIPE_MASK_A)); 235} 236 237static unsigned rgba_cmask(unsigned mask) 238{ 239 return mask & PIPE_MASK_RGBA; 240} 241 242static unsigned rrrr_cmask(unsigned mask) 243{ 244 return (mask & PIPE_MASK_R) | 245 ((mask & PIPE_MASK_R) << 1) | 246 ((mask & PIPE_MASK_R) << 2) | 247 ((mask & PIPE_MASK_R) << 3); 248} 249 250static unsigned aaaa_cmask(unsigned mask) 251{ 252 return ((mask & PIPE_MASK_A) >> 3) | 253 ((mask & PIPE_MASK_A) >> 2) | 254 ((mask & PIPE_MASK_A) >> 1) | 255 (mask & PIPE_MASK_A); 256} 257 258static unsigned grrg_cmask(unsigned mask) 259{ 260 return ((mask & PIPE_MASK_R) << 1) | 261 ((mask & PIPE_MASK_R) << 2) | 262 ((mask & PIPE_MASK_G) >> 1) | 263 ((mask & PIPE_MASK_G) << 2); 264} 265 266static unsigned arra_cmask(unsigned mask) 267{ 268 return ((mask & PIPE_MASK_R) << 1) | 269 ((mask & PIPE_MASK_R) << 2) | 270 ((mask & PIPE_MASK_A) >> 3) | 271 (mask & PIPE_MASK_A); 272} 273 274static unsigned blend_read_enable(unsigned eqRGB, unsigned eqA, 275 unsigned dstRGB, unsigned dstA, 276 unsigned srcRGB, unsigned srcA, 277 boolean src_alpha_optz) 278{ 279 unsigned blend_control = 0; 280 281 /* Optimization: some operations do not require the destination color. 282 * 283 * When SRC_ALPHA_SATURATE is used, colorbuffer reads must be enabled, 284 * otherwise blending gives incorrect results. It seems to be 285 * a hardware bug. */ 286 if (eqRGB == PIPE_BLEND_MIN || eqA == PIPE_BLEND_MIN || 287 eqRGB == PIPE_BLEND_MAX || eqA == PIPE_BLEND_MAX || 288 dstRGB != PIPE_BLENDFACTOR_ZERO || 289 dstA != PIPE_BLENDFACTOR_ZERO || 290 util_blend_factor_uses_dest(srcRGB, false) || 291 util_blend_factor_uses_dest(srcA, true)) { 292 /* Enable reading from the colorbuffer. */ 293 blend_control |= R300_READ_ENABLE; 294 295 if (src_alpha_optz) { 296 /* Optimization: Depending on incoming pixels, we can 297 * conditionally disable the reading in hardware... */ 298 if (eqRGB != PIPE_BLEND_MIN && eqA != PIPE_BLEND_MIN && 299 eqRGB != PIPE_BLEND_MAX && eqA != PIPE_BLEND_MAX) { 300 /* Disable reading if SRC_ALPHA == 0. */ 301 if ((dstRGB == PIPE_BLENDFACTOR_SRC_ALPHA || 302 dstRGB == PIPE_BLENDFACTOR_ZERO) && 303 (dstA == PIPE_BLENDFACTOR_SRC_COLOR || 304 dstA == PIPE_BLENDFACTOR_SRC_ALPHA || 305 dstA == PIPE_BLENDFACTOR_ZERO) && 306 (srcRGB != PIPE_BLENDFACTOR_DST_COLOR && 307 srcRGB != PIPE_BLENDFACTOR_DST_ALPHA && 308 srcRGB != PIPE_BLENDFACTOR_INV_DST_COLOR && 309 srcRGB != PIPE_BLENDFACTOR_INV_DST_ALPHA)) { 310 blend_control |= R500_SRC_ALPHA_0_NO_READ; 311 } 312 313 /* Disable reading if SRC_ALPHA == 1. */ 314 if ((dstRGB == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 315 dstRGB == PIPE_BLENDFACTOR_ZERO) && 316 (dstA == PIPE_BLENDFACTOR_INV_SRC_COLOR || 317 dstA == PIPE_BLENDFACTOR_INV_SRC_ALPHA || 318 dstA == PIPE_BLENDFACTOR_ZERO) && 319 (srcRGB != PIPE_BLENDFACTOR_DST_COLOR && 320 srcRGB != PIPE_BLENDFACTOR_DST_ALPHA && 321 srcRGB != PIPE_BLENDFACTOR_INV_DST_COLOR && 322 srcRGB != PIPE_BLENDFACTOR_INV_DST_ALPHA)) { 323 blend_control |= R500_SRC_ALPHA_1_NO_READ; 324 } 325 } 326 } 327 } 328 return blend_control; 329} 330 331/* Create a new blend state based on the CSO blend state. 332 * 333 * This encompasses alpha blending, logic/raster ops, and blend dithering. */ 334static void* r300_create_blend_state(struct pipe_context* pipe, 335 const struct pipe_blend_state* state) 336{ 337 struct r300_screen* r300screen = r300_screen(pipe->screen); 338 struct r300_blend_state* blend = CALLOC_STRUCT(r300_blend_state); 339 uint32_t blend_control = 0; /* R300_RB3D_CBLEND: 0x4e04 */ 340 uint32_t blend_control_noclamp = 0; /* R300_RB3D_CBLEND: 0x4e04 */ 341 uint32_t blend_control_noalpha = 0; /* R300_RB3D_CBLEND: 0x4e04 */ 342 uint32_t blend_control_noalpha_noclamp = 0; /* R300_RB3D_CBLEND: 0x4e04 */ 343 uint32_t alpha_blend_control = 0; /* R300_RB3D_ABLEND: 0x4e08 */ 344 uint32_t alpha_blend_control_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */ 345 uint32_t alpha_blend_control_noalpha = 0; /* R300_RB3D_ABLEND: 0x4e08 */ 346 uint32_t alpha_blend_control_noalpha_noclamp = 0; /* R300_RB3D_ABLEND: 0x4e08 */ 347 uint32_t rop = 0; /* R300_RB3D_ROPCNTL: 0x4e18 */ 348 uint32_t dither = 0; /* R300_RB3D_DITHER_CTL: 0x4e50 */ 349 int i; 350 351 const unsigned eqRGB = state->rt[0].rgb_func; 352 const unsigned srcRGB = state->rt[0].rgb_src_factor; 353 const unsigned dstRGB = state->rt[0].rgb_dst_factor; 354 355 const unsigned eqA = state->rt[0].alpha_func; 356 const unsigned srcA = state->rt[0].alpha_src_factor; 357 const unsigned dstA = state->rt[0].alpha_dst_factor; 358 359 unsigned srcRGBX = srcRGB; 360 unsigned dstRGBX = dstRGB; 361 CB_LOCALS; 362 363 blend->state = *state; 364 365 /* force DST_ALPHA to ONE where we can */ 366 switch (srcRGBX) { 367 case PIPE_BLENDFACTOR_DST_ALPHA: 368 srcRGBX = PIPE_BLENDFACTOR_ONE; 369 break; 370 case PIPE_BLENDFACTOR_INV_DST_ALPHA: 371 srcRGBX = PIPE_BLENDFACTOR_ZERO; 372 break; 373 } 374 375 switch (dstRGBX) { 376 case PIPE_BLENDFACTOR_DST_ALPHA: 377 dstRGBX = PIPE_BLENDFACTOR_ONE; 378 break; 379 case PIPE_BLENDFACTOR_INV_DST_ALPHA: 380 dstRGBX = PIPE_BLENDFACTOR_ZERO; 381 break; 382 } 383 384 /* Get blending register values. */ 385 if (state->rt[0].blend_enable) { 386 unsigned blend_eq, blend_eq_noclamp; 387 388 /* despite the name, ALPHA_BLEND_ENABLE has nothing to do with alpha, 389 * this is just the crappy D3D naming */ 390 blend_control = blend_control_noclamp = 391 R300_ALPHA_BLEND_ENABLE | 392 ( r300_translate_blend_factor(srcRGB) << R300_SRC_BLEND_SHIFT) | 393 ( r300_translate_blend_factor(dstRGB) << R300_DST_BLEND_SHIFT); 394 395 blend_control_noalpha = blend_control_noalpha_noclamp = 396 R300_ALPHA_BLEND_ENABLE | 397 ( r300_translate_blend_factor(srcRGBX) << R300_SRC_BLEND_SHIFT) | 398 ( r300_translate_blend_factor(dstRGBX) << R300_DST_BLEND_SHIFT); 399 400 blend_eq = r300_translate_blend_function(eqRGB, TRUE); 401 blend_eq_noclamp = r300_translate_blend_function(eqRGB, FALSE); 402 403 blend_control |= blend_eq; 404 blend_control_noalpha |= blend_eq; 405 blend_control_noclamp |= blend_eq_noclamp; 406 blend_control_noalpha_noclamp |= blend_eq_noclamp; 407 408 /* Optimization: some operations do not require the destination color. */ 409 blend_control |= blend_read_enable(eqRGB, eqA, dstRGB, dstA, 410 srcRGB, srcA, r300screen->caps.is_r500); 411 blend_control_noclamp |= blend_read_enable(eqRGB, eqA, dstRGB, dstA, 412 srcRGB, srcA, FALSE); 413 blend_control_noalpha |= blend_read_enable(eqRGB, eqA, dstRGBX, dstA, 414 srcRGBX, srcA, r300screen->caps.is_r500); 415 blend_control_noalpha_noclamp |= blend_read_enable(eqRGB, eqA, dstRGBX, dstA, 416 srcRGBX, srcA, FALSE); 417 418 /* Optimization: discard pixels which don't change the colorbuffer. 419 * It cannot be used with FP16 AA. */ 420 blend_control |= blend_discard_conditionally(eqRGB, eqA, dstRGB, dstA, 421 srcRGB, srcA); 422 blend_control_noalpha |= blend_discard_conditionally(eqRGB, eqA, dstRGBX, dstA, 423 srcRGBX, srcA); 424 425 /* separate alpha */ 426 if (srcA != srcRGB || dstA != dstRGB || eqA != eqRGB) { 427 blend_control |= R300_SEPARATE_ALPHA_ENABLE; 428 blend_control_noclamp |= R300_SEPARATE_ALPHA_ENABLE; 429 430 alpha_blend_control = alpha_blend_control_noclamp = 431 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 432 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 433 alpha_blend_control |= r300_translate_blend_function(eqA, TRUE); 434 alpha_blend_control_noclamp |= r300_translate_blend_function(eqA, FALSE); 435 } 436 if (srcA != srcRGBX || dstA != dstRGBX || eqA != eqRGB) { 437 blend_control_noalpha |= R300_SEPARATE_ALPHA_ENABLE; 438 blend_control_noalpha_noclamp |= R300_SEPARATE_ALPHA_ENABLE; 439 440 alpha_blend_control_noalpha = alpha_blend_control_noalpha_noclamp = 441 (r300_translate_blend_factor(srcA) << R300_SRC_BLEND_SHIFT) | 442 (r300_translate_blend_factor(dstA) << R300_DST_BLEND_SHIFT); 443 alpha_blend_control_noalpha |= r300_translate_blend_function(eqA, TRUE); 444 alpha_blend_control_noalpha_noclamp |= r300_translate_blend_function(eqA, FALSE); 445 } 446 } 447 448 /* PIPE_LOGICOP_* don't need to be translated, fortunately. */ 449 if (state->logicop_enable) { 450 rop = R300_RB3D_ROPCNTL_ROP_ENABLE | 451 (state->logicop_func) << R300_RB3D_ROPCNTL_ROP_SHIFT; 452 } 453 454 /* Neither fglrx nor classic r300 ever set this, regardless of dithering 455 * state. Since it's an optional implementation detail, we can leave it 456 * out and never dither. 457 * 458 * This could be revisited if we ever get quality or conformance hints. 459 * 460 if (state->dither) { 461 dither = R300_RB3D_DITHER_CTL_DITHER_MODE_LUT | 462 R300_RB3D_DITHER_CTL_ALPHA_DITHER_MODE_LUT; 463 } 464 */ 465 466 /* Build a command buffer. */ 467 { 468 unsigned (*func[COLORMASK_NUM_SWIZZLES])(unsigned) = { 469 bgra_cmask, 470 rgba_cmask, 471 rrrr_cmask, 472 aaaa_cmask, 473 grrg_cmask, 474 arra_cmask, 475 bgra_cmask, 476 rgba_cmask 477 }; 478 479 for (i = 0; i < COLORMASK_NUM_SWIZZLES; i++) { 480 boolean has_alpha = i != COLORMASK_RGBX && i != COLORMASK_BGRX; 481 482 BEGIN_CB(blend->cb_clamp[i], 8); 483 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 484 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 485 OUT_CB(has_alpha ? blend_control : blend_control_noalpha); 486 OUT_CB(has_alpha ? alpha_blend_control : alpha_blend_control_noalpha); 487 OUT_CB(func[i](state->rt[0].colormask)); 488 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 489 END_CB; 490 } 491 } 492 493 /* Build a command buffer (for RGBA16F). */ 494 BEGIN_CB(blend->cb_noclamp, 8); 495 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 496 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 497 OUT_CB(blend_control_noclamp); 498 OUT_CB(alpha_blend_control_noclamp); 499 OUT_CB(rgba_cmask(state->rt[0].colormask)); 500 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 501 END_CB; 502 503 /* Build a command buffer (for RGB16F). */ 504 BEGIN_CB(blend->cb_noclamp_noalpha, 8); 505 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 506 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 507 OUT_CB(blend_control_noalpha_noclamp); 508 OUT_CB(alpha_blend_control_noalpha_noclamp); 509 OUT_CB(rgba_cmask(state->rt[0].colormask)); 510 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 511 END_CB; 512 513 /* The same as above, but with no colorbuffer reads and writes. */ 514 BEGIN_CB(blend->cb_no_readwrite, 8); 515 OUT_CB_REG(R300_RB3D_ROPCNTL, rop); 516 OUT_CB_REG_SEQ(R300_RB3D_CBLEND, 3); 517 OUT_CB(0); 518 OUT_CB(0); 519 OUT_CB(0); 520 OUT_CB_REG(R300_RB3D_DITHER_CTL, dither); 521 END_CB; 522 523 return (void*)blend; 524} 525 526/* Bind blend state. */ 527static void r300_bind_blend_state(struct pipe_context* pipe, 528 void* state) 529{ 530 struct r300_context* r300 = r300_context(pipe); 531 struct r300_blend_state *blend = (struct r300_blend_state*)state; 532 boolean last_alpha_to_one = r300->alpha_to_one; 533 boolean last_alpha_to_coverage = r300->alpha_to_coverage; 534 535 UPDATE_STATE(state, r300->blend_state); 536 537 if (!blend) 538 return; 539 540 r300->alpha_to_one = blend->state.alpha_to_one; 541 r300->alpha_to_coverage = blend->state.alpha_to_coverage; 542 543 if (r300->alpha_to_one != last_alpha_to_one && r300->msaa_enable && 544 r300->fs_status == FRAGMENT_SHADER_VALID) { 545 r300->fs_status = FRAGMENT_SHADER_MAYBE_DIRTY; 546 } 547 548 if (r300->alpha_to_coverage != last_alpha_to_coverage && 549 r300->msaa_enable) { 550 r300_mark_atom_dirty(r300, &r300->dsa_state); 551 } 552} 553 554/* Free blend state. */ 555static void r300_delete_blend_state(struct pipe_context* pipe, 556 void* state) 557{ 558 FREE(state); 559} 560 561/* Convert float to 10bit integer */ 562static unsigned float_to_fixed10(float f) 563{ 564 return CLAMP((unsigned)(f * 1023.9f), 0, 1023); 565} 566 567/* Set blend color. 568 * Setup both R300 and R500 registers, figure out later which one to write. */ 569static void r300_set_blend_color(struct pipe_context* pipe, 570 const struct pipe_blend_color* color) 571{ 572 struct r300_context* r300 = r300_context(pipe); 573 struct pipe_framebuffer_state *fb = r300->fb_state.state; 574 struct r300_blend_color_state *state = 575 (struct r300_blend_color_state*)r300->blend_color_state.state; 576 struct pipe_blend_color c; 577 struct pipe_surface *cb; 578 float tmp; 579 CB_LOCALS; 580 581 state->state = *color; /* Save it, so that we can reuse it in set_fb_state */ 582 c = *color; 583 cb = fb->nr_cbufs ? r300_get_nonnull_cb(fb, 0) : NULL; 584 585 /* The blend color is dependent on the colorbuffer format. */ 586 if (cb) { 587 switch (cb->format) { 588 case PIPE_FORMAT_R8_UNORM: 589 case PIPE_FORMAT_L8_UNORM: 590 case PIPE_FORMAT_I8_UNORM: 591 c.color[1] = c.color[0]; 592 break; 593 594 case PIPE_FORMAT_A8_UNORM: 595 c.color[1] = c.color[3]; 596 break; 597 598 case PIPE_FORMAT_R8G8_UNORM: 599 c.color[2] = c.color[1]; 600 break; 601 602 case PIPE_FORMAT_L8A8_UNORM: 603 case PIPE_FORMAT_R8A8_UNORM: 604 c.color[2] = c.color[3]; 605 break; 606 607 case PIPE_FORMAT_R8G8B8A8_UNORM: 608 case PIPE_FORMAT_R8G8B8X8_UNORM: 609 tmp = c.color[0]; 610 c.color[0] = c.color[2]; 611 c.color[2] = tmp; 612 break; 613 614 default:; 615 } 616 } 617 618 if (r300->screen->caps.is_r500) { 619 BEGIN_CB(state->cb, 3); 620 OUT_CB_REG_SEQ(R500_RB3D_CONSTANT_COLOR_AR, 2); 621 622 switch (cb ? cb->format : 0) { 623 case PIPE_FORMAT_R16G16B16A16_FLOAT: 624 case PIPE_FORMAT_R16G16B16X16_FLOAT: 625 OUT_CB(_mesa_float_to_half(c.color[2]) | 626 (_mesa_float_to_half(c.color[3]) << 16)); 627 OUT_CB(_mesa_float_to_half(c.color[0]) | 628 (_mesa_float_to_half(c.color[1]) << 16)); 629 break; 630 631 default: 632 OUT_CB(float_to_fixed10(c.color[0]) | 633 (float_to_fixed10(c.color[3]) << 16)); 634 OUT_CB(float_to_fixed10(c.color[2]) | 635 (float_to_fixed10(c.color[1]) << 16)); 636 } 637 638 END_CB; 639 } else { 640 union util_color uc; 641 util_pack_color(c.color, PIPE_FORMAT_B8G8R8A8_UNORM, &uc); 642 643 BEGIN_CB(state->cb, 2); 644 OUT_CB_REG(R300_RB3D_BLEND_COLOR, uc.ui[0]); 645 END_CB; 646 } 647 648 r300_mark_atom_dirty(r300, &r300->blend_color_state); 649} 650 651static void r300_set_clip_state(struct pipe_context* pipe, 652 const struct pipe_clip_state* state) 653{ 654 struct r300_context* r300 = r300_context(pipe); 655 struct r300_clip_state *clip = 656 (struct r300_clip_state*)r300->clip_state.state; 657 CB_LOCALS; 658 659 if (r300->screen->caps.has_tcl) { 660 BEGIN_CB(clip->cb, r300->clip_state.size); 661 OUT_CB_REG(R300_VAP_PVS_VECTOR_INDX_REG, 662 (r300->screen->caps.is_r500 ? 663 R500_PVS_UCP_START : R300_PVS_UCP_START)); 664 OUT_CB_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, 6 * 4); 665 OUT_CB_TABLE(state->ucp, 6 * 4); 666 END_CB; 667 668 r300_mark_atom_dirty(r300, &r300->clip_state); 669 } else { 670 draw_set_clip_state(r300->draw, state); 671 } 672} 673 674/* Create a new depth, stencil, and alpha state based on the CSO dsa state. 675 * 676 * This contains the depth buffer, stencil buffer, alpha test, and such. 677 * On the Radeon, depth and stencil buffer setup are intertwined, which is 678 * the reason for some of the strange-looking assignments across registers. */ 679static void* r300_create_dsa_state(struct pipe_context* pipe, 680 const struct pipe_depth_stencil_alpha_state* state) 681{ 682 boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500; 683 struct r300_dsa_state* dsa = CALLOC_STRUCT(r300_dsa_state); 684 CB_LOCALS; 685 uint32_t alpha_value_fp16 = 0; 686 uint32_t z_buffer_control = 0; 687 uint32_t z_stencil_control = 0; 688 uint32_t stencil_ref_mask = 0; 689 uint32_t stencil_ref_bf = 0; 690 691 dsa->dsa = *state; 692 693 /* Depth test setup. - separate write mask depth for decomp flush */ 694 if (state->depth_writemask) { 695 z_buffer_control |= R300_Z_WRITE_ENABLE; 696 } 697 698 if (state->depth_enabled) { 699 z_buffer_control |= R300_Z_ENABLE; 700 701 z_stencil_control |= 702 (r300_translate_depth_stencil_function(state->depth_func) << 703 R300_Z_FUNC_SHIFT); 704 } 705 706 /* Stencil buffer setup. */ 707 if (state->stencil[0].enabled) { 708 z_buffer_control |= R300_STENCIL_ENABLE; 709 z_stencil_control |= 710 (r300_translate_depth_stencil_function(state->stencil[0].func) << 711 R300_S_FRONT_FUNC_SHIFT) | 712 (r300_translate_stencil_op(state->stencil[0].fail_op) << 713 R300_S_FRONT_SFAIL_OP_SHIFT) | 714 (r300_translate_stencil_op(state->stencil[0].zpass_op) << 715 R300_S_FRONT_ZPASS_OP_SHIFT) | 716 (r300_translate_stencil_op(state->stencil[0].zfail_op) << 717 R300_S_FRONT_ZFAIL_OP_SHIFT); 718 719 stencil_ref_mask = 720 (state->stencil[0].valuemask << R300_STENCILMASK_SHIFT) | 721 (state->stencil[0].writemask << R300_STENCILWRITEMASK_SHIFT); 722 723 if (state->stencil[1].enabled) { 724 dsa->two_sided = TRUE; 725 726 z_buffer_control |= R300_STENCIL_FRONT_BACK; 727 z_stencil_control |= 728 (r300_translate_depth_stencil_function(state->stencil[1].func) << 729 R300_S_BACK_FUNC_SHIFT) | 730 (r300_translate_stencil_op(state->stencil[1].fail_op) << 731 R300_S_BACK_SFAIL_OP_SHIFT) | 732 (r300_translate_stencil_op(state->stencil[1].zpass_op) << 733 R300_S_BACK_ZPASS_OP_SHIFT) | 734 (r300_translate_stencil_op(state->stencil[1].zfail_op) << 735 R300_S_BACK_ZFAIL_OP_SHIFT); 736 737 stencil_ref_bf = 738 (state->stencil[1].valuemask << R300_STENCILMASK_SHIFT) | 739 (state->stencil[1].writemask << R300_STENCILWRITEMASK_SHIFT); 740 741 if (is_r500) { 742 z_buffer_control |= R500_STENCIL_REFMASK_FRONT_BACK; 743 } else { 744 dsa->two_sided_stencil_ref = 745 (state->stencil[0].valuemask != state->stencil[1].valuemask || 746 state->stencil[0].writemask != state->stencil[1].writemask); 747 } 748 } 749 } 750 751 /* Alpha test setup. */ 752 if (state->alpha_enabled) { 753 dsa->alpha_function = 754 r300_translate_alpha_function(state->alpha_func) | 755 R300_FG_ALPHA_FUNC_ENABLE; 756 757 dsa->alpha_function |= float_to_ubyte(state->alpha_ref_value); 758 alpha_value_fp16 = _mesa_float_to_half(state->alpha_ref_value); 759 } 760 761 BEGIN_CB(&dsa->cb_begin, 8); 762 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 763 OUT_CB(z_buffer_control); 764 OUT_CB(z_stencil_control); 765 OUT_CB(stencil_ref_mask); 766 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, stencil_ref_bf); 767 OUT_CB_REG(R500_FG_ALPHA_VALUE, alpha_value_fp16); 768 END_CB; 769 770 BEGIN_CB(dsa->cb_zb_no_readwrite, 8); 771 OUT_CB_REG_SEQ(R300_ZB_CNTL, 3); 772 OUT_CB(0); 773 OUT_CB(0); 774 OUT_CB(0); 775 OUT_CB_REG(R500_ZB_STENCILREFMASK_BF, 0); 776 OUT_CB_REG(R500_FG_ALPHA_VALUE, alpha_value_fp16); 777 END_CB; 778 779 return (void*)dsa; 780} 781 782static void r300_dsa_inject_stencilref(struct r300_context *r300) 783{ 784 struct r300_dsa_state *dsa = 785 (struct r300_dsa_state*)r300->dsa_state.state; 786 787 if (!dsa) 788 return; 789 790 dsa->stencil_ref_mask = 791 (dsa->stencil_ref_mask & ~R300_STENCILREF_MASK) | 792 r300->stencil_ref.ref_value[0]; 793 dsa->stencil_ref_bf = 794 (dsa->stencil_ref_bf & ~R300_STENCILREF_MASK) | 795 r300->stencil_ref.ref_value[1]; 796} 797 798/* Bind DSA state. */ 799static void r300_bind_dsa_state(struct pipe_context* pipe, 800 void* state) 801{ 802 struct r300_context* r300 = r300_context(pipe); 803 804 if (!state) { 805 return; 806 } 807 808 UPDATE_STATE(state, r300->dsa_state); 809 810 r300_mark_atom_dirty(r300, &r300->hyperz_state); /* Will be updated before the emission. */ 811 r300_dsa_inject_stencilref(r300); 812} 813 814/* Free DSA state. */ 815static void r300_delete_dsa_state(struct pipe_context* pipe, 816 void* state) 817{ 818 FREE(state); 819} 820 821static void r300_set_stencil_ref(struct pipe_context* pipe, 822 const struct pipe_stencil_ref sr) 823{ 824 struct r300_context* r300 = r300_context(pipe); 825 826 r300->stencil_ref = sr; 827 828 r300_dsa_inject_stencilref(r300); 829 r300_mark_atom_dirty(r300, &r300->dsa_state); 830} 831 832static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index, 833 const char *binding) 834{ 835 struct pipe_resource *tex = surf->texture; 836 struct r300_resource *rtex = r300_resource(tex); 837 838 fprintf(stderr, 839 "r300: %s[%i] Dim: %ix%i, Firstlayer: %i, " 840 "Lastlayer: %i, Level: %i, Format: %s\n" 841 842 "r300: TEX: Macro: %s, Micro: %s, " 843 "Dim: %ix%ix%i, LastLevel: %i, Format: %s\n", 844 845 binding, index, surf->width, surf->height, 846 surf->u.tex.first_layer, surf->u.tex.last_layer, surf->u.tex.level, 847 util_format_short_name(surf->format), 848 849 rtex->tex.macrotile[0] ? "YES" : " NO", 850 rtex->tex.microtile ? "YES" : " NO", 851 tex->width0, tex->height0, tex->depth0, 852 tex->last_level, util_format_short_name(surf->format)); 853} 854 855void r300_mark_fb_state_dirty(struct r300_context *r300, 856 enum r300_fb_state_change change) 857{ 858 struct pipe_framebuffer_state *state = r300->fb_state.state; 859 860 r300_mark_atom_dirty(r300, &r300->gpu_flush); 861 r300_mark_atom_dirty(r300, &r300->fb_state); 862 863 /* What is marked as dirty depends on the enum r300_fb_state_change. */ 864 if (change == R300_CHANGED_FB_STATE) { 865 r300_mark_atom_dirty(r300, &r300->aa_state); 866 r300_mark_atom_dirty(r300, &r300->dsa_state); /* for AlphaRef */ 867 r300_set_blend_color(&r300->context, r300->blend_color_state.state); 868 } 869 870 if (change == R300_CHANGED_FB_STATE || 871 change == R300_CHANGED_HYPERZ_FLAG) { 872 r300_mark_atom_dirty(r300, &r300->hyperz_state); 873 } 874 875 if (change == R300_CHANGED_FB_STATE || 876 change == R300_CHANGED_MULTIWRITE) { 877 r300_mark_atom_dirty(r300, &r300->fb_state_pipelined); 878 } 879 880 /* Now compute the fb_state atom size. */ 881 r300->fb_state.size = 2 + (8 * state->nr_cbufs); 882 883 if (r300->cbzb_clear) 884 r300->fb_state.size += 10; 885 else if (state->zsbuf) { 886 r300->fb_state.size += 10; 887 if (r300->hyperz_enabled) 888 r300->fb_state.size += 8; 889 } 890 891 if (r300->cmask_in_use) { 892 r300->fb_state.size += 6; 893 if (r300->screen->caps.is_r500) { 894 r300->fb_state.size += 3; 895 } 896 } 897 898 /* The size of the rest of atoms stays the same. */ 899} 900 901static void 902r300_set_framebuffer_state(struct pipe_context* pipe, 903 const struct pipe_framebuffer_state* state) 904{ 905 struct r300_context* r300 = r300_context(pipe); 906 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state; 907 struct pipe_framebuffer_state *current_state = r300->fb_state.state; 908 unsigned max_width, max_height, i; 909 uint32_t zbuffer_bpp = 0; 910 boolean unlock_zbuffer = FALSE; 911 912 if (r300->screen->caps.is_r500) { 913 max_width = max_height = 4096; 914 } else if (r300->screen->caps.is_r400) { 915 max_width = max_height = 4021; 916 } else { 917 max_width = max_height = 2560; 918 } 919 920 if (state->width > max_width || state->height > max_height) { 921 fprintf(stderr, "r300: Implementation error: Render targets are too " 922 "big in %s, refusing to bind framebuffer state!\n", __FUNCTION__); 923 return; 924 } 925 926 if (current_state->zsbuf && r300->zmask_in_use && !r300->locked_zbuffer) { 927 /* There is a zmask in use, what are we gonna do? */ 928 if (state->zsbuf) { 929 if (!pipe_surface_equal(current_state->zsbuf, state->zsbuf)) { 930 /* Decompress the currently bound zbuffer before we bind another one. */ 931 r300_decompress_zmask(r300); 932 r300->hiz_in_use = FALSE; 933 } 934 } else { 935 /* We don't bind another zbuffer, so lock the current one. */ 936 pipe_surface_reference(&r300->locked_zbuffer, current_state->zsbuf); 937 } 938 } else if (r300->locked_zbuffer) { 939 /* We have a locked zbuffer now, what are we gonna do? */ 940 if (state->zsbuf) { 941 if (!pipe_surface_equal(r300->locked_zbuffer, state->zsbuf)) { 942 /* We are binding some other zbuffer, so decompress the locked one, 943 * it gets unlocked automatically. */ 944 r300_decompress_zmask_locked_unsafe(r300); 945 r300->hiz_in_use = FALSE; 946 } else { 947 /* We are binding the locked zbuffer again, so unlock it. */ 948 unlock_zbuffer = TRUE; 949 } 950 } 951 } 952 assert(state->zsbuf || (r300->locked_zbuffer && !unlock_zbuffer) || !r300->zmask_in_use); 953 954 /* If zsbuf is set from NULL to non-NULL or vice versa.. */ 955 if (!!current_state->zsbuf != !!state->zsbuf) { 956 r300_mark_atom_dirty(r300, &r300->dsa_state); 957 } 958 959 util_copy_framebuffer_state(r300->fb_state.state, state); 960 961 /* Remove trailing NULL colorbuffers. */ 962 while (current_state->nr_cbufs && !current_state->cbufs[current_state->nr_cbufs-1]) 963 current_state->nr_cbufs--; 964 965 /* Set whether CMASK can be used. */ 966 r300->cmask_in_use = 967 state->nr_cbufs == 1 && state->cbufs[0] && 968 r300->screen->cmask_resource == state->cbufs[0]->texture; 969 970 /* Need to reset clamping or colormask. */ 971 r300_mark_atom_dirty(r300, &r300->blend_state); 972 973 /* Re-swizzle the blend color. */ 974 r300_set_blend_color(pipe, &((struct r300_blend_color_state*)r300->blend_color_state.state)->state); 975 976 if (unlock_zbuffer) { 977 pipe_surface_reference(&r300->locked_zbuffer, NULL); 978 } 979 980 r300_mark_fb_state_dirty(r300, R300_CHANGED_FB_STATE); 981 982 if (state->zsbuf) { 983 switch (util_format_get_blocksize(state->zsbuf->format)) { 984 case 2: 985 zbuffer_bpp = 16; 986 break; 987 case 4: 988 zbuffer_bpp = 24; 989 break; 990 } 991 992 /* Polygon offset depends on the zbuffer bit depth. */ 993 if (r300->zbuffer_bpp != zbuffer_bpp) { 994 r300->zbuffer_bpp = zbuffer_bpp; 995 996 if (r300->polygon_offset_enabled) 997 r300_mark_atom_dirty(r300, &r300->rs_state); 998 } 999 } 1000 1001 r300->num_samples = util_framebuffer_get_num_samples(state); 1002 1003 /* Set up AA config. */ 1004 if (r300->num_samples > 1) { 1005 switch (r300->num_samples) { 1006 case 2: 1007 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE | 1008 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_2; 1009 break; 1010 case 4: 1011 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE | 1012 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_4; 1013 break; 1014 case 6: 1015 aa->aa_config = R300_GB_AA_CONFIG_AA_ENABLE | 1016 R300_GB_AA_CONFIG_NUM_AA_SUBSAMPLES_6; 1017 break; 1018 } 1019 } else { 1020 aa->aa_config = 0; 1021 } 1022 1023 if (DBG_ON(r300, DBG_FB)) { 1024 fprintf(stderr, "r300: set_framebuffer_state:\n"); 1025 for (i = 0; i < state->nr_cbufs; i++) { 1026 if (state->cbufs[i]) 1027 r300_print_fb_surf_info(state->cbufs[i], i, "CB"); 1028 } 1029 if (state->zsbuf) { 1030 r300_print_fb_surf_info(state->zsbuf, 0, "ZB"); 1031 } 1032 } 1033} 1034 1035/* Create fragment shader state. */ 1036static void* r300_create_fs_state(struct pipe_context* pipe, 1037 const struct pipe_shader_state* shader) 1038{ 1039 struct r300_context* r300 = r300_context(pipe); 1040 struct r300_fragment_shader* fs = NULL; 1041 1042 fs = (struct r300_fragment_shader*)CALLOC_STRUCT(r300_fragment_shader); 1043 1044 /* Copy state directly into shader. */ 1045 fs->state = *shader; 1046 1047 if (fs->state.type == PIPE_SHADER_IR_NIR) { 1048 if (r300->screen->caps.is_r500) 1049 NIR_PASS_V(shader->ir.nir, r300_transform_fs_trig_input); 1050 fs->state.tokens = nir_to_tgsi(shader->ir.nir, pipe->screen); 1051 } else { 1052 assert(fs->state.type == PIPE_SHADER_IR_TGSI); 1053 /* we need to keep a local copy of the tokens */ 1054 fs->state.tokens = tgsi_dup_tokens(fs->state.tokens); 1055 } 1056 1057 /* Precompile the fragment shader at creation time to avoid jank at runtime. 1058 * In most cases we won't have anything in the key at draw time. 1059 */ 1060 struct r300_fragment_program_external_state precompile_state; 1061 memset(&precompile_state, 0, sizeof(precompile_state)); 1062 1063 struct tgsi_shader_info info; 1064 tgsi_scan_shader(fs->state.tokens, &info); 1065 for (int i = 0; i < PIPE_MAX_SHADER_SAMPLER_VIEWS; i++) { 1066 if (info.sampler_targets[i] == TGSI_TEXTURE_SHADOW1D || 1067 info.sampler_targets[i] == TGSI_TEXTURE_SHADOW2D) { 1068 precompile_state.unit[i].compare_mode_enabled = true; 1069 precompile_state.unit[i].texture_compare_func = PIPE_FUNC_LESS; 1070 } 1071 } 1072 r300_pick_fragment_shader(r300, fs, &precompile_state); 1073 1074 return (void *)fs; 1075} 1076 1077void r300_mark_fs_code_dirty(struct r300_context *r300) 1078{ 1079 struct r300_fragment_shader* fs = r300_fs(r300); 1080 1081 r300_mark_atom_dirty(r300, &r300->fs); 1082 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state); 1083 r300_mark_atom_dirty(r300, &r300->fs_constants); 1084 r300->fs.size = fs->shader->cb_code_size; 1085 1086 if (r300->screen->caps.is_r500) { 1087 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 7; 1088 r300->fs_constants.size = fs->shader->externals_count * 4 + 3; 1089 } else { 1090 r300->fs_rc_constant_state.size = fs->shader->rc_state_count * 5; 1091 r300->fs_constants.size = fs->shader->externals_count * 4 + 1; 1092 } 1093 1094 ((struct r300_constant_buffer*)r300->fs_constants.state)->remap_table = 1095 fs->shader->code.constants_remap_table; 1096} 1097 1098/* Bind fragment shader state. */ 1099static void r300_bind_fs_state(struct pipe_context* pipe, void* shader) 1100{ 1101 struct r300_context* r300 = r300_context(pipe); 1102 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 1103 1104 if (!fs) { 1105 r300->fs.state = NULL; 1106 return; 1107 } 1108 1109 r300->fs.state = fs; 1110 r300->fs_status = FRAGMENT_SHADER_DIRTY; 1111 1112 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */ 1113} 1114 1115/* Delete fragment shader state. */ 1116static void r300_delete_fs_state(struct pipe_context* pipe, void* shader) 1117{ 1118 struct r300_fragment_shader* fs = (struct r300_fragment_shader*)shader; 1119 struct r300_fragment_shader_code *tmp, *ptr = fs->first; 1120 1121 while (ptr) { 1122 tmp = ptr; 1123 ptr = ptr->next; 1124 rc_constants_destroy(&tmp->code.constants); 1125 FREE(tmp->cb_code); 1126 FREE(tmp); 1127 } 1128 FREE((void*)fs->state.tokens); 1129 FREE(shader); 1130} 1131 1132static void r300_set_polygon_stipple(struct pipe_context* pipe, 1133 const struct pipe_poly_stipple* state) 1134{ 1135} 1136 1137/* Create a new rasterizer state based on the CSO rasterizer state. 1138 * 1139 * This is a very large chunk of state, and covers most of the graphics 1140 * backend (GB), geometry assembly (GA), and setup unit (SU) blocks. 1141 * 1142 * In a not entirely unironic sidenote, this state has nearly nothing to do 1143 * with the actual block on the Radeon called the rasterizer (RS). */ 1144static void* r300_create_rs_state(struct pipe_context* pipe, 1145 const struct pipe_rasterizer_state* state) 1146{ 1147 struct r300_rs_state* rs = CALLOC_STRUCT(r300_rs_state); 1148 uint32_t vap_control_status; /* R300_VAP_CNTL_STATUS: 0x2140 */ 1149 uint32_t vap_clip_cntl; /* R300_VAP_CLIP_CNTL: 0x221C */ 1150 uint32_t point_size; /* R300_GA_POINT_SIZE: 0x421c */ 1151 uint32_t point_minmax; /* R300_GA_POINT_MINMAX: 0x4230 */ 1152 uint32_t line_control; /* R300_GA_LINE_CNTL: 0x4234 */ 1153 uint32_t polygon_offset_enable; /* R300_SU_POLY_OFFSET_ENABLE: 0x42b4 */ 1154 uint32_t cull_mode; /* R300_SU_CULL_MODE: 0x42b8 */ 1155 uint32_t line_stipple_config; /* R300_GA_LINE_STIPPLE_CONFIG: 0x4328 */ 1156 uint32_t line_stipple_value; /* R300_GA_LINE_STIPPLE_VALUE: 0x4260 */ 1157 uint32_t polygon_mode; /* R300_GA_POLY_MODE: 0x4288 */ 1158 uint32_t clip_rule; /* R300_SC_CLIP_RULE: 0x43D0 */ 1159 uint32_t round_mode; /* R300_GA_ROUND_MODE: 0x428c */ 1160 1161 /* Point sprites texture coordinates, 0: lower left, 1: upper right */ 1162 float point_texcoord_left = 0; /* R300_GA_POINT_S0: 0x4200 */ 1163 float point_texcoord_bottom = 0;/* R300_GA_POINT_T0: 0x4204 */ 1164 float point_texcoord_right = 1; /* R300_GA_POINT_S1: 0x4208 */ 1165 float point_texcoord_top = 0; /* R300_GA_POINT_T1: 0x420c */ 1166 boolean vclamp = !r300_context(pipe)->screen->caps.is_r500; 1167 CB_LOCALS; 1168 1169 /* Copy rasterizer state. */ 1170 rs->rs = *state; 1171 rs->rs_draw = *state; 1172 1173 rs->rs.sprite_coord_enable = state->point_quad_rasterization * 1174 state->sprite_coord_enable; 1175 r300_context(pipe)->is_point = false; 1176 1177 /* Override some states for Draw. */ 1178 rs->rs_draw.sprite_coord_enable = 0; /* We can do this in HW. */ 1179 rs->rs_draw.offset_point = 0; 1180 rs->rs_draw.offset_line = 0; 1181 rs->rs_draw.offset_tri = 0; 1182 rs->rs_draw.offset_clamp = 0; 1183 1184#if UTIL_ARCH_LITTLE_ENDIAN 1185 vap_control_status = R300_VC_NO_SWAP; 1186#else 1187 vap_control_status = R300_VC_32BIT_SWAP; 1188#endif 1189 1190 /* If no TCL engine is present, turn off the HW TCL. */ 1191 if (!r300_screen(pipe->screen)->caps.has_tcl) { 1192 vap_control_status |= R300_VAP_TCL_BYPASS; 1193 } 1194 1195 /* Point size width and height. */ 1196 point_size = 1197 pack_float_16_6x(state->point_size) | 1198 (pack_float_16_6x(state->point_size) << R300_POINTSIZE_X_SHIFT); 1199 1200 /* Point size clamping. */ 1201 if (state->point_size_per_vertex) { 1202 /* Per-vertex point size. 1203 * Clamp to [0, max FB size] */ 1204 float min_psiz = util_get_min_point_size(state); 1205 float max_psiz = pipe->screen->get_paramf(pipe->screen, 1206 PIPE_CAPF_MAX_POINT_SIZE); 1207 point_minmax = 1208 (pack_float_16_6x(min_psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) | 1209 (pack_float_16_6x(max_psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT); 1210 } else { 1211 /* We cannot disable the point-size vertex output, 1212 * so clamp it. */ 1213 float psiz = state->point_size; 1214 point_minmax = 1215 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MIN_SHIFT) | 1216 (pack_float_16_6x(psiz) << R300_GA_POINT_MINMAX_MAX_SHIFT); 1217 } 1218 1219 /* Line control. */ 1220 line_control = pack_float_16_6x(state->line_width) | 1221 (state->line_smooth ? R300_GA_LINE_CNTL_END_TYPE_COMP : R300_GA_LINE_CNTL_END_TYPE_SQR); 1222 1223 /* Enable polygon mode */ 1224 polygon_mode = 0; 1225 if (state->fill_front != PIPE_POLYGON_MODE_FILL || 1226 state->fill_back != PIPE_POLYGON_MODE_FILL) { 1227 polygon_mode = R300_GA_POLY_MODE_DUAL; 1228 } 1229 1230 /* Front face */ 1231 if (state->front_ccw) 1232 cull_mode = R300_FRONT_FACE_CCW; 1233 else 1234 cull_mode = R300_FRONT_FACE_CW; 1235 1236 /* Polygon offset */ 1237 polygon_offset_enable = 0; 1238 if (util_get_offset(state, state->fill_front)) { 1239 polygon_offset_enable |= R300_FRONT_ENABLE; 1240 } 1241 if (util_get_offset(state, state->fill_back)) { 1242 polygon_offset_enable |= R300_BACK_ENABLE; 1243 } 1244 1245 rs->polygon_offset_enable = polygon_offset_enable != 0; 1246 1247 /* Polygon mode */ 1248 if (polygon_mode) { 1249 polygon_mode |= 1250 r300_translate_polygon_mode_front(state->fill_front); 1251 polygon_mode |= 1252 r300_translate_polygon_mode_back(state->fill_back); 1253 } 1254 1255 if (state->cull_face & PIPE_FACE_FRONT) { 1256 cull_mode |= R300_CULL_FRONT; 1257 } 1258 if (state->cull_face & PIPE_FACE_BACK) { 1259 cull_mode |= R300_CULL_BACK; 1260 } 1261 1262 if (state->line_stipple_enable) { 1263 line_stipple_config = 1264 R300_GA_LINE_STIPPLE_CONFIG_LINE_RESET_LINE | 1265 (fui((float)state->line_stipple_factor) & 1266 R300_GA_LINE_STIPPLE_CONFIG_STIPPLE_SCALE_MASK); 1267 /* XXX this might need to be scaled up */ 1268 line_stipple_value = state->line_stipple_pattern; 1269 } else { 1270 line_stipple_config = 0; 1271 line_stipple_value = 0; 1272 } 1273 1274 if (state->flatshade) { 1275 rs->color_control = R300_SHADE_MODEL_FLAT; 1276 } else { 1277 rs->color_control = R300_SHADE_MODEL_SMOOTH; 1278 } 1279 1280 clip_rule = state->scissor ? 0xAAAA : 0xFFFF; 1281 1282 /* Point sprites coord mode */ 1283 if (rs->rs.sprite_coord_enable) { 1284 switch (state->sprite_coord_mode) { 1285 case PIPE_SPRITE_COORD_UPPER_LEFT: 1286 point_texcoord_top = 0.0f; 1287 point_texcoord_bottom = 1.0f; 1288 break; 1289 case PIPE_SPRITE_COORD_LOWER_LEFT: 1290 point_texcoord_top = 1.0f; 1291 point_texcoord_bottom = 0.0f; 1292 break; 1293 } 1294 } 1295 1296 if (r300_screen(pipe->screen)->caps.has_tcl) { 1297 vap_clip_cntl = (state->clip_plane_enable & 63) | 1298 R300_PS_UCP_MODE_CLIP_AS_TRIFAN; 1299 } else { 1300 vap_clip_cntl = R300_CLIP_DISABLE; 1301 } 1302 1303 /* Vertex color clamping. FP20 means no clamping. */ 1304 round_mode = 1305 R300_GA_ROUND_MODE_GEOMETRY_ROUND_NEAREST | 1306 (!vclamp ? (R300_GA_ROUND_MODE_RGB_CLAMP_FP20 | 1307 R300_GA_ROUND_MODE_ALPHA_CLAMP_FP20) : 0); 1308 1309 /* Build the main command buffer. */ 1310 BEGIN_CB(rs->cb_main, RS_STATE_MAIN_SIZE); 1311 OUT_CB_REG(R300_VAP_CNTL_STATUS, vap_control_status); 1312 OUT_CB_REG(R300_VAP_CLIP_CNTL, vap_clip_cntl); 1313 OUT_CB_REG(R300_GA_POINT_SIZE, point_size); 1314 OUT_CB_REG_SEQ(R300_GA_POINT_MINMAX, 2); 1315 OUT_CB(point_minmax); 1316 OUT_CB(line_control); 1317 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2); 1318 OUT_CB(polygon_offset_enable); 1319 rs->cull_mode_index = 11; 1320 OUT_CB(cull_mode); 1321 OUT_CB_REG(R300_GA_LINE_STIPPLE_CONFIG, line_stipple_config); 1322 OUT_CB_REG(R300_GA_LINE_STIPPLE_VALUE, line_stipple_value); 1323 OUT_CB_REG(R300_GA_POLY_MODE, polygon_mode); 1324 OUT_CB_REG(R300_GA_ROUND_MODE, round_mode); 1325 OUT_CB_REG(R300_SC_CLIP_RULE, clip_rule); 1326 OUT_CB_REG_SEQ(R300_GA_POINT_S0, 4); 1327 OUT_CB_32F(point_texcoord_left); 1328 OUT_CB_32F(point_texcoord_bottom); 1329 OUT_CB_32F(point_texcoord_right); 1330 OUT_CB_32F(point_texcoord_top); 1331 END_CB; 1332 1333 /* Build the two command buffers for polygon offset setup. */ 1334 if (polygon_offset_enable) { 1335 float scale = state->offset_scale * 12; 1336 float offset = state->offset_units * 4; 1337 1338 BEGIN_CB(rs->cb_poly_offset_zb16, 5); 1339 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4); 1340 OUT_CB_32F(scale); 1341 OUT_CB_32F(offset); 1342 OUT_CB_32F(scale); 1343 OUT_CB_32F(offset); 1344 END_CB; 1345 1346 offset = state->offset_units * 2; 1347 1348 BEGIN_CB(rs->cb_poly_offset_zb24, 5); 1349 OUT_CB_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4); 1350 OUT_CB_32F(scale); 1351 OUT_CB_32F(offset); 1352 OUT_CB_32F(scale); 1353 OUT_CB_32F(offset); 1354 END_CB; 1355 } 1356 1357 return (void*)rs; 1358} 1359 1360/* Bind rasterizer state. */ 1361static void r300_bind_rs_state(struct pipe_context* pipe, void* state) 1362{ 1363 struct r300_context* r300 = r300_context(pipe); 1364 struct r300_rs_state* rs = (struct r300_rs_state*)state; 1365 int last_sprite_coord_enable = r300->sprite_coord_enable; 1366 boolean last_two_sided_color = r300->two_sided_color; 1367 boolean last_msaa_enable = r300->msaa_enable; 1368 boolean last_flatshade = r300->flatshade; 1369 boolean last_clip_halfz = r300->clip_halfz; 1370 1371 if (r300->draw && rs) { 1372 draw_set_rasterizer_state(r300->draw, &rs->rs_draw, state); 1373 } 1374 1375 if (rs) { 1376 r300->polygon_offset_enabled = rs->polygon_offset_enable; 1377 r300->sprite_coord_enable = rs->rs.sprite_coord_enable; 1378 r300->two_sided_color = rs->rs.light_twoside; 1379 r300->msaa_enable = rs->rs.multisample; 1380 r300->flatshade = rs->rs.flatshade; 1381 r300->clip_halfz = rs->rs.clip_halfz; 1382 } else { 1383 r300->polygon_offset_enabled = FALSE; 1384 r300->sprite_coord_enable = 0; 1385 r300->two_sided_color = FALSE; 1386 r300->msaa_enable = FALSE; 1387 r300->flatshade = FALSE; 1388 r300->clip_halfz = FALSE; 1389 } 1390 1391 UPDATE_STATE(state, r300->rs_state); 1392 r300->rs_state.size = RS_STATE_MAIN_SIZE + (r300->polygon_offset_enabled ? 5 : 0); 1393 1394 if (last_sprite_coord_enable != r300->sprite_coord_enable || 1395 last_two_sided_color != r300->two_sided_color || 1396 last_flatshade != r300->flatshade) { 1397 r300_mark_atom_dirty(r300, &r300->rs_block_state); 1398 } 1399 1400 if (last_msaa_enable != r300->msaa_enable) { 1401 if (r300->alpha_to_coverage) { 1402 r300_mark_atom_dirty(r300, &r300->dsa_state); 1403 } 1404 1405 if (r300->alpha_to_one && 1406 r300->fs_status == FRAGMENT_SHADER_VALID) { 1407 r300->fs_status = FRAGMENT_SHADER_MAYBE_DIRTY; 1408 } 1409 } 1410 1411 if (r300->screen->caps.has_tcl && last_clip_halfz != r300->clip_halfz) { 1412 r300_mark_atom_dirty(r300, &r300->vs_state); 1413 } 1414} 1415 1416/* Free rasterizer state. */ 1417static void r300_delete_rs_state(struct pipe_context* pipe, void* state) 1418{ 1419 FREE(state); 1420} 1421 1422static void* 1423 r300_create_sampler_state(struct pipe_context* pipe, 1424 const struct pipe_sampler_state* state) 1425{ 1426 struct r300_context* r300 = r300_context(pipe); 1427 struct r300_sampler_state* sampler = CALLOC_STRUCT(r300_sampler_state); 1428 boolean is_r500 = r300->screen->caps.is_r500; 1429 int lod_bias; 1430 1431 sampler->state = *state; 1432 1433 /* r300 doesn't handle CLAMP and MIRROR_CLAMP correctly when either MAG 1434 * or MIN filter is NEAREST. Since texwrap produces same results 1435 * for CLAMP and CLAMP_TO_EDGE, we use them instead. */ 1436 if (sampler->state.min_img_filter == PIPE_TEX_FILTER_NEAREST || 1437 sampler->state.mag_img_filter == PIPE_TEX_FILTER_NEAREST) { 1438 /* Wrap S. */ 1439 if (sampler->state.wrap_s == PIPE_TEX_WRAP_CLAMP) 1440 sampler->state.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 1441 else if (sampler->state.wrap_s == PIPE_TEX_WRAP_MIRROR_CLAMP) 1442 sampler->state.wrap_s = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE; 1443 1444 /* Wrap T. */ 1445 if (sampler->state.wrap_t == PIPE_TEX_WRAP_CLAMP) 1446 sampler->state.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 1447 else if (sampler->state.wrap_t == PIPE_TEX_WRAP_MIRROR_CLAMP) 1448 sampler->state.wrap_t = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE; 1449 1450 /* Wrap R. */ 1451 if (sampler->state.wrap_r == PIPE_TEX_WRAP_CLAMP) 1452 sampler->state.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE; 1453 else if (sampler->state.wrap_r == PIPE_TEX_WRAP_MIRROR_CLAMP) 1454 sampler->state.wrap_r = PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE; 1455 } 1456 1457 sampler->filter0 |= 1458 (r300_translate_wrap(sampler->state.wrap_s) << R300_TX_WRAP_S_SHIFT) | 1459 (r300_translate_wrap(sampler->state.wrap_t) << R300_TX_WRAP_T_SHIFT) | 1460 (r300_translate_wrap(sampler->state.wrap_r) << R300_TX_WRAP_R_SHIFT); 1461 1462 sampler->filter0 |= r300_translate_tex_filters(state->min_img_filter, 1463 state->mag_img_filter, 1464 state->min_mip_filter, 1465 state->max_anisotropy > 1); 1466 1467 sampler->filter0 |= r300_anisotropy(state->max_anisotropy); 1468 1469 /* Unfortunately, r300-r500 don't support floating-point mipmap lods. */ 1470 /* We must pass these to the merge function to clamp them properly. */ 1471 sampler->min_lod = (unsigned)MAX2(state->min_lod, 0); 1472 sampler->max_lod = (unsigned)MAX2(ceilf(state->max_lod), 0); 1473 1474 lod_bias = CLAMP((int)(state->lod_bias * 32 + 1), -(1 << 9), (1 << 9) - 1); 1475 1476 sampler->filter1 |= (lod_bias << R300_LOD_BIAS_SHIFT) & R300_LOD_BIAS_MASK; 1477 1478 /* This is very high quality anisotropic filtering for R5xx. 1479 * It's good for benchmarking the performance of texturing but 1480 * in practice we don't want to slow down the driver because it's 1481 * a pretty good performance killer. Feel free to play with it. */ 1482 if (DBG_ON(r300, DBG_ANISOHQ) && is_r500) { 1483 sampler->filter1 |= r500_anisotropy(state->max_anisotropy); 1484 } 1485 1486 /* R500-specific fixups and optimizations */ 1487 if (r300->screen->caps.is_r500) { 1488 sampler->filter1 |= R500_BORDER_FIX; 1489 } 1490 1491 return (void*)sampler; 1492} 1493 1494static void r300_bind_sampler_states(struct pipe_context* pipe, 1495 enum pipe_shader_type shader, 1496 unsigned start, unsigned count, 1497 void** states) 1498{ 1499 struct r300_context* r300 = r300_context(pipe); 1500 struct r300_textures_state* state = 1501 (struct r300_textures_state*)r300->textures_state.state; 1502 unsigned tex_units = r300->screen->caps.num_tex_units; 1503 1504 assert(start == 0); 1505 1506 if (shader != PIPE_SHADER_FRAGMENT) 1507 return; 1508 1509 if (count > tex_units) 1510 return; 1511 1512 memcpy(state->sampler_states, states, sizeof(void*) * count); 1513 state->sampler_state_count = count; 1514 1515 r300_mark_atom_dirty(r300, &r300->textures_state); 1516} 1517 1518static void r300_delete_sampler_state(struct pipe_context* pipe, void* state) 1519{ 1520 FREE(state); 1521} 1522 1523static uint32_t r300_assign_texture_cache_region(unsigned index, unsigned num) 1524{ 1525 /* This looks like a hack, but I believe it's suppose to work like 1526 * that. To illustrate how this works, let's assume you have 5 textures. 1527 * From docs, 5 and the successive numbers are: 1528 * 1529 * FOURTH_1 = 5 1530 * FOURTH_2 = 6 1531 * FOURTH_3 = 7 1532 * EIGHTH_0 = 8 1533 * EIGHTH_1 = 9 1534 * 1535 * First 3 textures will get 3/4 of size of the cache, divided evenly 1536 * between them. The last 1/4 of the cache must be divided between 1537 * the last 2 textures, each will therefore get 1/8 of the cache. 1538 * Why not just to use "5 + texture_index" ? 1539 * 1540 * This simple trick works for all "num" <= 16. 1541 */ 1542 if (num <= 1) 1543 return R300_TX_CACHE(R300_TX_CACHE_WHOLE); 1544 else 1545 return R300_TX_CACHE(num + index); 1546} 1547 1548static void r300_set_sampler_views(struct pipe_context* pipe, 1549 enum pipe_shader_type shader, 1550 unsigned start, unsigned count, 1551 unsigned unbind_num_trailing_slots, 1552 bool take_ownership, 1553 struct pipe_sampler_view** views) 1554{ 1555 struct r300_context* r300 = r300_context(pipe); 1556 struct r300_textures_state* state = 1557 (struct r300_textures_state*)r300->textures_state.state; 1558 struct r300_resource *texture; 1559 unsigned i, real_num_views = 0, view_index = 0; 1560 unsigned tex_units = r300->screen->caps.num_tex_units; 1561 boolean dirty_tex = FALSE; 1562 1563 assert(start == 0); /* non-zero not handled yet */ 1564 1565 if (shader != PIPE_SHADER_FRAGMENT || count > tex_units) { 1566 if (take_ownership) { 1567 for (unsigned i = 0; i < count; i++) { 1568 struct pipe_sampler_view *view = views[i]; 1569 pipe_sampler_view_reference(&view, NULL); 1570 } 1571 } 1572 return; 1573 } 1574 1575 /* Calculate the real number of views. */ 1576 for (i = 0; i < count; i++) { 1577 if (views[i]) 1578 real_num_views++; 1579 } 1580 1581 for (i = 0; i < count; i++) { 1582 if (take_ownership) { 1583 pipe_sampler_view_reference( 1584 (struct pipe_sampler_view**)&state->sampler_views[i], NULL); 1585 state->sampler_views[i] = (struct r300_sampler_view*)views[i]; 1586 } else { 1587 pipe_sampler_view_reference( 1588 (struct pipe_sampler_view**)&state->sampler_views[i], 1589 views[i]); 1590 } 1591 1592 if (!views[i]) { 1593 continue; 1594 } 1595 1596 /* A new sampler view (= texture)... */ 1597 dirty_tex = TRUE; 1598 1599 /* Set the texrect factor in the fragment shader. 1600 * Needed for RECT and NPOT fallback. */ 1601 texture = r300_resource(views[i]->texture); 1602 if (texture->tex.is_npot) { 1603 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state); 1604 } 1605 1606 state->sampler_views[i]->texcache_region = 1607 r300_assign_texture_cache_region(view_index, real_num_views); 1608 view_index++; 1609 } 1610 1611 for (i = count; i < tex_units; i++) { 1612 if (state->sampler_views[i]) { 1613 pipe_sampler_view_reference( 1614 (struct pipe_sampler_view**)&state->sampler_views[i], 1615 NULL); 1616 } 1617 } 1618 1619 state->sampler_view_count = count; 1620 1621 r300_mark_atom_dirty(r300, &r300->textures_state); 1622 1623 if (dirty_tex) { 1624 r300_mark_atom_dirty(r300, &r300->texture_cache_inval); 1625 } 1626} 1627 1628struct pipe_sampler_view * 1629r300_create_sampler_view_custom(struct pipe_context *pipe, 1630 struct pipe_resource *texture, 1631 const struct pipe_sampler_view *templ, 1632 unsigned width0_override, 1633 unsigned height0_override) 1634{ 1635 struct r300_sampler_view *view = CALLOC_STRUCT(r300_sampler_view); 1636 struct r300_resource *tex = r300_resource(texture); 1637 boolean is_r500 = r300_screen(pipe->screen)->caps.is_r500; 1638 boolean dxtc_swizzle = r300_screen(pipe->screen)->caps.dxtc_swizzle; 1639 1640 if (view) { 1641 unsigned hwformat; 1642 1643 view->base = *templ; 1644 view->base.reference.count = 1; 1645 view->base.context = pipe; 1646 view->base.texture = NULL; 1647 pipe_resource_reference(&view->base.texture, texture); 1648 1649 view->width0_override = width0_override; 1650 view->height0_override = height0_override; 1651 view->swizzle[0] = templ->swizzle_r; 1652 view->swizzle[1] = templ->swizzle_g; 1653 view->swizzle[2] = templ->swizzle_b; 1654 view->swizzle[3] = templ->swizzle_a; 1655 1656 hwformat = r300_translate_texformat(templ->format, 1657 view->swizzle, 1658 is_r500, 1659 dxtc_swizzle); 1660 1661 if (hwformat == ~0) { 1662 fprintf(stderr, "r300: Oops. Got unsupported format %s in %s.\n", 1663 util_format_short_name(templ->format), __func__); 1664 } 1665 assert(hwformat != ~0); 1666 1667 r300_texture_setup_format_state(r300_screen(pipe->screen), tex, 1668 templ->format, 0, 1669 width0_override, height0_override, 1670 &view->format); 1671 view->format.format1 |= hwformat; 1672 if (is_r500) { 1673 view->format.format2 |= r500_tx_format_msb_bit(templ->format); 1674 } 1675 } 1676 1677 return (struct pipe_sampler_view*)view; 1678} 1679 1680static struct pipe_sampler_view * 1681r300_create_sampler_view(struct pipe_context *pipe, 1682 struct pipe_resource *texture, 1683 const struct pipe_sampler_view *templ) 1684{ 1685 return r300_create_sampler_view_custom(pipe, texture, templ, 1686 r300_resource(texture)->tex.width0, 1687 r300_resource(texture)->tex.height0); 1688} 1689 1690 1691static void 1692r300_sampler_view_destroy(struct pipe_context *pipe, 1693 struct pipe_sampler_view *view) 1694{ 1695 pipe_resource_reference(&view->texture, NULL); 1696 FREE(view); 1697} 1698 1699static void r300_set_sample_mask(struct pipe_context *pipe, 1700 unsigned mask) 1701{ 1702 struct r300_context* r300 = r300_context(pipe); 1703 1704 *((unsigned*)r300->sample_mask.state) = mask; 1705 1706 r300_mark_atom_dirty(r300, &r300->sample_mask); 1707} 1708 1709static void r300_set_scissor_states(struct pipe_context* pipe, 1710 unsigned start_slot, 1711 unsigned num_scissors, 1712 const struct pipe_scissor_state* state) 1713{ 1714 struct r300_context* r300 = r300_context(pipe); 1715 1716 memcpy(r300->scissor_state.state, state, 1717 sizeof(struct pipe_scissor_state)); 1718 1719 r300_mark_atom_dirty(r300, &r300->scissor_state); 1720} 1721 1722static void r300_set_viewport_states(struct pipe_context* pipe, 1723 unsigned start_slot, 1724 unsigned num_viewports, 1725 const struct pipe_viewport_state* state) 1726{ 1727 struct r300_context* r300 = r300_context(pipe); 1728 struct r300_viewport_state* viewport = 1729 (struct r300_viewport_state*)r300->viewport_state.state; 1730 1731 r300->viewport = *state; 1732 1733 if (r300->draw) { 1734 draw_set_viewport_states(r300->draw, start_slot, num_viewports, state); 1735 viewport->vte_control = R300_VTX_XY_FMT | R300_VTX_Z_FMT; 1736 return; 1737 } 1738 1739 /* Do the transform in HW. */ 1740 viewport->vte_control = R300_VTX_W0_FMT; 1741 1742 if (state->scale[0] != 1.0f) { 1743 viewport->xscale = state->scale[0]; 1744 viewport->vte_control |= R300_VPORT_X_SCALE_ENA; 1745 } 1746 if (state->scale[1] != 1.0f) { 1747 viewport->yscale = state->scale[1]; 1748 viewport->vte_control |= R300_VPORT_Y_SCALE_ENA; 1749 } 1750 if (state->scale[2] != 1.0f) { 1751 viewport->zscale = state->scale[2]; 1752 viewport->vte_control |= R300_VPORT_Z_SCALE_ENA; 1753 } 1754 if (state->translate[0] != 0.0f) { 1755 viewport->xoffset = state->translate[0]; 1756 viewport->vte_control |= R300_VPORT_X_OFFSET_ENA; 1757 } 1758 if (state->translate[1] != 0.0f) { 1759 viewport->yoffset = state->translate[1]; 1760 viewport->vte_control |= R300_VPORT_Y_OFFSET_ENA; 1761 } 1762 if (state->translate[2] != 0.0f) { 1763 viewport->zoffset = state->translate[2]; 1764 viewport->vte_control |= R300_VPORT_Z_OFFSET_ENA; 1765 } 1766 1767 r300_mark_atom_dirty(r300, &r300->viewport_state); 1768 if (r300->fs.state && r300_fs(r300)->shader && 1769 r300_fs(r300)->shader->inputs.wpos != ATTR_UNUSED) { 1770 r300_mark_atom_dirty(r300, &r300->fs_rc_constant_state); 1771 } 1772} 1773 1774static void r300_set_vertex_buffers_hwtcl(struct pipe_context* pipe, 1775 unsigned start_slot, unsigned count, 1776 unsigned unbind_num_trailing_slots, 1777 bool take_ownership, 1778 const struct pipe_vertex_buffer* buffers) 1779{ 1780 struct r300_context* r300 = r300_context(pipe); 1781 1782 util_set_vertex_buffers_count(r300->vertex_buffer, 1783 &r300->nr_vertex_buffers, 1784 buffers, start_slot, count, 1785 unbind_num_trailing_slots, take_ownership); 1786 1787 /* There must be at least one vertex buffer set, otherwise it locks up. */ 1788 if (!r300->nr_vertex_buffers) { 1789 util_set_vertex_buffers_count(r300->vertex_buffer, 1790 &r300->nr_vertex_buffers, 1791 &r300->dummy_vb, 0, 1, 0, false); 1792 } 1793 1794 r300->vertex_arrays_dirty = TRUE; 1795} 1796 1797static void r300_set_vertex_buffers_swtcl(struct pipe_context* pipe, 1798 unsigned start_slot, unsigned count, 1799 unsigned unbind_num_trailing_slots, 1800 bool take_ownership, 1801 const struct pipe_vertex_buffer* buffers) 1802{ 1803 struct r300_context* r300 = r300_context(pipe); 1804 unsigned i; 1805 1806 util_set_vertex_buffers_count(r300->vertex_buffer, 1807 &r300->nr_vertex_buffers, 1808 buffers, start_slot, count, 1809 unbind_num_trailing_slots, take_ownership); 1810 draw_set_vertex_buffers(r300->draw, start_slot, count, 1811 unbind_num_trailing_slots, buffers); 1812 1813 if (!buffers) 1814 return; 1815 1816 for (i = 0; i < count; i++) { 1817 if (buffers[i].is_user_buffer) { 1818 draw_set_mapped_vertex_buffer(r300->draw, start_slot + i, 1819 buffers[i].buffer.user, ~0); 1820 } else if (buffers[i].buffer.resource) { 1821 draw_set_mapped_vertex_buffer(r300->draw, start_slot + i, 1822 r300_resource(buffers[i].buffer.resource)->malloced_buffer, ~0); 1823 } 1824 } 1825} 1826 1827/* Initialize the PSC tables. */ 1828static void r300_vertex_psc(struct r300_vertex_element_state *velems) 1829{ 1830 struct r300_vertex_stream_state *vstream = &velems->vertex_stream; 1831 uint16_t type, swizzle; 1832 enum pipe_format format; 1833 unsigned i; 1834 1835 /* Vertex shaders have no semantics on their inputs, 1836 * so PSC should just route stuff based on the vertex elements, 1837 * and not on attrib information. */ 1838 for (i = 0; i < velems->count; i++) { 1839 format = velems->velem[i].src_format; 1840 1841 type = r300_translate_vertex_data_type(format); 1842 if (type == R300_INVALID_FORMAT) { 1843 fprintf(stderr, "r300: Bad vertex format %s.\n", 1844 util_format_short_name(format)); 1845 assert(0); 1846 abort(); 1847 } 1848 1849 type |= i << R300_DST_VEC_LOC_SHIFT; 1850 swizzle = r300_translate_vertex_data_swizzle(format); 1851 1852 if (i & 1) { 1853 vstream->vap_prog_stream_cntl[i >> 1] |= type << 16; 1854 vstream->vap_prog_stream_cntl_ext[i >> 1] |= (uint32_t)swizzle << 16; 1855 } else { 1856 vstream->vap_prog_stream_cntl[i >> 1] |= type; 1857 vstream->vap_prog_stream_cntl_ext[i >> 1] |= swizzle; 1858 } 1859 } 1860 1861 /* Set the last vector in the PSC. */ 1862 if (i) { 1863 i -= 1; 1864 } 1865 vstream->vap_prog_stream_cntl[i >> 1] |= 1866 (R300_LAST_VEC << (i & 1 ? 16 : 0)); 1867 1868 vstream->count = (i >> 1) + 1; 1869} 1870 1871static void* r300_create_vertex_elements_state(struct pipe_context* pipe, 1872 unsigned count, 1873 const struct pipe_vertex_element* attribs) 1874{ 1875 struct r300_vertex_element_state *velems; 1876 unsigned i; 1877 struct pipe_vertex_element dummy_attrib = {0}; 1878 1879 /* R300 Programmable Stream Control (PSC) doesn't support 0 vertex elements. */ 1880 if (!count) { 1881 dummy_attrib.src_format = PIPE_FORMAT_R8G8B8A8_UNORM; 1882 attribs = &dummy_attrib; 1883 count = 1; 1884 } else if (count > 16) { 1885 fprintf(stderr, "r300: More than 16 vertex elements are not supported," 1886 " requested %i, using 16.\n", count); 1887 count = 16; 1888 } 1889 1890 velems = CALLOC_STRUCT(r300_vertex_element_state); 1891 if (!velems) 1892 return NULL; 1893 1894 velems->count = count; 1895 memcpy(velems->velem, attribs, sizeof(struct pipe_vertex_element) * count); 1896 1897 if (r300_screen(pipe->screen)->caps.has_tcl) { 1898 /* Setup PSC. 1899 * The unused components will be replaced by (..., 0, 1). */ 1900 r300_vertex_psc(velems); 1901 1902 for (i = 0; i < count; i++) { 1903 velems->format_size[i] = 1904 align(util_format_get_blocksize(velems->velem[i].src_format), 4); 1905 velems->vertex_size_dwords += velems->format_size[i] / 4; 1906 } 1907 } 1908 1909 return velems; 1910} 1911 1912static void r300_bind_vertex_elements_state(struct pipe_context *pipe, 1913 void *state) 1914{ 1915 struct r300_context *r300 = r300_context(pipe); 1916 struct r300_vertex_element_state *velems = state; 1917 1918 if (!velems) { 1919 return; 1920 } 1921 1922 r300->velems = velems; 1923 1924 if (r300->draw) { 1925 draw_set_vertex_elements(r300->draw, velems->count, velems->velem); 1926 return; 1927 } 1928 1929 UPDATE_STATE(&velems->vertex_stream, r300->vertex_stream_state); 1930 r300->vertex_stream_state.size = (1 + velems->vertex_stream.count) * 2; 1931 r300->vertex_arrays_dirty = TRUE; 1932} 1933 1934static void r300_delete_vertex_elements_state(struct pipe_context *pipe, void *state) 1935{ 1936 FREE(state); 1937} 1938 1939static void* r300_create_vs_state(struct pipe_context* pipe, 1940 const struct pipe_shader_state* shader) 1941{ 1942 struct r300_context* r300 = r300_context(pipe); 1943 struct r300_vertex_shader* vs = CALLOC_STRUCT(r300_vertex_shader); 1944 1945 /* Copy state directly into shader. */ 1946 vs->state = *shader; 1947 1948 if (vs->state.type == PIPE_SHADER_IR_NIR) { 1949 static const struct nir_to_tgsi_options swtcl_options = {0}; 1950 static const struct nir_to_tgsi_options hwtcl_r300_options = { 1951 .lower_cmp = true, 1952 .lower_fabs = true, 1953 }; 1954 static const struct nir_to_tgsi_options hwtcl_r500_options = { 1955 .lower_cmp = true, 1956 }; 1957 const struct nir_to_tgsi_options *ntt_options; 1958 if (r300->screen->caps.has_tcl) { 1959 if (r300->screen->caps.is_r500) { 1960 ntt_options = &hwtcl_r500_options; 1961 NIR_PASS_V(shader->ir.nir, r300_transform_vs_trig_input); 1962 } 1963 else 1964 ntt_options = &hwtcl_r300_options; 1965 } else { 1966 ntt_options = &swtcl_options; 1967 } 1968 vs->state.tokens = nir_to_tgsi_options(shader->ir.nir, pipe->screen, 1969 ntt_options); 1970 } else { 1971 assert(vs->state.type == PIPE_SHADER_IR_TGSI); 1972 /* we need to keep a local copy of the tokens */ 1973 vs->state.tokens = tgsi_dup_tokens(vs->state.tokens); 1974 } 1975 1976 if (!vs->first) 1977 vs->first = vs->shader = CALLOC_STRUCT(r300_vertex_shader_code); 1978 if (r300->screen->caps.has_tcl) { 1979 r300_translate_vertex_shader(r300, vs); 1980 } else { 1981 r300_draw_init_vertex_shader(r300, vs); 1982 } 1983 1984 return vs; 1985} 1986 1987static void r300_bind_vs_state(struct pipe_context* pipe, void* shader) 1988{ 1989 struct r300_context* r300 = r300_context(pipe); 1990 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 1991 1992 if (!vs) { 1993 r300->vs_state.state = NULL; 1994 return; 1995 } 1996 if (vs == r300->vs_state.state) { 1997 return; 1998 } 1999 r300->vs_state.state = vs; 2000 2001 /* The majority of the RS block bits is dependent on the vertex shader. */ 2002 r300_mark_atom_dirty(r300, &r300->rs_block_state); /* Will be updated before the emission. */ 2003 2004 if (r300->screen->caps.has_tcl) { 2005 unsigned fc_op_dwords = r300->screen->caps.is_r500 ? 3 : 2; 2006 r300_mark_atom_dirty(r300, &r300->vs_state); 2007 r300->vs_state.size = vs->shader->code.length + 9 + 2008 (R300_VS_MAX_FC_OPS * fc_op_dwords + 4); 2009 2010 r300_mark_atom_dirty(r300, &r300->vs_constants); 2011 r300->vs_constants.size = 2012 2 + 2013 (vs->shader->externals_count ? vs->shader->externals_count * 4 + 3 : 0) + 2014 (vs->shader->immediates_count ? vs->shader->immediates_count * 4 + 3 : 0); 2015 2016 ((struct r300_constant_buffer*)r300->vs_constants.state)->remap_table = 2017 vs->shader->code.constants_remap_table; 2018 2019 r300_mark_atom_dirty(r300, &r300->pvs_flush); 2020 } else { 2021 draw_bind_vertex_shader(r300->draw, 2022 (struct draw_vertex_shader*)vs->draw_vs); 2023 } 2024} 2025 2026static void r300_delete_vs_state(struct pipe_context* pipe, void* shader) 2027{ 2028 struct r300_context* r300 = r300_context(pipe); 2029 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)shader; 2030 2031 if (r300->screen->caps.has_tcl) { 2032 while (vs->shader) { 2033 rc_constants_destroy(&vs->shader->code.constants); 2034 FREE(vs->shader->code.constants_remap_table); 2035 vs->shader = vs->shader->next; 2036 FREE(vs->first); 2037 vs->first = vs->shader; 2038 } 2039 } else { 2040 draw_delete_vertex_shader(r300->draw, 2041 (struct draw_vertex_shader*)vs->draw_vs); 2042 } 2043 2044 FREE((void*)vs->state.tokens); 2045 FREE(shader); 2046} 2047 2048static void r300_set_constant_buffer(struct pipe_context *pipe, 2049 enum pipe_shader_type shader, uint index, 2050 bool take_ownership, 2051 const struct pipe_constant_buffer *cb) 2052{ 2053 struct r300_context* r300 = r300_context(pipe); 2054 struct r300_constant_buffer *cbuf; 2055 uint32_t *mapped; 2056 2057 if (!cb || (!cb->buffer && !cb->user_buffer)) 2058 return; 2059 2060 switch (shader) { 2061 case PIPE_SHADER_VERTEX: 2062 cbuf = (struct r300_constant_buffer*)r300->vs_constants.state; 2063 break; 2064 case PIPE_SHADER_FRAGMENT: 2065 cbuf = (struct r300_constant_buffer*)r300->fs_constants.state; 2066 break; 2067 default: 2068 return; 2069 } 2070 2071 2072 if (cb->user_buffer) 2073 mapped = (uint32_t*)cb->user_buffer; 2074 else { 2075 struct r300_resource *rbuf = r300_resource(cb->buffer); 2076 2077 if (rbuf && rbuf->malloced_buffer) 2078 mapped = (uint32_t*)(rbuf->malloced_buffer + cb->buffer_offset); 2079 else 2080 return; 2081 } 2082 2083 if (shader == PIPE_SHADER_FRAGMENT || 2084 (shader == PIPE_SHADER_VERTEX && r300->screen->caps.has_tcl)) { 2085 cbuf->ptr = mapped; 2086 } 2087 2088 if (shader == PIPE_SHADER_VERTEX) { 2089 if (r300->screen->caps.has_tcl) { 2090 struct r300_vertex_shader *vs = r300_vs(r300); 2091 2092 if (!vs) { 2093 cbuf->buffer_base = 0; 2094 return; 2095 } 2096 2097 cbuf->buffer_base = r300->vs_const_base; 2098 r300->vs_const_base += vs->shader->code.constants.Count; 2099 if (r300->vs_const_base > R500_MAX_PVS_CONST_VECS) { 2100 r300->vs_const_base = vs->shader->code.constants.Count; 2101 cbuf->buffer_base = 0; 2102 r300_mark_atom_dirty(r300, &r300->pvs_flush); 2103 } 2104 r300_mark_atom_dirty(r300, &r300->vs_constants); 2105 } else if (r300->draw) { 2106 draw_set_mapped_constant_buffer(r300->draw, PIPE_SHADER_VERTEX, 2107 0, mapped, cb->buffer_size); 2108 } 2109 } else if (shader == PIPE_SHADER_FRAGMENT) { 2110 r300_mark_atom_dirty(r300, &r300->fs_constants); 2111 } 2112} 2113 2114static void r300_texture_barrier(struct pipe_context *pipe, unsigned flags) 2115{ 2116 struct r300_context *r300 = r300_context(pipe); 2117 2118 r300_mark_atom_dirty(r300, &r300->gpu_flush); 2119 r300_mark_atom_dirty(r300, &r300->texture_cache_inval); 2120} 2121 2122static void r300_memory_barrier(struct pipe_context *pipe, unsigned flags) 2123{ 2124} 2125 2126void r300_init_state_functions(struct r300_context* r300) 2127{ 2128 r300->context.create_blend_state = r300_create_blend_state; 2129 r300->context.bind_blend_state = r300_bind_blend_state; 2130 r300->context.delete_blend_state = r300_delete_blend_state; 2131 2132 r300->context.set_blend_color = r300_set_blend_color; 2133 2134 r300->context.set_clip_state = r300_set_clip_state; 2135 r300->context.set_sample_mask = r300_set_sample_mask; 2136 2137 r300->context.set_constant_buffer = r300_set_constant_buffer; 2138 2139 r300->context.create_depth_stencil_alpha_state = r300_create_dsa_state; 2140 r300->context.bind_depth_stencil_alpha_state = r300_bind_dsa_state; 2141 r300->context.delete_depth_stencil_alpha_state = r300_delete_dsa_state; 2142 2143 r300->context.set_stencil_ref = r300_set_stencil_ref; 2144 2145 r300->context.set_framebuffer_state = r300_set_framebuffer_state; 2146 2147 r300->context.create_fs_state = r300_create_fs_state; 2148 r300->context.bind_fs_state = r300_bind_fs_state; 2149 r300->context.delete_fs_state = r300_delete_fs_state; 2150 2151 r300->context.set_polygon_stipple = r300_set_polygon_stipple; 2152 2153 r300->context.create_rasterizer_state = r300_create_rs_state; 2154 r300->context.bind_rasterizer_state = r300_bind_rs_state; 2155 r300->context.delete_rasterizer_state = r300_delete_rs_state; 2156 2157 r300->context.create_sampler_state = r300_create_sampler_state; 2158 r300->context.bind_sampler_states = r300_bind_sampler_states; 2159 r300->context.delete_sampler_state = r300_delete_sampler_state; 2160 2161 r300->context.set_sampler_views = r300_set_sampler_views; 2162 r300->context.create_sampler_view = r300_create_sampler_view; 2163 r300->context.sampler_view_destroy = r300_sampler_view_destroy; 2164 2165 r300->context.set_scissor_states = r300_set_scissor_states; 2166 2167 r300->context.set_viewport_states = r300_set_viewport_states; 2168 2169 if (r300->screen->caps.has_tcl) { 2170 r300->context.set_vertex_buffers = r300_set_vertex_buffers_hwtcl; 2171 } else { 2172 r300->context.set_vertex_buffers = r300_set_vertex_buffers_swtcl; 2173 } 2174 2175 r300->context.create_vertex_elements_state = r300_create_vertex_elements_state; 2176 r300->context.bind_vertex_elements_state = r300_bind_vertex_elements_state; 2177 r300->context.delete_vertex_elements_state = r300_delete_vertex_elements_state; 2178 2179 r300->context.create_vs_state = r300_create_vs_state; 2180 r300->context.bind_vs_state = r300_bind_vs_state; 2181 r300->context.delete_vs_state = r300_delete_vs_state; 2182 2183 r300->context.texture_barrier = r300_texture_barrier; 2184 r300->context.memory_barrier = r300_memory_barrier; 2185} 2186