1/* 2 * © Copyright 2018 Alyssa Rosenzweig 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 */ 24 25#ifndef __BUILDER_H__ 26#define __BUILDER_H__ 27 28#define _LARGEFILE64_SOURCE 1 29#include <sys/mman.h> 30#include <assert.h> 31#include "pan_resource.h" 32#include "pan_job.h" 33#include "pan_blend_cso.h" 34#include "pan_encoder.h" 35#include "pan_texture.h" 36#include "pan_earlyzs.h" 37 38#include "pipe/p_compiler.h" 39#include "pipe/p_config.h" 40#include "pipe/p_context.h" 41#include "pipe/p_defines.h" 42#include "pipe/p_format.h" 43#include "pipe/p_screen.h" 44#include "pipe/p_state.h" 45#include "util/u_blitter.h" 46#include "util/hash_table.h" 47#include "util/simple_mtx.h" 48 49#include "midgard/midgard_compile.h" 50#include "compiler/shader_enums.h" 51 52#define SET_BIT(lval, bit, cond) \ 53 if (cond) \ 54 lval |= (bit); \ 55 else \ 56 lval &= ~(bit); 57 58/* Dirty tracking flags. 3D is for general 3D state. Shader flags are 59 * per-stage. Renderer refers to Renderer State Descriptors. Vertex refers to 60 * vertex attributes/elements. */ 61 62enum pan_dirty_3d { 63 PAN_DIRTY_VIEWPORT = BITFIELD_BIT(0), 64 PAN_DIRTY_SCISSOR = BITFIELD_BIT(1), 65 PAN_DIRTY_VERTEX = BITFIELD_BIT(2), 66 PAN_DIRTY_PARAMS = BITFIELD_BIT(3), 67 PAN_DIRTY_DRAWID = BITFIELD_BIT(4), 68 PAN_DIRTY_TLS_SIZE = BITFIELD_BIT(5), 69 PAN_DIRTY_ZS = BITFIELD_BIT(6), 70 PAN_DIRTY_BLEND = BITFIELD_BIT(7), 71 PAN_DIRTY_MSAA = BITFIELD_BIT(8), 72 PAN_DIRTY_OQ = BITFIELD_BIT(9), 73 PAN_DIRTY_RASTERIZER = BITFIELD_BIT(10), 74 PAN_DIRTY_POINTS = BITFIELD_BIT(11), 75 PAN_DIRTY_SO = BITFIELD_BIT(12), 76}; 77 78enum pan_dirty_shader { 79 PAN_DIRTY_STAGE_SHADER = BITFIELD_BIT(0), 80 PAN_DIRTY_STAGE_TEXTURE = BITFIELD_BIT(1), 81 PAN_DIRTY_STAGE_SAMPLER = BITFIELD_BIT(2), 82 PAN_DIRTY_STAGE_IMAGE = BITFIELD_BIT(3), 83 PAN_DIRTY_STAGE_CONST = BITFIELD_BIT(4), 84 PAN_DIRTY_STAGE_SSBO = BITFIELD_BIT(5), 85}; 86 87struct panfrost_constant_buffer { 88 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS]; 89 uint32_t enabled_mask; 90}; 91 92struct panfrost_query { 93 /* Passthrough from Gallium */ 94 unsigned type; 95 unsigned index; 96 97 /* For computed queries. 64-bit to prevent overflow */ 98 struct { 99 uint64_t start; 100 uint64_t end; 101 }; 102 103 /* Memory for the GPU to writeback the value of the query */ 104 struct pipe_resource *rsrc; 105 106 /* Whether an occlusion query is for a MSAA framebuffer */ 107 bool msaa; 108}; 109 110struct pipe_fence_handle { 111 struct pipe_reference reference; 112 uint32_t syncobj; 113 bool signaled; 114}; 115 116struct panfrost_streamout_target { 117 struct pipe_stream_output_target base; 118 uint32_t offset; 119}; 120 121struct panfrost_streamout { 122 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS]; 123 unsigned num_targets; 124}; 125 126struct panfrost_context { 127 /* Gallium context */ 128 struct pipe_context base; 129 130 /* Dirty global state */ 131 enum pan_dirty_3d dirty; 132 133 /* Per shader stage dirty state */ 134 enum pan_dirty_shader dirty_shader[PIPE_SHADER_TYPES]; 135 136 /* Unowned pools, so manage yourself. */ 137 struct panfrost_pool descs, shaders; 138 139 /* Sync obj used to keep track of in-flight jobs. */ 140 uint32_t syncobj; 141 142 /* Set of 32 batches. When the set is full, the LRU entry (the batch 143 * with the smallest seqnum) is flushed to free a slot. 144 */ 145 struct { 146 uint64_t seqnum; 147 struct panfrost_batch slots[PAN_MAX_BATCHES]; 148 149 /** Set of active batches for faster traversal */ 150 BITSET_DECLARE(active, PAN_MAX_BATCHES); 151 } batches; 152 153 /* Map from resources to panfrost_batches */ 154 struct hash_table *writers; 155 156 /* Bound job batch */ 157 struct panfrost_batch *batch; 158 159 /* Within a launch_grid call.. */ 160 const struct pipe_grid_info *compute_grid; 161 162 struct pipe_framebuffer_state pipe_framebuffer; 163 struct panfrost_streamout streamout; 164 165 bool active_queries; 166 uint64_t prims_generated; 167 uint64_t tf_prims_generated; 168 struct panfrost_query *occlusion_query; 169 170 bool indirect_draw; 171 unsigned drawid; 172 unsigned vertex_count; 173 unsigned instance_count; 174 unsigned offset_start; 175 unsigned base_vertex; 176 unsigned base_instance; 177 mali_ptr first_vertex_sysval_ptr; 178 mali_ptr base_vertex_sysval_ptr; 179 mali_ptr base_instance_sysval_ptr; 180 enum pipe_prim_type active_prim; 181 182 /* If instancing is enabled, vertex count padded for instance; if 183 * it is disabled, just equal to plain vertex count */ 184 unsigned padded_count; 185 186 struct panfrost_constant_buffer constant_buffer[PIPE_SHADER_TYPES]; 187 struct panfrost_rasterizer *rasterizer; 188 struct panfrost_shader_variants *shader[PIPE_SHADER_TYPES]; 189 struct panfrost_vertex_state *vertex; 190 191 struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS]; 192 uint32_t vb_mask; 193 194 struct pipe_shader_buffer ssbo[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_BUFFERS]; 195 uint32_t ssbo_mask[PIPE_SHADER_TYPES]; 196 197 struct pipe_image_view images[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_IMAGES]; 198 uint32_t image_mask[PIPE_SHADER_TYPES]; 199 200 struct panfrost_sampler_state *samplers[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS]; 201 unsigned sampler_count[PIPE_SHADER_TYPES]; 202 203 struct panfrost_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_SAMPLER_VIEWS]; 204 unsigned sampler_view_count[PIPE_SHADER_TYPES]; 205 206 struct blitter_context *blitter; 207 208 struct panfrost_blend_state *blend; 209 210 /* On Valhall, does the current blend state use a blend shader for any 211 * output? We need this information in a hot path to decide if 212 * per-sample shading should be enabled. 213 */ 214 bool valhall_has_blend_shader; 215 216 struct pipe_viewport_state pipe_viewport; 217 struct pipe_scissor_state scissor; 218 struct pipe_blend_color blend_color; 219 struct panfrost_zsa_state *depth_stencil; 220 struct pipe_stencil_ref stencil_ref; 221 uint16_t sample_mask; 222 unsigned min_samples; 223 224 struct panfrost_query *cond_query; 225 bool cond_cond; 226 enum pipe_render_cond_flag cond_mode; 227 228 bool is_noop; 229 230 /* Mask of active render targets */ 231 uint8_t fb_rt_mask; 232}; 233 234/* Corresponds to the CSO */ 235 236struct panfrost_rasterizer; 237 238/* Linked varyings */ 239struct pan_linkage { 240 /* If the upload is owned by the CSO instead 241 * of the pool, the referenced BO. Else, 242 * NULL. */ 243 struct panfrost_bo *bo; 244 245 /* Uploaded attribute descriptors */ 246 mali_ptr producer, consumer; 247 248 /* Varyings buffers required */ 249 uint32_t present; 250 251 /* Per-vertex stride for general varying buffer */ 252 uint32_t stride; 253}; 254 255#define RSD_WORDS 16 256 257/* Variants bundle together to form the backing CSO, bundling multiple 258 * shaders with varying emulated features baked in 259 */ 260struct panfrost_fs_key { 261 /* Number of colour buffers */ 262 unsigned nr_cbufs; 263 264 /* Midgard shaders that read the tilebuffer must be keyed for 265 * non-blendable formats 266 */ 267 enum pipe_format rt_formats[8]; 268 269 /* From rasterize state, to lower point sprites */ 270 uint16_t sprite_coord_enable; 271 272 /* User clip plane lowering */ 273 uint8_t clip_plane_enable; 274}; 275 276struct panfrost_shader_key { 277 /* Valhall needs special handling for desktop GL varyings */ 278 uint32_t fixed_varying_mask; 279 280 /* If we need vertex shader keys, union it in */ 281 struct panfrost_fs_key fs; 282}; 283 284/* A shader state corresponds to the actual, current variant of the shader */ 285struct panfrost_shader_state { 286 /* Respectively, shader binary and Renderer State Descriptor */ 287 struct panfrost_pool_ref bin, state; 288 289 /* For fragment shaders, a prepared (but not uploaded RSD) */ 290 uint32_t partial_rsd[RSD_WORDS]; 291 292 struct pan_shader_info info; 293 294 struct pan_earlyzs_lut earlyzs; 295 296 /* Attached transform feedback program, if one exists */ 297 struct panfrost_shader_state *xfb; 298 299 /* Linked varyings, for non-separable programs */ 300 struct pan_linkage linkage; 301 302 struct pipe_stream_output_info stream_output; 303 uint64_t so_mask; 304 305 struct panfrost_shader_key key; 306 307 /* Mask of state that dirties the sysvals */ 308 unsigned dirty_3d, dirty_shader; 309}; 310 311/* A collection of varyings (the CSO) */ 312struct panfrost_shader_variants { 313 nir_shader *nir; 314 315 union { 316 struct pipe_stream_output_info stream_output; 317 unsigned req_input_mem; 318 }; 319 320 /** Lock for the variants array */ 321 simple_mtx_t lock; 322 323 struct panfrost_shader_state *variants; 324 unsigned variant_space; 325 326 unsigned variant_count; 327 328 /* On vertex shaders, bit mask of special desktop-only varyings to link 329 * with the fragment shader. Used on Valhall to implement separable 330 * shaders for desktop GL. 331 */ 332 uint32_t fixed_varying_mask; 333 334 /* The current active variant */ 335 unsigned active_variant; 336}; 337 338/** (Vertex buffer index, divisor) tuple that will become an Attribute Buffer 339 * Descriptor at draw-time on Midgard 340 */ 341struct pan_vertex_buffer { 342 unsigned vbi; 343 unsigned divisor; 344}; 345 346unsigned 347pan_assign_vertex_buffer(struct pan_vertex_buffer *buffers, 348 unsigned *nr_bufs, 349 unsigned vbi, 350 unsigned divisor); 351 352struct panfrost_zsa_state; 353struct panfrost_sampler_state; 354struct panfrost_sampler_view; 355struct panfrost_vertex_state; 356 357static inline struct panfrost_context * 358pan_context(struct pipe_context *pcontext) 359{ 360 return (struct panfrost_context *) pcontext; 361} 362 363static inline struct panfrost_streamout_target * 364pan_so_target(struct pipe_stream_output_target *target) 365{ 366 return (struct panfrost_streamout_target *)target; 367} 368 369static inline struct panfrost_shader_state * 370panfrost_get_shader_state(struct panfrost_context *ctx, 371 enum pipe_shader_type st) 372{ 373 struct panfrost_shader_variants *all = ctx->shader[st]; 374 375 if (!all) 376 return NULL; 377 378 return &all->variants[all->active_variant]; 379} 380 381struct pipe_context * 382panfrost_create_context(struct pipe_screen *screen, void *priv, unsigned flags); 383 384bool 385panfrost_writes_point_size(struct panfrost_context *ctx); 386 387struct panfrost_ptr 388panfrost_vertex_tiler_job(struct panfrost_context *ctx, bool is_tiler); 389 390void 391panfrost_flush( 392 struct pipe_context *pipe, 393 struct pipe_fence_handle **fence, 394 unsigned flags); 395 396bool 397panfrost_render_condition_check(struct panfrost_context *ctx); 398 399void 400panfrost_update_shader_variant(struct panfrost_context *ctx, 401 enum pipe_shader_type type); 402void 403panfrost_shader_compile(struct pipe_screen *pscreen, 404 struct panfrost_pool *shader_pool, 405 struct panfrost_pool *desc_pool, 406 const nir_shader *ir, 407 struct panfrost_shader_state *state); 408 409void 410panfrost_analyze_sysvals(struct panfrost_shader_state *ss); 411 412mali_ptr 413panfrost_get_index_buffer(struct panfrost_batch *batch, 414 const struct pipe_draw_info *info, 415 const struct pipe_draw_start_count_bias *draw); 416 417mali_ptr 418panfrost_get_index_buffer_bounded(struct panfrost_batch *batch, 419 const struct pipe_draw_info *info, 420 const struct pipe_draw_start_count_bias *draw, 421 unsigned *min_index, unsigned *max_index); 422 423/* Instancing */ 424 425mali_ptr 426panfrost_vertex_buffer_address(struct panfrost_context *ctx, unsigned i); 427 428/* Compute */ 429 430void 431panfrost_compute_context_init(struct pipe_context *pctx); 432 433static inline void 434panfrost_dirty_state_all(struct panfrost_context *ctx) 435{ 436 ctx->dirty = ~0; 437 438 for (unsigned i = 0; i < PIPE_SHADER_TYPES; ++i) 439 ctx->dirty_shader[i] = ~0; 440} 441 442static inline void 443panfrost_clean_state_3d(struct panfrost_context *ctx) 444{ 445 ctx->dirty = 0; 446 447 for (unsigned i = 0; i < PIPE_SHADER_TYPES; ++i) { 448 if (i != PIPE_SHADER_COMPUTE) 449 ctx->dirty_shader[i] = 0; 450 } 451} 452 453void 454panfrost_set_batch_masks_blend(struct panfrost_batch *batch); 455 456void 457panfrost_set_batch_masks_zs(struct panfrost_batch *batch); 458 459void 460panfrost_track_image_access(struct panfrost_batch *batch, 461 enum pipe_shader_type stage, 462 struct pipe_image_view *image); 463 464#endif 465