1/*
2 * Copyright (c) 2017-2019 Lima Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24
25#include <string.h>
26
27#include "util/ralloc.h"
28#include "util/u_debug.h"
29#include "util/u_screen.h"
30#include "renderonly/renderonly.h"
31
32#include "drm-uapi/drm_fourcc.h"
33#include "drm-uapi/lima_drm.h"
34
35#include "lima_screen.h"
36#include "lima_context.h"
37#include "lima_resource.h"
38#include "lima_program.h"
39#include "lima_bo.h"
40#include "lima_fence.h"
41#include "lima_format.h"
42#include "lima_disk_cache.h"
43#include "ir/lima_ir.h"
44
45#include "xf86drm.h"
46
47int lima_plb_max_blk = 0;
48int lima_plb_pp_stream_cache_size = 0;
49
50static void
51lima_screen_destroy(struct pipe_screen *pscreen)
52{
53   struct lima_screen *screen = lima_screen(pscreen);
54
55   slab_destroy_parent(&screen->transfer_pool);
56
57   if (screen->ro)
58      screen->ro->destroy(screen->ro);
59
60   if (screen->pp_buffer)
61      lima_bo_unreference(screen->pp_buffer);
62
63   lima_bo_cache_fini(screen);
64   lima_bo_table_fini(screen);
65   disk_cache_destroy(screen->disk_cache);
66   ralloc_free(screen);
67}
68
69static const char *
70lima_screen_get_name(struct pipe_screen *pscreen)
71{
72   struct lima_screen *screen = lima_screen(pscreen);
73
74   switch (screen->gpu_type) {
75   case DRM_LIMA_PARAM_GPU_ID_MALI400:
76     return "Mali400";
77   case DRM_LIMA_PARAM_GPU_ID_MALI450:
78     return "Mali450";
79   }
80
81   return NULL;
82}
83
84static const char *
85lima_screen_get_vendor(struct pipe_screen *pscreen)
86{
87   return "lima";
88}
89
90static const char *
91lima_screen_get_device_vendor(struct pipe_screen *pscreen)
92{
93   return "ARM";
94}
95
96static int
97lima_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
98{
99   switch (param) {
100   case PIPE_CAP_NPOT_TEXTURES:
101   case PIPE_CAP_BLEND_EQUATION_SEPARATE:
102   case PIPE_CAP_ACCELERATED:
103   case PIPE_CAP_UMA:
104   case PIPE_CAP_CLIP_HALFZ:
105   case PIPE_CAP_NATIVE_FENCE_FD:
106   case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
107   case PIPE_CAP_TEXTURE_SWIZZLE:
108   case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
109   case PIPE_CAP_TEXTURE_BARRIER:
110   case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
111   case PIPE_CAP_SURFACE_SAMPLE_COUNT:
112      return 1;
113
114   /* Unimplemented, but for exporting OpenGL 2.0 */
115   case PIPE_CAP_POINT_SPRITE:
116      return 1;
117
118   /* not clear supported */
119   case PIPE_CAP_FS_COORD_ORIGIN_UPPER_LEFT:
120   case PIPE_CAP_FS_COORD_ORIGIN_LOWER_LEFT:
121   case PIPE_CAP_FS_COORD_PIXEL_CENTER_INTEGER:
122   case PIPE_CAP_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
123      return 1;
124
125   case PIPE_CAP_FS_POSITION_IS_SYSVAL:
126   case PIPE_CAP_FS_POINT_IS_SYSVAL:
127   case PIPE_CAP_FS_FACE_IS_INTEGER_SYSVAL:
128      return 1;
129
130   case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
131      return 1;
132
133   case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
134      return 1 << (LIMA_MAX_MIP_LEVELS - 1);
135   case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
136   case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
137      return LIMA_MAX_MIP_LEVELS;
138
139   case PIPE_CAP_VENDOR_ID:
140      return 0x13B5;
141
142   case PIPE_CAP_VIDEO_MEMORY:
143      return 0;
144
145   case PIPE_CAP_PCI_GROUP:
146   case PIPE_CAP_PCI_BUS:
147   case PIPE_CAP_PCI_DEVICE:
148   case PIPE_CAP_PCI_FUNCTION:
149      return 0;
150
151   case PIPE_CAP_TEXTURE_TRANSFER_MODES:
152   case PIPE_CAP_SHAREABLE_SHADERS:
153      return 0;
154
155   case PIPE_CAP_ALPHA_TEST:
156      return 1;
157
158   case PIPE_CAP_FLATSHADE:
159   case PIPE_CAP_TWO_SIDED_COLOR:
160   case PIPE_CAP_CLIP_PLANES:
161      return 0;
162
163   case PIPE_CAP_FRAGMENT_SHADER_DERIVATIVES:
164      return 1;
165
166   /* Mali4x0 PP doesn't have a swizzle for load_input, so use POT-aligned
167    * varyings to avoid unnecessary movs for vec3 and precision downgrade
168    * in case if this vec3 is coordinates for a sampler
169    */
170   case PIPE_CAP_PREFER_POT_ALIGNED_VARYINGS:
171      return 1;
172
173   case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
174      return 1;
175
176   default:
177      return u_pipe_screen_get_param_defaults(pscreen, param);
178   }
179}
180
181static float
182lima_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
183{
184   switch (param) {
185   case PIPE_CAPF_MIN_LINE_WIDTH:
186   case PIPE_CAPF_MIN_LINE_WIDTH_AA:
187   case PIPE_CAPF_MIN_POINT_SIZE:
188   case PIPE_CAPF_MIN_POINT_SIZE_AA:
189      return 1;
190   case PIPE_CAPF_POINT_SIZE_GRANULARITY:
191   case PIPE_CAPF_LINE_WIDTH_GRANULARITY:
192      return 0.1;
193   case PIPE_CAPF_MAX_LINE_WIDTH:
194   case PIPE_CAPF_MAX_LINE_WIDTH_AA:
195   case PIPE_CAPF_MAX_POINT_SIZE:
196   case PIPE_CAPF_MAX_POINT_SIZE_AA:
197      return 100.0f;
198   case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
199      return 16.0f;
200   case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
201      return 15.0f;
202
203   default:
204      return 0.0f;
205   }
206}
207
208static int
209get_vertex_shader_param(struct lima_screen *screen,
210                        enum pipe_shader_cap param)
211{
212   switch (param) {
213   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
214   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
215   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
216   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
217      return 16384; /* need investigate */
218
219   case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
220      return 1024;
221
222   case PIPE_SHADER_CAP_MAX_INPUTS:
223      return 16; /* attributes */
224
225   case PIPE_SHADER_CAP_MAX_OUTPUTS:
226      return LIMA_MAX_VARYING_NUM; /* varying */
227
228   /* Mali-400 GP provides space for 304 vec4 uniforms, globals and
229    * temporary variables. */
230   case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
231      return 304 * 4 * sizeof(float);
232
233   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
234      return 1;
235
236   case PIPE_SHADER_CAP_PREFERRED_IR:
237      return PIPE_SHADER_IR_NIR;
238
239   case PIPE_SHADER_CAP_MAX_TEMPS:
240      return 256; /* need investigate */
241
242   default:
243      return 0;
244   }
245}
246
247static int
248get_fragment_shader_param(struct lima_screen *screen,
249                          enum pipe_shader_cap param)
250{
251   switch (param) {
252   case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
253   case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
254   case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
255   case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
256      return 16384; /* need investigate */
257
258   case PIPE_SHADER_CAP_MAX_INPUTS:
259      return LIMA_MAX_VARYING_NUM - 1; /* varying, minus gl_Position */
260
261   case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
262      return 1024;
263
264   /* The Mali-PP supports a uniform table up to size 32768 total.
265    * However, indirect access to an uniform only supports indices up
266    * to 8192 (a 2048 vec4 array). To prevent indices bigger than that,
267    * limit max const buffer size to 8192 for now. */
268   case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
269      return 2048 * 4 * sizeof(float);
270
271   case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
272      return 1;
273
274   case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
275   case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
276      return 16; /* need investigate */
277
278   case PIPE_SHADER_CAP_PREFERRED_IR:
279      return PIPE_SHADER_IR_NIR;
280
281   case PIPE_SHADER_CAP_MAX_TEMPS:
282      return 256; /* need investigate */
283
284   case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
285   case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
286      return 1;
287
288   case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
289   case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
290      return 0;
291
292   default:
293      return 0;
294   }
295}
296
297static int
298lima_screen_get_shader_param(struct pipe_screen *pscreen,
299                             enum pipe_shader_type shader,
300                             enum pipe_shader_cap param)
301{
302   struct lima_screen *screen = lima_screen(pscreen);
303
304   switch (shader) {
305   case PIPE_SHADER_FRAGMENT:
306      return get_fragment_shader_param(screen, param);
307   case PIPE_SHADER_VERTEX:
308      return get_vertex_shader_param(screen, param);
309
310   default:
311      return 0;
312   }
313}
314
315static bool
316lima_screen_is_format_supported(struct pipe_screen *pscreen,
317                                enum pipe_format format,
318                                enum pipe_texture_target target,
319                                unsigned sample_count,
320                                unsigned storage_sample_count,
321                                unsigned usage)
322{
323   switch (target) {
324   case PIPE_BUFFER:
325   case PIPE_TEXTURE_1D:
326   case PIPE_TEXTURE_2D:
327   case PIPE_TEXTURE_3D:
328   case PIPE_TEXTURE_RECT:
329   case PIPE_TEXTURE_CUBE:
330      break;
331   default:
332      return false;
333   }
334
335   if (MAX2(1, sample_count) != MAX2(1, storage_sample_count))
336      return false;
337
338   /* Utgard supports 16x, but for now limit it to 4x */
339   if (sample_count > 1 && sample_count != 4)
340      return false;
341
342   if (usage & PIPE_BIND_RENDER_TARGET) {
343      if (!lima_format_pixel_supported(format))
344         return false;
345
346      /* multisample unsupported with half float target */
347      if (sample_count > 1 && util_format_is_float(format))
348         return false;
349   }
350
351   if (usage & PIPE_BIND_DEPTH_STENCIL) {
352      switch (format) {
353      case PIPE_FORMAT_Z16_UNORM:
354      case PIPE_FORMAT_Z24_UNORM_S8_UINT:
355      case PIPE_FORMAT_Z24X8_UNORM:
356         break;
357      default:
358         return false;
359      }
360   }
361
362   if (usage & PIPE_BIND_VERTEX_BUFFER) {
363      switch (format) {
364      case PIPE_FORMAT_R32_FLOAT:
365      case PIPE_FORMAT_R32G32_FLOAT:
366      case PIPE_FORMAT_R32G32B32_FLOAT:
367      case PIPE_FORMAT_R32G32B32A32_FLOAT:
368      case PIPE_FORMAT_R32_FIXED:
369      case PIPE_FORMAT_R32G32_FIXED:
370      case PIPE_FORMAT_R32G32B32_FIXED:
371      case PIPE_FORMAT_R32G32B32A32_FIXED:
372      case PIPE_FORMAT_R16_FLOAT:
373      case PIPE_FORMAT_R16G16_FLOAT:
374      case PIPE_FORMAT_R16G16B16_FLOAT:
375      case PIPE_FORMAT_R16G16B16A16_FLOAT:
376      case PIPE_FORMAT_R32_UNORM:
377      case PIPE_FORMAT_R32G32_UNORM:
378      case PIPE_FORMAT_R32G32B32_UNORM:
379      case PIPE_FORMAT_R32G32B32A32_UNORM:
380      case PIPE_FORMAT_R32_SNORM:
381      case PIPE_FORMAT_R32G32_SNORM:
382      case PIPE_FORMAT_R32G32B32_SNORM:
383      case PIPE_FORMAT_R32G32B32A32_SNORM:
384      case PIPE_FORMAT_R32_USCALED:
385      case PIPE_FORMAT_R32G32_USCALED:
386      case PIPE_FORMAT_R32G32B32_USCALED:
387      case PIPE_FORMAT_R32G32B32A32_USCALED:
388      case PIPE_FORMAT_R32_SSCALED:
389      case PIPE_FORMAT_R32G32_SSCALED:
390      case PIPE_FORMAT_R32G32B32_SSCALED:
391      case PIPE_FORMAT_R32G32B32A32_SSCALED:
392      case PIPE_FORMAT_R16_UNORM:
393      case PIPE_FORMAT_R16G16_UNORM:
394      case PIPE_FORMAT_R16G16B16_UNORM:
395      case PIPE_FORMAT_R16G16B16A16_UNORM:
396      case PIPE_FORMAT_R16_SNORM:
397      case PIPE_FORMAT_R16G16_SNORM:
398      case PIPE_FORMAT_R16G16B16_SNORM:
399      case PIPE_FORMAT_R16G16B16A16_SNORM:
400      case PIPE_FORMAT_R16_USCALED:
401      case PIPE_FORMAT_R16G16_USCALED:
402      case PIPE_FORMAT_R16G16B16_USCALED:
403      case PIPE_FORMAT_R16G16B16A16_USCALED:
404      case PIPE_FORMAT_R16_SSCALED:
405      case PIPE_FORMAT_R16G16_SSCALED:
406      case PIPE_FORMAT_R16G16B16_SSCALED:
407      case PIPE_FORMAT_R16G16B16A16_SSCALED:
408      case PIPE_FORMAT_R8_UNORM:
409      case PIPE_FORMAT_R8G8_UNORM:
410      case PIPE_FORMAT_R8G8B8_UNORM:
411      case PIPE_FORMAT_R8G8B8A8_UNORM:
412      case PIPE_FORMAT_R8_SNORM:
413      case PIPE_FORMAT_R8G8_SNORM:
414      case PIPE_FORMAT_R8G8B8_SNORM:
415      case PIPE_FORMAT_R8G8B8A8_SNORM:
416      case PIPE_FORMAT_R8_USCALED:
417      case PIPE_FORMAT_R8G8_USCALED:
418      case PIPE_FORMAT_R8G8B8_USCALED:
419      case PIPE_FORMAT_R8G8B8A8_USCALED:
420      case PIPE_FORMAT_R8_SSCALED:
421      case PIPE_FORMAT_R8G8_SSCALED:
422      case PIPE_FORMAT_R8G8B8_SSCALED:
423      case PIPE_FORMAT_R8G8B8A8_SSCALED:
424         break;
425      default:
426         return false;
427      }
428   }
429
430   if (usage & PIPE_BIND_INDEX_BUFFER) {
431      switch (format) {
432      case PIPE_FORMAT_R8_UINT:
433      case PIPE_FORMAT_R16_UINT:
434      case PIPE_FORMAT_R32_UINT:
435         break;
436      default:
437         return false;
438      }
439   }
440
441   if (usage & PIPE_BIND_SAMPLER_VIEW)
442      return lima_format_texel_supported(format);
443
444   return true;
445}
446
447static const void *
448lima_screen_get_compiler_options(struct pipe_screen *pscreen,
449                                 enum pipe_shader_ir ir,
450                                 enum pipe_shader_type shader)
451{
452   return lima_program_get_compiler_options(shader);
453}
454
455static bool
456lima_screen_set_plb_max_blk(struct lima_screen *screen)
457{
458   if (lima_plb_max_blk) {
459      screen->plb_max_blk = lima_plb_max_blk;
460      return true;
461   }
462
463   if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI450)
464      screen->plb_max_blk = 4096;
465   else
466      screen->plb_max_blk = 512;
467
468   drmDevicePtr devinfo;
469
470   if (drmGetDevice2(screen->fd, 0, &devinfo))
471      return false;
472
473   if (devinfo->bustype == DRM_BUS_PLATFORM && devinfo->deviceinfo.platform) {
474      char **compatible = devinfo->deviceinfo.platform->compatible;
475
476      if (compatible && *compatible)
477         if (!strcmp("allwinner,sun50i-h5-mali", *compatible))
478            screen->plb_max_blk = 2048;
479   }
480
481   drmFreeDevice(&devinfo);
482
483   return true;
484}
485
486static bool
487lima_screen_query_info(struct lima_screen *screen)
488{
489   drmVersionPtr version = drmGetVersion(screen->fd);
490   if (!version)
491      return false;
492
493   if (version->version_major > 1 || version->version_minor > 0)
494      screen->has_growable_heap_buffer = true;
495
496   drmFreeVersion(version);
497
498   if (lima_debug & LIMA_DEBUG_NO_GROW_HEAP)
499      screen->has_growable_heap_buffer = false;
500
501   struct drm_lima_get_param param;
502
503   memset(&param, 0, sizeof(param));
504   param.param = DRM_LIMA_PARAM_GPU_ID;
505   if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
506      return false;
507
508   switch (param.value) {
509   case DRM_LIMA_PARAM_GPU_ID_MALI400:
510   case DRM_LIMA_PARAM_GPU_ID_MALI450:
511      screen->gpu_type = param.value;
512      break;
513   default:
514      return false;
515   }
516
517   memset(&param, 0, sizeof(param));
518   param.param = DRM_LIMA_PARAM_NUM_PP;
519   if (drmIoctl(screen->fd, DRM_IOCTL_LIMA_GET_PARAM, &param))
520      return false;
521
522   screen->num_pp = param.value;
523
524   lima_screen_set_plb_max_blk(screen);
525
526   return true;
527}
528
529static const uint64_t lima_available_modifiers[] = {
530   DRM_FORMAT_MOD_ARM_16X16_BLOCK_U_INTERLEAVED,
531   DRM_FORMAT_MOD_LINEAR,
532};
533
534static bool lima_is_modifier_external_only(enum pipe_format format)
535{
536   return util_format_is_yuv(format);
537}
538
539static void
540lima_screen_query_dmabuf_modifiers(struct pipe_screen *pscreen,
541                                   enum pipe_format format, int max,
542                                   uint64_t *modifiers,
543                                   unsigned int *external_only,
544                                   int *count)
545{
546   int num_modifiers = ARRAY_SIZE(lima_available_modifiers);
547
548   if (!modifiers) {
549      *count = num_modifiers;
550      return;
551   }
552
553   *count = MIN2(max, num_modifiers);
554   for (int i = 0; i < *count; i++) {
555      modifiers[i] = lima_available_modifiers[i];
556      if (external_only)
557         external_only[i] = lima_is_modifier_external_only(format);
558   }
559}
560
561static bool
562lima_screen_is_dmabuf_modifier_supported(struct pipe_screen *pscreen,
563                                         uint64_t modifier,
564                                         enum pipe_format format,
565                                         bool *external_only)
566{
567   for (int i = 0; i < ARRAY_SIZE(lima_available_modifiers); i++) {
568      if (lima_available_modifiers[i] == modifier) {
569         if (external_only)
570            *external_only = lima_is_modifier_external_only(format);
571
572         return true;
573      }
574   }
575
576   return false;
577}
578
579static const struct debug_named_value lima_debug_options[] = {
580        { "gp",       LIMA_DEBUG_GP,
581          "print GP shader compiler result of each stage" },
582        { "pp",       LIMA_DEBUG_PP,
583          "print PP shader compiler result of each stage" },
584        { "dump",     LIMA_DEBUG_DUMP,
585          "dump GPU command stream to $PWD/lima.dump" },
586        { "shaderdb", LIMA_DEBUG_SHADERDB,
587          "print shader information for shaderdb" },
588        { "nobocache", LIMA_DEBUG_NO_BO_CACHE,
589          "disable BO cache" },
590        { "bocache", LIMA_DEBUG_BO_CACHE,
591          "print debug info for BO cache" },
592        { "notiling", LIMA_DEBUG_NO_TILING,
593          "don't use tiled buffers" },
594        { "nogrowheap",   LIMA_DEBUG_NO_GROW_HEAP,
595          "disable growable heap buffer" },
596        { "singlejob", LIMA_DEBUG_SINGLE_JOB,
597          "disable multi job optimization" },
598        { "precompile", LIMA_DEBUG_PRECOMPILE,
599          "Precompile shaders for shader-db" },
600        { "diskcache", LIMA_DEBUG_DISK_CACHE,
601          "print debug info for shader disk cache" },
602        { "noblit", LIMA_DEBUG_NO_BLIT,
603          "use generic u_blitter instead of lima-specific" },
604        { NULL }
605};
606
607DEBUG_GET_ONCE_FLAGS_OPTION(lima_debug, "LIMA_DEBUG", lima_debug_options, 0)
608uint32_t lima_debug;
609
610static void
611lima_screen_parse_env(void)
612{
613   lima_debug = debug_get_option_lima_debug();
614
615   lima_ctx_num_plb = debug_get_num_option("LIMA_CTX_NUM_PLB", LIMA_CTX_PLB_DEF_NUM);
616   if (lima_ctx_num_plb > LIMA_CTX_PLB_MAX_NUM ||
617       lima_ctx_num_plb < LIMA_CTX_PLB_MIN_NUM) {
618      fprintf(stderr, "lima: LIMA_CTX_NUM_PLB %d out of range [%d %d], "
619              "reset to default %d\n", lima_ctx_num_plb, LIMA_CTX_PLB_MIN_NUM,
620              LIMA_CTX_PLB_MAX_NUM, LIMA_CTX_PLB_DEF_NUM);
621      lima_ctx_num_plb = LIMA_CTX_PLB_DEF_NUM;
622   }
623
624   lima_plb_max_blk = debug_get_num_option("LIMA_PLB_MAX_BLK", 0);
625   if (lima_plb_max_blk < 0 || lima_plb_max_blk > 65536) {
626      fprintf(stderr, "lima: LIMA_PLB_MAX_BLK %d out of range [%d %d], "
627              "reset to default %d\n", lima_plb_max_blk, 0, 65536, 0);
628      lima_plb_max_blk = 0;
629   }
630
631   lima_ppir_force_spilling = debug_get_num_option("LIMA_PPIR_FORCE_SPILLING", 0);
632   if (lima_ppir_force_spilling < 0) {
633      fprintf(stderr, "lima: LIMA_PPIR_FORCE_SPILLING %d less than 0, "
634              "reset to default 0\n", lima_ppir_force_spilling);
635      lima_ppir_force_spilling = 0;
636   }
637
638   lima_plb_pp_stream_cache_size = debug_get_num_option("LIMA_PLB_PP_STREAM_CACHE_SIZE", 0);
639   if (lima_plb_pp_stream_cache_size < 0) {
640      fprintf(stderr, "lima: LIMA_PLB_PP_STREAM_CACHE_SIZE %d less than 0, "
641              "reset to default 0\n", lima_plb_pp_stream_cache_size);
642      lima_plb_pp_stream_cache_size = 0;
643   }
644}
645
646static struct disk_cache *
647lima_get_disk_shader_cache (struct pipe_screen *pscreen)
648{
649   struct lima_screen *screen = lima_screen(pscreen);
650
651   return screen->disk_cache;
652}
653
654struct pipe_screen *
655lima_screen_create(int fd, struct renderonly *ro)
656{
657   uint64_t system_memory;
658   struct lima_screen *screen;
659
660   screen = rzalloc(NULL, struct lima_screen);
661   if (!screen)
662      return NULL;
663
664   screen->fd = fd;
665   screen->ro = ro;
666
667   lima_screen_parse_env();
668
669   /* Limit PP PLB stream cache size to 0.1% of system memory */
670   if (!lima_plb_pp_stream_cache_size &&
671       os_get_total_physical_memory(&system_memory))
672      lima_plb_pp_stream_cache_size = system_memory >> 10;
673
674   /* Set lower limit on PP PLB cache size */
675   lima_plb_pp_stream_cache_size = MAX2(128 * 1024 * lima_ctx_num_plb,
676                                        lima_plb_pp_stream_cache_size);
677
678   if (!lima_screen_query_info(screen))
679      goto err_out0;
680
681   if (!lima_bo_cache_init(screen))
682      goto err_out0;
683
684   if (!lima_bo_table_init(screen))
685      goto err_out1;
686
687   screen->pp_ra = ppir_regalloc_init(screen);
688   if (!screen->pp_ra)
689      goto err_out2;
690
691   screen->pp_buffer = lima_bo_create(screen, pp_buffer_size, 0);
692   if (!screen->pp_buffer)
693      goto err_out2;
694   screen->pp_buffer->cacheable = false;
695
696   /* fs program for clear buffer?
697    * const0 1 0 0 -1.67773, mov.v0 $0 ^const0.xxxx, stop
698    */
699   static const uint32_t pp_clear_program[] = {
700      0x00020425, 0x0000000c, 0x01e007cf, 0xb0000000,
701      0x000005f5, 0x00000000, 0x00000000, 0x00000000,
702   };
703   memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_program_offset,
704          pp_clear_program, sizeof(pp_clear_program));
705
706   /* copy texture to framebuffer, used to reload gpu tile buffer
707    * load.v $1 0.xy, texld 0, mov.v0 $0 ^tex_sampler, sync, stop
708    */
709   static const uint32_t pp_reload_program[] = {
710      0x000005e6, 0xf1003c20, 0x00000000, 0x39001000,
711      0x00000e4e, 0x000007cf, 0x00000000, 0x00000000,
712   };
713   memcpy(lima_bo_map(screen->pp_buffer) + pp_reload_program_offset,
714          pp_reload_program, sizeof(pp_reload_program));
715
716   /* 0/1/2 vertex index for reload/clear draw */
717   static const uint8_t pp_shared_index[] = { 0, 1, 2 };
718   memcpy(lima_bo_map(screen->pp_buffer) + pp_shared_index_offset,
719          pp_shared_index, sizeof(pp_shared_index));
720
721   /* 4096x4096 gl pos used for partial clear */
722   static const float pp_clear_gl_pos[] = {
723      4096, 0,    1, 1,
724      0,    0,    1, 1,
725      0,    4096, 1, 1,
726   };
727   memcpy(lima_bo_map(screen->pp_buffer) + pp_clear_gl_pos_offset,
728          pp_clear_gl_pos, sizeof(pp_clear_gl_pos));
729
730   /* is pp frame render state static? */
731   uint32_t *pp_frame_rsw = lima_bo_map(screen->pp_buffer) + pp_frame_rsw_offset;
732   memset(pp_frame_rsw, 0, 0x40);
733   pp_frame_rsw[8] = 0x0000f008;
734   pp_frame_rsw[9] = screen->pp_buffer->va + pp_clear_program_offset;
735   pp_frame_rsw[13] = 0x00000100;
736
737   screen->base.destroy = lima_screen_destroy;
738   screen->base.get_name = lima_screen_get_name;
739   screen->base.get_vendor = lima_screen_get_vendor;
740   screen->base.get_device_vendor = lima_screen_get_device_vendor;
741   screen->base.get_param = lima_screen_get_param;
742   screen->base.get_paramf = lima_screen_get_paramf;
743   screen->base.get_shader_param = lima_screen_get_shader_param;
744   screen->base.context_create = lima_context_create;
745   screen->base.is_format_supported = lima_screen_is_format_supported;
746   screen->base.get_compiler_options = lima_screen_get_compiler_options;
747   screen->base.query_dmabuf_modifiers = lima_screen_query_dmabuf_modifiers;
748   screen->base.is_dmabuf_modifier_supported = lima_screen_is_dmabuf_modifier_supported;
749   screen->base.get_disk_shader_cache = lima_get_disk_shader_cache;
750
751   lima_resource_screen_init(screen);
752   lima_fence_screen_init(screen);
753   lima_disk_cache_init(screen);
754
755   slab_create_parent(&screen->transfer_pool, sizeof(struct lima_transfer), 16);
756
757   screen->refcnt = 1;
758
759   return &screen->base;
760
761err_out2:
762   lima_bo_table_fini(screen);
763err_out1:
764   lima_bo_cache_fini(screen);
765err_out0:
766   ralloc_free(screen);
767   return NULL;
768}
769