1/* 2 * Copyright © 2019 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 23/** 24 * Macro and function definitions needed in order to use genxml. 25 * 26 * This should only be included in sources compiled per-generation. 27 */ 28 29#include "iris_batch.h" 30 31#define __gen_address_type struct iris_address 32#define __gen_user_data struct iris_batch 33#define __gen_combine_address iris_combine_address 34 35static inline void * 36__gen_get_batch_dwords(struct iris_batch *batch, unsigned dwords) 37{ 38 return iris_get_command_space(batch, dwords * sizeof(uint32_t)); 39} 40 41static inline struct iris_address 42__gen_address_offset(struct iris_address addr, uint64_t offset) 43{ 44 addr.offset += offset; 45 return addr; 46} 47 48static uint64_t 49__gen_combine_address(struct iris_batch *batch, void *location, 50 struct iris_address addr, uint32_t delta) 51{ 52 uint64_t result = addr.offset + delta; 53 54 if (addr.bo) { 55 iris_use_pinned_bo(batch, addr.bo, 56 !iris_domain_is_read_only(addr.access), addr.access); 57 /* Assume this is a general address, not relative to a base. */ 58 result += addr.bo->address; 59 } 60 61 return result; 62} 63 64static inline struct iris_address 65__gen_get_batch_address(struct iris_batch *batch, void *location) 66{ 67 unreachable("Not supported by iris"); 68} 69 70#define __gen_address_type struct iris_address 71#define __gen_user_data struct iris_batch 72 73#define __genxml_cmd_length(cmd) cmd ## _length 74#define __genxml_cmd_length_bias(cmd) cmd ## _length_bias 75#define __genxml_cmd_header(cmd) cmd ## _header 76#define __genxml_cmd_pack(cmd) cmd ## _pack 77#define __genxml_reg_num(cmd) cmd ## _num 78 79#include "genxml/genX_pack.h" 80#include "genxml/gen_macros.h" 81#include "genxml/genX_bits.h" 82 83/* CS_GPR(15) is reserved for combining conditional rendering predicates 84 * with GL_ARB_indirect_parameters draw number predicates. 85 */ 86#define MI_BUILDER_NUM_ALLOC_GPRS 15 87#include "common/mi_builder.h" 88 89#define _iris_pack_command(batch, cmd, dst, name) \ 90 for (struct cmd name = { __genxml_cmd_header(cmd) }, \ 91 *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \ 92 ({ __genxml_cmd_pack(cmd)(batch, (void *)_dst, &name); \ 93 _dst = NULL; \ 94 })) 95 96#define iris_pack_command(cmd, dst, name) \ 97 _iris_pack_command(NULL, cmd, dst, name) 98 99#define _iris_pack_state(batch, cmd, dst, name) \ 100 for (struct cmd name = {}, \ 101 *_dst = (void *)(dst); __builtin_expect(_dst != NULL, 1); \ 102 __genxml_cmd_pack(cmd)(batch, (void *)_dst, &name), \ 103 _dst = NULL) 104 105#define iris_pack_state(cmd, dst, name) \ 106 _iris_pack_state(NULL, cmd, dst, name) 107 108#define iris_emit_cmd(batch, cmd, name) \ 109 _iris_pack_command(batch, cmd, __gen_get_batch_dwords(batch, __genxml_cmd_length(cmd)), name) 110 111#define iris_emit_merge(batch, dwords0, dwords1, num_dwords) \ 112 do { \ 113 uint32_t *dw = __gen_get_batch_dwords(batch, num_dwords); \ 114 for (uint32_t i = 0; i < num_dwords; i++) \ 115 dw[i] = (dwords0)[i] | (dwords1)[i]; \ 116 VG(VALGRIND_CHECK_MEM_IS_DEFINED(dw, num_dwords)); \ 117 } while (0) 118 119#define iris_emit_reg(batch, reg, name) \ 120 for (struct reg name = {}, *_cont = (struct reg *)1; _cont != NULL; \ 121 ({ \ 122 uint32_t _dw[__genxml_cmd_length(reg)]; \ 123 __genxml_cmd_pack(reg)(NULL, _dw, &name); \ 124 for (unsigned i = 0; i < __genxml_cmd_length(reg); i++) { \ 125 iris_emit_cmd(batch, GENX(MI_LOAD_REGISTER_IMM), lri) { \ 126 lri.RegisterOffset = __genxml_reg_num(reg); \ 127 lri.DataDWord = _dw[i]; \ 128 } \ 129 } \ 130 _cont = NULL; \ 131 })) 132 133 134/** 135 * iris_address constructor helpers: 136 * 137 * When using these to construct a CSO, pass NULL for \p bo, and manually 138 * pin the BO later. Otherwise, genxml's address handling will add the 139 * BO to the current batch's validation list at CSO creation time, rather 140 * than at draw time as desired. 141 */ 142 143UNUSED static struct iris_address 144ro_bo(struct iris_bo *bo, uint64_t offset) 145{ 146 return (struct iris_address) { .bo = bo, .offset = offset, 147 .access = IRIS_DOMAIN_OTHER_READ }; 148} 149 150UNUSED static struct iris_address 151rw_bo(struct iris_bo *bo, uint64_t offset, enum iris_domain access) 152{ 153 return (struct iris_address) { .bo = bo, .offset = offset, 154 .access = access }; 155} 156