1/*
2 * Copyright (C) 2016 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 *    Rob Clark <robclark@freedesktop.org>
25 */
26
27#include "pipe/p_state.h"
28#include "util/u_memory.h"
29#include "util/u_string.h"
30
31#include "fd5_context.h"
32#include "fd5_format.h"
33#include "fd5_zsa.h"
34
35void *
36fd5_zsa_state_create(struct pipe_context *pctx,
37                     const struct pipe_depth_stencil_alpha_state *cso)
38{
39   struct fd5_zsa_stateobj *so;
40
41   so = CALLOC_STRUCT(fd5_zsa_stateobj);
42   if (!so)
43      return NULL;
44
45   so->base = *cso;
46
47   switch (cso->depth_func) {
48   case PIPE_FUNC_LESS:
49   case PIPE_FUNC_LEQUAL:
50      so->gras_lrz_cntl = A5XX_GRAS_LRZ_CNTL_ENABLE;
51      break;
52
53   case PIPE_FUNC_GREATER:
54   case PIPE_FUNC_GEQUAL:
55      so->gras_lrz_cntl =
56         A5XX_GRAS_LRZ_CNTL_ENABLE | A5XX_GRAS_LRZ_CNTL_GREATER;
57      break;
58
59   default:
60      /* LRZ not enabled */
61      so->gras_lrz_cntl = 0;
62      break;
63   }
64
65   if (!(cso->stencil->enabled || cso->alpha_enabled || !cso->depth_writemask))
66      so->lrz_write = true;
67
68   so->rb_depth_cntl |=
69      A5XX_RB_DEPTH_CNTL_ZFUNC(cso->depth_func); /* maps 1:1 */
70
71   if (cso->depth_enabled)
72      so->rb_depth_cntl |=
73         A5XX_RB_DEPTH_CNTL_Z_TEST_ENABLE | A5XX_RB_DEPTH_CNTL_Z_READ_ENABLE;
74
75   if (cso->depth_writemask)
76      so->rb_depth_cntl |= A5XX_RB_DEPTH_CNTL_Z_WRITE_ENABLE;
77
78   if (cso->stencil[0].enabled) {
79      const struct pipe_stencil_state *s = &cso->stencil[0];
80
81      so->rb_stencil_control |=
82         A5XX_RB_STENCIL_CONTROL_STENCIL_READ |
83         A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE |
84         A5XX_RB_STENCIL_CONTROL_FUNC(s->func) | /* maps 1:1 */
85         A5XX_RB_STENCIL_CONTROL_FAIL(fd_stencil_op(s->fail_op)) |
86         A5XX_RB_STENCIL_CONTROL_ZPASS(fd_stencil_op(s->zpass_op)) |
87         A5XX_RB_STENCIL_CONTROL_ZFAIL(fd_stencil_op(s->zfail_op));
88      so->rb_stencilrefmask |=
89         A5XX_RB_STENCILREFMASK_STENCILWRITEMASK(s->writemask) |
90         A5XX_RB_STENCILREFMASK_STENCILMASK(s->valuemask);
91
92      if (cso->stencil[1].enabled) {
93         const struct pipe_stencil_state *bs = &cso->stencil[1];
94
95         so->rb_stencil_control |=
96            A5XX_RB_STENCIL_CONTROL_STENCIL_ENABLE_BF |
97            A5XX_RB_STENCIL_CONTROL_FUNC_BF(bs->func) | /* maps 1:1 */
98            A5XX_RB_STENCIL_CONTROL_FAIL_BF(fd_stencil_op(bs->fail_op)) |
99            A5XX_RB_STENCIL_CONTROL_ZPASS_BF(fd_stencil_op(bs->zpass_op)) |
100            A5XX_RB_STENCIL_CONTROL_ZFAIL_BF(fd_stencil_op(bs->zfail_op));
101         so->rb_stencilrefmask_bf |=
102            A5XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(bs->writemask) |
103            A5XX_RB_STENCILREFMASK_BF_STENCILMASK(bs->valuemask);
104      }
105   }
106
107   if (cso->alpha_enabled) {
108      uint32_t ref = cso->alpha_ref_value * 255.0f;
109      so->rb_alpha_control =
110         A5XX_RB_ALPHA_CONTROL_ALPHA_TEST |
111         A5XX_RB_ALPHA_CONTROL_ALPHA_REF(ref) |
112         A5XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(cso->alpha_func);
113      //		so->rb_depth_control |=
114      //			A5XX_RB_DEPTH_CONTROL_EARLY_Z_DISABLE;
115   }
116
117   return so;
118}
119