1/* 2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Rob Clark <robclark@freedesktop.org> 25 */ 26 27#include "pipe/p_state.h" 28 29#include "fd5_format.h" 30#include "fd5_image.h" 31#include "fd5_texture.h" 32#include "freedreno_resource.h" 33 34static enum a4xx_state_block texsb[] = { 35 [PIPE_SHADER_COMPUTE] = SB4_CS_TEX, 36 [PIPE_SHADER_FRAGMENT] = SB4_FS_TEX, 37}; 38 39static enum a4xx_state_block imgsb[] = { 40 [PIPE_SHADER_COMPUTE] = SB4_CS_SSBO, 41 [PIPE_SHADER_FRAGMENT] = SB4_SSBO, 42}; 43 44struct fd5_image { 45 enum pipe_format pfmt; 46 enum a5xx_tex_fmt fmt; 47 enum a5xx_tex_type type; 48 bool srgb; 49 uint32_t cpp; 50 uint32_t width; 51 uint32_t height; 52 uint32_t depth; 53 uint32_t pitch; 54 uint32_t array_pitch; 55 struct fd_bo *bo; 56 uint32_t offset; 57 bool buffer; 58}; 59 60static void 61translate_image(struct fd5_image *img, struct pipe_image_view *pimg) 62{ 63 enum pipe_format format = pimg->format; 64 struct pipe_resource *prsc = pimg->resource; 65 struct fd_resource *rsc = fd_resource(prsc); 66 67 if (!pimg->resource) { 68 memset(img, 0, sizeof(*img)); 69 return; 70 } 71 72 img->pfmt = format; 73 img->fmt = fd5_pipe2tex(format); 74 img->type = fd5_tex_type(prsc->target); 75 img->srgb = util_format_is_srgb(format); 76 img->cpp = rsc->layout.cpp; 77 img->bo = rsc->bo; 78 79 /* Treat cube textures as 2d-array: */ 80 if (img->type == A5XX_TEX_CUBE) 81 img->type = A5XX_TEX_2D; 82 83 if (prsc->target == PIPE_BUFFER) { 84 img->buffer = true; 85 img->offset = pimg->u.buf.offset; 86 img->pitch = 0; 87 img->array_pitch = 0; 88 89 /* size is encoded with low 15b in WIDTH and high bits in 90 * HEIGHT, in units of elements: 91 */ 92 unsigned sz = pimg->u.buf.size / util_format_get_blocksize(format); 93 img->width = sz & MASK(15); 94 img->height = sz >> 15; 95 img->depth = 0; 96 } else { 97 img->buffer = false; 98 99 unsigned lvl = pimg->u.tex.level; 100 img->offset = fd_resource_offset(rsc, lvl, pimg->u.tex.first_layer); 101 img->pitch = fd_resource_pitch(rsc, lvl); 102 103 img->width = u_minify(prsc->width0, lvl); 104 img->height = u_minify(prsc->height0, lvl); 105 106 unsigned layers = pimg->u.tex.last_layer - pimg->u.tex.first_layer + 1; 107 108 switch (prsc->target) { 109 case PIPE_TEXTURE_RECT: 110 case PIPE_TEXTURE_1D: 111 case PIPE_TEXTURE_2D: 112 img->array_pitch = rsc->layout.layer_size; 113 img->depth = 1; 114 break; 115 case PIPE_TEXTURE_1D_ARRAY: 116 case PIPE_TEXTURE_2D_ARRAY: 117 img->array_pitch = rsc->layout.layer_size; 118 img->depth = layers; 119 break; 120 case PIPE_TEXTURE_CUBE: 121 case PIPE_TEXTURE_CUBE_ARRAY: 122 img->array_pitch = rsc->layout.layer_size; 123 img->depth = layers; 124 break; 125 case PIPE_TEXTURE_3D: 126 img->array_pitch = fd_resource_slice(rsc, lvl)->size0; 127 img->depth = u_minify(prsc->depth0, lvl); 128 break; 129 default: 130 img->array_pitch = 0; 131 img->depth = 0; 132 break; 133 } 134 } 135} 136 137static void 138emit_image_tex(struct fd_ringbuffer *ring, unsigned slot, struct fd5_image *img, 139 enum pipe_shader_type shader) 140{ 141 OUT_PKT7(ring, CP_LOAD_STATE4, 3 + 12); 142 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(slot) | 143 CP_LOAD_STATE4_0_STATE_SRC(SS4_DIRECT) | 144 CP_LOAD_STATE4_0_STATE_BLOCK(texsb[shader]) | 145 CP_LOAD_STATE4_0_NUM_UNIT(1)); 146 OUT_RING(ring, CP_LOAD_STATE4_1_STATE_TYPE(ST4_CONSTANTS) | 147 CP_LOAD_STATE4_1_EXT_SRC_ADDR(0)); 148 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); 149 150 OUT_RING(ring, A5XX_TEX_CONST_0_FMT(img->fmt) | 151 fd5_tex_swiz(img->pfmt, PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y, 152 PIPE_SWIZZLE_Z, PIPE_SWIZZLE_W) | 153 COND(img->srgb, A5XX_TEX_CONST_0_SRGB)); 154 OUT_RING(ring, A5XX_TEX_CONST_1_WIDTH(img->width) | 155 A5XX_TEX_CONST_1_HEIGHT(img->height)); 156 OUT_RING(ring, 157 COND(img->buffer, A5XX_TEX_CONST_2_BUFFER) | 158 A5XX_TEX_CONST_2_TYPE(img->type) | 159 A5XX_TEX_CONST_2_PITCH(img->pitch)); 160 OUT_RING(ring, A5XX_TEX_CONST_3_ARRAY_PITCH(img->array_pitch)); 161 if (img->bo) { 162 OUT_RELOC(ring, img->bo, img->offset, 163 (uint64_t)A5XX_TEX_CONST_5_DEPTH(img->depth) << 32, 0); 164 } else { 165 OUT_RING(ring, 0x00000000); 166 OUT_RING(ring, A5XX_TEX_CONST_5_DEPTH(img->depth)); 167 } 168 OUT_RING(ring, 0x00000000); 169 OUT_RING(ring, 0x00000000); 170 OUT_RING(ring, 0x00000000); 171 OUT_RING(ring, 0x00000000); 172 OUT_RING(ring, 0x00000000); 173 OUT_RING(ring, 0x00000000); 174} 175 176static void 177emit_image_ssbo(struct fd_ringbuffer *ring, unsigned slot, 178 struct fd5_image *img, enum pipe_shader_type shader) 179{ 180 OUT_PKT7(ring, CP_LOAD_STATE4, 3 + 2); 181 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(slot) | 182 CP_LOAD_STATE4_0_STATE_SRC(SS4_DIRECT) | 183 CP_LOAD_STATE4_0_STATE_BLOCK(imgsb[shader]) | 184 CP_LOAD_STATE4_0_NUM_UNIT(1)); 185 OUT_RING(ring, CP_LOAD_STATE4_1_STATE_TYPE(ST4_CONSTANTS) | 186 CP_LOAD_STATE4_1_EXT_SRC_ADDR(0)); 187 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); 188 OUT_RING(ring, 189 A5XX_SSBO_1_0_FMT(img->fmt) | A5XX_SSBO_1_0_WIDTH(img->width)); 190 OUT_RING(ring, A5XX_SSBO_1_1_HEIGHT(img->height) | 191 A5XX_SSBO_1_1_DEPTH(img->depth)); 192 193 OUT_PKT7(ring, CP_LOAD_STATE4, 3 + 2); 194 OUT_RING(ring, CP_LOAD_STATE4_0_DST_OFF(slot) | 195 CP_LOAD_STATE4_0_STATE_SRC(SS4_DIRECT) | 196 CP_LOAD_STATE4_0_STATE_BLOCK(imgsb[shader]) | 197 CP_LOAD_STATE4_0_NUM_UNIT(1)); 198 OUT_RING(ring, CP_LOAD_STATE4_1_STATE_TYPE(ST4_UBO) | 199 CP_LOAD_STATE4_1_EXT_SRC_ADDR(0)); 200 OUT_RING(ring, CP_LOAD_STATE4_2_EXT_SRC_ADDR_HI(0)); 201 if (img->bo) { 202 OUT_RELOC(ring, img->bo, img->offset, 0, 0); 203 } else { 204 OUT_RING(ring, 0x00000000); 205 OUT_RING(ring, 0x00000000); 206 } 207} 208 209/* Emit required "SSBO" and sampler state. The sampler state is used by the 210 * hw for imageLoad(), and "SSBO" state for imageStore(). Returns max sampler 211 * used. 212 */ 213void 214fd5_emit_images(struct fd_context *ctx, struct fd_ringbuffer *ring, 215 enum pipe_shader_type shader, 216 const struct ir3_shader_variant *v) 217{ 218 struct fd_shaderimg_stateobj *so = &ctx->shaderimg[shader]; 219 unsigned enabled_mask = so->enabled_mask; 220 const struct ir3_ibo_mapping *m = &v->image_mapping; 221 222 while (enabled_mask) { 223 unsigned index = u_bit_scan(&enabled_mask); 224 struct fd5_image img; 225 226 translate_image(&img, &so->si[index]); 227 228 emit_image_tex(ring, m->image_to_tex[index] + m->tex_base, &img, shader); 229 emit_image_ssbo(ring, v->num_ssbos + index, &img, 230 shader); 231 } 232} 233