1/*
2 * Copyright (C) 2012-2013 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 *    Rob Clark <robclark@freedesktop.org>
25 */
26
27#include "pipe/p_state.h"
28#include "util/u_inlines.h"
29#include "util/u_memory.h"
30#include "util/u_string.h"
31
32#include "fd2_texture.h"
33#include "fd2_util.h"
34
35static enum sq_tex_clamp
36tex_clamp(unsigned wrap)
37{
38   switch (wrap) {
39   case PIPE_TEX_WRAP_REPEAT:
40      return SQ_TEX_WRAP;
41   case PIPE_TEX_WRAP_CLAMP:
42      return SQ_TEX_CLAMP_HALF_BORDER;
43   case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
44      return SQ_TEX_CLAMP_LAST_TEXEL;
45   case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
46      return SQ_TEX_CLAMP_BORDER;
47   case PIPE_TEX_WRAP_MIRROR_REPEAT:
48      return SQ_TEX_MIRROR;
49   case PIPE_TEX_WRAP_MIRROR_CLAMP:
50      return SQ_TEX_MIRROR_ONCE_HALF_BORDER;
51   case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
52      return SQ_TEX_MIRROR_ONCE_LAST_TEXEL;
53   case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
54      return SQ_TEX_MIRROR_ONCE_BORDER;
55   default:
56      DBG("invalid wrap: %u", wrap);
57      return 0;
58   }
59}
60
61static enum sq_tex_filter
62tex_filter(unsigned filter)
63{
64   switch (filter) {
65   case PIPE_TEX_FILTER_NEAREST:
66      return SQ_TEX_FILTER_POINT;
67   case PIPE_TEX_FILTER_LINEAR:
68      return SQ_TEX_FILTER_BILINEAR;
69   default:
70      DBG("invalid filter: %u", filter);
71      return 0;
72   }
73}
74
75static enum sq_tex_filter
76mip_filter(unsigned filter)
77{
78   switch (filter) {
79   case PIPE_TEX_MIPFILTER_NONE:
80      return SQ_TEX_FILTER_BASEMAP;
81   case PIPE_TEX_MIPFILTER_NEAREST:
82      return SQ_TEX_FILTER_POINT;
83   case PIPE_TEX_MIPFILTER_LINEAR:
84      return SQ_TEX_FILTER_BILINEAR;
85   default:
86      DBG("invalid filter: %u", filter);
87      return 0;
88   }
89}
90
91static void *
92fd2_sampler_state_create(struct pipe_context *pctx,
93                         const struct pipe_sampler_state *cso)
94{
95   struct fd2_sampler_stateobj *so = CALLOC_STRUCT(fd2_sampler_stateobj);
96
97   if (!so)
98      return NULL;
99
100   so->base = *cso;
101
102   /* TODO
103    * cso->max_anisotropy
104    * cso->normalized_coords (dealt with by shader for rect textures?)
105    */
106
107   /* SQ_TEX0_PITCH() must be OR'd in later when we know the bound texture: */
108   so->tex0 = A2XX_SQ_TEX_0_CLAMP_X(tex_clamp(cso->wrap_s)) |
109              A2XX_SQ_TEX_0_CLAMP_Y(tex_clamp(cso->wrap_t)) |
110              A2XX_SQ_TEX_0_CLAMP_Z(tex_clamp(cso->wrap_r));
111
112   so->tex3 = A2XX_SQ_TEX_3_XY_MAG_FILTER(tex_filter(cso->mag_img_filter)) |
113              A2XX_SQ_TEX_3_XY_MIN_FILTER(tex_filter(cso->min_img_filter)) |
114              A2XX_SQ_TEX_3_MIP_FILTER(mip_filter(cso->min_mip_filter));
115
116   so->tex4 = 0;
117   if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE)
118      so->tex4 = A2XX_SQ_TEX_4_LOD_BIAS(cso->lod_bias);
119
120   return so;
121}
122
123static void
124fd2_sampler_states_bind(struct pipe_context *pctx, enum pipe_shader_type shader,
125                        unsigned start, unsigned nr, void **hwcso) in_dt
126{
127   if (!hwcso)
128      nr = 0;
129
130   if (shader == PIPE_SHADER_FRAGMENT) {
131      struct fd_context *ctx = fd_context(pctx);
132
133      /* on a2xx, since there is a flat address space for textures/samplers,
134       * a change in # of fragment textures/samplers will trigger patching and
135       * re-emitting the vertex shader:
136       */
137      if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers)
138         ctx->dirty |= FD_DIRTY_TEXSTATE;
139   }
140
141   fd_sampler_states_bind(pctx, shader, start, nr, hwcso);
142}
143
144static enum sq_tex_dimension
145tex_dimension(unsigned target)
146{
147   switch (target) {
148   default:
149      assert(0);
150   case PIPE_TEXTURE_1D:
151      assert(0); /* TODO */
152      return SQ_TEX_DIMENSION_1D;
153   case PIPE_TEXTURE_RECT:
154   case PIPE_TEXTURE_2D:
155      return SQ_TEX_DIMENSION_2D;
156   case PIPE_TEXTURE_3D:
157      assert(0); /* TODO */
158      return SQ_TEX_DIMENSION_3D;
159   case PIPE_TEXTURE_CUBE:
160      return SQ_TEX_DIMENSION_CUBE;
161   }
162}
163
164static struct pipe_sampler_view *
165fd2_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
166                        const struct pipe_sampler_view *cso)
167{
168   struct fd2_pipe_sampler_view *so = CALLOC_STRUCT(fd2_pipe_sampler_view);
169   struct fd_resource *rsc = fd_resource(prsc);
170   struct surface_format fmt = fd2_pipe2surface(cso->format);
171
172   if (!so)
173      return NULL;
174
175   so->base = *cso;
176   pipe_reference(NULL, &prsc->reference);
177   so->base.texture = prsc;
178   so->base.reference.count = 1;
179   so->base.context = pctx;
180
181   so->tex0 = A2XX_SQ_TEX_0_SIGN_X(fmt.sign) | A2XX_SQ_TEX_0_SIGN_Y(fmt.sign) |
182              A2XX_SQ_TEX_0_SIGN_Z(fmt.sign) | A2XX_SQ_TEX_0_SIGN_W(fmt.sign) |
183              A2XX_SQ_TEX_0_PITCH(fdl2_pitch_pixels(&rsc->layout, 0) *
184                                  util_format_get_blockwidth(prsc->format)) |
185              COND(rsc->layout.tile_mode, A2XX_SQ_TEX_0_TILED);
186   so->tex1 = A2XX_SQ_TEX_1_FORMAT(fmt.format) |
187              A2XX_SQ_TEX_1_CLAMP_POLICY(SQ_TEX_CLAMP_POLICY_OGL);
188   so->tex2 = A2XX_SQ_TEX_2_HEIGHT(prsc->height0 - 1) |
189              A2XX_SQ_TEX_2_WIDTH(prsc->width0 - 1);
190   so->tex3 = A2XX_SQ_TEX_3_NUM_FORMAT(fmt.num_format) |
191              fd2_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g,
192                           cso->swizzle_b, cso->swizzle_a) |
193              A2XX_SQ_TEX_3_EXP_ADJUST(fmt.exp_adjust);
194
195   so->tex4 = A2XX_SQ_TEX_4_MIP_MIN_LEVEL(fd_sampler_first_level(cso)) |
196              A2XX_SQ_TEX_4_MIP_MAX_LEVEL(fd_sampler_last_level(cso));
197
198   so->tex5 = A2XX_SQ_TEX_5_DIMENSION(tex_dimension(prsc->target));
199
200   return &so->base;
201}
202
203static void
204fd2_set_sampler_views(struct pipe_context *pctx, enum pipe_shader_type shader,
205                      unsigned start, unsigned nr,
206                      unsigned unbind_num_trailing_slots,
207                      bool take_ownership,
208                      struct pipe_sampler_view **views) in_dt
209{
210   if (shader == PIPE_SHADER_FRAGMENT) {
211      struct fd_context *ctx = fd_context(pctx);
212
213      /* on a2xx, since there is a flat address space for textures/samplers,
214       * a change in # of fragment textures/samplers will trigger patching and
215       * re-emitting the vertex shader:
216       */
217      if (nr != ctx->tex[PIPE_SHADER_FRAGMENT].num_textures)
218         ctx->dirty |= FD_DIRTY_TEXSTATE;
219   }
220
221   fd_set_sampler_views(pctx, shader, start, nr, unbind_num_trailing_slots,
222                        take_ownership, views);
223}
224
225/* map gallium sampler-id to hw const-idx.. adreno uses a flat address
226 * space of samplers (const-idx), so we need to map the gallium sampler-id
227 * which is per-shader to a global const-idx space.
228 *
229 * Fragment shader sampler maps directly to const-idx, and vertex shader
230 * is offset by the # of fragment shader samplers.  If the # of fragment
231 * shader samplers changes, this shifts the vertex shader indexes.
232 *
233 * TODO maybe we can do frag shader 0..N  and vert shader N..0 to avoid
234 * this??
235 */
236unsigned
237fd2_get_const_idx(struct fd_context *ctx, struct fd_texture_stateobj *tex,
238                  unsigned samp_id) assert_dt
239{
240   if (tex == &ctx->tex[PIPE_SHADER_FRAGMENT])
241      return samp_id;
242   return samp_id + ctx->tex[PIPE_SHADER_FRAGMENT].num_samplers;
243}
244
245void
246fd2_texture_init(struct pipe_context *pctx)
247{
248   pctx->create_sampler_state = fd2_sampler_state_create;
249   pctx->bind_sampler_states = fd2_sampler_states_bind;
250   pctx->create_sampler_view = fd2_sampler_view_create;
251   pctx->set_sampler_views = fd2_set_sampler_views;
252}
253