1/*
2 * Copyright (c) 2012-2013 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 *    Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27#include "etnaviv_surface.h"
28#include "etnaviv_screen.h"
29
30#include "etnaviv_clear_blit.h"
31#include "etnaviv_context.h"
32#include "etnaviv_translate.h"
33#include "pipe/p_defines.h"
34#include "pipe/p_state.h"
35#include "util/u_inlines.h"
36#include "util/u_math.h"
37#include "util/u_memory.h"
38
39#include "hw/common.xml.h"
40
41#include "drm-uapi/drm_fourcc.h"
42
43static struct etna_resource *
44etna_render_handle_incompatible(struct pipe_context *pctx,
45                                struct pipe_resource *prsc,
46                                unsigned int level)
47{
48   struct etna_context *ctx = etna_context(pctx);
49   struct etna_screen *screen = ctx->screen;
50   struct etna_resource *res = etna_resource(prsc);
51   bool need_multitiled = screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer;
52   bool want_supertiled = screen->specs.can_supertile;
53   unsigned int min_tilesize = etna_screen_get_tile_size(screen, TS_MODE_128B);
54
55   /* Resource is compatible if it is tiled or PE is able to render to linear
56    * and has multi tiling when required.
57    */
58   if ((res->layout != ETNA_LAYOUT_LINEAR ||
59        (VIV_FEATURE(screen, chipMinorFeatures2, LINEAR_PE) &&
60         (!VIV_FEATURE(screen, chipFeatures, FAST_CLEAR) ||
61          res->levels[level].stride % min_tilesize == 0))) &&
62       (!need_multitiled || (res->layout & ETNA_LAYOUT_BIT_MULTI)))
63      return res;
64
65   if (!res->render) {
66      struct pipe_resource templat = *prsc;
67      unsigned layout = ETNA_LAYOUT_TILED;
68      if (need_multitiled)
69         layout |= ETNA_LAYOUT_BIT_MULTI;
70      if (want_supertiled)
71         layout |= ETNA_LAYOUT_BIT_SUPER;
72
73      templat.bind &= (PIPE_BIND_DEPTH_STENCIL | PIPE_BIND_RENDER_TARGET |
74                        PIPE_BIND_BLENDABLE);
75      res->render =
76         etna_resource_alloc(pctx->screen, layout,
77                             DRM_FORMAT_MOD_LINEAR, &templat);
78      assert(res->render);
79   }
80   return etna_resource(res->render);
81}
82
83static struct pipe_surface *
84etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc,
85                    const struct pipe_surface *templat)
86{
87   struct etna_context *ctx = etna_context(pctx);
88   struct etna_screen *screen = ctx->screen;
89   unsigned layer = templat->u.tex.first_layer;
90   unsigned level = templat->u.tex.level;
91   struct etna_resource *rsc = etna_render_handle_incompatible(pctx, prsc, level);
92   struct etna_surface *surf = CALLOC_STRUCT(etna_surface);
93
94   if (!surf)
95      return NULL;
96
97   assert(templat->u.tex.first_layer == templat->u.tex.last_layer);
98   assert(layer <= util_max_layer(prsc, level));
99
100   surf->base.context = pctx;
101
102   pipe_reference_init(&surf->base.reference, 1);
103   pipe_resource_reference(&surf->base.texture, &rsc->base);
104   pipe_resource_reference(&surf->prsc, prsc);
105
106   /* Allocate a TS for the resource if there isn't one yet,
107    * and it is allowed by the hw (width is a multiple of 16).
108    * Avoid doing this for GPUs with MC1.0, as kernel sources
109    * indicate the tile status module bypasses the memory
110    * offset and MMU. */
111
112   if (VIV_FEATURE(screen, chipFeatures, FAST_CLEAR) &&
113       !rsc->ts_bo &&
114       /* needs to be RS/BLT compatible for transfer_map/unmap */
115       (rsc->levels[level].padded_width & ETNA_RS_WIDTH_MASK) == 0 &&
116       (rsc->levels[level].padded_height & ETNA_RS_HEIGHT_MASK) == 0 &&
117       etna_resource_hw_tileable(screen->specs.use_blt, prsc)) {
118      etna_screen_resource_alloc_ts(pctx->screen, rsc);
119   }
120
121   surf->base.format = templat->format;
122   surf->base.width = rsc->levels[level].width;
123   surf->base.height = rsc->levels[level].height;
124   surf->base.writable = templat->writable; /* what is this for anyway */
125   surf->base.u = templat->u;
126
127   surf->level = &rsc->levels[level]; /* Keep pointer to actual level to set
128                                       * clear color on underlying resource
129                                       * instead of surface */
130   surf->surf = rsc->levels [level];  /* Make copy of level to narrow down
131                                       * address to layer */
132
133   /* XXX we don't really need a copy but it's convenient */
134   surf->surf.offset += layer * surf->surf.layer_stride;
135
136   struct etna_resource_level *lev = &rsc->levels[level];
137
138   /* Setup template relocations for this surface */
139   for (unsigned pipe = 0; pipe < screen->specs.pixel_pipes; ++pipe) {
140      surf->reloc[pipe].bo = rsc->bo;
141      surf->reloc[pipe].offset = surf->surf.offset;
142      surf->reloc[pipe].flags = 0;
143   }
144
145   /* In single buffer mode, both pixel pipes must point to the same address,
146    * for multi-tiled surfaces on the other hand the second pipe is expected to
147    * point halfway the image vertically.
148    */
149   if (rsc->layout & ETNA_LAYOUT_BIT_MULTI)
150      surf->reloc[1].offset = surf->surf.offset + lev->stride * lev->padded_height / 2;
151
152   if (surf->surf.ts_size) {
153      unsigned int layer_offset = layer * surf->surf.ts_layer_stride;
154      assert(layer_offset < surf->surf.ts_size);
155
156      surf->surf.ts_offset += layer_offset;
157      surf->surf.ts_size -= layer_offset;
158      surf->surf.ts_valid = false;
159
160      surf->ts_reloc.bo = rsc->ts_bo;
161      surf->ts_reloc.offset = surf->surf.ts_offset;
162      surf->ts_reloc.flags = 0;
163
164      if (!screen->specs.use_blt) {
165         /* This (ab)uses the RS as a plain buffer memset().
166          * Currently uses a fixed row size of 64 bytes. Some benchmarking with
167          * different sizes may be in order. */
168         struct etna_bo *ts_bo = etna_resource(surf->base.texture)->ts_bo;
169         etna_compile_rs_state(ctx, &surf->clear_command, &(struct rs_state) {
170            .source_format = RS_FORMAT_A8R8G8B8,
171            .dest_format = RS_FORMAT_A8R8G8B8,
172            .dest = ts_bo,
173            .dest_offset = surf->surf.ts_offset,
174            .dest_stride = 0x40,
175            .dest_tiling = ETNA_LAYOUT_TILED,
176            .dither = {0xffffffff, 0xffffffff},
177            .width = 16,
178            .height = align(surf->surf.ts_size / 0x40, 4),
179            .clear_value = {screen->specs.ts_clear_value},
180            .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1,
181            .clear_bits = 0xffff
182         });
183      }
184   } else {
185      if (!screen->specs.use_blt)
186         etna_rs_gen_clear_surface(ctx, surf, surf->level->clear_value);
187   }
188
189   return &surf->base;
190}
191
192static void
193etna_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
194{
195   pipe_resource_reference(&psurf->texture, NULL);
196   pipe_resource_reference(&etna_surface(psurf)->prsc, NULL);
197   FREE(psurf);
198}
199
200void
201etna_surface_init(struct pipe_context *pctx)
202{
203   pctx->create_surface = etna_create_surface;
204   pctx->surface_destroy = etna_surface_destroy;
205}
206