1/* 2 * Copyright © 2017 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 20 * DEALINGS IN THE SOFTWARE. 21 */ 22 23/** 24 * @file crocus_formats.c 25 * 26 * Converts Gallium formats (PIPE_FORMAT_*) to hardware ones (ISL_FORMAT_*). 27 * Provides information about which formats support what features. 28 */ 29 30#include "util/bitscan.h" 31#include "util/macros.h" 32#include "util/format/u_format.h" 33 34#include "crocus_resource.h" 35#include "crocus_screen.h" 36 37static enum isl_format 38crocus_isl_format_for_pipe_format(enum pipe_format pf) 39{ 40 static const enum isl_format table[PIPE_FORMAT_COUNT] = { 41 [0 ... PIPE_FORMAT_COUNT-1] = ISL_FORMAT_UNSUPPORTED, 42 43 [PIPE_FORMAT_B8G8R8A8_UNORM] = ISL_FORMAT_B8G8R8A8_UNORM, 44 [PIPE_FORMAT_B8G8R8X8_UNORM] = ISL_FORMAT_B8G8R8X8_UNORM, 45 [PIPE_FORMAT_B5G5R5A1_UNORM] = ISL_FORMAT_B5G5R5A1_UNORM, 46 [PIPE_FORMAT_B4G4R4A4_UNORM] = ISL_FORMAT_B4G4R4A4_UNORM, 47 [PIPE_FORMAT_B5G6R5_UNORM] = ISL_FORMAT_B5G6R5_UNORM, 48 [PIPE_FORMAT_R10G10B10A2_UNORM] = ISL_FORMAT_R10G10B10A2_UNORM, 49 50 [PIPE_FORMAT_Z16_UNORM] = ISL_FORMAT_R16_UNORM, 51 [PIPE_FORMAT_Z32_UNORM] = ISL_FORMAT_R32_UNORM, 52 [PIPE_FORMAT_Z32_FLOAT] = ISL_FORMAT_R32_FLOAT, 53 54 /* We translate the combined depth/stencil formats to depth only here */ 55 [PIPE_FORMAT_Z24_UNORM_S8_UINT] = ISL_FORMAT_R24_UNORM_X8_TYPELESS, 56 [PIPE_FORMAT_Z24X8_UNORM] = ISL_FORMAT_R24_UNORM_X8_TYPELESS, 57 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT] = ISL_FORMAT_R32_FLOAT, 58 59 [PIPE_FORMAT_S8_UINT] = ISL_FORMAT_R8_UINT, 60 [PIPE_FORMAT_X24S8_UINT] = ISL_FORMAT_R8_UINT, 61 [PIPE_FORMAT_X32_S8X24_UINT] = ISL_FORMAT_R8_UINT, 62 63 [PIPE_FORMAT_R64_FLOAT] = ISL_FORMAT_R64_FLOAT, 64 [PIPE_FORMAT_R64G64_FLOAT] = ISL_FORMAT_R64G64_FLOAT, 65 [PIPE_FORMAT_R64G64B64_FLOAT] = ISL_FORMAT_R64G64B64_FLOAT, 66 [PIPE_FORMAT_R64G64B64A64_FLOAT] = ISL_FORMAT_R64G64B64A64_FLOAT, 67 [PIPE_FORMAT_R32_FLOAT] = ISL_FORMAT_R32_FLOAT, 68 [PIPE_FORMAT_R32G32_FLOAT] = ISL_FORMAT_R32G32_FLOAT, 69 [PIPE_FORMAT_R32G32B32_FLOAT] = ISL_FORMAT_R32G32B32_FLOAT, 70 [PIPE_FORMAT_R32G32B32A32_FLOAT] = ISL_FORMAT_R32G32B32A32_FLOAT, 71 [PIPE_FORMAT_R32_UNORM] = ISL_FORMAT_R32_UNORM, 72 [PIPE_FORMAT_R32G32_UNORM] = ISL_FORMAT_R32G32_UNORM, 73 [PIPE_FORMAT_R32G32B32_UNORM] = ISL_FORMAT_R32G32B32_UNORM, 74 [PIPE_FORMAT_R32G32B32A32_UNORM] = ISL_FORMAT_R32G32B32A32_UNORM, 75 [PIPE_FORMAT_R32_USCALED] = ISL_FORMAT_R32_USCALED, 76 [PIPE_FORMAT_R32G32_USCALED] = ISL_FORMAT_R32G32_USCALED, 77 [PIPE_FORMAT_R32G32B32_USCALED] = ISL_FORMAT_R32G32B32_USCALED, 78 [PIPE_FORMAT_R32G32B32A32_USCALED] = ISL_FORMAT_R32G32B32A32_USCALED, 79 [PIPE_FORMAT_R32_SNORM] = ISL_FORMAT_R32_SNORM, 80 [PIPE_FORMAT_R32G32_SNORM] = ISL_FORMAT_R32G32_SNORM, 81 [PIPE_FORMAT_R32G32B32_SNORM] = ISL_FORMAT_R32G32B32_SNORM, 82 [PIPE_FORMAT_R32G32B32A32_SNORM] = ISL_FORMAT_R32G32B32A32_SNORM, 83 [PIPE_FORMAT_R32_SSCALED] = ISL_FORMAT_R32_SSCALED, 84 [PIPE_FORMAT_R32G32_SSCALED] = ISL_FORMAT_R32G32_SSCALED, 85 [PIPE_FORMAT_R32G32B32_SSCALED] = ISL_FORMAT_R32G32B32_SSCALED, 86 [PIPE_FORMAT_R32G32B32A32_SSCALED] = ISL_FORMAT_R32G32B32A32_SSCALED, 87 [PIPE_FORMAT_R16_UNORM] = ISL_FORMAT_R16_UNORM, 88 [PIPE_FORMAT_R16G16_UNORM] = ISL_FORMAT_R16G16_UNORM, 89 [PIPE_FORMAT_R16G16B16_UNORM] = ISL_FORMAT_R16G16B16_UNORM, 90 [PIPE_FORMAT_R16G16B16A16_UNORM] = ISL_FORMAT_R16G16B16A16_UNORM, 91 [PIPE_FORMAT_R16_USCALED] = ISL_FORMAT_R16_USCALED, 92 [PIPE_FORMAT_R16G16_USCALED] = ISL_FORMAT_R16G16_USCALED, 93 [PIPE_FORMAT_R16G16B16_USCALED] = ISL_FORMAT_R16G16B16_USCALED, 94 [PIPE_FORMAT_R16G16B16A16_USCALED] = ISL_FORMAT_R16G16B16A16_USCALED, 95 [PIPE_FORMAT_R16_SNORM] = ISL_FORMAT_R16_SNORM, 96 [PIPE_FORMAT_R16G16_SNORM] = ISL_FORMAT_R16G16_SNORM, 97 [PIPE_FORMAT_R16G16B16_SNORM] = ISL_FORMAT_R16G16B16_SNORM, 98 [PIPE_FORMAT_R16G16B16A16_SNORM] = ISL_FORMAT_R16G16B16A16_SNORM, 99 [PIPE_FORMAT_R16_SSCALED] = ISL_FORMAT_R16_SSCALED, 100 [PIPE_FORMAT_R16G16_SSCALED] = ISL_FORMAT_R16G16_SSCALED, 101 [PIPE_FORMAT_R16G16B16_SSCALED] = ISL_FORMAT_R16G16B16_SSCALED, 102 [PIPE_FORMAT_R16G16B16A16_SSCALED] = ISL_FORMAT_R16G16B16A16_SSCALED, 103 [PIPE_FORMAT_R8_UNORM] = ISL_FORMAT_R8_UNORM, 104 [PIPE_FORMAT_R8G8_UNORM] = ISL_FORMAT_R8G8_UNORM, 105 [PIPE_FORMAT_R8G8B8_UNORM] = ISL_FORMAT_R8G8B8_UNORM, 106 [PIPE_FORMAT_R8G8B8A8_UNORM] = ISL_FORMAT_R8G8B8A8_UNORM, 107 [PIPE_FORMAT_R8_USCALED] = ISL_FORMAT_R8_USCALED, 108 [PIPE_FORMAT_R8G8_USCALED] = ISL_FORMAT_R8G8_USCALED, 109 [PIPE_FORMAT_R8G8B8_USCALED] = ISL_FORMAT_R8G8B8_USCALED, 110 [PIPE_FORMAT_R8G8B8A8_USCALED] = ISL_FORMAT_R8G8B8A8_USCALED, 111 [PIPE_FORMAT_R8_SNORM] = ISL_FORMAT_R8_SNORM, 112 [PIPE_FORMAT_R8G8_SNORM] = ISL_FORMAT_R8G8_SNORM, 113 [PIPE_FORMAT_R8G8B8_SNORM] = ISL_FORMAT_R8G8B8_SNORM, 114 [PIPE_FORMAT_R8G8B8A8_SNORM] = ISL_FORMAT_R8G8B8A8_SNORM, 115 [PIPE_FORMAT_R8_SSCALED] = ISL_FORMAT_R8_SSCALED, 116 [PIPE_FORMAT_R8G8_SSCALED] = ISL_FORMAT_R8G8_SSCALED, 117 [PIPE_FORMAT_R8G8B8_SSCALED] = ISL_FORMAT_R8G8B8_SSCALED, 118 [PIPE_FORMAT_R8G8B8A8_SSCALED] = ISL_FORMAT_R8G8B8A8_SSCALED, 119 [PIPE_FORMAT_R32_FIXED] = ISL_FORMAT_R32_SFIXED, 120 [PIPE_FORMAT_R32G32_FIXED] = ISL_FORMAT_R32G32_SFIXED, 121 [PIPE_FORMAT_R32G32B32_FIXED] = ISL_FORMAT_R32G32B32_SFIXED, 122 [PIPE_FORMAT_R32G32B32A32_FIXED] = ISL_FORMAT_R32G32B32A32_SFIXED, 123 [PIPE_FORMAT_R16_FLOAT] = ISL_FORMAT_R16_FLOAT, 124 [PIPE_FORMAT_R16G16_FLOAT] = ISL_FORMAT_R16G16_FLOAT, 125 [PIPE_FORMAT_R16G16B16_FLOAT] = ISL_FORMAT_R16G16B16_FLOAT, 126 [PIPE_FORMAT_R16G16B16A16_FLOAT] = ISL_FORMAT_R16G16B16A16_FLOAT, 127 128 [PIPE_FORMAT_R8G8B8_SRGB] = ISL_FORMAT_R8G8B8_UNORM_SRGB, 129 [PIPE_FORMAT_B8G8R8A8_SRGB] = ISL_FORMAT_B8G8R8A8_UNORM_SRGB, 130 [PIPE_FORMAT_B8G8R8X8_SRGB] = ISL_FORMAT_B8G8R8X8_UNORM_SRGB, 131 [PIPE_FORMAT_R8G8B8A8_SRGB] = ISL_FORMAT_R8G8B8A8_UNORM_SRGB, 132 133 [PIPE_FORMAT_DXT1_RGB] = ISL_FORMAT_BC1_UNORM, 134 [PIPE_FORMAT_DXT1_RGBA] = ISL_FORMAT_BC1_UNORM, 135 [PIPE_FORMAT_DXT3_RGBA] = ISL_FORMAT_BC2_UNORM, 136 [PIPE_FORMAT_DXT5_RGBA] = ISL_FORMAT_BC3_UNORM, 137 138 [PIPE_FORMAT_DXT1_SRGB] = ISL_FORMAT_BC1_UNORM_SRGB, 139 [PIPE_FORMAT_DXT1_SRGBA] = ISL_FORMAT_BC1_UNORM_SRGB, 140 [PIPE_FORMAT_DXT3_SRGBA] = ISL_FORMAT_BC2_UNORM_SRGB, 141 [PIPE_FORMAT_DXT5_SRGBA] = ISL_FORMAT_BC3_UNORM_SRGB, 142 143 [PIPE_FORMAT_RGTC1_UNORM] = ISL_FORMAT_BC4_UNORM, 144 [PIPE_FORMAT_RGTC1_SNORM] = ISL_FORMAT_BC4_SNORM, 145 [PIPE_FORMAT_RGTC2_UNORM] = ISL_FORMAT_BC5_UNORM, 146 [PIPE_FORMAT_RGTC2_SNORM] = ISL_FORMAT_BC5_SNORM, 147 148 [PIPE_FORMAT_R10G10B10A2_USCALED] = ISL_FORMAT_R10G10B10A2_USCALED, 149 [PIPE_FORMAT_R11G11B10_FLOAT] = ISL_FORMAT_R11G11B10_FLOAT, 150 [PIPE_FORMAT_R9G9B9E5_FLOAT] = ISL_FORMAT_R9G9B9E5_SHAREDEXP, 151 [PIPE_FORMAT_R1_UNORM] = ISL_FORMAT_R1_UNORM, 152 [PIPE_FORMAT_R10G10B10X2_USCALED] = ISL_FORMAT_R10G10B10X2_USCALED, 153 [PIPE_FORMAT_B10G10R10A2_UNORM] = ISL_FORMAT_B10G10R10A2_UNORM, 154 [PIPE_FORMAT_R8G8B8X8_UNORM] = ISL_FORMAT_R8G8B8X8_UNORM, 155 156 [PIPE_FORMAT_I8_UNORM] = ISL_FORMAT_R8_UNORM, 157 [PIPE_FORMAT_I16_UNORM] = ISL_FORMAT_R16_UNORM, 158 [PIPE_FORMAT_I8_SNORM] = ISL_FORMAT_R8_SNORM, 159 [PIPE_FORMAT_I16_SNORM] = ISL_FORMAT_R16_SNORM, 160 [PIPE_FORMAT_I16_FLOAT] = ISL_FORMAT_R16_FLOAT, 161 [PIPE_FORMAT_I32_FLOAT] = ISL_FORMAT_R32_FLOAT, 162 163 [PIPE_FORMAT_L8_UINT] = ISL_FORMAT_L8_UINT, 164 [PIPE_FORMAT_L8_UNORM] = ISL_FORMAT_L8_UNORM, 165 [PIPE_FORMAT_L8_SNORM] = ISL_FORMAT_R8_SNORM, 166 [PIPE_FORMAT_L8_SINT] = ISL_FORMAT_L8_SINT, 167 [PIPE_FORMAT_L16_UNORM] = ISL_FORMAT_L16_UNORM, 168 [PIPE_FORMAT_L16_SNORM] = ISL_FORMAT_R16_SNORM, 169 [PIPE_FORMAT_L16_FLOAT] = ISL_FORMAT_L16_FLOAT, 170 [PIPE_FORMAT_L32_FLOAT] = ISL_FORMAT_L32_FLOAT, 171 172 [PIPE_FORMAT_A8_UNORM] = ISL_FORMAT_A8_UNORM, 173 [PIPE_FORMAT_A16_UNORM] = ISL_FORMAT_A16_UNORM, 174 [PIPE_FORMAT_A16_FLOAT] = ISL_FORMAT_A16_FLOAT, 175 [PIPE_FORMAT_A32_FLOAT] = ISL_FORMAT_A32_FLOAT, 176 177 [PIPE_FORMAT_L8A8_UNORM] = ISL_FORMAT_L8A8_UNORM, 178 [PIPE_FORMAT_L16A16_UNORM] = ISL_FORMAT_L16A16_UNORM, 179 [PIPE_FORMAT_L16A16_FLOAT] = ISL_FORMAT_L16A16_FLOAT, 180 [PIPE_FORMAT_L32A32_FLOAT] = ISL_FORMAT_L32A32_FLOAT, 181 182 /* Sadly, we have to use luminance[-alpha] formats for sRGB decoding. */ 183 [PIPE_FORMAT_R8_SRGB] = ISL_FORMAT_L8_UNORM_SRGB, 184 [PIPE_FORMAT_L8_SRGB] = ISL_FORMAT_L8_UNORM_SRGB, 185 [PIPE_FORMAT_L8A8_SRGB] = ISL_FORMAT_L8A8_UNORM_SRGB, 186 187 [PIPE_FORMAT_R10G10B10A2_SSCALED] = ISL_FORMAT_R10G10B10A2_SSCALED, 188 [PIPE_FORMAT_R10G10B10A2_SNORM] = ISL_FORMAT_R10G10B10A2_SNORM, 189 190 [PIPE_FORMAT_B10G10R10A2_USCALED] = ISL_FORMAT_B10G10R10A2_USCALED, 191 [PIPE_FORMAT_B10G10R10A2_SSCALED] = ISL_FORMAT_B10G10R10A2_SSCALED, 192 [PIPE_FORMAT_B10G10R10A2_SNORM] = ISL_FORMAT_B10G10R10A2_SNORM, 193 194 [PIPE_FORMAT_R8_UINT] = ISL_FORMAT_R8_UINT, 195 [PIPE_FORMAT_R8G8_UINT] = ISL_FORMAT_R8G8_UINT, 196 [PIPE_FORMAT_R8G8B8_UINT] = ISL_FORMAT_R8G8B8_UINT, 197 [PIPE_FORMAT_R8G8B8A8_UINT] = ISL_FORMAT_R8G8B8A8_UINT, 198 199 [PIPE_FORMAT_R8_SINT] = ISL_FORMAT_R8_SINT, 200 [PIPE_FORMAT_R8G8_SINT] = ISL_FORMAT_R8G8_SINT, 201 [PIPE_FORMAT_R8G8B8_SINT] = ISL_FORMAT_R8G8B8_SINT, 202 [PIPE_FORMAT_R8G8B8A8_SINT] = ISL_FORMAT_R8G8B8A8_SINT, 203 204 [PIPE_FORMAT_R16_UINT] = ISL_FORMAT_R16_UINT, 205 [PIPE_FORMAT_R16G16_UINT] = ISL_FORMAT_R16G16_UINT, 206 [PIPE_FORMAT_R16G16B16_UINT] = ISL_FORMAT_R16G16B16_UINT, 207 [PIPE_FORMAT_R16G16B16A16_UINT] = ISL_FORMAT_R16G16B16A16_UINT, 208 209 [PIPE_FORMAT_R16_SINT] = ISL_FORMAT_R16_SINT, 210 [PIPE_FORMAT_R16G16_SINT] = ISL_FORMAT_R16G16_SINT, 211 [PIPE_FORMAT_R16G16B16_SINT] = ISL_FORMAT_R16G16B16_SINT, 212 [PIPE_FORMAT_R16G16B16A16_SINT] = ISL_FORMAT_R16G16B16A16_SINT, 213 214 [PIPE_FORMAT_R32_UINT] = ISL_FORMAT_R32_UINT, 215 [PIPE_FORMAT_R32G32_UINT] = ISL_FORMAT_R32G32_UINT, 216 [PIPE_FORMAT_R32G32B32_UINT] = ISL_FORMAT_R32G32B32_UINT, 217 [PIPE_FORMAT_R32G32B32A32_UINT] = ISL_FORMAT_R32G32B32A32_UINT, 218 219 [PIPE_FORMAT_R32_SINT] = ISL_FORMAT_R32_SINT, 220 [PIPE_FORMAT_R32G32_SINT] = ISL_FORMAT_R32G32_SINT, 221 [PIPE_FORMAT_R32G32B32_SINT] = ISL_FORMAT_R32G32B32_SINT, 222 [PIPE_FORMAT_R32G32B32A32_SINT] = ISL_FORMAT_R32G32B32A32_SINT, 223 224 [PIPE_FORMAT_B10G10R10A2_UINT] = ISL_FORMAT_B10G10R10A2_UINT, 225 226 [PIPE_FORMAT_ETC1_RGB8] = ISL_FORMAT_ETC1_RGB8, 227 228 [PIPE_FORMAT_R8G8B8X8_SRGB] = ISL_FORMAT_R8G8B8X8_UNORM_SRGB, 229 [PIPE_FORMAT_B10G10R10X2_UNORM] = ISL_FORMAT_B10G10R10X2_UNORM, 230 [PIPE_FORMAT_R16G16B16X16_UNORM] = ISL_FORMAT_R16G16B16X16_UNORM, 231 [PIPE_FORMAT_R16G16B16X16_FLOAT] = ISL_FORMAT_R16G16B16X16_FLOAT, 232 [PIPE_FORMAT_R32G32B32X32_FLOAT] = ISL_FORMAT_R32G32B32X32_FLOAT, 233 234 [PIPE_FORMAT_R10G10B10A2_UINT] = ISL_FORMAT_R10G10B10A2_UINT, 235 236 [PIPE_FORMAT_B5G6R5_SRGB] = ISL_FORMAT_B5G6R5_UNORM_SRGB, 237 238 [PIPE_FORMAT_BPTC_RGBA_UNORM] = ISL_FORMAT_BC7_UNORM, 239 [PIPE_FORMAT_BPTC_SRGBA] = ISL_FORMAT_BC7_UNORM_SRGB, 240 [PIPE_FORMAT_BPTC_RGB_FLOAT] = ISL_FORMAT_BC6H_SF16, 241 [PIPE_FORMAT_BPTC_RGB_UFLOAT] = ISL_FORMAT_BC6H_UF16, 242 243 [PIPE_FORMAT_ETC2_RGB8] = ISL_FORMAT_ETC2_RGB8, 244 [PIPE_FORMAT_ETC2_SRGB8] = ISL_FORMAT_ETC2_SRGB8, 245 [PIPE_FORMAT_ETC2_RGB8A1] = ISL_FORMAT_ETC2_RGB8_PTA, 246 [PIPE_FORMAT_ETC2_SRGB8A1] = ISL_FORMAT_ETC2_SRGB8_PTA, 247 [PIPE_FORMAT_ETC2_RGBA8] = ISL_FORMAT_ETC2_EAC_RGBA8, 248 [PIPE_FORMAT_ETC2_SRGBA8] = ISL_FORMAT_ETC2_EAC_SRGB8_A8, 249 [PIPE_FORMAT_ETC2_R11_UNORM] = ISL_FORMAT_EAC_R11, 250 [PIPE_FORMAT_ETC2_R11_SNORM] = ISL_FORMAT_EAC_SIGNED_R11, 251 [PIPE_FORMAT_ETC2_RG11_UNORM] = ISL_FORMAT_EAC_RG11, 252 [PIPE_FORMAT_ETC2_RG11_SNORM] = ISL_FORMAT_EAC_SIGNED_RG11, 253 254 [PIPE_FORMAT_FXT1_RGB] = ISL_FORMAT_FXT1, 255 [PIPE_FORMAT_FXT1_RGBA] = ISL_FORMAT_FXT1, 256 257 [PIPE_FORMAT_ASTC_4x4] = ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16, 258 [PIPE_FORMAT_ASTC_5x4] = ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16, 259 [PIPE_FORMAT_ASTC_5x5] = ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16, 260 [PIPE_FORMAT_ASTC_6x5] = ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16, 261 [PIPE_FORMAT_ASTC_6x6] = ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16, 262 [PIPE_FORMAT_ASTC_8x5] = ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16, 263 [PIPE_FORMAT_ASTC_8x6] = ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16, 264 [PIPE_FORMAT_ASTC_8x8] = ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16, 265 [PIPE_FORMAT_ASTC_10x5] = ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16, 266 [PIPE_FORMAT_ASTC_10x6] = ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16, 267 [PIPE_FORMAT_ASTC_10x8] = ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16, 268 [PIPE_FORMAT_ASTC_10x10] = ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16, 269 [PIPE_FORMAT_ASTC_12x10] = ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16, 270 [PIPE_FORMAT_ASTC_12x12] = ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16, 271 272 [PIPE_FORMAT_ASTC_4x4_SRGB] = ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB, 273 [PIPE_FORMAT_ASTC_5x4_SRGB] = ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB, 274 [PIPE_FORMAT_ASTC_5x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB, 275 [PIPE_FORMAT_ASTC_6x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB, 276 [PIPE_FORMAT_ASTC_6x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB, 277 [PIPE_FORMAT_ASTC_8x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB, 278 [PIPE_FORMAT_ASTC_8x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB, 279 [PIPE_FORMAT_ASTC_8x8_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB, 280 [PIPE_FORMAT_ASTC_10x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB, 281 [PIPE_FORMAT_ASTC_10x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB, 282 [PIPE_FORMAT_ASTC_10x8_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB, 283 [PIPE_FORMAT_ASTC_10x10_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB, 284 [PIPE_FORMAT_ASTC_12x10_SRGB] = ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB, 285 [PIPE_FORMAT_ASTC_12x12_SRGB] = ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB, 286 287 [PIPE_FORMAT_A1B5G5R5_UNORM] = ISL_FORMAT_A1B5G5R5_UNORM, 288 289 /* We support these so that we know the API expects no alpha channel. 290 * Otherwise, the state tracker would just give us a format with alpha 291 * and we wouldn't know to override the swizzle to 1. 292 */ 293 [PIPE_FORMAT_R16G16B16X16_UINT] = ISL_FORMAT_R16G16B16A16_UINT, 294 [PIPE_FORMAT_R16G16B16X16_SINT] = ISL_FORMAT_R16G16B16A16_SINT, 295 [PIPE_FORMAT_R32G32B32X32_UINT] = ISL_FORMAT_R32G32B32A32_UINT, 296 [PIPE_FORMAT_R32G32B32X32_SINT] = ISL_FORMAT_R32G32B32A32_SINT, 297 [PIPE_FORMAT_R10G10B10X2_SNORM] = ISL_FORMAT_R10G10B10A2_SNORM, 298 }; 299 assert(pf < PIPE_FORMAT_COUNT); 300 return table[pf]; 301} 302 303static enum isl_format 304get_render_format(enum pipe_format pformat, enum isl_format def_format) 305{ 306 switch (pformat) { 307 case PIPE_FORMAT_A16_UNORM: return ISL_FORMAT_R16_UNORM; 308 case PIPE_FORMAT_A16_FLOAT: return ISL_FORMAT_R16_FLOAT; 309 case PIPE_FORMAT_A32_FLOAT: return ISL_FORMAT_R32_FLOAT; 310 311 case PIPE_FORMAT_I8_UNORM: return ISL_FORMAT_R8_UNORM; 312 case PIPE_FORMAT_I16_UNORM: return ISL_FORMAT_R16_UNORM; 313 case PIPE_FORMAT_I16_FLOAT: return ISL_FORMAT_R16_FLOAT; 314 case PIPE_FORMAT_I32_FLOAT: return ISL_FORMAT_R32_FLOAT; 315 316 case PIPE_FORMAT_L8_UNORM: return ISL_FORMAT_R8_UNORM; 317 case PIPE_FORMAT_L8_UINT: return ISL_FORMAT_R8_UINT; 318 case PIPE_FORMAT_L8_SINT: return ISL_FORMAT_R8_SINT; 319 case PIPE_FORMAT_L16_UNORM: return ISL_FORMAT_R16_UNORM; 320 case PIPE_FORMAT_L16_FLOAT: return ISL_FORMAT_R16_FLOAT; 321 case PIPE_FORMAT_L32_FLOAT: return ISL_FORMAT_R32_FLOAT; 322 323 case PIPE_FORMAT_L8A8_UNORM: return ISL_FORMAT_R8G8_UNORM; 324 case PIPE_FORMAT_L16A16_UNORM: return ISL_FORMAT_R16G16_UNORM; 325 case PIPE_FORMAT_L16A16_FLOAT: return ISL_FORMAT_R16G16_FLOAT; 326 case PIPE_FORMAT_L32A32_FLOAT: return ISL_FORMAT_R32G32_FLOAT; 327 328 default: 329 return def_format; 330 } 331} 332 333struct crocus_format_info 334crocus_format_for_usage(const struct intel_device_info *devinfo, 335 enum pipe_format pformat, 336 isl_surf_usage_flags_t usage) 337{ 338 struct crocus_format_info info = { crocus_isl_format_for_pipe_format(pformat), 339 { PIPE_SWIZZLE_X, PIPE_SWIZZLE_Y, PIPE_SWIZZLE_Z, PIPE_SWIZZLE_W } }; 340 341 if (info.fmt == ISL_FORMAT_UNSUPPORTED) 342 return info; 343 344 if (pformat == PIPE_FORMAT_A8_UNORM) { 345 info.fmt = ISL_FORMAT_A8_UNORM; 346 } 347 348 if (usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) 349 info.fmt = get_render_format(pformat, info.fmt); 350 if (devinfo->ver < 6) { 351 if (pformat == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT) 352 info.fmt = ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS; 353 if (pformat == PIPE_FORMAT_X32_S8X24_UINT) 354 info.fmt = ISL_FORMAT_X32_TYPELESS_G8X24_UINT; 355 if (pformat == PIPE_FORMAT_X24S8_UINT) 356 info.fmt = ISL_FORMAT_X24_TYPELESS_G8_UINT; 357 } 358 359 const struct isl_format_layout *fmtl = isl_format_get_layout(info.fmt); 360 361 if (util_format_is_snorm(pformat)) { 362 if (util_format_is_intensity(pformat)) { 363 info.swizzles[0] = PIPE_SWIZZLE_X; 364 info.swizzles[1] = PIPE_SWIZZLE_X; 365 info.swizzles[2] = PIPE_SWIZZLE_X; 366 info.swizzles[3] = PIPE_SWIZZLE_X; 367 } else if (util_format_is_luminance(pformat)) { 368 info.swizzles[0] = PIPE_SWIZZLE_X; 369 info.swizzles[1] = PIPE_SWIZZLE_X; 370 info.swizzles[2] = PIPE_SWIZZLE_X; 371 info.swizzles[3] = PIPE_SWIZZLE_1; 372 } else if (util_format_is_luminance_alpha(pformat)) { 373 info.swizzles[0] = PIPE_SWIZZLE_X; 374 info.swizzles[1] = PIPE_SWIZZLE_X; 375 info.swizzles[2] = PIPE_SWIZZLE_X; 376 info.swizzles[3] = PIPE_SWIZZLE_Y; 377 } else if (util_format_is_alpha(pformat)) { 378 info.swizzles[0] = PIPE_SWIZZLE_0; 379 info.swizzles[1] = PIPE_SWIZZLE_0; 380 info.swizzles[2] = PIPE_SWIZZLE_0; 381 info.swizzles[3] = PIPE_SWIZZLE_X; 382 } 383 } 384 385 /* When faking RGBX pipe formats with RGBA ISL formats, override alpha. */ 386 if (!util_format_has_alpha(pformat) && fmtl->channels.a.type != ISL_VOID) { 387 info.swizzles[0] = PIPE_SWIZZLE_X; 388 info.swizzles[1] = PIPE_SWIZZLE_Y; 389 info.swizzles[2] = PIPE_SWIZZLE_Z; 390 info.swizzles[3] = PIPE_SWIZZLE_1; 391 } 392 393 /* We choose RGBA over RGBX for rendering the hardware doesn't support 394 * rendering to RGBX. However, when this internal override is used on Gen9+, 395 * fast clears don't work correctly. 396 * 397 * i965 fixes this by pretending to not support RGBX formats, and the higher 398 * layers of Mesa pick the RGBA format instead. Gallium doesn't work that 399 * way, and might choose a different format, like BGRX instead of RGBX, 400 * which will also cause problems when sampling from a surface fast cleared 401 * as RGBX. So we always choose RGBA instead of RGBX explicitly 402 * here. 403 */ 404 if (isl_format_is_rgbx(info.fmt) && 405 !isl_format_supports_rendering(devinfo, info.fmt) && 406 (usage & ISL_SURF_USAGE_RENDER_TARGET_BIT)) { 407 info.fmt = isl_format_rgbx_to_rgba(info.fmt); 408 info.swizzles[0] = PIPE_SWIZZLE_X; 409 info.swizzles[1] = PIPE_SWIZZLE_Y; 410 info.swizzles[2] = PIPE_SWIZZLE_Z; 411 info.swizzles[3] = PIPE_SWIZZLE_1; 412 } 413 414 return info; 415} 416 417/** 418 * The pscreen->is_format_supported() driver hook. 419 * 420 * Returns true if the given format is supported for the given usage 421 * (PIPE_BIND_*) and sample count. 422 */ 423bool 424crocus_is_format_supported(struct pipe_screen *pscreen, 425 enum pipe_format pformat, 426 enum pipe_texture_target target, 427 unsigned sample_count, unsigned storage_sample_count, 428 unsigned usage) 429{ 430 struct crocus_screen *screen = (struct crocus_screen *)pscreen; 431 const struct intel_device_info *devinfo = &screen->devinfo; 432 433 if (!util_is_power_of_two_or_zero(sample_count)) 434 return false; 435 if (devinfo->ver >= 7) { 436 if (sample_count > 8 || sample_count == 2) 437 return false; 438 } else if (devinfo->ver == 6) { 439 if (sample_count > 4 || sample_count == 2) 440 return false; 441 } else if (sample_count > 1) { 442 return false; 443 } 444 445 if (pformat == PIPE_FORMAT_NONE) 446 return true; 447 448 enum isl_format format = crocus_isl_format_for_pipe_format(pformat); 449 450 if (format == ISL_FORMAT_UNSUPPORTED) 451 return false; 452 453 /* no stencil texturing prior to haswell */ 454 if (devinfo->verx10 < 75) { 455 if (pformat == PIPE_FORMAT_S8_UINT || 456 pformat == PIPE_FORMAT_X24S8_UINT || 457 pformat == PIPE_FORMAT_S8X24_UINT || 458 pformat == PIPE_FORMAT_X32_S8X24_UINT) 459 return FALSE; 460 } 461 462 const struct isl_format_layout *fmtl = isl_format_get_layout(format); 463 const bool is_integer = isl_format_has_int_channel(format); 464 bool supported = true; 465 466 if (sample_count > 1) 467 supported &= isl_format_supports_multisampling(devinfo, format); 468 469 if (usage & PIPE_BIND_DEPTH_STENCIL) { 470 bool depth_fmts = format == ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS || 471 format == ISL_FORMAT_R32_FLOAT || 472 format == ISL_FORMAT_R24_UNORM_X8_TYPELESS || 473 format == ISL_FORMAT_R8_UINT; 474 475 /* Z16 is disabled here as on pre-GEN8 it's slower. */ 476 if (devinfo->ver == 8) 477 depth_fmts |= format == ISL_FORMAT_R16_UNORM; 478 supported &= depth_fmts; 479 } 480 481 if (usage & PIPE_BIND_RENDER_TARGET) { 482 /* Alpha and luminance-alpha formats other than A8_UNORM are not 483 * renderable. 484 * 485 * For BLORP, we can apply the swizzle in the shader. But for 486 * general rendering, this would mean recompiling the shader, which 487 * we'd like to avoid doing. So we mark these formats non-renderable. 488 * 489 * We do support A8_UNORM as it's required and is renderable. 490 */ 491 if (pformat != PIPE_FORMAT_A8_UNORM && 492 (util_format_is_alpha(pformat) || 493 util_format_is_luminance_alpha(pformat))) 494 supported = false; 495 496 enum isl_format rt_format = format; 497 498 if (isl_format_is_rgbx(format) && 499 !isl_format_supports_rendering(devinfo, format)) 500 rt_format = isl_format_rgbx_to_rgba(format); 501 502 supported &= isl_format_supports_rendering(devinfo, rt_format); 503 504 if (!is_integer) 505 supported &= isl_format_supports_alpha_blending(devinfo, rt_format); 506 } 507 508 if (usage & PIPE_BIND_SHADER_IMAGE) { 509 /* Dataport doesn't support compression, and we can't resolve an MCS 510 * compressed surface. (Buffer images may have sample count of 0.) 511 */ 512 supported &= sample_count == 0; 513 514 supported &= isl_format_supports_typed_writes(devinfo, format); 515 supported &= isl_has_matching_typed_storage_image_format(devinfo, format); 516 } 517 518 if (usage & PIPE_BIND_SAMPLER_VIEW) { 519 supported &= isl_format_supports_sampling(devinfo, format); 520 521 /* disable Z16 unorm depth textures pre gen8 */ 522 if (devinfo->ver < 8 && pformat == PIPE_FORMAT_Z16_UNORM) 523 supported = false; 524 525 bool ignore_filtering = false; 526 527 if (is_integer) 528 ignore_filtering = true; 529 530 /* I said them, but I lied them. */ 531 if (devinfo->ver < 5 && (format == ISL_FORMAT_R32G32B32A32_FLOAT || 532 format == ISL_FORMAT_R24_UNORM_X8_TYPELESS || 533 format == ISL_FORMAT_R32_FLOAT || 534 format == ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS)) 535 ignore_filtering = true; 536 if (!ignore_filtering) 537 supported &= isl_format_supports_filtering(devinfo, format); 538 539 /* Don't advertise 3-component RGB formats for non-buffer textures. 540 * This ensures that they are renderable from an API perspective since 541 * the state tracker will fall back to RGBA or RGBX, which are 542 * renderable. We want to render internally for copies and blits, 543 * even if the application doesn't. 544 * 545 * Buffer textures don't need to be renderable, so we support real RGB. 546 * This is useful for PBO upload, and 32-bit RGB support is mandatory. 547 */ 548 if (target != PIPE_BUFFER) 549 supported &= fmtl->bpb != 24 && fmtl->bpb != 48 && fmtl->bpb != 96; 550 } 551 552 if (usage & PIPE_BIND_VERTEX_BUFFER) { 553 supported &= isl_format_supports_vertex_fetch(devinfo, format); 554 555 if (devinfo->verx10 < 75) { 556 /* W/A: Pre-Haswell, the hardware doesn't really support the formats 557 * we'd like to use here, so upload everything as UINT and fix it in 558 * the shader 559 */ 560 if (format == ISL_FORMAT_R10G10B10A2_UNORM || 561 format == ISL_FORMAT_B10G10R10A2_UNORM || 562 format == ISL_FORMAT_R10G10B10A2_SNORM || 563 format == ISL_FORMAT_B10G10R10A2_SNORM || 564 format == ISL_FORMAT_R10G10B10A2_USCALED || 565 format == ISL_FORMAT_B10G10R10A2_USCALED || 566 format == ISL_FORMAT_R10G10B10A2_SSCALED || 567 format == ISL_FORMAT_B10G10R10A2_SSCALED) 568 supported = true; 569 570 if (format == ISL_FORMAT_R8G8B8_SINT || 571 format == ISL_FORMAT_R8G8B8_UINT || 572 format == ISL_FORMAT_R16G16B16_SINT || 573 format == ISL_FORMAT_R16G16B16_UINT) 574 supported = true; 575 } 576 } 577 578 if (usage & PIPE_BIND_INDEX_BUFFER) { 579 supported &= format == ISL_FORMAT_R8_UINT || 580 format == ISL_FORMAT_R16_UINT || 581 format == ISL_FORMAT_R32_UINT; 582 } 583 584 return supported; 585} 586