1/* 2 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 * 23 * Authors: 24 * Rob Clark <robclark@freedesktop.org> 25 */ 26 27#include <stdarg.h> 28#include <stdio.h> 29 30#include "util/log.h" 31#include "ir3.h" 32 33#define PTRID(x) ((unsigned long)(x)) 34 35/* ansi escape sequences: */ 36#define RESET "\x1b[0m" 37#define RED "\x1b[0;31m" 38#define GREEN "\x1b[0;32m" 39#define BLUE "\x1b[0;34m" 40#define MAGENTA "\x1b[0;35m" 41 42/* syntax coloring, mostly to make it easier to see different sorts of 43 * srcs (immediate, constant, ssa, array, ...) 44 */ 45#define SYN_REG(x) RED x RESET 46#define SYN_IMMED(x) GREEN x RESET 47#define SYN_CONST(x) GREEN x RESET 48#define SYN_SSA(x) BLUE x RESET 49#define SYN_ARRAY(x) MAGENTA x RESET 50 51static const char * 52type_name(type_t type) 53{ 54 static const char *type_names[] = { 55 /* clang-format off */ 56 [TYPE_F16] = "f16", 57 [TYPE_F32] = "f32", 58 [TYPE_U16] = "u16", 59 [TYPE_U32] = "u32", 60 [TYPE_S16] = "s16", 61 [TYPE_S32] = "s32", 62 [TYPE_U8] = "u8", 63 [TYPE_S8] = "s8", 64 /* clang-format on */ 65 }; 66 return type_names[type]; 67} 68 69static void 70print_instr_name(struct log_stream *stream, struct ir3_instruction *instr, 71 bool flags) 72{ 73 if (!instr) 74 return; 75#ifdef DEBUG 76 mesa_log_stream_printf(stream, "%04u:", instr->serialno); 77#endif 78 mesa_log_stream_printf(stream, "%04u:", instr->ip); 79 if (instr->flags & IR3_INSTR_UNUSED) { 80 mesa_log_stream_printf(stream, "XXX: "); 81 } else { 82 mesa_log_stream_printf(stream, "%03u: ", instr->use_count); 83 } 84 85 if (flags) { 86 mesa_log_stream_printf(stream, "\t"); 87 if (instr->flags & IR3_INSTR_SY) 88 mesa_log_stream_printf(stream, "(sy)"); 89 if (instr->flags & IR3_INSTR_SS) 90 mesa_log_stream_printf(stream, "(ss)"); 91 if (instr->flags & IR3_INSTR_JP) 92 mesa_log_stream_printf(stream, "(jp)"); 93 if (instr->repeat) 94 mesa_log_stream_printf(stream, "(rpt%d)", instr->repeat); 95 if (instr->nop) 96 mesa_log_stream_printf(stream, "(nop%d)", instr->nop); 97 if (instr->flags & IR3_INSTR_UL) 98 mesa_log_stream_printf(stream, "(ul)"); 99 } else { 100 mesa_log_stream_printf(stream, " "); 101 } 102 103 if (is_meta(instr)) { 104 switch (instr->opc) { 105 case OPC_META_INPUT: 106 mesa_log_stream_printf(stream, "_meta:in"); 107 break; 108 case OPC_META_SPLIT: 109 mesa_log_stream_printf(stream, "_meta:split"); 110 break; 111 case OPC_META_COLLECT: 112 mesa_log_stream_printf(stream, "_meta:collect"); 113 break; 114 case OPC_META_TEX_PREFETCH: 115 mesa_log_stream_printf(stream, "_meta:tex_prefetch"); 116 break; 117 case OPC_META_PARALLEL_COPY: 118 mesa_log_stream_printf(stream, "_meta:parallel_copy"); 119 break; 120 case OPC_META_PHI: 121 mesa_log_stream_printf(stream, "_meta:phi"); 122 break; 123 124 /* shouldn't hit here.. just for debugging: */ 125 default: 126 mesa_log_stream_printf(stream, "_meta:%d", instr->opc); 127 break; 128 } 129 } else if (opc_cat(instr->opc) == 1) { 130 if (instr->opc == OPC_MOV) { 131 if (instr->cat1.src_type == instr->cat1.dst_type) 132 mesa_log_stream_printf(stream, "mov"); 133 else 134 mesa_log_stream_printf(stream, "cov"); 135 } else { 136 mesa_log_stream_printf(stream, "%s", 137 disasm_a3xx_instr_name(instr->opc)); 138 } 139 140 if (instr->opc == OPC_SCAN_MACRO) { 141 switch (instr->cat1.reduce_op) { 142 case REDUCE_OP_ADD_U: 143 mesa_log_stream_printf(stream, ".add.u"); 144 break; 145 case REDUCE_OP_ADD_F: 146 mesa_log_stream_printf(stream, ".add.f"); 147 break; 148 case REDUCE_OP_MUL_U: 149 mesa_log_stream_printf(stream, ".mul.u"); 150 break; 151 case REDUCE_OP_MUL_F: 152 mesa_log_stream_printf(stream, ".mul.f"); 153 break; 154 case REDUCE_OP_MIN_U: 155 mesa_log_stream_printf(stream, ".min.u"); 156 break; 157 case REDUCE_OP_MIN_S: 158 mesa_log_stream_printf(stream, ".min.s"); 159 break; 160 case REDUCE_OP_MIN_F: 161 mesa_log_stream_printf(stream, ".min.f"); 162 break; 163 case REDUCE_OP_MAX_U: 164 mesa_log_stream_printf(stream, ".max.u"); 165 break; 166 case REDUCE_OP_MAX_S: 167 mesa_log_stream_printf(stream, ".max.s"); 168 break; 169 case REDUCE_OP_MAX_F: 170 mesa_log_stream_printf(stream, ".max.f"); 171 break; 172 case REDUCE_OP_AND_B: 173 mesa_log_stream_printf(stream, ".and.b"); 174 break; 175 case REDUCE_OP_OR_B: 176 mesa_log_stream_printf(stream, ".or.b"); 177 break; 178 case REDUCE_OP_XOR_B: 179 mesa_log_stream_printf(stream, ".xor.b"); 180 break; 181 } 182 } 183 184 if (instr->opc != OPC_MOVMSK && instr->opc != OPC_SCAN_MACRO) { 185 mesa_log_stream_printf(stream, ".%s%s", 186 type_name(instr->cat1.src_type), 187 type_name(instr->cat1.dst_type)); 188 } 189 } else if (instr->opc == OPC_B) { 190 const char *name[8] = { 191 /* clang-format off */ 192 [BRANCH_PLAIN] = "br", 193 [BRANCH_OR] = "brao", 194 [BRANCH_AND] = "braa", 195 [BRANCH_CONST] = "brac", 196 [BRANCH_ANY] = "bany", 197 [BRANCH_ALL] = "ball", 198 [BRANCH_X] = "brax", 199 /* clang-format on */ 200 }; 201 mesa_log_stream_printf(stream, "%s", name[instr->cat0.brtype]); 202 } else { 203 mesa_log_stream_printf(stream, "%s", disasm_a3xx_instr_name(instr->opc)); 204 if (instr->flags & IR3_INSTR_3D) 205 mesa_log_stream_printf(stream, ".3d"); 206 if (instr->flags & IR3_INSTR_A) 207 mesa_log_stream_printf(stream, ".a"); 208 if (instr->flags & IR3_INSTR_O) 209 mesa_log_stream_printf(stream, ".o"); 210 if (instr->flags & IR3_INSTR_P) 211 mesa_log_stream_printf(stream, ".p"); 212 if (instr->flags & IR3_INSTR_S) 213 mesa_log_stream_printf(stream, ".s"); 214 if (instr->flags & IR3_INSTR_A1EN) 215 mesa_log_stream_printf(stream, ".a1en"); 216 if (instr->opc == OPC_LDC) 217 mesa_log_stream_printf(stream, ".offset%d", instr->cat6.d); 218 if (instr->opc == OPC_LDC_K) 219 mesa_log_stream_printf(stream, ".%d", instr->cat6.iim_val); 220 if (instr->flags & IR3_INSTR_B) { 221 mesa_log_stream_printf( 222 stream, ".base%d", 223 is_tex(instr) ? instr->cat5.tex_base : instr->cat6.base); 224 } 225 if (instr->flags & IR3_INSTR_S2EN) 226 mesa_log_stream_printf(stream, ".s2en"); 227 228 static const char *cond[0x7] = { 229 "lt", "le", "gt", "ge", "eq", "ne", 230 }; 231 232 switch (instr->opc) { 233 case OPC_CMPS_F: 234 case OPC_CMPS_U: 235 case OPC_CMPS_S: 236 case OPC_CMPV_F: 237 case OPC_CMPV_U: 238 case OPC_CMPV_S: 239 mesa_log_stream_printf(stream, ".%s", 240 cond[instr->cat2.condition & 0x7]); 241 break; 242 default: 243 break; 244 } 245 } 246} 247 248static void 249print_ssa_def_name(struct log_stream *stream, struct ir3_register *reg) 250{ 251 mesa_log_stream_printf(stream, SYN_SSA("ssa_%u"), reg->instr->serialno); 252 if (reg->name != 0) 253 mesa_log_stream_printf(stream, ":%u", reg->name); 254} 255 256static void 257print_ssa_name(struct log_stream *stream, struct ir3_register *reg, bool dst) 258{ 259 if (!dst) { 260 if (!reg->def) 261 mesa_log_stream_printf(stream, SYN_SSA("undef")); 262 else 263 print_ssa_def_name(stream, reg->def); 264 } else { 265 print_ssa_def_name(stream, reg); 266 } 267 268 if (reg->num != INVALID_REG && !(reg->flags & IR3_REG_ARRAY)) 269 mesa_log_stream_printf(stream, "(" SYN_REG("r%u.%c") ")", reg_num(reg), 270 "xyzw"[reg_comp(reg)]); 271} 272 273static void 274print_reg_name(struct log_stream *stream, struct ir3_instruction *instr, 275 struct ir3_register *reg, bool dest) 276{ 277 if ((reg->flags & (IR3_REG_FABS | IR3_REG_SABS)) && 278 (reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT))) 279 mesa_log_stream_printf(stream, "(absneg)"); 280 else if (reg->flags & (IR3_REG_FNEG | IR3_REG_SNEG | IR3_REG_BNOT)) 281 mesa_log_stream_printf(stream, "(neg)"); 282 else if (reg->flags & (IR3_REG_FABS | IR3_REG_SABS)) 283 mesa_log_stream_printf(stream, "(abs)"); 284 285 if (reg->flags & IR3_REG_FIRST_KILL) 286 mesa_log_stream_printf(stream, "(kill)"); 287 if (reg->flags & IR3_REG_UNUSED) 288 mesa_log_stream_printf(stream, "(unused)"); 289 290 if (reg->flags & IR3_REG_R) 291 mesa_log_stream_printf(stream, "(r)"); 292 293 if (reg->flags & IR3_REG_EARLY_CLOBBER) 294 mesa_log_stream_printf(stream, "(early_clobber)"); 295 296 /* Right now all instructions that use tied registers only have one 297 * destination register, so we can just print (tied) as if it's a flag, 298 * although it's more convenient for RA if it's a pointer. 299 */ 300 if (reg->tied) 301 mesa_log_stream_printf(stream, "(tied)"); 302 303 if (reg->flags & IR3_REG_SHARED) 304 mesa_log_stream_printf(stream, "s"); 305 if (reg->flags & IR3_REG_HALF) 306 mesa_log_stream_printf(stream, "h"); 307 308 if (reg->flags & IR3_REG_IMMED) { 309 mesa_log_stream_printf(stream, SYN_IMMED("imm[%f,%d,0x%x]"), reg->fim_val, 310 reg->iim_val, reg->iim_val); 311 } else if (reg->flags & IR3_REG_ARRAY) { 312 if (reg->flags & IR3_REG_SSA) { 313 print_ssa_name(stream, reg, dest); 314 mesa_log_stream_printf(stream, ":"); 315 } 316 mesa_log_stream_printf(stream, 317 SYN_ARRAY("arr[id=%u, offset=%d, size=%u]"), 318 reg->array.id, reg->array.offset, reg->size); 319 if (reg->array.base != INVALID_REG) 320 mesa_log_stream_printf(stream, "(" SYN_REG("r%u.%c") ")", 321 reg->array.base >> 2, 322 "xyzw"[reg->array.base & 0x3]); 323 } else if (reg->flags & IR3_REG_SSA) { 324 print_ssa_name(stream, reg, dest); 325 } else if (reg->flags & IR3_REG_RELATIV) { 326 if (reg->flags & IR3_REG_CONST) 327 mesa_log_stream_printf(stream, SYN_CONST("c<a0.x + %d>"), 328 reg->array.offset); 329 else 330 mesa_log_stream_printf(stream, SYN_REG("r<a0.x + %d>") " (%u)", 331 reg->array.offset, reg->size); 332 } else { 333 if (reg->flags & IR3_REG_CONST) 334 mesa_log_stream_printf(stream, SYN_CONST("c%u.%c"), reg_num(reg), 335 "xyzw"[reg_comp(reg)]); 336 else 337 mesa_log_stream_printf(stream, SYN_REG("r%u.%c"), reg_num(reg), 338 "xyzw"[reg_comp(reg)]); 339 } 340 341 if (reg->wrmask > 0x1) 342 mesa_log_stream_printf(stream, " (wrmask=0x%x)", reg->wrmask); 343} 344 345static void 346tab(struct log_stream *stream, int lvl) 347{ 348 for (int i = 0; i < lvl; i++) 349 mesa_log_stream_printf(stream, "\t"); 350} 351 352static void 353print_instr(struct log_stream *stream, struct ir3_instruction *instr, int lvl) 354{ 355 tab(stream, lvl); 356 357 print_instr_name(stream, instr, true); 358 359 if (is_tex(instr)) { 360 mesa_log_stream_printf(stream, " (%s)(", type_name(instr->cat5.type)); 361 for (unsigned i = 0; i < 4; i++) 362 if (instr->dsts[0]->wrmask & (1 << i)) 363 mesa_log_stream_printf(stream, "%c", "xyzw"[i]); 364 mesa_log_stream_printf(stream, ")"); 365 } else if ((instr->srcs_count > 0 || instr->dsts_count > 0) && 366 (instr->opc != OPC_B)) { 367 /* NOTE the b(ranch) instruction has a suffix, which is 368 * handled below 369 */ 370 mesa_log_stream_printf(stream, " "); 371 } 372 373 if (!is_flow(instr) || instr->opc == OPC_END || instr->opc == OPC_CHMASK) { 374 bool first = true; 375 foreach_dst (reg, instr) { 376 if (reg->wrmask == 0) 377 continue; 378 if (!first) 379 mesa_log_stream_printf(stream, ", "); 380 print_reg_name(stream, instr, reg, true); 381 first = false; 382 } 383 foreach_src_n (reg, n, instr) { 384 if (!first) 385 mesa_log_stream_printf(stream, ", "); 386 print_reg_name(stream, instr, reg, false); 387 if (instr->opc == OPC_END || instr->opc == OPC_CHMASK) 388 mesa_log_stream_printf(stream, " (%u)", instr->end.outidxs[n]); 389 first = false; 390 } 391 } 392 393 if (is_tex(instr) && !(instr->flags & IR3_INSTR_S2EN)) { 394 if (!!(instr->flags & IR3_INSTR_B) && !!(instr->flags & IR3_INSTR_A1EN)) { 395 mesa_log_stream_printf(stream, ", s#%d", instr->cat5.samp); 396 } else { 397 mesa_log_stream_printf(stream, ", s#%d, t#%d", instr->cat5.samp, 398 instr->cat5.tex); 399 } 400 } 401 402 if (instr->opc == OPC_META_SPLIT) { 403 mesa_log_stream_printf(stream, ", off=%d", instr->split.off); 404 } else if (instr->opc == OPC_META_TEX_PREFETCH) { 405 mesa_log_stream_printf(stream, ", tex=%d, samp=%d, input_offset=%d", 406 instr->prefetch.tex, instr->prefetch.samp, 407 instr->prefetch.input_offset); 408 } 409 410 if (is_flow(instr) && instr->cat0.target) { 411 /* the predicate register src is implied: */ 412 if (instr->opc == OPC_B) { 413 static const struct { 414 int nsrc; 415 bool idx; 416 } brinfo[7] = { 417 /* clang-format off */ 418 [BRANCH_PLAIN] = {1, false}, 419 [BRANCH_OR] = {2, false}, 420 [BRANCH_AND] = {2, false}, 421 [BRANCH_CONST] = {0, true}, 422 [BRANCH_ANY] = {1, false}, 423 [BRANCH_ALL] = {1, false}, 424 [BRANCH_X] = {0, false}, 425 /* clang-format on */ 426 }; 427 428 if (brinfo[instr->cat0.brtype].idx) { 429 mesa_log_stream_printf(stream, ".%u", instr->cat0.idx); 430 } 431 if (brinfo[instr->cat0.brtype].nsrc >= 1) { 432 mesa_log_stream_printf(stream, " %sp0.%c (", 433 instr->cat0.inv1 ? "!" : "", 434 "xyzw"[instr->cat0.comp1 & 0x3]); 435 print_reg_name(stream, instr, instr->srcs[0], false); 436 mesa_log_stream_printf(stream, "), "); 437 } 438 if (brinfo[instr->cat0.brtype].nsrc >= 2) { 439 mesa_log_stream_printf(stream, " %sp0.%c (", 440 instr->cat0.inv2 ? "!" : "", 441 "xyzw"[instr->cat0.comp2 & 0x3]); 442 print_reg_name(stream, instr, instr->srcs[1], false); 443 mesa_log_stream_printf(stream, "), "); 444 } 445 } 446 mesa_log_stream_printf(stream, " target=block%u", 447 block_id(instr->cat0.target)); 448 } 449 450 if (instr->deps_count) { 451 mesa_log_stream_printf(stream, ", false-deps:"); 452 unsigned n = 0; 453 for (unsigned i = 0; i < instr->deps_count; i++) { 454 if (!instr->deps[i]) 455 continue; 456 if (n++ > 0) 457 mesa_log_stream_printf(stream, ", "); 458 mesa_log_stream_printf(stream, SYN_SSA("ssa_%u"), 459 instr->deps[i]->serialno); 460 } 461 } 462 463 mesa_log_stream_printf(stream, "\n"); 464} 465 466void 467ir3_print_instr_stream(struct log_stream *stream, struct ir3_instruction *instr) 468{ 469 print_instr(stream, instr, 0); 470} 471 472void 473ir3_print_instr(struct ir3_instruction *instr) 474{ 475 struct log_stream *stream = mesa_log_streami(); 476 print_instr(stream, instr, 0); 477 mesa_log_stream_destroy(stream); 478} 479 480static void 481print_block(struct ir3_block *block, int lvl) 482{ 483 struct log_stream *stream = mesa_log_streami(); 484 485 tab(stream, lvl); 486 mesa_log_stream_printf(stream, "block%u {\n", block_id(block)); 487 488 if (block->predecessors_count > 0) { 489 tab(stream, lvl + 1); 490 mesa_log_stream_printf(stream, "pred: "); 491 for (unsigned i = 0; i < block->predecessors_count; i++) { 492 struct ir3_block *pred = block->predecessors[i]; 493 if (i != 0) 494 mesa_log_stream_printf(stream, ", "); 495 mesa_log_stream_printf(stream, "block%u", block_id(pred)); 496 } 497 mesa_log_stream_printf(stream, "\n"); 498 } 499 500 if (block->physical_predecessors_count > 0) { 501 tab(stream, lvl + 1); 502 mesa_log_stream_printf(stream, "physical pred: "); 503 for (unsigned i = 0; i < block->physical_predecessors_count; i++) { 504 struct ir3_block *pred = block->physical_predecessors[i]; 505 if (i != 0) 506 mesa_log_stream_printf(stream, ", "); 507 mesa_log_stream_printf(stream, "block%u", block_id(pred)); 508 } 509 mesa_log_stream_printf(stream, "\n"); 510 } 511 512 foreach_instr (instr, &block->instr_list) { 513 print_instr(stream, instr, lvl + 1); 514 } 515 516 tab(stream, lvl + 1); 517 mesa_log_stream_printf(stream, "/* keeps:\n"); 518 for (unsigned i = 0; i < block->keeps_count; i++) { 519 print_instr(stream, block->keeps[i], lvl + 2); 520 } 521 tab(stream, lvl + 1); 522 mesa_log_stream_printf(stream, " */\n"); 523 524 if (block->successors[1]) { 525 /* leading into if/else: */ 526 tab(stream, lvl + 1); 527 mesa_log_stream_printf(stream, "/* succs: if "); 528 switch (block->brtype) { 529 case IR3_BRANCH_COND: 530 break; 531 case IR3_BRANCH_ANY: 532 mesa_log_stream_printf(stream, "any "); 533 break; 534 case IR3_BRANCH_ALL: 535 mesa_log_stream_printf(stream, "all "); 536 break; 537 case IR3_BRANCH_GETONE: 538 mesa_log_stream_printf(stream, "getone "); 539 break; 540 case IR3_BRANCH_SHPS: 541 mesa_log_stream_printf(stream, "shps "); 542 break; 543 } 544 if (block->condition) 545 mesa_log_stream_printf(stream, SYN_SSA("ssa_%u") " ", 546 block->condition->serialno); 547 mesa_log_stream_printf(stream, "block%u; else block%u; */\n", 548 block_id(block->successors[0]), 549 block_id(block->successors[1])); 550 } else if (block->successors[0]) { 551 tab(stream, lvl + 1); 552 mesa_log_stream_printf(stream, "/* succs: block%u; */\n", 553 block_id(block->successors[0])); 554 } 555 if (block->physical_successors[0]) { 556 tab(stream, lvl + 1); 557 mesa_log_stream_printf(stream, "/* physical succs: block%u", 558 block_id(block->physical_successors[0])); 559 if (block->physical_successors[1]) { 560 mesa_log_stream_printf(stream, ", block%u", 561 block_id(block->physical_successors[1])); 562 } 563 mesa_log_stream_printf(stream, " */\n"); 564 } 565 tab(stream, lvl); 566 mesa_log_stream_printf(stream, "}\n"); 567} 568 569void 570ir3_print(struct ir3 *ir) 571{ 572 foreach_block (block, &ir->block_list) 573 print_block(block, 0); 574} 575