1/* 2 * Copyright (c) 2013 Rob Clark <robclark@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE 21 * SOFTWARE. 22 */ 23 24%code requires { 25#include "ir3/ir3_assembler.h" 26#include "ir3/ir3_shader.h" 27 28struct ir3 * ir3_parse(struct ir3_shader_variant *v, 29 struct ir3_kernel_info *k, FILE *f); 30} 31 32%{ 33#define YYDEBUG 0 34 35#include <stdlib.h> 36#include <stdio.h> 37#include <string.h> 38#include <math.h> 39 40#include "util/half_float.h" 41#include "util/u_math.h" 42 43#include "ir3/ir3.h" 44#include "ir3/ir3_shader.h" 45#include "ir3/instr-a3xx.h" 46 47#include "ir3_parser.h" 48 49#define swap(a, b) \ 50 do { __typeof(a) __tmp = (a); (a) = (b); (b) = __tmp; } while (0) 51 52/* ir3 treats the abs/neg flags as separate flags for float vs integer, 53 * but in the instruction encoding they are the same thing. Tracking 54 * them separately is only for the benefit of ir3 opt passes, and not 55 * required here, so just use the float versions: 56 */ 57#define IR3_REG_ABS IR3_REG_FABS 58#define IR3_REG_NEGATE IR3_REG_FNEG 59 60static struct ir3_kernel_info *info; 61static struct ir3_shader_variant *variant; 62/* NOTE the assembler doesn't really use the ir3_block construction 63 * like the compiler does. Everything is treated as one large block. 64 * Which might happen to contain flow control. But since we don't 65 * use any of the ir3 backend passes (sched, RA, etc) this doesn't 66 * really matter. 67 */ 68static struct ir3_block *block; /* current shader block */ 69static struct ir3_instruction *instr; /* current instruction */ 70static unsigned ip; /* current instruction pointer */ 71static struct hash_table *labels; 72 73void *ir3_parser_dead_ctx; 74 75static struct { 76 unsigned flags; 77 unsigned repeat; 78 unsigned nop; 79} iflags; 80 81static struct { 82 unsigned flags; 83 unsigned wrmask; 84} rflags; 85 86int ir3_yyget_lineno(void); 87 88static void new_label(const char *name) 89{ 90 ralloc_steal(labels, (void *) name); 91 _mesa_hash_table_insert(labels, name, (void *)(uintptr_t)ip); 92} 93 94static struct ir3_instruction * new_instr(opc_t opc) 95{ 96 instr = ir3_instr_create(block, opc, 4, 6); 97 instr->flags = iflags.flags; 98 instr->repeat = iflags.repeat; 99 instr->nop = iflags.nop; 100 instr->line = ir3_yyget_lineno(); 101 iflags.flags = iflags.repeat = iflags.nop = 0; 102 ip++; 103 return instr; 104} 105 106static void new_shader(void) 107{ 108 variant->ir = ir3_create(variant->compiler, variant); 109 block = ir3_block_create(variant->ir); 110 list_addtail(&block->node, &variant->ir->block_list); 111 ip = 0; 112 labels = _mesa_hash_table_create(variant, _mesa_hash_string, _mesa_key_string_equal); 113 ir3_parser_dead_ctx = ralloc_context(NULL); 114} 115 116static type_t parse_type(const char **type) 117{ 118 if (!strncmp("f16", *type, 3)) { 119 *type += 3; 120 return TYPE_F16; 121 } else if (!strncmp("f32", *type, 3)) { 122 *type += 3; 123 return TYPE_F32; 124 } else if (!strncmp("u16", *type, 3)) { 125 *type += 3; 126 return TYPE_U16; 127 } else if (!strncmp("u32", *type, 3)) { 128 *type += 3; 129 return TYPE_U32; 130 } else if (!strncmp("s16", *type, 3)) { 131 *type += 3; 132 return TYPE_S16; 133 } else if (!strncmp("s32", *type, 3)) { 134 *type += 3; 135 return TYPE_S32; 136 } else if (!strncmp("u8", *type, 2)) { 137 *type += 2; 138 return TYPE_U8; 139 } else if (!strncmp("s8", *type, 2)) { 140 *type += 2; 141 return TYPE_S8; 142 } else { 143 assert(0); /* shouldn't get here */ 144 return ~0; 145 } 146} 147 148static struct ir3_instruction * parse_type_type(struct ir3_instruction *instr, 149 const char *type_type) 150{ 151 instr->cat1.src_type = parse_type(&type_type); 152 instr->cat1.dst_type = parse_type(&type_type); 153 return instr; 154} 155 156static struct ir3_register * new_src(int num, unsigned flags) 157{ 158 struct ir3_register *reg; 159 flags |= rflags.flags; 160 if (num & 0x1) 161 flags |= IR3_REG_HALF; 162 reg = ir3_src_create(instr, num>>1, flags); 163 reg->wrmask = MAX2(1, rflags.wrmask); 164 rflags.flags = rflags.wrmask = 0; 165 return reg; 166} 167 168static struct ir3_register * new_dst(int num, unsigned flags) 169{ 170 struct ir3_register *reg; 171 flags |= rflags.flags; 172 if (num & 0x1) 173 flags |= IR3_REG_HALF; 174 reg = ir3_dst_create(instr, num>>1, flags); 175 reg->wrmask = MAX2(1, rflags.wrmask); 176 rflags.flags = rflags.wrmask = 0; 177 return reg; 178} 179 180static struct ir3_register * dummy_dst(void) 181{ 182 return new_dst(0, 0); 183} 184 185static void fixup_cat5_s2en(void) 186{ 187 assert(opc_cat(instr->opc) == 5); 188 if (!(instr->flags & IR3_INSTR_S2EN)) 189 return; 190 /* For various reasons (ie. mainly to make the .s2en src easier to 191 * find, given that various different cat5 tex instructions can have 192 * different # of src registers), in ir3 the samp/tex src register 193 * is first, rather than last. So we have to detect this case and 194 * fix things up. 195 */ 196 struct ir3_register *s2en_src = instr->srcs[instr->srcs_count - 1]; 197 198 if (instr->flags & IR3_INSTR_B) 199 assert(!(s2en_src->flags & IR3_REG_HALF)); 200 else 201 assert(s2en_src->flags & IR3_REG_HALF); 202 203 for (int i = 0; i < instr->srcs_count - 1; i++) { 204 instr->srcs[i+1] = instr->srcs[i]; 205 } 206 instr->srcs[0] = s2en_src; 207} 208 209static void add_const(unsigned reg, unsigned c0, unsigned c1, unsigned c2, unsigned c3) 210{ 211 struct ir3_const_state *const_state = ir3_const_state(variant); 212 assert((reg & 0x7) == 0); 213 int idx = reg >> (1 + 2); /* low bit is half vs full, next two bits are swiz */ 214 if (idx * 4 + 4 > const_state->immediates_size) { 215 const_state->immediates = rerzalloc(const_state, 216 const_state->immediates, 217 __typeof__(const_state->immediates[0]), 218 const_state->immediates_size, 219 idx * 4 + 4); 220 for (unsigned i = const_state->immediates_size; i < idx * 4; i++) 221 const_state->immediates[i] = 0xd0d0d0d0; 222 const_state->immediates_size = const_state->immediates_count = idx * 4 + 4; 223 } 224 const_state->immediates[idx * 4 + 0] = c0; 225 const_state->immediates[idx * 4 + 1] = c1; 226 const_state->immediates[idx * 4 + 2] = c2; 227 const_state->immediates[idx * 4 + 3] = c3; 228} 229 230static void add_sysval(unsigned reg, unsigned compmask, gl_system_value sysval) 231{ 232 unsigned n = variant->inputs_count++; 233 variant->inputs[n].regid = reg; 234 variant->inputs[n].sysval = true; 235 variant->inputs[n].slot = sysval; 236 variant->inputs[n].compmask = compmask; 237 variant->total_in++; 238} 239 240static bool resolve_labels(void) 241{ 242 int instr_ip = 0; 243 foreach_instr (instr, &block->instr_list) { 244 if (opc_cat(instr->opc) == 0 && instr->cat0.target_label) { 245 struct hash_entry *entry = _mesa_hash_table_search(labels, instr->cat0.target_label); 246 if (!entry) { 247 fprintf(stderr, "unknown label %s\n", instr->cat0.target_label); 248 return false; 249 } 250 int target_ip = (uintptr_t)entry->data; 251 instr->cat0.immed = target_ip - instr_ip; 252 } 253 instr_ip++; 254 } 255 return true; 256} 257 258#ifdef YYDEBUG 259int yydebug; 260#endif 261 262extern int yylex(void); 263void ir3_yyset_lineno(int _line_number); 264void ir3_yyset_input(FILE *f); 265 266int yyparse(void); 267 268static void yyerror(const char *error) 269{ 270 fprintf(stderr, "error at line %d: %s\n", ir3_yyget_lineno(), error); 271} 272 273struct ir3 * ir3_parse(struct ir3_shader_variant *v, 274 struct ir3_kernel_info *k, FILE *f) 275{ 276 ir3_yyset_lineno(1); 277 ir3_yyset_input(f); 278#ifdef YYDEBUG 279 yydebug = 1; 280#endif 281 info = k; 282 variant = v; 283 if (yyparse() || !resolve_labels()) { 284 ir3_destroy(variant->ir); 285 variant->ir = NULL; 286 } 287 ralloc_free(labels); 288 ralloc_free(ir3_parser_dead_ctx); 289 return variant->ir; 290} 291%} 292 293%union { 294 int tok; 295 int num; 296 uint32_t unum; 297 double flt; 298 const char *str; 299 struct ir3_register *reg; 300 struct { 301 int start; 302 int num; 303 } range; 304 type_t type; 305} 306 307%{ 308#if YYDEBUG 309static void print_token(FILE *file, int type, YYSTYPE value) 310{ 311 fprintf(file, "\ntype: %d\n", type); 312} 313 314#define YYPRINT(file, type, value) print_token(file, type, value) 315#endif 316%} 317 318%token <num> T_INT 319%token <unum> T_HEX 320%token <flt> T_FLOAT 321%token <str> T_IDENTIFIER 322%token <num> T_REGISTER 323%token <num> T_CONSTANT 324 325/* @ headers (@const/@sampler/@uniform/@varying) */ 326%token <tok> T_A_LOCALSIZE 327%token <tok> T_A_CONST 328%token <tok> T_A_BUF 329%token <tok> T_A_INVOCATIONID 330%token <tok> T_A_WGID 331%token <tok> T_A_NUMWG 332%token <tok> T_A_BRANCHSTACK 333%token <tok> T_A_IN 334%token <tok> T_A_OUT 335%token <tok> T_A_TEX 336%token <tok> T_A_PVTMEM 337%token <tok> T_A_EARLYPREAMBLE 338/* todo, re-add @sampler/@uniform/@varying if needed someday */ 339 340/* src register flags */ 341%token <tok> T_ABSNEG 342%token <tok> T_NEG 343%token <tok> T_ABS 344%token <tok> T_R 345 346%token <tok> T_HR 347%token <tok> T_HC 348 349/* dst register flags */ 350%token <tok> T_EVEN 351%token <tok> T_POS_INFINITY 352%token <tok> T_NEG_INFINITY 353%token <tok> T_EI 354%token <num> T_WRMASK 355 356/* Float LUT values accepted as immed: */ 357%token <num> T_FLUT_0_0 358%token <num> T_FLUT_0_5 359%token <num> T_FLUT_1_0 360%token <num> T_FLUT_2_0 361%token <num> T_FLUT_E 362%token <num> T_FLUT_PI 363%token <num> T_FLUT_INV_PI 364%token <num> T_FLUT_INV_LOG2_E 365%token <num> T_FLUT_LOG2_E 366%token <num> T_FLUT_INV_LOG2_10 367%token <num> T_FLUT_LOG2_10 368%token <num> T_FLUT_4_0 369 370/* instruction flags */ 371%token <tok> T_SY 372%token <tok> T_SS 373%token <tok> T_JP 374%token <tok> T_SAT 375%token <num> T_RPT 376%token <tok> T_UL 377%token <tok> T_NOP 378 379/* category 0: */ 380%token <tok> T_OP_NOP 381%token <tok> T_OP_BR 382%token <tok> T_OP_BRAO 383%token <tok> T_OP_BRAA 384%token <tok> T_OP_BRAC 385%token <tok> T_OP_BANY 386%token <tok> T_OP_BALL 387%token <tok> T_OP_BRAX 388%token <tok> T_OP_JUMP 389%token <tok> T_OP_CALL 390%token <tok> T_OP_RET 391%token <tok> T_OP_KILL 392%token <tok> T_OP_END 393%token <tok> T_OP_EMIT 394%token <tok> T_OP_CUT 395%token <tok> T_OP_CHMASK 396%token <tok> T_OP_CHSH 397%token <tok> T_OP_FLOW_REV 398%token <tok> T_OP_BKT 399%token <tok> T_OP_STKS 400%token <tok> T_OP_STKR 401%token <tok> T_OP_XSET 402%token <tok> T_OP_XCLR 403%token <tok> T_OP_GETLAST 404%token <tok> T_OP_GETONE 405%token <tok> T_OP_DBG 406%token <tok> T_OP_SHPS 407%token <tok> T_OP_SHPE 408%token <tok> T_OP_PREDT 409%token <tok> T_OP_PREDF 410%token <tok> T_OP_PREDE 411 412/* category 1: */ 413%token <tok> T_OP_MOVMSK 414%token <tok> T_OP_MOVA1 415%token <tok> T_OP_MOVA 416%token <tok> T_OP_MOV 417%token <tok> T_OP_COV 418%token <tok> T_OP_SWZ 419%token <tok> T_OP_GAT 420%token <tok> T_OP_SCT 421 422/* category 2: */ 423%token <tok> T_OP_ADD_F 424%token <tok> T_OP_MIN_F 425%token <tok> T_OP_MAX_F 426%token <tok> T_OP_MUL_F 427%token <tok> T_OP_SIGN_F 428%token <tok> T_OP_CMPS_F 429%token <tok> T_OP_ABSNEG_F 430%token <tok> T_OP_CMPV_F 431%token <tok> T_OP_FLOOR_F 432%token <tok> T_OP_CEIL_F 433%token <tok> T_OP_RNDNE_F 434%token <tok> T_OP_RNDAZ_F 435%token <tok> T_OP_TRUNC_F 436%token <tok> T_OP_ADD_U 437%token <tok> T_OP_ADD_S 438%token <tok> T_OP_SUB_U 439%token <tok> T_OP_SUB_S 440%token <tok> T_OP_CMPS_U 441%token <tok> T_OP_CMPS_S 442%token <tok> T_OP_MIN_U 443%token <tok> T_OP_MIN_S 444%token <tok> T_OP_MAX_U 445%token <tok> T_OP_MAX_S 446%token <tok> T_OP_ABSNEG_S 447%token <tok> T_OP_AND_B 448%token <tok> T_OP_OR_B 449%token <tok> T_OP_NOT_B 450%token <tok> T_OP_XOR_B 451%token <tok> T_OP_CMPV_U 452%token <tok> T_OP_CMPV_S 453%token <tok> T_OP_MUL_U24 454%token <tok> T_OP_MUL_S24 455%token <tok> T_OP_MULL_U 456%token <tok> T_OP_BFREV_B 457%token <tok> T_OP_CLZ_S 458%token <tok> T_OP_CLZ_B 459%token <tok> T_OP_SHL_B 460%token <tok> T_OP_SHR_B 461%token <tok> T_OP_ASHR_B 462%token <tok> T_OP_BARY_F 463%token <tok> T_OP_FLAT_B 464%token <tok> T_OP_MGEN_B 465%token <tok> T_OP_GETBIT_B 466%token <tok> T_OP_SETRM 467%token <tok> T_OP_CBITS_B 468%token <tok> T_OP_SHB 469%token <tok> T_OP_MSAD 470 471/* category 3: */ 472%token <tok> T_OP_MAD_U16 473%token <tok> T_OP_MADSH_U16 474%token <tok> T_OP_MAD_S16 475%token <tok> T_OP_MADSH_M16 476%token <tok> T_OP_MAD_U24 477%token <tok> T_OP_MAD_S24 478%token <tok> T_OP_MAD_F16 479%token <tok> T_OP_MAD_F32 480%token <tok> T_OP_SEL_B16 481%token <tok> T_OP_SEL_B32 482%token <tok> T_OP_SEL_S16 483%token <tok> T_OP_SEL_S32 484%token <tok> T_OP_SEL_F16 485%token <tok> T_OP_SEL_F32 486%token <tok> T_OP_SAD_S16 487%token <tok> T_OP_SAD_S32 488%token <tok> T_OP_SHRM 489%token <tok> T_OP_SHLM 490%token <tok> T_OP_SHRG 491%token <tok> T_OP_SHLG 492%token <tok> T_OP_ANDG 493%token <tok> T_OP_DP2ACC 494%token <tok> T_OP_DP4ACC 495%token <tok> T_OP_WMM 496%token <tok> T_OP_WMM_ACCU 497 498/* category 4: */ 499%token <tok> T_OP_RCP 500%token <tok> T_OP_RSQ 501%token <tok> T_OP_LOG2 502%token <tok> T_OP_EXP2 503%token <tok> T_OP_SIN 504%token <tok> T_OP_COS 505%token <tok> T_OP_SQRT 506%token <tok> T_OP_HRSQ 507%token <tok> T_OP_HLOG2 508%token <tok> T_OP_HEXP2 509 510/* category 5: */ 511%token <tok> T_OP_ISAM 512%token <tok> T_OP_ISAML 513%token <tok> T_OP_ISAMM 514%token <tok> T_OP_SAM 515%token <tok> T_OP_SAMB 516%token <tok> T_OP_SAML 517%token <tok> T_OP_SAMGQ 518%token <tok> T_OP_GETLOD 519%token <tok> T_OP_CONV 520%token <tok> T_OP_CONVM 521%token <tok> T_OP_GETSIZE 522%token <tok> T_OP_GETBUF 523%token <tok> T_OP_GETPOS 524%token <tok> T_OP_GETINFO 525%token <tok> T_OP_DSX 526%token <tok> T_OP_DSY 527%token <tok> T_OP_GATHER4R 528%token <tok> T_OP_GATHER4G 529%token <tok> T_OP_GATHER4B 530%token <tok> T_OP_GATHER4A 531%token <tok> T_OP_SAMGP0 532%token <tok> T_OP_SAMGP1 533%token <tok> T_OP_SAMGP2 534%token <tok> T_OP_SAMGP3 535%token <tok> T_OP_DSXPP_1 536%token <tok> T_OP_DSYPP_1 537%token <tok> T_OP_RGETPOS 538%token <tok> T_OP_RGETINFO 539%token <tok> T_OP_BRCST_A 540%token <tok> T_OP_QSHUFFLE_BRCST 541%token <tok> T_OP_QSHUFFLE_H 542%token <tok> T_OP_QSHUFFLE_V 543%token <tok> T_OP_QSHUFFLE_DIAG 544 545/* category 6: */ 546%token <tok> T_OP_LDG 547%token <tok> T_OP_LDG_A 548%token <tok> T_OP_LDL 549%token <tok> T_OP_LDP 550%token <tok> T_OP_STG 551%token <tok> T_OP_STG_A 552%token <tok> T_OP_STL 553%token <tok> T_OP_STP 554%token <tok> T_OP_LDIB 555%token <tok> T_OP_G2L 556%token <tok> T_OP_L2G 557%token <tok> T_OP_PREFETCH 558%token <tok> T_OP_LDLW 559%token <tok> T_OP_STLW 560%token <tok> T_OP_RESFMT 561%token <tok> T_OP_RESINFO 562%token <tok> T_OP_ATOMIC_ADD 563%token <tok> T_OP_ATOMIC_SUB 564%token <tok> T_OP_ATOMIC_XCHG 565%token <tok> T_OP_ATOMIC_INC 566%token <tok> T_OP_ATOMIC_DEC 567%token <tok> T_OP_ATOMIC_CMPXCHG 568%token <tok> T_OP_ATOMIC_MIN 569%token <tok> T_OP_ATOMIC_MAX 570%token <tok> T_OP_ATOMIC_AND 571%token <tok> T_OP_ATOMIC_OR 572%token <tok> T_OP_ATOMIC_XOR 573%token <tok> T_OP_RESINFO_B 574%token <tok> T_OP_LDIB_B 575%token <tok> T_OP_STIB_B 576%token <tok> T_OP_ATOMIC_B_ADD 577%token <tok> T_OP_ATOMIC_B_SUB 578%token <tok> T_OP_ATOMIC_B_XCHG 579%token <tok> T_OP_ATOMIC_B_INC 580%token <tok> T_OP_ATOMIC_B_DEC 581%token <tok> T_OP_ATOMIC_B_CMPXCHG 582%token <tok> T_OP_ATOMIC_B_MIN 583%token <tok> T_OP_ATOMIC_B_MAX 584%token <tok> T_OP_ATOMIC_B_AND 585%token <tok> T_OP_ATOMIC_B_OR 586%token <tok> T_OP_ATOMIC_B_XOR 587%token <tok> T_OP_ATOMIC_S_ADD 588%token <tok> T_OP_ATOMIC_S_SUB 589%token <tok> T_OP_ATOMIC_S_XCHG 590%token <tok> T_OP_ATOMIC_S_INC 591%token <tok> T_OP_ATOMIC_S_DEC 592%token <tok> T_OP_ATOMIC_S_CMPXCHG 593%token <tok> T_OP_ATOMIC_S_MIN 594%token <tok> T_OP_ATOMIC_S_MAX 595%token <tok> T_OP_ATOMIC_S_AND 596%token <tok> T_OP_ATOMIC_S_OR 597%token <tok> T_OP_ATOMIC_S_XOR 598%token <tok> T_OP_ATOMIC_G_ADD 599%token <tok> T_OP_ATOMIC_G_SUB 600%token <tok> T_OP_ATOMIC_G_XCHG 601%token <tok> T_OP_ATOMIC_G_INC 602%token <tok> T_OP_ATOMIC_G_DEC 603%token <tok> T_OP_ATOMIC_G_CMPXCHG 604%token <tok> T_OP_ATOMIC_G_MIN 605%token <tok> T_OP_ATOMIC_G_MAX 606%token <tok> T_OP_ATOMIC_G_AND 607%token <tok> T_OP_ATOMIC_G_OR 608%token <tok> T_OP_ATOMIC_G_XOR 609%token <tok> T_OP_LDGB 610%token <tok> T_OP_STGB 611%token <tok> T_OP_STIB 612%token <tok> T_OP_LDC 613%token <tok> T_OP_LDLV 614%token <tok> T_OP_GETSPID 615%token <tok> T_OP_GETWID 616%token <tok> T_OP_GETFIBERID 617%token <tok> T_OP_STC 618 619/* category 7: */ 620%token <tok> T_OP_BAR 621%token <tok> T_OP_FENCE 622 623/* type qualifiers: */ 624%token <tok> T_TYPE_F16 625%token <tok> T_TYPE_F32 626%token <tok> T_TYPE_U16 627%token <tok> T_TYPE_U32 628%token <tok> T_TYPE_S16 629%token <tok> T_TYPE_S32 630%token <tok> T_TYPE_U8 631%token <tok> T_TYPE_S8 632 633%token <tok> T_UNTYPED 634%token <tok> T_TYPED 635 636%token <tok> T_MIXED 637%token <tok> T_UNSIGNED 638%token <tok> T_LOW 639%token <tok> T_HIGH 640 641%token <tok> T_1D 642%token <tok> T_2D 643%token <tok> T_3D 644%token <tok> T_4D 645 646/* condition qualifiers: */ 647%token <tok> T_LT 648%token <tok> T_LE 649%token <tok> T_GT 650%token <tok> T_GE 651%token <tok> T_EQ 652%token <tok> T_NE 653 654%token <tok> T_S2EN 655%token <tok> T_SAMP 656%token <tok> T_TEX 657%token <tok> T_BASE 658%token <tok> T_OFFSET 659%token <tok> T_UNIFORM 660%token <tok> T_NONUNIFORM 661%token <tok> T_IMM 662 663%token <tok> T_NAN 664%token <tok> T_INF 665%token <num> T_A0 666%token <num> T_A1 667%token <num> T_P0 668%token <num> T_W 669%token <str> T_CAT1_TYPE_TYPE 670 671%type <num> integer offset 672%type <num> flut_immed 673%type <flt> float 674%type <reg> src dst const 675%type <tok> cat1_opc 676%type <tok> cat2_opc_1src cat2_opc_2src_cnd cat2_opc_2src 677%type <tok> cat3_opc 678%type <tok> cat4_opc 679%type <tok> cat5_opc cat5_samp cat5_tex cat5_type 680%type <type> type 681%type <unum> const_val 682 683%error-verbose 684 685%start shader 686 687%% 688 689shader: { new_shader(); } headers instrs 690 691headers: 692| header headers 693 694header: localsize_header 695| const_header 696| buf_header 697| invocationid_header 698| wgid_header 699| numwg_header 700| branchstack_header 701| in_header 702| out_header 703| tex_header 704| pvtmem_header 705| earlypreamble_header 706 707const_val: T_FLOAT { $$ = fui($1); } 708| T_INT { $$ = $1; } 709| '-' T_INT { $$ = -$2; } 710| T_HEX { $$ = $1; } 711 712localsize_header: T_A_LOCALSIZE const_val ',' const_val ',' const_val { 713 variant->local_size[0] = $2; 714 variant->local_size[1] = $4; 715 variant->local_size[2] = $6; 716} 717 718const_header: T_A_CONST '(' T_CONSTANT ')' const_val ',' const_val ',' const_val ',' const_val { 719 add_const($3, $5, $7, $9, $11); 720} 721 722buf_header_addr_reg: 723 '(' T_CONSTANT ')' { 724 assert(($2 & 0x1) == 0); /* half-reg not allowed */ 725 unsigned reg = $2 >> 1; 726 727 info->buf_addr_regs[info->num_bufs - 1] = reg; 728 /* reserve space in immediates for the actual value to be plugged in later: */ 729 add_const($2, 0, 0, 0, 0); 730} 731| 732 733buf_header: T_A_BUF const_val { 734 int idx = info->num_bufs++; 735 assert(idx < MAX_BUFS); 736 info->buf_sizes[idx] = $2; 737} buf_header_addr_reg 738 739invocationid_header: T_A_INVOCATIONID '(' T_REGISTER ')' { 740 assert(($3 & 0x1) == 0); /* half-reg not allowed */ 741 unsigned reg = $3 >> 1; 742 add_sysval(reg, 0x7, SYSTEM_VALUE_LOCAL_INVOCATION_ID); 743} 744 745wgid_header: T_A_WGID '(' T_REGISTER ')' { 746 assert(($3 & 0x1) == 0); /* half-reg not allowed */ 747 unsigned reg = $3 >> 1; 748 assert(variant->compiler->gen >= 5); 749 assert(reg >= regid(48, 0)); /* must be a high reg */ 750 add_sysval(reg, 0x7, SYSTEM_VALUE_WORKGROUP_ID); 751} 752| T_A_WGID '(' T_CONSTANT ')' { 753 assert(($3 & 0x1) == 0); /* half-reg not allowed */ 754 unsigned reg = $3 >> 1; 755 assert(variant->compiler->gen < 5); 756 info->wgid = reg; 757} 758 759numwg_header: T_A_NUMWG '(' T_CONSTANT ')' { 760 assert(($3 & 0x1) == 0); /* half-reg not allowed */ 761 unsigned reg = $3 >> 1; 762 info->numwg = reg; 763 /* reserve space in immediates for the actual value to be plugged in later: */ 764 if (variant->compiler->gen >= 5) 765 add_const($3, 0, 0, 0, 0); 766} 767 768branchstack_header: T_A_BRANCHSTACK const_val { variant->branchstack = $2; } 769 770pvtmem_header: T_A_PVTMEM const_val { variant->pvtmem_size = $2; } 771 772earlypreamble_header: T_A_EARLYPREAMBLE { info->early_preamble = 1; } 773 774/* Stubs for now */ 775in_header: T_A_IN '(' T_REGISTER ')' T_IDENTIFIER '(' T_IDENTIFIER '=' integer ')' { } 776 777out_header: T_A_OUT '(' T_REGISTER ')' T_IDENTIFIER '(' T_IDENTIFIER '=' integer ')' { } 778 779tex_header: T_A_TEX '(' T_REGISTER ')' 780 T_IDENTIFIER '=' integer ',' /* src */ 781 T_IDENTIFIER '=' integer ',' /* samp */ 782 T_IDENTIFIER '=' integer ',' /* tex */ 783 T_IDENTIFIER '=' integer ',' /* wrmask */ 784 T_IDENTIFIER '=' integer /* cmd */ { } 785 786iflag: T_SY { iflags.flags |= IR3_INSTR_SY; } 787| T_SS { iflags.flags |= IR3_INSTR_SS; } 788| T_JP { iflags.flags |= IR3_INSTR_JP; } 789| T_SAT { iflags.flags |= IR3_INSTR_SAT; } 790| T_RPT { iflags.repeat = $1; } 791| T_UL { iflags.flags |= IR3_INSTR_UL; } 792| T_NOP { iflags.nop = $1; } 793 794iflags: 795| iflag iflags 796 797instrs: instrs instr 798| instr 799 800instr: iflags cat0_instr 801| iflags cat1_instr 802| iflags cat2_instr 803| iflags cat3_instr 804| iflags cat4_instr 805| iflags cat5_instr { fixup_cat5_s2en(); } 806| iflags cat6_instr 807| iflags cat7_instr 808| label 809 810label: T_IDENTIFIER ':' { new_label($1); } 811 812cat0_src1: '!' T_P0 { instr->cat0.inv1 = true; instr->cat0.comp1 = $2 >> 1; } 813| T_P0 { instr->cat0.comp1 = $1 >> 1; } 814 815cat0_src2: '!' T_P0 { instr->cat0.inv2 = true; instr->cat0.comp2 = $2 >> 1; } 816| T_P0 { instr->cat0.comp2 = $1 >> 1; } 817 818cat0_immed: '#' integer { instr->cat0.immed = $2; } 819| '#' T_IDENTIFIER { ralloc_steal(instr, (void *)$2); instr->cat0.target_label = $2; } 820 821cat0_instr: T_OP_NOP { new_instr(OPC_NOP); } 822| T_OP_BR { new_instr(OPC_B)->cat0.brtype = BRANCH_PLAIN; } cat0_src1 ',' cat0_immed 823| T_OP_BRAO { new_instr(OPC_B)->cat0.brtype = BRANCH_OR; } cat0_src1 ',' cat0_src2 ',' cat0_immed 824| T_OP_BRAA { new_instr(OPC_B)->cat0.brtype = BRANCH_AND; } cat0_src1 ',' cat0_src2 ',' cat0_immed 825| T_OP_BRAC '.' integer { new_instr(OPC_B)->cat0.brtype = BRANCH_CONST; instr->cat0.idx = $3; } cat0_immed 826| T_OP_BANY { new_instr(OPC_B)->cat0.brtype = BRANCH_ANY; } cat0_src1 ',' cat0_immed 827| T_OP_BALL { new_instr(OPC_B)->cat0.brtype = BRANCH_ALL; } cat0_src1 ',' cat0_immed 828| T_OP_BRAX { new_instr(OPC_B)->cat0.brtype = BRANCH_X; } cat0_immed 829| T_OP_JUMP { new_instr(OPC_JUMP); } cat0_immed 830| T_OP_CALL { new_instr(OPC_CALL); } cat0_immed 831| T_OP_RET { new_instr(OPC_RET); } 832| T_OP_KILL { new_instr(OPC_KILL); } cat0_src1 833| T_OP_END { new_instr(OPC_END); } 834| T_OP_EMIT { new_instr(OPC_EMIT); } 835| T_OP_CUT { new_instr(OPC_CUT); } 836| T_OP_CHMASK { new_instr(OPC_CHMASK); } 837| T_OP_CHSH { new_instr(OPC_CHSH); } 838| T_OP_FLOW_REV { new_instr(OPC_FLOW_REV); } 839| T_OP_BKT { new_instr(OPC_BKT); } cat0_immed 840| T_OP_STKS { new_instr(OPC_STKS); } 841| T_OP_STKR { new_instr(OPC_STKR); } 842| T_OP_XSET { new_instr(OPC_XSET); } 843| T_OP_XCLR { new_instr(OPC_XCLR); } 844| T_OP_GETONE { new_instr(OPC_GETONE); } cat0_immed 845| T_OP_DBG { new_instr(OPC_DBG); } 846| T_OP_SHPS { new_instr(OPC_SHPS); } cat0_immed 847| T_OP_SHPE { new_instr(OPC_SHPE); } 848| T_OP_PREDT { new_instr(OPC_PREDT); } cat0_src1 849| T_OP_PREDF { new_instr(OPC_PREDF); } cat0_src1 850| T_OP_PREDE { new_instr(OPC_PREDE); } 851| T_OP_GETLAST '.' T_W { new_instr(OPC_GETLAST); } cat0_immed 852 853cat1_opc: T_OP_MOV '.' T_CAT1_TYPE_TYPE { 854 parse_type_type(new_instr(OPC_MOV), $3); 855} 856| T_OP_COV '.' T_CAT1_TYPE_TYPE { 857 parse_type_type(new_instr(OPC_MOV), $3); 858} 859 860cat1_src: src_reg_or_const_or_rel 861| immediate_cat1 862 863cat1_movmsk: T_OP_MOVMSK '.' T_W { 864 new_instr(OPC_MOVMSK); 865 instr->cat1.src_type = TYPE_U32; 866 instr->cat1.dst_type = TYPE_U32; 867 } dst_reg { 868 if (($3 % 32) != 0) 869 yyerror("w# must be multiple of 32"); 870 if ($3 < 32) 871 yyerror("w# must be at least 32"); 872 873 int num = $3 / 32; 874 875 instr->repeat = num - 1; 876 instr->dsts[0]->wrmask = (1 << num) - 1; 877 } 878 879cat1_mova1: T_OP_MOVA1 T_A1 ',' { 880 new_instr(OPC_MOV); 881 instr->cat1.src_type = TYPE_U16; 882 instr->cat1.dst_type = TYPE_U16; 883 new_dst((61 << 3) + 2, IR3_REG_HALF); 884 } cat1_src 885 886cat1_mova: T_OP_MOVA T_A0 ',' { 887 new_instr(OPC_MOV); 888 instr->cat1.src_type = TYPE_S16; 889 instr->cat1.dst_type = TYPE_S16; 890 new_dst((61 << 3), IR3_REG_HALF); 891 } cat1_src 892 893cat1_swz: T_OP_SWZ '.' T_CAT1_TYPE_TYPE { parse_type_type(new_instr(OPC_SWZ), $3); } dst_reg ',' dst_reg ',' src_reg ',' src_reg 894 895cat1_gat: T_OP_GAT '.' T_CAT1_TYPE_TYPE { parse_type_type(new_instr(OPC_GAT), $3); } dst_reg ',' src_reg ',' src_reg ',' src_reg ',' src_reg 896 897cat1_sct: T_OP_SCT '.' T_CAT1_TYPE_TYPE { parse_type_type(new_instr(OPC_SCT), $3); } dst_reg ',' dst_reg ',' dst_reg ',' dst_reg ',' src_reg 898 899 /* NOTE: cat1 can also *write* to relative gpr */ 900cat1_instr: cat1_movmsk 901| cat1_mova1 902| cat1_mova 903| cat1_swz 904| cat1_gat 905| cat1_sct 906| cat1_opc dst_reg ',' cat1_src 907| cat1_opc relative_gpr_dst ',' cat1_src 908 909cat2_opc_1src: T_OP_ABSNEG_F { new_instr(OPC_ABSNEG_F); } 910| T_OP_ABSNEG_S { new_instr(OPC_ABSNEG_S); } 911| T_OP_CLZ_B { new_instr(OPC_CLZ_B); } 912| T_OP_CLZ_S { new_instr(OPC_CLZ_S); } 913| T_OP_SIGN_F { new_instr(OPC_SIGN_F); } 914| T_OP_FLOOR_F { new_instr(OPC_FLOOR_F); } 915| T_OP_CEIL_F { new_instr(OPC_CEIL_F); } 916| T_OP_RNDNE_F { new_instr(OPC_RNDNE_F); } 917| T_OP_RNDAZ_F { new_instr(OPC_RNDAZ_F); } 918| T_OP_TRUNC_F { new_instr(OPC_TRUNC_F); } 919| T_OP_NOT_B { new_instr(OPC_NOT_B); } 920| T_OP_BFREV_B { new_instr(OPC_BFREV_B); } 921| T_OP_SETRM { new_instr(OPC_SETRM); } 922| T_OP_CBITS_B { new_instr(OPC_CBITS_B); } 923 924cat2_opc_2src_cnd: T_OP_CMPS_F { new_instr(OPC_CMPS_F); } 925| T_OP_CMPS_U { new_instr(OPC_CMPS_U); } 926| T_OP_CMPS_S { new_instr(OPC_CMPS_S); } 927| T_OP_CMPV_F { new_instr(OPC_CMPV_F); } 928| T_OP_CMPV_U { new_instr(OPC_CMPV_U); } 929| T_OP_CMPV_S { new_instr(OPC_CMPV_S); } 930 931cat2_opc_2src: T_OP_ADD_F { new_instr(OPC_ADD_F); } 932| T_OP_MIN_F { new_instr(OPC_MIN_F); } 933| T_OP_MAX_F { new_instr(OPC_MAX_F); } 934| T_OP_MUL_F { new_instr(OPC_MUL_F); } 935| T_OP_ADD_U { new_instr(OPC_ADD_U); } 936| T_OP_ADD_S { new_instr(OPC_ADD_S); } 937| T_OP_SUB_U { new_instr(OPC_SUB_U); } 938| T_OP_SUB_S { new_instr(OPC_SUB_S); } 939| T_OP_MIN_U { new_instr(OPC_MIN_U); } 940| T_OP_MIN_S { new_instr(OPC_MIN_S); } 941| T_OP_MAX_U { new_instr(OPC_MAX_U); } 942| T_OP_MAX_S { new_instr(OPC_MAX_S); } 943| T_OP_AND_B { new_instr(OPC_AND_B); } 944| T_OP_OR_B { new_instr(OPC_OR_B); } 945| T_OP_XOR_B { new_instr(OPC_XOR_B); } 946| T_OP_MUL_U24 { new_instr(OPC_MUL_U24); } 947| T_OP_MUL_S24 { new_instr(OPC_MUL_S24); } 948| T_OP_MULL_U { new_instr(OPC_MULL_U); } 949| T_OP_SHL_B { new_instr(OPC_SHL_B); } 950| T_OP_SHR_B { new_instr(OPC_SHR_B); } 951| T_OP_ASHR_B { new_instr(OPC_ASHR_B); } 952| T_OP_BARY_F { new_instr(OPC_BARY_F); } 953| T_OP_FLAT_B { new_instr(OPC_FLAT_B); } 954| T_OP_MGEN_B { new_instr(OPC_MGEN_B); } 955| T_OP_GETBIT_B { new_instr(OPC_GETBIT_B); } 956| T_OP_SHB { new_instr(OPC_SHB); } 957| T_OP_MSAD { new_instr(OPC_MSAD); } 958 959cond: T_LT { instr->cat2.condition = IR3_COND_LT; } 960| T_LE { instr->cat2.condition = IR3_COND_LE; } 961| T_GT { instr->cat2.condition = IR3_COND_GT; } 962| T_GE { instr->cat2.condition = IR3_COND_GE; } 963| T_EQ { instr->cat2.condition = IR3_COND_EQ; } 964| T_NE { instr->cat2.condition = IR3_COND_NE; } 965 966cat2_instr: cat2_opc_1src dst_reg ',' src_reg_or_const_or_rel_or_imm 967| cat2_opc_2src_cnd '.' cond dst_reg ',' src_reg_or_const_or_rel_or_imm ',' src_reg_or_const_or_rel_or_imm 968| cat2_opc_2src dst_reg ',' src_reg_or_const_or_rel_or_imm ',' src_reg_or_const_or_rel_or_imm 969 970cat3_dp_signedness:'.' T_MIXED { instr->cat3.signedness = IR3_SRC_MIXED; } 971| '.' T_UNSIGNED{ instr->cat3.signedness = IR3_SRC_UNSIGNED; } 972 973cat3_dp_pack: '.' T_LOW { instr->cat3.packed = IR3_SRC_PACKED_LOW; } 974| '.' T_HIGH { instr->cat3.packed = IR3_SRC_PACKED_HIGH; } 975 976cat3_opc: T_OP_MAD_U16 { new_instr(OPC_MAD_U16); } 977| T_OP_MADSH_U16 { new_instr(OPC_MADSH_U16); } 978| T_OP_MAD_S16 { new_instr(OPC_MAD_S16); } 979| T_OP_MADSH_M16 { new_instr(OPC_MADSH_M16); } 980| T_OP_MAD_U24 { new_instr(OPC_MAD_U24); } 981| T_OP_MAD_S24 { new_instr(OPC_MAD_S24); } 982| T_OP_MAD_F16 { new_instr(OPC_MAD_F16); } 983| T_OP_MAD_F32 { new_instr(OPC_MAD_F32); } 984| T_OP_SEL_B16 { new_instr(OPC_SEL_B16); } 985| T_OP_SEL_B32 { new_instr(OPC_SEL_B32); } 986| T_OP_SEL_S16 { new_instr(OPC_SEL_S16); } 987| T_OP_SEL_S32 { new_instr(OPC_SEL_S32); } 988| T_OP_SEL_F16 { new_instr(OPC_SEL_F16); } 989| T_OP_SEL_F32 { new_instr(OPC_SEL_F32); } 990| T_OP_SAD_S16 { new_instr(OPC_SAD_S16); } 991| T_OP_SAD_S32 { new_instr(OPC_SAD_S32); } 992 993cat3_imm_reg_opc: T_OP_SHRM { new_instr(OPC_SHRM); } 994| T_OP_SHLM { new_instr(OPC_SHLM); } 995| T_OP_SHRG { new_instr(OPC_SHRG); } 996| T_OP_SHLG { new_instr(OPC_SHLG); } 997| T_OP_ANDG { new_instr(OPC_ANDG); } 998 999cat3_wmm: T_OP_WMM { new_instr(OPC_WMM); } 1000| T_OP_WMM_ACCU { new_instr(OPC_WMM_ACCU); } 1001 1002cat3_dp: T_OP_DP2ACC { new_instr(OPC_DP2ACC); } 1003| T_OP_DP4ACC { new_instr(OPC_DP4ACC); } 1004 1005cat3_instr: cat3_opc dst_reg ',' src_reg_or_const_or_rel ',' src_reg_or_const ',' src_reg_or_const_or_rel 1006| cat3_imm_reg_opc dst_reg ',' src_reg_or_rel_or_imm ',' src_reg_or_const ',' src_reg_or_rel_or_imm 1007| cat3_wmm dst_reg ',' src_reg_gpr ',' src_reg ',' immediate 1008| cat3_dp cat3_dp_signedness cat3_dp_pack dst_reg ',' src_reg_or_rel_or_imm ',' src_reg_or_const ',' src_reg_or_rel_or_imm 1009 1010cat4_opc: T_OP_RCP { new_instr(OPC_RCP); } 1011| T_OP_RSQ { new_instr(OPC_RSQ); } 1012| T_OP_LOG2 { new_instr(OPC_LOG2); } 1013| T_OP_EXP2 { new_instr(OPC_EXP2); } 1014| T_OP_SIN { new_instr(OPC_SIN); } 1015| T_OP_COS { new_instr(OPC_COS); } 1016| T_OP_SQRT { new_instr(OPC_SQRT); } 1017| T_OP_HRSQ { new_instr(OPC_HRSQ); } 1018| T_OP_HLOG2 { new_instr(OPC_HLOG2); } 1019| T_OP_HEXP2 { new_instr(OPC_HEXP2); } 1020 1021cat4_instr: cat4_opc dst_reg ',' src_reg_or_const_or_rel_or_imm 1022 1023cat5_opc_dsxypp: T_OP_DSXPP_1 { new_instr(OPC_DSXPP_1)->cat5.type = TYPE_F32; } 1024| T_OP_DSYPP_1 { new_instr(OPC_DSYPP_1)->cat5.type = TYPE_F32; } 1025 1026cat5_opc: T_OP_ISAM { new_instr(OPC_ISAM); } 1027| T_OP_ISAML { new_instr(OPC_ISAML); } 1028| T_OP_ISAMM { new_instr(OPC_ISAMM); } 1029| T_OP_SAM { new_instr(OPC_SAM); } 1030| T_OP_SAMB { new_instr(OPC_SAMB); } 1031| T_OP_SAML { new_instr(OPC_SAML); } 1032| T_OP_SAMGQ { new_instr(OPC_SAMGQ); } 1033| T_OP_GETLOD { new_instr(OPC_GETLOD); } 1034| T_OP_CONV { new_instr(OPC_CONV); } 1035| T_OP_CONVM { new_instr(OPC_CONVM); } 1036| T_OP_GETSIZE { new_instr(OPC_GETSIZE); } 1037| T_OP_GETBUF { new_instr(OPC_GETBUF); } 1038| T_OP_GETPOS { new_instr(OPC_GETPOS); } 1039| T_OP_GETINFO { new_instr(OPC_GETINFO); } 1040| T_OP_DSX { new_instr(OPC_DSX); } 1041| T_OP_DSY { new_instr(OPC_DSY); } 1042| T_OP_GATHER4R { new_instr(OPC_GATHER4R); } 1043| T_OP_GATHER4G { new_instr(OPC_GATHER4G); } 1044| T_OP_GATHER4B { new_instr(OPC_GATHER4B); } 1045| T_OP_GATHER4A { new_instr(OPC_GATHER4A); } 1046| T_OP_SAMGP0 { new_instr(OPC_SAMGP0); } 1047| T_OP_SAMGP1 { new_instr(OPC_SAMGP1); } 1048| T_OP_SAMGP2 { new_instr(OPC_SAMGP2); } 1049| T_OP_SAMGP3 { new_instr(OPC_SAMGP3); } 1050| T_OP_RGETPOS { new_instr(OPC_RGETPOS); } 1051| T_OP_RGETINFO { new_instr(OPC_RGETINFO); } 1052| T_OP_BRCST_A { new_instr(OPC_BRCST_ACTIVE); } 1053| T_OP_QSHUFFLE_BRCST { new_instr(OPC_QUAD_SHUFFLE_BRCST); } 1054| T_OP_QSHUFFLE_H { new_instr(OPC_QUAD_SHUFFLE_HORIZ); } 1055| T_OP_QSHUFFLE_V { new_instr(OPC_QUAD_SHUFFLE_VERT); } 1056| T_OP_QSHUFFLE_DIAG { new_instr(OPC_QUAD_SHUFFLE_DIAG); } 1057 1058cat5_flag: '.' T_3D { instr->flags |= IR3_INSTR_3D; } 1059| '.' 'a' { instr->flags |= IR3_INSTR_A; } 1060| '.' 'o' { instr->flags |= IR3_INSTR_O; } 1061| '.' 'p' { instr->flags |= IR3_INSTR_P; } 1062| '.' 's' { instr->flags |= IR3_INSTR_S; } 1063| '.' T_S2EN { instr->flags |= IR3_INSTR_S2EN; } 1064| '.' T_UNIFORM { } 1065| '.' T_NONUNIFORM { instr->flags |= IR3_INSTR_NONUNIF; } 1066| '.' T_BASE { instr->flags |= IR3_INSTR_B; instr->cat5.tex_base = $2; } 1067| '.' T_W { instr->cat5.cluster_size = $2; } 1068cat5_flags: 1069| cat5_flag cat5_flags 1070 1071cat5_samp: T_SAMP { instr->cat5.samp = $1; } 1072cat5_tex: T_TEX { instr->cat5.tex = $1; } 1073cat5_type: '(' type ')' { instr->cat5.type = $2; } 1074cat5_a1: src_reg { instr->flags |= IR3_INSTR_A1EN; } 1075 1076cat5_instr: cat5_opc_dsxypp cat5_flags dst_reg ',' src_reg 1077| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg ',' src_reg ',' src_reg 1078| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg ',' src_reg ',' cat5_samp ',' cat5_tex 1079| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg ',' src_reg ',' cat5_samp 1080| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg ',' src_reg ',' cat5_tex 1081| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg ',' src_reg 1082| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg ',' cat5_samp ',' cat5_tex 1083| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg ',' cat5_samp ',' cat5_a1 1084| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg ',' cat5_samp 1085| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg ',' cat5_tex 1086| cat5_opc cat5_flags cat5_type dst_reg ',' src_reg 1087| cat5_opc cat5_flags cat5_type dst_reg ',' cat5_samp ',' cat5_tex 1088| cat5_opc cat5_flags cat5_type dst_reg ',' cat5_samp 1089| cat5_opc cat5_flags cat5_type dst_reg ',' cat5_tex 1090| cat5_opc cat5_flags cat5_type dst_reg 1091 1092cat6_typed: '.' T_UNTYPED { instr->cat6.typed = 0; } 1093| '.' T_TYPED { instr->cat6.typed = 1; } 1094 1095cat6_dim: '.' T_1D { instr->cat6.d = 1; } 1096| '.' T_2D { instr->cat6.d = 2; } 1097| '.' T_3D { instr->cat6.d = 3; } 1098| '.' T_4D { instr->cat6.d = 4; } 1099 1100cat6_type: '.' type { instr->cat6.type = $2; } 1101cat6_imm_offset: offset { new_src(0, IR3_REG_IMMED)->iim_val = $1; } 1102cat6_offset: cat6_imm_offset 1103| '+' src 1104cat6_dst_offset: offset { instr->cat6.dst_offset = $1; } 1105| '+' src 1106 1107cat6_immed: integer { instr->cat6.iim_val = $1; } 1108 1109cat6_stg_ldg_a6xx_offset: 1110 '+' '(' src offset ')' '<' '<' integer { 1111 assert($8 == 2); 1112 new_src(0, IR3_REG_IMMED)->uim_val = 0; 1113 new_src(0, IR3_REG_IMMED)->uim_val = $4; 1114 } 1115| '+' src '<' '<' integer offset '<' '<' integer { 1116 assert($9 == 2); 1117 new_src(0, IR3_REG_IMMED)->uim_val = $5 - 2; 1118 new_src(0, IR3_REG_IMMED)->uim_val = $6; 1119 } 1120 1121cat6_load: T_OP_LDG { new_instr(OPC_LDG); } cat6_type dst_reg ',' 'g' '[' src cat6_offset ']' ',' immediate 1122| T_OP_LDG_A { new_instr(OPC_LDG_A); } cat6_type dst_reg ',' 'g' '[' src cat6_stg_ldg_a6xx_offset ']' ',' immediate 1123| T_OP_LDP { new_instr(OPC_LDP); } cat6_type dst_reg ',' 'p' '[' src cat6_offset ']' ',' immediate 1124| T_OP_LDL { new_instr(OPC_LDL); } cat6_type dst_reg ',' 'l' '[' src cat6_offset ']' ',' immediate 1125| T_OP_LDLW { new_instr(OPC_LDLW); } cat6_type dst_reg ',' 'l' '[' src cat6_offset ']' ',' immediate 1126| T_OP_LDLV { new_instr(OPC_LDLV); } cat6_type dst_reg ',' 'l' '[' integer ']' { 1127 new_src(0, IR3_REG_IMMED)->iim_val = $8; 1128 } ',' immediate 1129 1130cat6_store: T_OP_STG { new_instr(OPC_STG); dummy_dst(); } cat6_type 'g' '[' src cat6_imm_offset ']' ',' src ',' immediate 1131| T_OP_STG_A { new_instr(OPC_STG_A); dummy_dst(); } cat6_type 'g' '[' src cat6_stg_ldg_a6xx_offset ']' ',' src ',' immediate 1132| T_OP_STP { new_instr(OPC_STP); dummy_dst(); } cat6_type 'p' '[' src cat6_dst_offset ']' ',' src ',' immediate 1133| T_OP_STL { new_instr(OPC_STL); dummy_dst(); } cat6_type 'l' '[' src cat6_dst_offset ']' ',' src ',' immediate 1134| T_OP_STLW { new_instr(OPC_STLW); dummy_dst(); } cat6_type 'l' '[' src cat6_dst_offset ']' ',' src ',' immediate 1135 1136cat6_loadib: T_OP_LDIB { new_instr(OPC_LDIB); } cat6_typed cat6_dim cat6_type '.' cat6_immed dst_reg ',' 'g' '[' immediate ']' ',' src ',' src 1137cat6_storeib: T_OP_STIB { new_instr(OPC_STIB); dummy_dst(); } cat6_typed cat6_dim cat6_type '.' cat6_immed'g' '[' immediate ']' ',' src ',' src ',' src 1138 1139cat6_prefetch: T_OP_PREFETCH { new_instr(OPC_PREFETCH); new_dst(0,0); /* dummy dst */ } 'g' '[' src cat6_offset ']' ',' cat6_immed 1140 1141cat6_atomic_opc: T_OP_ATOMIC_ADD { new_instr(OPC_ATOMIC_ADD); } 1142| T_OP_ATOMIC_SUB { new_instr(OPC_ATOMIC_SUB); } 1143| T_OP_ATOMIC_XCHG { new_instr(OPC_ATOMIC_XCHG); } 1144| T_OP_ATOMIC_INC { new_instr(OPC_ATOMIC_INC); } 1145| T_OP_ATOMIC_DEC { new_instr(OPC_ATOMIC_DEC); } 1146| T_OP_ATOMIC_CMPXCHG { new_instr(OPC_ATOMIC_CMPXCHG); } 1147| T_OP_ATOMIC_MIN { new_instr(OPC_ATOMIC_MIN); } 1148| T_OP_ATOMIC_MAX { new_instr(OPC_ATOMIC_MAX); } 1149| T_OP_ATOMIC_AND { new_instr(OPC_ATOMIC_AND); } 1150| T_OP_ATOMIC_OR { new_instr(OPC_ATOMIC_OR); } 1151| T_OP_ATOMIC_XOR { new_instr(OPC_ATOMIC_XOR); } 1152 1153cat6_a3xx_atomic_opc: T_OP_ATOMIC_S_ADD { new_instr(OPC_ATOMIC_S_ADD); } 1154| T_OP_ATOMIC_S_SUB { new_instr(OPC_ATOMIC_S_SUB); } 1155| T_OP_ATOMIC_S_XCHG { new_instr(OPC_ATOMIC_S_XCHG); } 1156| T_OP_ATOMIC_S_INC { new_instr(OPC_ATOMIC_S_INC); } 1157| T_OP_ATOMIC_S_DEC { new_instr(OPC_ATOMIC_S_DEC); } 1158| T_OP_ATOMIC_S_CMPXCHG { new_instr(OPC_ATOMIC_S_CMPXCHG); } 1159| T_OP_ATOMIC_S_MIN { new_instr(OPC_ATOMIC_S_MIN); } 1160| T_OP_ATOMIC_S_MAX { new_instr(OPC_ATOMIC_S_MAX); } 1161| T_OP_ATOMIC_S_AND { new_instr(OPC_ATOMIC_S_AND); } 1162| T_OP_ATOMIC_S_OR { new_instr(OPC_ATOMIC_S_OR); } 1163| T_OP_ATOMIC_S_XOR { new_instr(OPC_ATOMIC_S_XOR); } 1164 1165cat6_a6xx_atomic_opc: T_OP_ATOMIC_G_ADD { new_instr(OPC_ATOMIC_G_ADD); } 1166| T_OP_ATOMIC_G_SUB { new_instr(OPC_ATOMIC_G_SUB); } 1167| T_OP_ATOMIC_G_XCHG { new_instr(OPC_ATOMIC_G_XCHG); } 1168| T_OP_ATOMIC_G_INC { new_instr(OPC_ATOMIC_G_INC); } 1169| T_OP_ATOMIC_G_DEC { new_instr(OPC_ATOMIC_G_DEC); } 1170| T_OP_ATOMIC_G_CMPXCHG { new_instr(OPC_ATOMIC_G_CMPXCHG); } 1171| T_OP_ATOMIC_G_MIN { new_instr(OPC_ATOMIC_G_MIN); } 1172| T_OP_ATOMIC_G_MAX { new_instr(OPC_ATOMIC_G_MAX); } 1173| T_OP_ATOMIC_G_AND { new_instr(OPC_ATOMIC_G_AND); } 1174| T_OP_ATOMIC_G_OR { new_instr(OPC_ATOMIC_G_OR); } 1175| T_OP_ATOMIC_G_XOR { new_instr(OPC_ATOMIC_G_XOR); } 1176 1177cat6_a3xx_atomic_s: cat6_a3xx_atomic_opc cat6_typed cat6_dim cat6_type '.' cat6_immed '.' 'g' dst_reg ',' 'g' '[' cat6_reg_or_immed ']' ',' src ',' src ',' src 1178 1179cat6_a6xx_atomic_g: cat6_a6xx_atomic_opc cat6_typed cat6_dim cat6_type '.' cat6_immed '.' 'g' dst_reg ',' src ',' src 1180 1181cat6_atomic_l: cat6_atomic_opc cat6_typed cat6_dim cat6_type '.' cat6_immed '.' 'l' dst_reg ',' 'l' '[' cat6_reg_or_immed ']' ',' src 1182 1183cat6_atomic: cat6_atomic_l 1184| cat6_a3xx_atomic_s 1185| cat6_a6xx_atomic_g 1186 1187cat6_ibo_opc_1src: T_OP_RESINFO { new_instr(OPC_RESINFO); } 1188 1189cat6_ibo_opc_ldgb: T_OP_LDGB { new_instr(OPC_LDGB); } 1190cat6_ibo_opc_stgb: T_OP_STGB { new_instr(OPC_STGB); } 1191 1192cat6_ibo: cat6_ibo_opc_1src cat6_type cat6_dim dst_reg ',' 'g' '[' cat6_reg_or_immed ']' 1193| cat6_ibo_opc_ldgb cat6_typed cat6_dim cat6_type '.' cat6_immed dst_reg ',' 'g' '[' cat6_reg_or_immed ']' ',' src ',' src 1194| cat6_ibo_opc_stgb cat6_typed cat6_dim cat6_type '.' cat6_immed { dummy_dst(); } 'g' '[' cat6_reg_or_immed ']' ',' src ',' cat6_reg_or_immed ',' src 1195 1196cat6_id_opc: 1197 T_OP_GETSPID { new_instr(OPC_GETSPID); } 1198| T_OP_GETWID { new_instr(OPC_GETWID); } 1199| T_OP_GETFIBERID { new_instr(OPC_GETFIBERID); } 1200 1201cat6_id: cat6_id_opc cat6_type dst_reg 1202 1203cat6_bindless_base: 1204| '.' T_BASE { instr->flags |= IR3_INSTR_B; instr->cat6.base = $2; } 1205 1206cat6_bindless_mode: T_IMM cat6_bindless_base 1207| T_UNIFORM cat6_bindless_base 1208| T_NONUNIFORM cat6_bindless_base { instr->flags |= IR3_INSTR_NONUNIF; } 1209 1210cat6_reg_or_immed: src 1211| integer { new_src(0, IR3_REG_IMMED)->iim_val = $1; } 1212 1213cat6_bindless_ibo_opc_1src: T_OP_RESINFO_B { new_instr(OPC_RESINFO); } 1214 1215cat6_bindless_ibo_opc_2src: T_OP_ATOMIC_B_ADD { new_instr(OPC_ATOMIC_B_ADD); dummy_dst(); } 1216| T_OP_ATOMIC_B_SUB { new_instr(OPC_ATOMIC_B_SUB); dummy_dst(); } 1217| T_OP_ATOMIC_B_XCHG { new_instr(OPC_ATOMIC_B_XCHG); dummy_dst(); } 1218| T_OP_ATOMIC_B_INC { new_instr(OPC_ATOMIC_B_INC); dummy_dst(); } 1219| T_OP_ATOMIC_B_DEC { new_instr(OPC_ATOMIC_B_DEC); dummy_dst(); } 1220| T_OP_ATOMIC_B_CMPXCHG { new_instr(OPC_ATOMIC_B_CMPXCHG); dummy_dst(); } 1221| T_OP_ATOMIC_B_MIN { new_instr(OPC_ATOMIC_B_MIN); dummy_dst(); } 1222| T_OP_ATOMIC_B_MAX { new_instr(OPC_ATOMIC_B_MAX); dummy_dst(); } 1223| T_OP_ATOMIC_B_AND { new_instr(OPC_ATOMIC_B_AND); dummy_dst(); } 1224| T_OP_ATOMIC_B_OR { new_instr(OPC_ATOMIC_B_OR); dummy_dst(); } 1225| T_OP_ATOMIC_B_XOR { new_instr(OPC_ATOMIC_B_XOR); dummy_dst(); } 1226| T_OP_STIB_B { new_instr(OPC_STIB); dummy_dst(); } 1227 1228cat6_bindless_ibo_opc_2src_dst: T_OP_LDIB_B { new_instr(OPC_LDIB); } 1229 1230cat6_bindless_ibo: cat6_bindless_ibo_opc_1src cat6_typed cat6_dim cat6_type '.' cat6_immed '.' cat6_bindless_mode dst_reg ',' cat6_reg_or_immed 1231| cat6_bindless_ibo_opc_2src cat6_typed cat6_dim cat6_type '.' cat6_immed '.' cat6_bindless_mode src_reg ',' cat6_reg_or_immed ',' cat6_reg_or_immed { swap(instr->srcs[0], instr->srcs[2]); } 1232| cat6_bindless_ibo_opc_2src_dst cat6_typed cat6_dim cat6_type '.' cat6_immed '.' cat6_bindless_mode dst_reg ',' cat6_reg_or_immed ',' cat6_reg_or_immed { swap(instr->srcs[0], instr->srcs[1]); } 1233 1234cat6_bindless_ldc_opc: T_OP_LDC { new_instr(OPC_LDC); } 1235 1236/* This is separated from the opcode to avoid lookahead/shift-reduce conflicts */ 1237cat6_bindless_ldc_middle: 1238 T_OFFSET '.' cat6_immed '.' cat6_bindless_mode dst_reg { instr->cat6.d = $1; } 1239| cat6_immed '.' 'k' '.' cat6_bindless_mode 'c' '[' T_A1 ']' { instr->opc = OPC_LDC_K; } 1240 1241cat6_bindless_ldc: cat6_bindless_ldc_opc '.' cat6_bindless_ldc_middle ',' cat6_reg_or_immed ',' cat6_reg_or_immed { 1242 instr->cat6.type = TYPE_U32; 1243 /* TODO cleanup ir3 src order: */ 1244 swap(instr->srcs[0], instr->srcs[1]); 1245 } 1246 1247stc_dst: integer { new_src(0, IR3_REG_IMMED)->iim_val = $1; } 1248| T_A1 { new_src(0, IR3_REG_IMMED)->iim_val = 0; instr->flags |= IR3_INSTR_A1EN; } 1249| T_A1 '+' integer { new_src(0, IR3_REG_IMMED)->iim_val = $3; instr->flags |= IR3_INSTR_A1EN; } 1250 1251cat6_stc: T_OP_STC { new_instr(OPC_STC); } cat6_type 'c' '[' stc_dst ']' ',' src_reg ',' cat6_immed 1252 1253cat6_todo: T_OP_G2L { new_instr(OPC_G2L); } 1254| T_OP_L2G { new_instr(OPC_L2G); } 1255| T_OP_RESFMT { new_instr(OPC_RESFMT); } 1256 1257cat6_instr: cat6_load 1258| cat6_loadib 1259| cat6_store 1260| cat6_storeib 1261| cat6_prefetch 1262| cat6_atomic 1263| cat6_ibo 1264| cat6_id 1265| cat6_bindless_ldc 1266| cat6_bindless_ibo 1267| cat6_stc 1268| cat6_todo 1269 1270cat7_scope: '.' 'w' { instr->cat7.w = true; } 1271| '.' 'r' { instr->cat7.r = true; } 1272| '.' 'l' { instr->cat7.l = true; } 1273| '.' 'g' { instr->cat7.g = true; } 1274 1275cat7_scopes: 1276| cat7_scope cat7_scopes 1277 1278cat7_barrier: T_OP_BAR { new_instr(OPC_BAR); } cat7_scopes 1279| T_OP_FENCE { new_instr(OPC_FENCE); } cat7_scopes 1280 1281cat7_instr: cat7_barrier 1282 1283src: T_REGISTER { $$ = new_src($1, 0); } 1284| T_A0 { $$ = new_src((61 << 3), IR3_REG_HALF); } 1285| T_A1 { $$ = new_src((61 << 3) + 1, IR3_REG_HALF); } 1286| T_P0 { $$ = new_src((62 << 3) + $1, 0); } 1287 1288dst: T_REGISTER { $$ = new_dst($1, 0); } 1289| T_A0 { $$ = new_dst((61 << 3), IR3_REG_HALF); } 1290| T_A1 { $$ = new_dst((61 << 3) + 1, IR3_REG_HALF); } 1291| T_P0 { $$ = new_dst((62 << 3) + $1, 0); } 1292 1293const: T_CONSTANT { $$ = new_src($1, IR3_REG_CONST); } 1294 1295dst_reg_flag: T_EVEN { instr->cat1.round = ROUND_EVEN; } 1296| T_POS_INFINITY { instr->cat1.round = ROUND_POS_INF; } 1297| T_NEG_INFINITY { instr->cat1.round = ROUND_NEG_INF; } 1298| T_EI { rflags.flags |= IR3_REG_EI; } 1299| T_WRMASK { rflags.wrmask = $1; } 1300 1301dst_reg_flags: dst_reg_flag 1302| dst_reg_flag dst_reg_flags 1303 1304 /* note: destination registers are always incremented in repeat */ 1305dst_reg: dst { $1->flags |= IR3_REG_R; } 1306| dst_reg_flags dst { $2->flags |= IR3_REG_R; } 1307 1308src_reg_flag: T_ABSNEG { rflags.flags |= IR3_REG_ABS|IR3_REG_NEGATE; } 1309| T_NEG { rflags.flags |= IR3_REG_NEGATE; } 1310| T_ABS { rflags.flags |= IR3_REG_ABS; } 1311| T_R { rflags.flags |= IR3_REG_R; } 1312 1313src_reg_flags: src_reg_flag 1314| src_reg_flag src_reg_flags 1315 1316src_reg: src 1317| src_reg_flags src 1318 1319src_reg_gpr: src_reg 1320| relative_gpr_src 1321 1322src_const: const 1323| src_reg_flags const 1324 1325src_reg_or_const: src_reg 1326| src_const 1327 1328src_reg_or_const_or_rel: src_reg_or_const 1329| relative 1330| src_reg_flags relative 1331 1332src_reg_or_const_or_rel_or_imm: src_reg_or_const_or_rel 1333| src_reg_flags immediate 1334| immediate 1335 1336src_reg_or_rel_or_imm: src_reg 1337| relative 1338| immediate 1339 1340offset: { $$ = 0; } 1341| '+' integer { $$ = $2; } 1342| '-' integer { $$ = -$2; } 1343 1344relative_gpr_src: 'r' '<' T_A0 offset '>' { new_src(0, IR3_REG_RELATIV)->array.offset = $4; } 1345| T_HR '<' T_A0 offset '>' { new_src(0, IR3_REG_RELATIV | IR3_REG_HALF)->array.offset = $4; } 1346 1347relative_gpr_dst: 'r' '<' T_A0 offset '>' { new_dst(0, IR3_REG_RELATIV)->array.offset = $4; } 1348| T_HR '<' T_A0 offset '>' { new_dst(0, IR3_REG_RELATIV | IR3_REG_HALF)->array.offset = $4; } 1349 1350relative_const: 'c' '<' T_A0 offset '>' { new_src(0, IR3_REG_RELATIV | IR3_REG_CONST)->array.offset = $4; } 1351| T_HC '<' T_A0 offset '>' { new_src(0, IR3_REG_RELATIV | IR3_REG_CONST | IR3_REG_HALF)->array.offset = $4; } 1352 1353relative: relative_gpr_src 1354| relative_const 1355 1356/* cat1 immediates differ slighly in the floating point case from the cat2 1357 * case which can only encode certain predefined values (ie. and index into 1358 * the FLUT table) 1359 */ 1360immediate_cat1: integer { new_src(0, IR3_REG_IMMED)->iim_val = type_size(instr->cat1.src_type) < 32 ? $1 & 0xffff : $1; } 1361| '(' integer ')' { new_src(0, IR3_REG_IMMED)->fim_val = $2; } 1362| '(' float ')' { new_src(0, IR3_REG_IMMED)->fim_val = $2; } 1363| 'h' '(' integer ')' { new_src(0, IR3_REG_IMMED | IR3_REG_HALF)->iim_val = $3 & 0xffff; } 1364| 'h' '(' float ')' { new_src(0, IR3_REG_IMMED | IR3_REG_HALF)->uim_val = _mesa_float_to_half($3); } 1365| '(' T_NAN ')' { new_src(0, IR3_REG_IMMED)->fim_val = NAN; } 1366| '(' T_INF ')' { new_src(0, IR3_REG_IMMED)->fim_val = INFINITY; } 1367 1368immediate: integer { new_src(0, IR3_REG_IMMED)->iim_val = $1; } 1369| '(' integer ')' { new_src(0, IR3_REG_IMMED)->fim_val = $2; } 1370| flut_immed { new_src(0, IR3_REG_IMMED)->uim_val = $1; } 1371| 'h' '(' integer ')' { new_src(0, IR3_REG_IMMED | IR3_REG_HALF)->iim_val = $3; } 1372| 'h' flut_immed { new_src(0, IR3_REG_IMMED | IR3_REG_HALF)->uim_val = $2; } 1373 1374/* Float LUT values accepted as immed: */ 1375flut_immed: T_FLUT_0_0 1376| T_FLUT_0_5 1377| T_FLUT_1_0 1378| T_FLUT_2_0 1379| T_FLUT_E 1380| T_FLUT_PI 1381| T_FLUT_INV_PI 1382| T_FLUT_INV_LOG2_E 1383| T_FLUT_LOG2_E 1384| T_FLUT_INV_LOG2_10 1385| T_FLUT_LOG2_10 1386| T_FLUT_4_0 1387 1388integer: T_INT { $$ = $1; } 1389| '-' T_INT { $$ = -$2; } 1390| T_HEX { $$ = $1; } 1391| '-' T_HEX { $$ = -$2; } 1392 1393float: T_FLOAT { $$ = $1; } 1394| '-' T_FLOAT { $$ = -$2; } 1395 1396type: T_TYPE_F16 { $$ = TYPE_F16; } 1397| T_TYPE_F32 { $$ = TYPE_F32; } 1398| T_TYPE_U16 { $$ = TYPE_U16; } 1399| T_TYPE_U32 { $$ = TYPE_U32; } 1400| T_TYPE_S16 { $$ = TYPE_S16; } 1401| T_TYPE_S32 { $$ = TYPE_S32; } 1402| T_TYPE_U8 { $$ = TYPE_U8; } 1403| T_TYPE_S8 { $$ = TYPE_S8; } 1404