1/*
2 * Copyright © 2019 Google, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#ifndef FREEDRENO_LAYOUT_H_
25#define FREEDRENO_LAYOUT_H_
26
27#include <stdbool.h>
28#include <stdint.h>
29
30#include "util/format/u_format.h"
31#include "util/u_debug.h"
32#include "util/u_math.h"
33
34/* Shared freedreno mipmap layout helper
35 *
36 * It does *not* attempt to track surface transitions, in particular
37 * about UBWC state.  Possibly it should, but
38 *  (a) I'm not sure if in all cases we can transparently do in-
39 *      place transitions (ie. a5xx textures with interleaved
40 *      meta and pixel data
41 *  (b) Even if we can, we probably can't assume that we have
42 *      figured out yet how to do in-place transition for every
43 *      generation.
44 */
45
46/* Texture Layout on a3xx:
47 * -----------------------
48 *
49 * Each mipmap-level contains all of it's layers (ie. all cubmap
50 * faces, all 1d/2d array elements, etc).  The texture sampler is
51 * programmed with the start address of each mipmap level, and hw
52 * derives the layer offset within the level.
53 *
54 *
55 * Texture Layout on a4xx+:
56 * -----------------------
57 *
58 * For cubemap and 2d array, each layer contains all of it's mipmap
59 * levels (layer_first layout).
60 *
61 * 3d textures are laid out as on a3xx.
62 *
63 * In either case, the slice represents the per-miplevel information,
64 * but in layer_first layout it only includes the first layer, and
65 * an additional offset of (rsc->layer_size * layer) must be added.
66 *
67 *
68 * UBWC Color Compressions (a5xx+):
69 * -------------------------------
70 *
71 * Color compression is only supported for tiled layouts.  In general
72 * the meta "flag" buffer (ie. what holds the compression state for
73 * each block) can be separate from the color data, except for textures
74 * on a5xx where it needs to be interleaved with layers/levels of a
75 * texture.
76 */
77
78#define FDL_MAX_MIP_LEVELS 15
79
80struct fdl_slice {
81   uint32_t offset; /* offset of first layer in slice */
82   uint32_t size0;  /* size of first layer in slice */
83};
84
85/* parameters for explicit (imported) layout */
86struct fdl_explicit_layout {
87   uint32_t offset;
88   uint32_t pitch;
89};
90
91/**
92 * Encapsulates the layout of a resource, including position of given 2d
93 * surface (layer, level) within.  Or rather all the information needed
94 * to derive this.
95 */
96struct fdl_layout {
97   struct fdl_slice slices[FDL_MAX_MIP_LEVELS];
98   struct fdl_slice ubwc_slices[FDL_MAX_MIP_LEVELS];
99   uint32_t pitch0;
100   uint32_t ubwc_width0;
101   uint32_t layer_size;
102   uint32_t ubwc_layer_size; /* in bytes */
103   bool ubwc : 1;
104   bool layer_first : 1; /* see above description */
105   bool tile_all : 1;
106
107   /* Note that for tiled textures, beyond a certain mipmap level (ie.
108    * when width is less than block size) things switch to linear.  In
109    * general you should not directly look at fdl_layout::tile_mode,
110    * but instead use fdl_surface::tile_mode which will correctly take
111    * this into account.
112    */
113   uint32_t tile_mode : 2;
114   /* Bytes per pixel (where a "pixel" is a single row of a block in the case
115    * of compression), including each sample in the case of multisample
116    * layouts.
117    */
118   uint8_t cpp;
119
120   /**
121    * Left shift necessary to multiply by cpp.  Invalid for NPOT cpp, please
122    * use fdl_cpp_shift() to sanity check you aren't hitting that case.
123    */
124   uint8_t cpp_shift;
125
126   uint32_t width0, height0, depth0;
127   uint32_t mip_levels;
128   uint32_t nr_samples;
129   enum pipe_format format;
130
131   uint32_t size;       /* Size of the whole image, in bytes. */
132   uint32_t base_align; /* Alignment of the base address, in bytes. */
133   uint8_t pitchalign;  /* log2(pitchalign) */
134};
135
136static inline uint32_t
137fdl_cpp_shift(const struct fdl_layout *layout)
138{
139   assert(util_is_power_of_two_or_zero(layout->cpp));
140   return layout->cpp_shift;
141}
142
143static inline uint32_t
144fdl_pitch(const struct fdl_layout *layout, unsigned level)
145{
146   return align(u_minify(layout->pitch0, level), 1 << layout->pitchalign);
147}
148
149#define RGB_TILE_WIDTH_ALIGNMENT  64
150#define RGB_TILE_HEIGHT_ALIGNMENT 16
151#define UBWC_PLANE_SIZE_ALIGNMENT 4096
152
153static inline uint32_t
154fdl_ubwc_pitch(const struct fdl_layout *layout, unsigned level)
155{
156   if (!layout->ubwc)
157      return 0;
158   return align(u_minify(layout->ubwc_width0, level), RGB_TILE_WIDTH_ALIGNMENT);
159}
160
161static inline uint32_t
162fdl_layer_stride(const struct fdl_layout *layout, unsigned level)
163{
164   if (layout->layer_first)
165      return layout->layer_size;
166   else
167      return layout->slices[level].size0;
168}
169
170/* a2xx is special and needs PoT alignment for mipmaps: */
171static inline uint32_t
172fdl2_pitch(const struct fdl_layout *layout, unsigned level)
173{
174   uint32_t pitch = fdl_pitch(layout, level);
175   if (level)
176      pitch = util_next_power_of_two(pitch);
177   return pitch;
178}
179
180static inline uint32_t
181fdl2_pitch_pixels(const struct fdl_layout *layout, unsigned level)
182{
183   return fdl2_pitch(layout, level) >> fdl_cpp_shift(layout);
184}
185
186static inline uint32_t
187fdl_surface_offset(const struct fdl_layout *layout, unsigned level,
188                   unsigned layer)
189{
190   const struct fdl_slice *slice = &layout->slices[level];
191   return slice->offset + fdl_layer_stride(layout, level) * layer;
192}
193
194static inline uint32_t
195fdl_ubwc_offset(const struct fdl_layout *layout, unsigned level, unsigned layer)
196{
197   const struct fdl_slice *slice = &layout->ubwc_slices[level];
198   return slice->offset + layer * layout->ubwc_layer_size;
199}
200
201/* Minimum layout width to enable UBWC. */
202#define FDL_MIN_UBWC_WIDTH 16
203
204static inline bool
205fdl_level_linear(const struct fdl_layout *layout, int level)
206{
207   if (layout->tile_all)
208      return false;
209
210   unsigned w = u_minify(layout->width0, level);
211   if (w < FDL_MIN_UBWC_WIDTH)
212      return true;
213
214   return false;
215}
216
217static inline uint32_t
218fdl_tile_mode(const struct fdl_layout *layout, int level)
219{
220   if (layout->tile_mode && fdl_level_linear(layout, level))
221      return 0; /* linear */
222   else
223      return layout->tile_mode;
224}
225
226static inline bool
227fdl_ubwc_enabled(const struct fdl_layout *layout, int level)
228{
229   return layout->ubwc;
230}
231
232const char *fdl_tile_mode_desc(const struct fdl_layout *layout, int level);
233
234void fdl_layout_buffer(struct fdl_layout *layout, uint32_t size);
235
236void fdl5_layout(struct fdl_layout *layout, enum pipe_format format,
237                 uint32_t nr_samples, uint32_t width0, uint32_t height0,
238                 uint32_t depth0, uint32_t mip_levels, uint32_t array_size,
239                 bool is_3d);
240
241bool fdl6_layout(struct fdl_layout *layout, enum pipe_format format,
242                 uint32_t nr_samples, uint32_t width0, uint32_t height0,
243                 uint32_t depth0, uint32_t mip_levels, uint32_t array_size,
244                 bool is_3d, struct fdl_explicit_layout *plane_layout);
245
246static inline void
247fdl_set_pitchalign(struct fdl_layout *layout, unsigned pitchalign)
248{
249   uint32_t nblocksx = util_format_get_nblocksx(layout->format, layout->width0);
250   layout->pitchalign = pitchalign;
251   layout->pitch0 = align(nblocksx * layout->cpp, 1 << pitchalign);
252}
253
254void fdl_dump_layout(struct fdl_layout *layout);
255
256void fdl6_get_ubwc_blockwidth(const struct fdl_layout *layout,
257                              uint32_t *blockwidth, uint32_t *blockheight);
258
259enum fdl_view_type {
260   FDL_VIEW_TYPE_1D = 0,
261   FDL_VIEW_TYPE_2D = 1,
262   FDL_VIEW_TYPE_CUBE = 2,
263   FDL_VIEW_TYPE_3D = 3,
264   FDL_VIEW_TYPE_BUFFER = 4,
265};
266
267enum fdl_chroma_location {
268   FDL_CHROMA_LOCATION_COSITED_EVEN = 0,
269   FDL_CHROMA_LOCATION_MIDPOINT = 1,
270};
271
272struct fdl_view_args {
273   uint64_t iova;
274   uint32_t base_array_layer, base_miplevel;
275   uint32_t layer_count, level_count;
276   float min_lod_clamp;
277   unsigned char swiz[4];
278   enum pipe_format format;
279   enum fdl_view_type type;
280   enum fdl_chroma_location chroma_offsets[2];
281};
282
283#define FDL6_TEX_CONST_DWORDS 16
284
285struct fdl6_view {
286   uint64_t base_addr;
287   uint64_t ubwc_addr;
288   uint32_t layer_size;
289   uint32_t ubwc_layer_size;
290
291   uint32_t width, height;
292   bool need_y2_align;
293
294   bool ubwc_enabled;
295
296   enum pipe_format format;
297
298   uint32_t descriptor[FDL6_TEX_CONST_DWORDS];
299
300   /* Descriptor for use as a storage image as opposed to a sampled image.
301    * This has a few differences for cube maps (e.g. type).
302    */
303   uint32_t storage_descriptor[FDL6_TEX_CONST_DWORDS];
304
305   /* pre-filled register values */
306   uint32_t PITCH;
307   uint32_t FLAG_BUFFER_PITCH;
308
309   uint32_t RB_MRT_BUF_INFO;
310   uint32_t SP_FS_MRT_REG;
311
312   uint32_t SP_PS_2D_SRC_INFO;
313   uint32_t SP_PS_2D_SRC_SIZE;
314
315   uint32_t RB_2D_DST_INFO;
316
317   uint32_t RB_BLIT_DST_INFO;
318
319   uint32_t GRAS_LRZ_DEPTH_VIEW;
320};
321
322void
323fdl6_view_init(struct fdl6_view *view, const struct fdl_layout **layouts,
324               const struct fdl_view_args *args, bool has_z24uint_s8uint);
325void
326fdl6_buffer_view_init(uint32_t *descriptor, enum pipe_format format,
327                      const uint8_t *swiz, uint64_t iova, uint32_t size);
328
329void
330fdl6_format_swiz(enum pipe_format format, bool has_z24uint_s8uint,
331                 unsigned char *format_swiz);
332
333#endif /* FREEDRENO_LAYOUT_H_ */
334