xref: /third_party/mesa3d/src/freedreno/afuc/emu-ds.c (revision bf215546)
1/*
2 * Copyright © 2021 Google, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 */
23
24#include <assert.h>
25#include <ctype.h>
26#include <stdio.h>
27#include <stdlib.h>
28
29#include "emu.h"
30#include "util.h"
31
32/*
33 * Emulation for draw-state (ie. CP_SET_DRAW_STATE) related control registers:
34 */
35
36EMU_CONTROL_REG(DRAW_STATE_SET);
37EMU_CONTROL_REG(DRAW_STATE_SEL);
38EMU_CONTROL_REG(DRAW_STATE_ACTIVE_BITMASK);
39EMU_CONTROL_REG(DRAW_STATE_HDR);
40EMU_CONTROL_REG(DRAW_STATE_BASE);
41EMU_CONTROL_REG(SDS_BASE);
42EMU_CONTROL_REG(SDS_DWORDS);
43
44uint32_t
45emu_get_draw_state_reg(struct emu *emu, unsigned n)
46{
47   // TODO maybe we don't need to do anything here
48   return emu->control_regs.val[n];
49}
50
51void
52emu_set_draw_state_reg(struct emu *emu, unsigned n, uint32_t val)
53{
54   struct emu_draw_state *ds = &emu->draw_state;
55   unsigned cur_idx = emu_get_reg32(emu, &DRAW_STATE_SEL);
56
57   if (n == emu_reg_offset(&DRAW_STATE_SET)) {
58      if (ds->write_idx == 0) {
59         cur_idx = (val >> 24) & 0x1f;
60         ds->state[cur_idx].count = val & 0xffff;
61         ds->state[cur_idx].mode_mask = (val >> 20) & 0x7;
62
63         unsigned active_mask = emu_get_reg32(emu, &DRAW_STATE_ACTIVE_BITMASK);
64         active_mask |= (1 << cur_idx);
65
66         emu_set_reg32(emu, &DRAW_STATE_ACTIVE_BITMASK, active_mask);
67         emu_set_reg32(emu, &DRAW_STATE_SEL, cur_idx);
68      } else {
69         ds->state[cur_idx].base_lohi[ds->write_idx - 1] = val;
70      }
71
72      ds->write_idx = (ds->write_idx + 1) % 3;
73   } else if (n == emu_reg_offset(&DRAW_STATE_SEL)) {
74      emu_set_reg32(emu, &DRAW_STATE_HDR, ds->state[val].hdr);
75      emu_set_reg64(emu, &DRAW_STATE_BASE, ds->state[val].base);
76
77      /* It seems that SDS_BASE/SDS_DWORDS is also per draw-state group,
78       * and that when a new state-group is selected, SQE compares to
79       * the previous values to new DRAW_STATE_BASE & count to detect
80       * that new state has been appended to existing draw-state group:
81       */
82      unsigned prev_idx = ds->prev_draw_state_sel;
83      ds->state[prev_idx].sds_base = emu_get_reg64(emu, &SDS_BASE);
84      ds->state[prev_idx].sds_dwords = emu_get_reg32(emu, &SDS_DWORDS);
85
86      emu_set_reg64(emu, &SDS_BASE, ds->state[val].sds_base);
87      emu_set_reg32(emu, &SDS_DWORDS, ds->state[val].sds_dwords);
88
89      ds->prev_draw_state_sel = val;
90   }
91}
92