1/*
2 * Copyright © 2014 Connor Abbott
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#ifndef NIR_SCHEDULE_H
25#define NIR_SCHEDULE_H
26
27#include "nir.h"
28
29#ifdef __cplusplus
30extern "C" {
31#endif
32
33/**
34 * Struct filled in by the intrinsic_cb callback of nir_schedule_options to
35 * specify a backend-specific dependency on an intrinsic.
36 */
37typedef struct nir_schedule_dependency {
38   /* Which class of dependency this is. The meanings of the classes are
39    * specific to the backend. This must be less than
40    * NIR_SCHEDULE_N_DEPENDENCY_CLASSES.
41    */
42   int klass;
43   /* The type of dependency */
44   enum {
45      NIR_SCHEDULE_READ_DEPENDENCY,
46      NIR_SCHEDULE_WRITE_DEPENDENCY,
47   } type;
48} nir_schedule_dependency;
49
50typedef struct nir_schedule_options {
51   /* On some hardware with some stages the inputs and outputs to the shader
52    * share the same memory. In that case the scheduler needs to ensure that
53    * all output writes are scheduled after all of the input writes to avoid
54    * overwriting them. This is a bitmask of stages that need that.
55    */
56   unsigned stages_with_shared_io_memory;
57   /* The approximate amount of register pressure at which point the scheduler
58    * will try to reduce register usage.
59    */
60   int threshold;
61   /* If set, instead of trying to optimise parallelism, the scheduler will try
62    * to always minimise register pressure. This can be used as a fallback when
63    * register allocation fails so that it can at least try to generate a
64    * working shader even if it’s inefficient.
65    */
66   bool fallback;
67   /* Callback used to add custom dependencies on intrinsics. If it returns
68    * true then a dependency should be added and dep is filled in to describe
69    * it.
70    */
71   bool (* intrinsic_cb)(nir_intrinsic_instr *intr,
72                         nir_schedule_dependency *dep,
73                         void *user_data);
74
75   /* Data to pass to the intrinsic callback */
76   void *intrinsic_cb_data;
77
78   /* Callback used to specify instruction delays */
79   unsigned (* instr_delay_cb)(nir_instr *instr, void *user_data);
80
81   /* Data to pass to the instruction delay callback */
82   void *instr_delay_cb_data;
83
84} nir_schedule_options;
85
86void nir_schedule(nir_shader *shader, const nir_schedule_options *options);
87
88#ifdef __cplusplus
89} /* extern "C" */
90#endif
91
92#endif /* NIR_SCHEDULE_H */
93