1/* 2 * Copyright © 2016 Intel Corporation 3 * Copyright © 2019 Valve Corporation 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 22 * IN THE SOFTWARE. 23 */ 24 25#include "nir.h" 26 27/** 28 * \file nir_opt_move.c 29 * 30 * This pass can move various operations just before their first use inside the 31 * same basic block. Usually this is to reduce register usage. It's probably 32 * not a good idea to use this in an optimization loop. 33 * 34 * Moving comparisons is useful because many GPUs generate condition codes 35 * for comparisons, and use predication for conditional selects and control 36 * flow. In a sequence such as: 37 * 38 * vec1 32 ssa_1 = flt a b 39 * <some other operations> 40 * vec1 32 ssa_2 = bcsel ssa_1 c d 41 * 42 * the backend would likely do the comparison, producing condition codes, 43 * then save those to a boolean value. The intervening operations might 44 * trash the condition codes. Then, in order to do the bcsel, it would 45 * need to re-populate the condition code register based on the boolean. 46 * 47 * By moving the comparison just before the bcsel, the condition codes could 48 * be used directly. This eliminates the need to reload them from the boolean 49 * (generally eliminating an instruction). It may also eliminate the need to 50 * create a boolean value altogether (unless it's used elsewhere), which could 51 * lower register pressure. 52 */ 53 54static ALWAYS_INLINE bool 55src_is_ssa(nir_src *src, void *state) 56{ 57 return src->is_ssa; 58} 59 60static ALWAYS_INLINE bool 61instr_reads_register(nir_instr *instr) 62{ 63 return !nir_foreach_src(instr, src_is_ssa, NULL); 64} 65 66static bool 67nir_opt_move_block(nir_block *block, nir_move_options options) 68{ 69 bool progress = false; 70 nir_instr *last_instr = nir_block_ends_in_jump(block) ? 71 nir_block_last_instr(block) : NULL; 72 const nir_if *iff = nir_block_get_following_if(block); 73 const nir_instr *if_cond_instr = iff ? iff->condition.parent_instr : NULL; 74 75 /* Walk the instructions backwards. 76 * The instructions get indexed while iterating. 77 * For each instruction which can be moved, find the earliest user 78 * and insert the instruction before it. 79 * If multiple instructions have the same user, 80 * the original order is kept. 81 */ 82 unsigned index = 1; 83 unsigned last_reg_def_index = 0; 84 nir_foreach_instr_reverse_safe(instr, block) { 85 instr->index = index++; 86 87 /* Don't move register defs */ 88 if (nir_instr_def_is_register(instr)) { 89 last_reg_def_index = instr->index; 90 continue; 91 } 92 93 /* Check if this instruction can be moved downwards */ 94 if (!nir_can_move_instr(instr, options)) 95 continue; 96 97 /* Check all users in this block which is the first */ 98 const nir_ssa_def *def = nir_instr_ssa_def(instr); 99 nir_instr *first_user = instr == if_cond_instr ? NULL : last_instr; 100 nir_foreach_use(use, def) { 101 nir_instr *parent = use->parent_instr; 102 if (parent->type == nir_instr_type_phi || parent->block != block) 103 continue; 104 if (!first_user || parent->index > first_user->index) 105 first_user = parent; 106 } 107 108 if (first_user) { 109 /* Check predecessor instructions for the same index to keep the order */ 110 while (nir_instr_prev(first_user)->index == first_user->index) 111 first_user = nir_instr_prev(first_user); 112 113 /* check if the user is already the immediate successor */ 114 if (nir_instr_prev(first_user) == instr) 115 continue; 116 117 /* Don't move register reads past register defs */ 118 if (first_user->index < last_reg_def_index && 119 instr_reads_register(instr)) { 120 continue; 121 } 122 123 /* Insert the instruction before it's first user */ 124 exec_node_remove(&instr->node); 125 instr->index = first_user->index; 126 exec_node_insert_node_before(&first_user->node, &instr->node); 127 progress = true; 128 continue; 129 } 130 131 /* No user was found in this block: 132 * This instruction will be moved to the end of the block. 133 */ 134 assert(nir_block_last_instr(block)->type != nir_instr_type_jump); 135 if (instr == nir_block_last_instr(block)) 136 continue; 137 138 exec_node_remove(&instr->node); 139 instr->index = 0; 140 exec_list_push_tail(&block->instr_list, &instr->node); 141 142 /* update last_instr */ 143 last_instr = instr; 144 145 progress = true; 146 } 147 148 return progress; 149} 150 151bool 152nir_opt_move(nir_shader *shader, nir_move_options options) 153{ 154 bool progress = false; 155 156 nir_foreach_function(func, shader) { 157 if (!func->impl) 158 continue; 159 160 bool impl_progress = false; 161 nir_foreach_block(block, func->impl) { 162 if (nir_opt_move_block(block, options)) 163 impl_progress = true; 164 } 165 166 if (impl_progress) { 167 nir_metadata_preserve(func->impl, nir_metadata_block_index | 168 nir_metadata_dominance | 169 nir_metadata_live_ssa_defs); 170 progress = true; 171 } else { 172 nir_metadata_preserve(func->impl, nir_metadata_all); 173 } 174 } 175 176 return progress; 177} 178