1/*
2 * Copyright © 2014-2015 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#ifndef NIR_BUILDER_H
25#define NIR_BUILDER_H
26
27#include "nir_control_flow.h"
28#include "util/bitscan.h"
29#include "util/half_float.h"
30
31#ifdef __cplusplus
32extern "C" {
33#endif
34
35struct exec_list;
36
37typedef struct nir_builder {
38   nir_cursor cursor;
39
40   /* Whether new ALU instructions will be marked "exact" */
41   bool exact;
42
43   /* Whether to run divergence analysis on inserted instructions (loop merge
44    * and header phis are not updated). */
45   bool update_divergence;
46
47   nir_shader *shader;
48   nir_function_impl *impl;
49} nir_builder;
50
51void nir_builder_init(nir_builder *build, nir_function_impl *impl);
52
53nir_builder MUST_CHECK PRINTFLIKE(3, 4)
54nir_builder_init_simple_shader(gl_shader_stage stage,
55                               const nir_shader_compiler_options *options,
56                               const char *name, ...);
57
58typedef bool (*nir_instr_pass_cb)(struct nir_builder *, nir_instr *, void *);
59
60/**
61 * Iterates over all the instructions in a NIR shader and calls the given pass
62 * on them.
63 *
64 * The pass should return true if it modified the shader.  In that case, only
65 * the preserved metadata flags will be preserved in the function impl.
66 *
67 * The builder will be initialized to point at the function impl, but its
68 * cursor is unset.
69 */
70static inline bool
71nir_shader_instructions_pass(nir_shader *shader,
72                             nir_instr_pass_cb pass,
73                             nir_metadata preserved,
74                             void *cb_data)
75{
76   bool progress = false;
77
78   nir_foreach_function(function, shader) {
79      if (!function->impl)
80         continue;
81
82      bool func_progress = false;
83      nir_builder b;
84      nir_builder_init(&b, function->impl);
85
86      nir_foreach_block_safe(block, function->impl) {
87         nir_foreach_instr_safe(instr, block) {
88            func_progress |= pass(&b, instr, cb_data);
89         }
90      }
91
92      if (func_progress) {
93         nir_metadata_preserve(function->impl, preserved);
94         progress = true;
95      } else {
96         nir_metadata_preserve(function->impl, nir_metadata_all);
97      }
98   }
99
100   return progress;
101}
102
103void nir_builder_instr_insert(nir_builder *build, nir_instr *instr);
104
105static inline nir_instr *
106nir_builder_last_instr(nir_builder *build)
107{
108   assert(build->cursor.option == nir_cursor_after_instr);
109   return build->cursor.instr;
110}
111
112/* General nir_build_alu() taking a variable arg count with NULLs for the rest. */
113nir_ssa_def *
114nir_build_alu(nir_builder *build, nir_op op, nir_ssa_def *src0,
115              nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3);
116
117/* Fixed-arg-count variants to reduce size of codegen. */
118nir_ssa_def *
119nir_build_alu1(nir_builder *build, nir_op op, nir_ssa_def *src0);
120nir_ssa_def *
121nir_build_alu2(nir_builder *build, nir_op op, nir_ssa_def *src0,
122               nir_ssa_def *src1);
123nir_ssa_def *
124nir_build_alu3(nir_builder *build, nir_op op, nir_ssa_def *src0,
125               nir_ssa_def *src1, nir_ssa_def *src2);
126nir_ssa_def *
127nir_build_alu4(nir_builder *build, nir_op op, nir_ssa_def *src0,
128               nir_ssa_def *src1, nir_ssa_def *src2, nir_ssa_def *src3);
129
130nir_ssa_def *nir_build_alu_src_arr(nir_builder *build, nir_op op, nir_ssa_def **srcs);
131
132nir_instr *nir_builder_last_instr(nir_builder *build);
133
134void nir_builder_cf_insert(nir_builder *build, nir_cf_node *cf);
135
136bool nir_builder_is_inside_cf(nir_builder *build, nir_cf_node *cf_node);
137
138nir_if *
139nir_push_if_src(nir_builder *build, nir_src condition);
140
141nir_if *
142nir_push_if(nir_builder *build, nir_ssa_def *condition);
143
144nir_if *
145nir_push_else(nir_builder *build, nir_if *nif);
146
147void nir_pop_if(nir_builder *build, nir_if *nif);
148
149nir_ssa_def *
150nir_if_phi(nir_builder *build, nir_ssa_def *then_def, nir_ssa_def *else_def);
151
152nir_loop *
153nir_push_loop(nir_builder *build);
154
155void nir_pop_loop(nir_builder *build, nir_loop *loop);
156
157static inline nir_ssa_def *
158nir_ssa_undef(nir_builder *build, unsigned num_components, unsigned bit_size)
159{
160   nir_ssa_undef_instr *undef =
161      nir_ssa_undef_instr_create(build->shader, num_components, bit_size);
162   if (!undef)
163      return NULL;
164
165   nir_instr_insert(nir_before_cf_list(&build->impl->body), &undef->instr);
166   if (build->update_divergence)
167      nir_update_instr_divergence(build->shader, &undef->instr);
168
169   return &undef->def;
170}
171
172static inline nir_ssa_def *
173nir_build_imm(nir_builder *build, unsigned num_components,
174              unsigned bit_size, const nir_const_value *value)
175{
176   nir_load_const_instr *load_const =
177      nir_load_const_instr_create(build->shader, num_components, bit_size);
178   if (!load_const)
179      return NULL;
180
181   memcpy(load_const->value, value, sizeof(nir_const_value) * num_components);
182
183   nir_builder_instr_insert(build, &load_const->instr);
184
185   return &load_const->def;
186}
187
188static inline nir_ssa_def *
189nir_imm_zero(nir_builder *build, unsigned num_components, unsigned bit_size)
190{
191   nir_load_const_instr *load_const =
192      nir_load_const_instr_create(build->shader, num_components, bit_size);
193
194   /* nir_load_const_instr_create uses rzalloc so it's already zero */
195
196   nir_builder_instr_insert(build, &load_const->instr);
197
198   return &load_const->def;
199}
200
201static inline nir_ssa_def *
202nir_imm_boolN_t(nir_builder *build, bool x, unsigned bit_size)
203{
204   nir_const_value v = nir_const_value_for_bool(x, bit_size);
205   return nir_build_imm(build, 1, bit_size, &v);
206}
207
208static inline nir_ssa_def *
209nir_imm_bool(nir_builder *build, bool x)
210{
211   return nir_imm_boolN_t(build, x, 1);
212}
213
214static inline nir_ssa_def *
215nir_imm_true(nir_builder *build)
216{
217   return nir_imm_bool(build, true);
218}
219
220static inline nir_ssa_def *
221nir_imm_false(nir_builder *build)
222{
223   return nir_imm_bool(build, false);
224}
225
226static inline nir_ssa_def *
227nir_imm_floatN_t(nir_builder *build, double x, unsigned bit_size)
228{
229   nir_const_value v = nir_const_value_for_float(x, bit_size);
230   return nir_build_imm(build, 1, bit_size, &v);
231}
232
233static inline nir_ssa_def *
234nir_imm_float16(nir_builder *build, float x)
235{
236   return nir_imm_floatN_t(build, x, 16);
237}
238
239static inline nir_ssa_def *
240nir_imm_float(nir_builder *build, float x)
241{
242   return nir_imm_floatN_t(build, x, 32);
243}
244
245static inline nir_ssa_def *
246nir_imm_double(nir_builder *build, double x)
247{
248   return nir_imm_floatN_t(build, x, 64);
249}
250
251static inline nir_ssa_def *
252nir_imm_vec2(nir_builder *build, float x, float y)
253{
254   nir_const_value v[2] = {
255      nir_const_value_for_float(x, 32),
256      nir_const_value_for_float(y, 32),
257   };
258   return nir_build_imm(build, 2, 32, v);
259}
260
261static inline nir_ssa_def *
262nir_imm_vec3(nir_builder *build, float x, float y, float z)
263{
264   nir_const_value v[3] = {
265      nir_const_value_for_float(x, 32),
266      nir_const_value_for_float(y, 32),
267      nir_const_value_for_float(z, 32),
268   };
269   return nir_build_imm(build, 3, 32, v);
270}
271
272static inline nir_ssa_def *
273nir_imm_vec4(nir_builder *build, float x, float y, float z, float w)
274{
275   nir_const_value v[4] = {
276      nir_const_value_for_float(x, 32),
277      nir_const_value_for_float(y, 32),
278      nir_const_value_for_float(z, 32),
279      nir_const_value_for_float(w, 32),
280   };
281
282   return nir_build_imm(build, 4, 32, v);
283}
284
285static inline nir_ssa_def *
286nir_imm_vec4_16(nir_builder *build, float x, float y, float z, float w)
287{
288   nir_const_value v[4] = {
289      nir_const_value_for_float(x, 16),
290      nir_const_value_for_float(y, 16),
291      nir_const_value_for_float(z, 16),
292      nir_const_value_for_float(w, 16),
293   };
294
295   return nir_build_imm(build, 4, 16, v);
296}
297
298static inline nir_ssa_def *
299nir_imm_intN_t(nir_builder *build, uint64_t x, unsigned bit_size)
300{
301   nir_const_value v = nir_const_value_for_raw_uint(x, bit_size);
302   return nir_build_imm(build, 1, bit_size, &v);
303}
304
305static inline nir_ssa_def *
306nir_imm_int(nir_builder *build, int x)
307{
308   return nir_imm_intN_t(build, x, 32);
309}
310
311static inline nir_ssa_def *
312nir_imm_int64(nir_builder *build, int64_t x)
313{
314   return nir_imm_intN_t(build, x, 64);
315}
316
317static inline nir_ssa_def *
318nir_imm_ivec2(nir_builder *build, int x, int y)
319{
320   nir_const_value v[2] = {
321      nir_const_value_for_int(x, 32),
322      nir_const_value_for_int(y, 32),
323   };
324
325   return nir_build_imm(build, 2, 32, v);
326}
327
328static inline nir_ssa_def *
329nir_imm_ivec3(nir_builder *build, int x, int y, int z)
330{
331   nir_const_value v[3] = {
332      nir_const_value_for_int(x, 32),
333      nir_const_value_for_int(y, 32),
334      nir_const_value_for_int(z, 32),
335   };
336
337   return nir_build_imm(build, 3, 32, v);
338}
339
340static inline nir_ssa_def *
341nir_imm_ivec4(nir_builder *build, int x, int y, int z, int w)
342{
343   nir_const_value v[4] = {
344      nir_const_value_for_int(x, 32),
345      nir_const_value_for_int(y, 32),
346      nir_const_value_for_int(z, 32),
347      nir_const_value_for_int(w, 32),
348   };
349
350   return nir_build_imm(build, 4, 32, v);
351}
352
353nir_ssa_def *
354nir_builder_alu_instr_finish_and_insert(nir_builder *build, nir_alu_instr *instr);
355
356/* for the couple special cases with more than 4 src args: */
357nir_ssa_def *
358nir_build_alu_src_arr(nir_builder *build, nir_op op, nir_ssa_def **srcs);
359
360/* Generic builder for system values. */
361nir_ssa_def *
362nir_load_system_value(nir_builder *build, nir_intrinsic_op op, int index,
363                      unsigned num_components, unsigned bit_size);
364
365#include "nir_builder_opcodes.h"
366#undef nir_deref_mode_is
367
368static inline nir_ssa_def *
369nir_vec(nir_builder *build, nir_ssa_def **comp, unsigned num_components)
370{
371   return nir_build_alu_src_arr(build, nir_op_vec(num_components), comp);
372}
373
374nir_ssa_def *
375nir_vec_scalars(nir_builder *build, nir_ssa_scalar *comp, unsigned num_components);
376
377static inline nir_ssa_def *
378nir_mov_alu(nir_builder *build, nir_alu_src src, unsigned num_components)
379{
380   assert(!src.abs && !src.negate);
381   if (src.src.is_ssa && src.src.ssa->num_components == num_components) {
382      bool any_swizzles = false;
383      for (unsigned i = 0; i < num_components; i++) {
384         if (src.swizzle[i] != i)
385            any_swizzles = true;
386      }
387      if (!any_swizzles)
388         return src.src.ssa;
389   }
390
391   nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_mov);
392   nir_ssa_dest_init(&mov->instr, &mov->dest.dest, num_components,
393                     nir_src_bit_size(src.src), NULL);
394   mov->exact = build->exact;
395   mov->dest.write_mask = (1 << num_components) - 1;
396   mov->src[0] = src;
397   nir_builder_instr_insert(build, &mov->instr);
398
399   return &mov->dest.dest.ssa;
400}
401
402/**
403 * Construct a mov that reswizzles the source's components.
404 */
405static inline nir_ssa_def *
406nir_swizzle(nir_builder *build, nir_ssa_def *src, const unsigned *swiz,
407            unsigned num_components)
408{
409   assert(num_components <= NIR_MAX_VEC_COMPONENTS);
410   nir_alu_src alu_src = { NIR_SRC_INIT };
411   alu_src.src = nir_src_for_ssa(src);
412
413   bool is_identity_swizzle = true;
414   for (unsigned i = 0; i < num_components && i < NIR_MAX_VEC_COMPONENTS; i++) {
415      if (swiz[i] != i)
416         is_identity_swizzle = false;
417      alu_src.swizzle[i] = swiz[i];
418   }
419
420   if (num_components == src->num_components && is_identity_swizzle)
421      return src;
422
423   return nir_mov_alu(build, alu_src, num_components);
424}
425
426/* Selects the right fdot given the number of components in each source. */
427static inline nir_ssa_def *
428nir_fdot(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1)
429{
430   assert(src0->num_components == src1->num_components);
431   switch (src0->num_components) {
432   case 1: return nir_fmul(build, src0, src1);
433   case 2: return nir_fdot2(build, src0, src1);
434   case 3: return nir_fdot3(build, src0, src1);
435   case 4: return nir_fdot4(build, src0, src1);
436   case 5: return nir_fdot5(build, src0, src1);
437   case 8: return nir_fdot8(build, src0, src1);
438   case 16: return nir_fdot16(build, src0, src1);
439   default:
440      unreachable("bad component size");
441   }
442
443   return NULL;
444}
445
446static inline nir_ssa_def *
447nir_ball_iequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
448{
449   switch (src0->num_components) {
450   case 1: return nir_ieq(b, src0, src1);
451   case 2: return nir_ball_iequal2(b, src0, src1);
452   case 3: return nir_ball_iequal3(b, src0, src1);
453   case 4: return nir_ball_iequal4(b, src0, src1);
454   case 5: return nir_ball_iequal5(b, src0, src1);
455   case 8: return nir_ball_iequal8(b, src0, src1);
456   case 16: return nir_ball_iequal16(b, src0, src1);
457   default:
458      unreachable("bad component size");
459   }
460}
461
462static inline nir_ssa_def *
463nir_ball(nir_builder *b, nir_ssa_def *src)
464{
465   return nir_ball_iequal(b, src, nir_imm_true(b));
466}
467
468static inline nir_ssa_def *
469nir_bany_inequal(nir_builder *b, nir_ssa_def *src0, nir_ssa_def *src1)
470{
471   switch (src0->num_components) {
472   case 1: return nir_ine(b, src0, src1);
473   case 2: return nir_bany_inequal2(b, src0, src1);
474   case 3: return nir_bany_inequal3(b, src0, src1);
475   case 4: return nir_bany_inequal4(b, src0, src1);
476   case 5: return nir_bany_inequal5(b, src0, src1);
477   case 8: return nir_bany_inequal8(b, src0, src1);
478   case 16: return nir_bany_inequal16(b, src0, src1);
479   default:
480      unreachable("bad component size");
481   }
482}
483
484static inline nir_ssa_def *
485nir_bany(nir_builder *b, nir_ssa_def *src)
486{
487   return nir_bany_inequal(b, src, nir_imm_false(b));
488}
489
490static inline nir_ssa_def *
491nir_channel(nir_builder *b, nir_ssa_def *def, unsigned c)
492{
493   return nir_swizzle(b, def, &c, 1);
494}
495
496static inline nir_ssa_def *
497nir_channels(nir_builder *b, nir_ssa_def *def, nir_component_mask_t mask)
498{
499   unsigned num_channels = 0, swizzle[NIR_MAX_VEC_COMPONENTS] = { 0 };
500
501   for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++) {
502      if ((mask & (1 << i)) == 0)
503         continue;
504      swizzle[num_channels++] = i;
505   }
506
507   return nir_swizzle(b, def, swizzle, num_channels);
508}
509
510static inline nir_ssa_def *
511_nir_select_from_array_helper(nir_builder *b, nir_ssa_def **arr,
512                              nir_ssa_def *idx,
513                              unsigned start, unsigned end)
514{
515   if (start == end - 1) {
516      return arr[start];
517   } else {
518      unsigned mid = start + (end - start) / 2;
519      return nir_bcsel(b, nir_ilt(b, idx, nir_imm_intN_t(b, mid, idx->bit_size)),
520                       _nir_select_from_array_helper(b, arr, idx, start, mid),
521                       _nir_select_from_array_helper(b, arr, idx, mid, end));
522   }
523}
524
525static inline nir_ssa_def *
526nir_select_from_ssa_def_array(nir_builder *b, nir_ssa_def **arr,
527                              unsigned arr_len, nir_ssa_def *idx)
528{
529   return _nir_select_from_array_helper(b, arr, idx, 0, arr_len);
530}
531
532static inline nir_ssa_def *
533nir_vector_extract(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *c)
534{
535   nir_src c_src = nir_src_for_ssa(c);
536   if (nir_src_is_const(c_src)) {
537      uint64_t c_const = nir_src_as_uint(c_src);
538      if (c_const < vec->num_components)
539         return nir_channel(b, vec, c_const);
540      else
541         return nir_ssa_undef(b, 1, vec->bit_size);
542   } else {
543      nir_ssa_def *comps[NIR_MAX_VEC_COMPONENTS];
544      for (unsigned i = 0; i < vec->num_components; i++)
545         comps[i] = nir_channel(b, vec, i);
546      return nir_select_from_ssa_def_array(b, comps, vec->num_components, c);
547   }
548}
549
550/** Replaces the component of `vec` specified by `c` with `scalar` */
551static inline nir_ssa_def *
552nir_vector_insert_imm(nir_builder *b, nir_ssa_def *vec,
553                      nir_ssa_def *scalar, unsigned c)
554{
555   assert(scalar->num_components == 1);
556   assert(c < vec->num_components);
557
558   nir_op vec_op = nir_op_vec(vec->num_components);
559   nir_alu_instr *vec_instr = nir_alu_instr_create(b->shader, vec_op);
560
561   for (unsigned i = 0; i < vec->num_components; i++) {
562      if (i == c) {
563         vec_instr->src[i].src = nir_src_for_ssa(scalar);
564         vec_instr->src[i].swizzle[0] = 0;
565      } else {
566         vec_instr->src[i].src = nir_src_for_ssa(vec);
567         vec_instr->src[i].swizzle[0] = i;
568      }
569   }
570
571   return nir_builder_alu_instr_finish_and_insert(b, vec_instr);
572}
573
574/** Replaces the component of `vec` specified by `c` with `scalar` */
575static inline nir_ssa_def *
576nir_vector_insert(nir_builder *b, nir_ssa_def *vec, nir_ssa_def *scalar,
577                  nir_ssa_def *c)
578{
579   assert(scalar->num_components == 1);
580   assert(c->num_components == 1);
581
582   nir_src c_src = nir_src_for_ssa(c);
583   if (nir_src_is_const(c_src)) {
584      uint64_t c_const = nir_src_as_uint(c_src);
585      if (c_const < vec->num_components)
586         return nir_vector_insert_imm(b, vec, scalar, c_const);
587      else
588         return vec;
589   } else {
590      nir_const_value per_comp_idx_const[NIR_MAX_VEC_COMPONENTS];
591      for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
592         per_comp_idx_const[i] = nir_const_value_for_int(i, c->bit_size);
593      nir_ssa_def *per_comp_idx =
594         nir_build_imm(b, vec->num_components,
595                       c->bit_size, per_comp_idx_const);
596
597      /* nir_builder will automatically splat out scalars to vectors so an
598       * insert is as simple as "if I'm the channel, replace me with the
599       * scalar."
600       */
601      return nir_bcsel(b, nir_ieq(b, c, per_comp_idx), scalar, vec);
602   }
603}
604
605static inline nir_ssa_def *
606nir_i2i(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
607{
608   if (x->bit_size == dest_bit_size)
609      return x;
610
611   switch (dest_bit_size) {
612   case 64: return nir_i2i64(build, x);
613   case 32: return nir_i2i32(build, x);
614   case 16: return nir_i2i16(build, x);
615   case 8:  return nir_i2i8(build, x);
616   default: unreachable("Invalid bit size");
617   }
618}
619
620static inline nir_ssa_def *
621nir_u2u(nir_builder *build, nir_ssa_def *x, unsigned dest_bit_size)
622{
623   if (x->bit_size == dest_bit_size)
624      return x;
625
626   switch (dest_bit_size) {
627   case 64: return nir_u2u64(build, x);
628   case 32: return nir_u2u32(build, x);
629   case 16: return nir_u2u16(build, x);
630   case 8:  return nir_u2u8(build, x);
631   default: unreachable("Invalid bit size");
632   }
633}
634
635static inline nir_ssa_def *
636nir_iadd_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
637{
638   assert(x->bit_size <= 64);
639   y &= BITFIELD64_MASK(x->bit_size);
640
641   if (y == 0) {
642      return x;
643   } else {
644      return nir_iadd(build, x, nir_imm_intN_t(build, y, x->bit_size));
645   }
646}
647
648static inline nir_ssa_def *
649nir_iadd_imm_nuw(nir_builder *b, nir_ssa_def *x, uint64_t y)
650{
651   nir_ssa_def *d = nir_iadd_imm(b, x, y);
652   if (d != x && d->parent_instr->type == nir_instr_type_alu)
653      nir_instr_as_alu(d->parent_instr)->no_unsigned_wrap = true;
654   return d;
655}
656
657static inline nir_ssa_def *
658nir_iadd_nuw(nir_builder *b, nir_ssa_def *x, nir_ssa_def *y)
659{
660   nir_ssa_def *d = nir_iadd(b, x, y);
661   nir_instr_as_alu(d->parent_instr)->no_unsigned_wrap = true;
662   return d;
663}
664
665static inline nir_ssa_def *
666nir_ieq_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
667{
668   return nir_ieq(build, x, nir_imm_intN_t(build, y, x->bit_size));
669}
670
671static inline nir_ssa_def *
672nir_ine_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
673{
674  return nir_ine(build, x, nir_imm_intN_t(build, y, x->bit_size));
675}
676
677/* Use nir_iadd(x, -y) for reversing parameter ordering */
678static inline nir_ssa_def *
679nir_isub_imm(nir_builder *build, uint64_t y, nir_ssa_def *x)
680{
681   return nir_isub(build, nir_imm_intN_t(build, y, x->bit_size), x);
682}
683
684static inline nir_ssa_def *
685_nir_mul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y, bool amul)
686{
687   assert(x->bit_size <= 64);
688   y &= BITFIELD64_MASK(x->bit_size);
689
690   if (y == 0) {
691      return nir_imm_intN_t(build, 0, x->bit_size);
692   } else if (y == 1) {
693      return x;
694   } else if (!build->shader->options->lower_bitops &&
695              util_is_power_of_two_or_zero64(y)) {
696      return nir_ishl(build, x, nir_imm_int(build, ffsll(y) - 1));
697   } else if (amul) {
698      return nir_amul(build, x, nir_imm_intN_t(build, y, x->bit_size));
699   } else {
700      return nir_imul(build, x, nir_imm_intN_t(build, y, x->bit_size));
701   }
702}
703
704static inline nir_ssa_def *
705nir_imul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
706{
707   return _nir_mul_imm(build, x, y, false);
708}
709
710static inline nir_ssa_def *
711nir_amul_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
712{
713   return _nir_mul_imm(build, x, y, true);
714}
715
716static inline nir_ssa_def *
717nir_fadd_imm(nir_builder *build, nir_ssa_def *x, double y)
718{
719   return nir_fadd(build, x, nir_imm_floatN_t(build, y, x->bit_size));
720}
721
722static inline nir_ssa_def *
723nir_fmul_imm(nir_builder *build, nir_ssa_def *x, double y)
724{
725   return nir_fmul(build, x, nir_imm_floatN_t(build, y, x->bit_size));
726}
727
728static inline nir_ssa_def *
729nir_iand_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
730{
731   assert(x->bit_size <= 64);
732   y &= BITFIELD64_MASK(x->bit_size);
733
734   if (y == 0) {
735      return nir_imm_intN_t(build, 0, x->bit_size);
736   } else if (y == BITFIELD64_MASK(x->bit_size)) {
737      return x;
738   } else {
739      return nir_iand(build, x, nir_imm_intN_t(build, y, x->bit_size));
740   }
741}
742
743static inline nir_ssa_def *
744nir_test_mask(nir_builder *build, nir_ssa_def *x, uint64_t mask)
745{
746   assert(mask <= BITFIELD64_MASK(x->bit_size));
747   return nir_ine_imm(build, nir_iand_imm(build, x, mask), 0);
748}
749
750static inline nir_ssa_def *
751nir_ior_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
752{
753   assert(x->bit_size <= 64);
754   y &= BITFIELD64_MASK(x->bit_size);
755
756   if (y == 0) {
757      return x;
758   } else if (y == BITFIELD64_MASK(x->bit_size)) {
759      return nir_imm_intN_t(build, y, x->bit_size);
760   } else
761      return nir_ior(build, x, nir_imm_intN_t(build, y, x->bit_size));
762}
763
764static inline nir_ssa_def *
765nir_ishl_imm(nir_builder *build, nir_ssa_def *x, uint32_t y)
766{
767   if (y == 0) {
768      return x;
769   } else if (y >= x->bit_size) {
770      return nir_imm_intN_t(build, 0, x->bit_size);
771   } else {
772      return nir_ishl(build, x, nir_imm_int(build, y));
773   }
774}
775
776static inline nir_ssa_def *
777nir_ishr_imm(nir_builder *build, nir_ssa_def *x, uint32_t y)
778{
779   if (y == 0) {
780      return x;
781   } else {
782      return nir_ishr(build, x, nir_imm_int(build, y));
783   }
784}
785
786static inline nir_ssa_def *
787nir_ushr_imm(nir_builder *build, nir_ssa_def *x, uint32_t y)
788{
789   if (y == 0) {
790      return x;
791   } else {
792      return nir_ushr(build, x, nir_imm_int(build, y));
793   }
794}
795
796static inline nir_ssa_def *
797nir_udiv_imm(nir_builder *build, nir_ssa_def *x, uint64_t y)
798{
799   assert(x->bit_size <= 64);
800   y &= BITFIELD64_MASK(x->bit_size);
801
802   if (y == 1) {
803      return x;
804   } else if (util_is_power_of_two_nonzero(y)) {
805      return nir_ushr_imm(build, x, ffsll(y) - 1);
806   } else {
807      return nir_udiv(build, x, nir_imm_intN_t(build, y, x->bit_size));
808   }
809}
810
811static inline nir_ssa_def *
812nir_ibfe_imm(nir_builder *build, nir_ssa_def *x, uint32_t offset, uint32_t size)
813{
814   return nir_ibfe(build, x, nir_imm_int(build, offset), nir_imm_int(build, size));
815}
816
817static inline nir_ssa_def *
818nir_ubfe_imm(nir_builder *build, nir_ssa_def *x, uint32_t offset, uint32_t size)
819{
820   return nir_ubfe(build, x, nir_imm_int(build, offset), nir_imm_int(build, size));
821}
822
823static inline nir_ssa_def *
824nir_fclamp(nir_builder *b,
825           nir_ssa_def *x, nir_ssa_def *min_val, nir_ssa_def *max_val)
826{
827   return nir_fmin(b, nir_fmax(b, x, min_val), max_val);
828}
829
830static inline nir_ssa_def *
831nir_iclamp(nir_builder *b,
832           nir_ssa_def *x, nir_ssa_def *min_val, nir_ssa_def *max_val)
833{
834   return nir_imin(b, nir_imax(b, x, min_val), max_val);
835}
836
837static inline nir_ssa_def *
838nir_uclamp(nir_builder *b,
839           nir_ssa_def *x, nir_ssa_def *min_val, nir_ssa_def *max_val)
840{
841   return nir_umin(b, nir_umax(b, x, min_val), max_val);
842}
843
844static inline nir_ssa_def *
845nir_ffma_imm12(nir_builder *build, nir_ssa_def *src0, double src1, double src2)
846{
847   if (build->shader->options->avoid_ternary_with_two_constants)
848      return nir_fadd_imm(build, nir_fmul_imm(build, src0, src1), src2);
849   else
850      return nir_ffma(build, src0, nir_imm_floatN_t(build, src1, src0->bit_size),
851                             nir_imm_floatN_t(build, src2, src0->bit_size));
852}
853
854static inline nir_ssa_def *
855nir_ffma_imm1(nir_builder *build, nir_ssa_def *src0, double src1, nir_ssa_def *src2)
856{
857   return nir_ffma(build, src0, nir_imm_floatN_t(build, src1, src0->bit_size), src2);
858}
859
860static inline nir_ssa_def *
861nir_ffma_imm2(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1, double src2)
862{
863   return nir_ffma(build, src0, src1, nir_imm_floatN_t(build, src2, src0->bit_size));
864}
865
866static inline nir_ssa_def *
867nir_a_minus_bc(nir_builder *build, nir_ssa_def *src0, nir_ssa_def *src1,
868               nir_ssa_def *src2)
869{
870   return nir_ffma(build, nir_fneg(build, src1), src2, src0);
871}
872
873static inline nir_ssa_def *
874nir_pack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
875{
876   assert(src->num_components * src->bit_size == dest_bit_size);
877
878   switch (dest_bit_size) {
879   case 64:
880      switch (src->bit_size) {
881      case 32: return nir_pack_64_2x32(b, src);
882      case 16: return nir_pack_64_4x16(b, src);
883      default: break;
884      }
885      break;
886
887   case 32:
888      if (src->bit_size == 16)
889         return nir_pack_32_2x16(b, src);
890      break;
891
892   default:
893      break;
894   }
895
896   /* If we got here, we have no dedicated unpack opcode. */
897   nir_ssa_def *dest = nir_imm_intN_t(b, 0, dest_bit_size);
898   for (unsigned i = 0; i < src->num_components; i++) {
899      nir_ssa_def *val = nir_u2u(b, nir_channel(b, src, i), dest_bit_size);
900      val = nir_ishl(b, val, nir_imm_int(b, i * src->bit_size));
901      dest = nir_ior(b, dest, val);
902   }
903   return dest;
904}
905
906static inline nir_ssa_def *
907nir_unpack_bits(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
908{
909   assert(src->num_components == 1);
910   assert(src->bit_size > dest_bit_size);
911   const unsigned dest_num_components = src->bit_size / dest_bit_size;
912   assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
913
914   switch (src->bit_size) {
915   case 64:
916      switch (dest_bit_size) {
917      case 32: return nir_unpack_64_2x32(b, src);
918      case 16: return nir_unpack_64_4x16(b, src);
919      default: break;
920      }
921      break;
922
923   case 32:
924      if (dest_bit_size == 16)
925         return nir_unpack_32_2x16(b, src);
926      break;
927
928   default:
929      break;
930   }
931
932   /* If we got here, we have no dedicated unpack opcode. */
933   nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
934   for (unsigned i = 0; i < dest_num_components; i++) {
935      nir_ssa_def *val = nir_ushr_imm(b, src, i * dest_bit_size);
936      dest_comps[i] = nir_u2u(b, val, dest_bit_size);
937   }
938   return nir_vec(b, dest_comps, dest_num_components);
939}
940
941/**
942 * Treats srcs as if it's one big blob of bits and extracts the range of bits
943 * given by
944 *
945 *       [first_bit, first_bit + dest_num_components * dest_bit_size)
946 *
947 * The range can have any alignment or size as long as it's an integer number
948 * of destination components and fits inside the concatenated sources.
949 *
950 * TODO: The one caveat here is that we can't handle byte alignment if 64-bit
951 * values are involved because that would require pack/unpack to/from a vec8
952 * which NIR currently does not support.
953 */
954static inline nir_ssa_def *
955nir_extract_bits(nir_builder *b, nir_ssa_def **srcs, unsigned num_srcs,
956                 unsigned first_bit,
957                 unsigned dest_num_components, unsigned dest_bit_size)
958{
959   const unsigned num_bits = dest_num_components * dest_bit_size;
960
961   /* Figure out the common bit size */
962   unsigned common_bit_size = dest_bit_size;
963   for (unsigned i = 0; i < num_srcs; i++)
964      common_bit_size = MIN2(common_bit_size, srcs[i]->bit_size);
965   if (first_bit > 0)
966      common_bit_size = MIN2(common_bit_size, (1u << (ffs(first_bit) - 1)));
967
968   /* We don't want to have to deal with 1-bit values */
969   assert(common_bit_size >= 8);
970
971   nir_ssa_def *common_comps[NIR_MAX_VEC_COMPONENTS * sizeof(uint64_t)];
972   assert(num_bits / common_bit_size <= ARRAY_SIZE(common_comps));
973
974   /* First, unpack to the common bit size and select the components from the
975    * source.
976    */
977   int src_idx = -1;
978   unsigned src_start_bit = 0;
979   unsigned src_end_bit = 0;
980   for (unsigned i = 0; i < num_bits / common_bit_size; i++) {
981      const unsigned bit = first_bit + (i * common_bit_size);
982      while (bit >= src_end_bit) {
983         src_idx++;
984         assert(src_idx < (int) num_srcs);
985         src_start_bit = src_end_bit;
986         src_end_bit += srcs[src_idx]->bit_size *
987                        srcs[src_idx]->num_components;
988      }
989      assert(bit >= src_start_bit);
990      assert(bit + common_bit_size <= src_end_bit);
991      const unsigned rel_bit = bit - src_start_bit;
992      const unsigned src_bit_size = srcs[src_idx]->bit_size;
993
994      nir_ssa_def *comp = nir_channel(b, srcs[src_idx],
995                                      rel_bit / src_bit_size);
996      if (srcs[src_idx]->bit_size > common_bit_size) {
997         nir_ssa_def *unpacked = nir_unpack_bits(b, comp, common_bit_size);
998         comp = nir_channel(b, unpacked, (rel_bit % src_bit_size) /
999                                         common_bit_size);
1000      }
1001      common_comps[i] = comp;
1002   }
1003
1004   /* Now, re-pack the destination if we have to */
1005   if (dest_bit_size > common_bit_size) {
1006      unsigned common_per_dest = dest_bit_size / common_bit_size;
1007      nir_ssa_def *dest_comps[NIR_MAX_VEC_COMPONENTS];
1008      for (unsigned i = 0; i < dest_num_components; i++) {
1009         nir_ssa_def *unpacked = nir_vec(b, common_comps + i * common_per_dest,
1010                                         common_per_dest);
1011         dest_comps[i] = nir_pack_bits(b, unpacked, dest_bit_size);
1012      }
1013      return nir_vec(b, dest_comps, dest_num_components);
1014   } else {
1015      assert(dest_bit_size == common_bit_size);
1016      return nir_vec(b, common_comps, dest_num_components);
1017   }
1018}
1019
1020static inline nir_ssa_def *
1021nir_bitcast_vector(nir_builder *b, nir_ssa_def *src, unsigned dest_bit_size)
1022{
1023   assert((src->bit_size * src->num_components) % dest_bit_size == 0);
1024   const unsigned dest_num_components =
1025      (src->bit_size * src->num_components) / dest_bit_size;
1026   assert(dest_num_components <= NIR_MAX_VEC_COMPONENTS);
1027
1028   return nir_extract_bits(b, &src, 1, 0, dest_num_components, dest_bit_size);
1029}
1030
1031static inline nir_ssa_def *
1032nir_trim_vector(nir_builder *b, nir_ssa_def *src, unsigned num_components)
1033{
1034   assert(src->num_components >= num_components);
1035   if (src->num_components == num_components)
1036      return src;
1037
1038   return nir_channels(b, src, nir_component_mask(num_components));
1039}
1040
1041/**
1042 * Pad a value to N components with undefs of matching bit size.
1043 * If the value already contains >= num_components, it is returned without change.
1044 */
1045static inline nir_ssa_def *
1046nir_pad_vector(nir_builder *b, nir_ssa_def *src, unsigned num_components)
1047{
1048   assert(src->num_components <= num_components);
1049   if (src->num_components == num_components)
1050      return src;
1051
1052   nir_ssa_scalar components[NIR_MAX_VEC_COMPONENTS];
1053   nir_ssa_scalar undef = nir_get_ssa_scalar(nir_ssa_undef(b, 1, src->bit_size), 0);
1054   unsigned i = 0;
1055   for (; i < src->num_components; i++)
1056      components[i] = nir_get_ssa_scalar(src, i);
1057   for (; i < num_components; i++)
1058      components[i] = undef;
1059
1060   return nir_vec_scalars(b, components, num_components);
1061}
1062
1063/**
1064 * Pad a value to N components with copies of the given immediate of matching
1065 * bit size. If the value already contains >= num_components, it is returned
1066 * without change.
1067 */
1068static inline nir_ssa_def *
1069nir_pad_vector_imm_int(nir_builder *b, nir_ssa_def *src, uint64_t imm_val,
1070                       unsigned num_components)
1071{
1072   assert(src->num_components <= num_components);
1073   if (src->num_components == num_components)
1074      return src;
1075
1076   nir_ssa_scalar components[NIR_MAX_VEC_COMPONENTS];
1077   nir_ssa_scalar imm = nir_get_ssa_scalar(nir_imm_intN_t(b, imm_val, src->bit_size), 0);
1078   unsigned i = 0;
1079   for (; i < src->num_components; i++)
1080      components[i] = nir_get_ssa_scalar(src, i);
1081   for (; i < num_components; i++)
1082      components[i] = imm;
1083
1084   return nir_vec_scalars(b, components, num_components);
1085}
1086
1087/**
1088 * Pad a value to 4 components with undefs of matching bit size.
1089 * If the value already contains >= 4 components, it is returned without change.
1090 */
1091static inline nir_ssa_def *
1092nir_pad_vec4(nir_builder *b, nir_ssa_def *src)
1093{
1094   return nir_pad_vector(b, src, 4);
1095}
1096
1097/**
1098 * Resizes a vector by either trimming off components or adding undef
1099 * components, as needed.  Only use this helper if it's actually what you
1100 * need.  Prefer nir_pad_vector() or nir_trim_vector() instead if you know a
1101 * priori which direction you're resizing.
1102 */
1103static inline nir_ssa_def *
1104nir_resize_vector(nir_builder *b, nir_ssa_def *src, unsigned num_components)
1105{
1106   if (src->num_components < num_components)
1107      return nir_pad_vector(b, src, num_components);
1108   else
1109      return nir_trim_vector(b, src, num_components);
1110}
1111
1112nir_ssa_def *
1113nir_ssa_for_src(nir_builder *build, nir_src src, int num_components);
1114
1115nir_ssa_def *
1116nir_ssa_for_alu_src(nir_builder *build, nir_alu_instr *instr, unsigned srcn);
1117
1118static inline unsigned
1119nir_get_ptr_bitsize(nir_shader *shader)
1120{
1121   if (shader->info.stage == MESA_SHADER_KERNEL)
1122      return shader->info.cs.ptr_size;
1123   return 32;
1124}
1125
1126static inline nir_deref_instr *
1127nir_build_deref_var(nir_builder *build, nir_variable *var)
1128{
1129   nir_deref_instr *deref =
1130      nir_deref_instr_create(build->shader, nir_deref_type_var);
1131
1132   deref->modes = (nir_variable_mode)var->data.mode;
1133   deref->type = var->type;
1134   deref->var = var;
1135
1136   nir_ssa_dest_init(&deref->instr, &deref->dest, 1,
1137                     nir_get_ptr_bitsize(build->shader), NULL);
1138
1139   nir_builder_instr_insert(build, &deref->instr);
1140
1141   return deref;
1142}
1143
1144static inline nir_deref_instr *
1145nir_build_deref_array(nir_builder *build, nir_deref_instr *parent,
1146                      nir_ssa_def *index)
1147{
1148   assert(glsl_type_is_array(parent->type) ||
1149          glsl_type_is_matrix(parent->type) ||
1150          glsl_type_is_vector(parent->type));
1151
1152   assert(index->bit_size == parent->dest.ssa.bit_size);
1153
1154   nir_deref_instr *deref =
1155      nir_deref_instr_create(build->shader, nir_deref_type_array);
1156
1157   deref->modes = parent->modes;
1158   deref->type = glsl_get_array_element(parent->type);
1159   deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1160   deref->arr.index = nir_src_for_ssa(index);
1161
1162   nir_ssa_dest_init(&deref->instr, &deref->dest,
1163                     parent->dest.ssa.num_components,
1164                     parent->dest.ssa.bit_size, NULL);
1165
1166   nir_builder_instr_insert(build, &deref->instr);
1167
1168   return deref;
1169}
1170
1171static inline nir_deref_instr *
1172nir_build_deref_array_imm(nir_builder *build, nir_deref_instr *parent,
1173                          int64_t index)
1174{
1175   assert(parent->dest.is_ssa);
1176   nir_ssa_def *idx_ssa = nir_imm_intN_t(build, index,
1177                                         parent->dest.ssa.bit_size);
1178
1179   return nir_build_deref_array(build, parent, idx_ssa);
1180}
1181
1182static inline nir_deref_instr *
1183nir_build_deref_ptr_as_array(nir_builder *build, nir_deref_instr *parent,
1184                             nir_ssa_def *index)
1185{
1186   assert(parent->deref_type == nir_deref_type_array ||
1187          parent->deref_type == nir_deref_type_ptr_as_array ||
1188          parent->deref_type == nir_deref_type_cast);
1189
1190   assert(index->bit_size == parent->dest.ssa.bit_size);
1191
1192   nir_deref_instr *deref =
1193      nir_deref_instr_create(build->shader, nir_deref_type_ptr_as_array);
1194
1195   deref->modes = parent->modes;
1196   deref->type = parent->type;
1197   deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1198   deref->arr.index = nir_src_for_ssa(index);
1199
1200   nir_ssa_dest_init(&deref->instr, &deref->dest,
1201                     parent->dest.ssa.num_components,
1202                     parent->dest.ssa.bit_size, NULL);
1203
1204   nir_builder_instr_insert(build, &deref->instr);
1205
1206   return deref;
1207}
1208
1209static inline nir_deref_instr *
1210nir_build_deref_array_wildcard(nir_builder *build, nir_deref_instr *parent)
1211{
1212   assert(glsl_type_is_array(parent->type) ||
1213          glsl_type_is_matrix(parent->type));
1214
1215   nir_deref_instr *deref =
1216      nir_deref_instr_create(build->shader, nir_deref_type_array_wildcard);
1217
1218   deref->modes = parent->modes;
1219   deref->type = glsl_get_array_element(parent->type);
1220   deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1221
1222   nir_ssa_dest_init(&deref->instr, &deref->dest,
1223                     parent->dest.ssa.num_components,
1224                     parent->dest.ssa.bit_size, NULL);
1225
1226   nir_builder_instr_insert(build, &deref->instr);
1227
1228   return deref;
1229}
1230
1231static inline nir_deref_instr *
1232nir_build_deref_struct(nir_builder *build, nir_deref_instr *parent,
1233                       unsigned index)
1234{
1235   assert(glsl_type_is_struct_or_ifc(parent->type));
1236
1237   nir_deref_instr *deref =
1238      nir_deref_instr_create(build->shader, nir_deref_type_struct);
1239
1240   deref->modes = parent->modes;
1241   deref->type = glsl_get_struct_field(parent->type, index);
1242   deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1243   deref->strct.index = index;
1244
1245   nir_ssa_dest_init(&deref->instr, &deref->dest,
1246                     parent->dest.ssa.num_components,
1247                     parent->dest.ssa.bit_size, NULL);
1248
1249   nir_builder_instr_insert(build, &deref->instr);
1250
1251   return deref;
1252}
1253
1254static inline nir_deref_instr *
1255nir_build_deref_cast(nir_builder *build, nir_ssa_def *parent,
1256                     nir_variable_mode modes, const struct glsl_type *type,
1257                     unsigned ptr_stride)
1258{
1259   nir_deref_instr *deref =
1260      nir_deref_instr_create(build->shader, nir_deref_type_cast);
1261
1262   deref->modes = modes;
1263   deref->type = type;
1264   deref->parent = nir_src_for_ssa(parent);
1265   deref->cast.ptr_stride = ptr_stride;
1266
1267   nir_ssa_dest_init(&deref->instr, &deref->dest,
1268                     parent->num_components, parent->bit_size, NULL);
1269
1270   nir_builder_instr_insert(build, &deref->instr);
1271
1272   return deref;
1273}
1274
1275static inline nir_deref_instr *
1276nir_alignment_deref_cast(nir_builder *build, nir_deref_instr *parent,
1277                         uint32_t align_mul, uint32_t align_offset)
1278{
1279   nir_deref_instr *deref =
1280      nir_deref_instr_create(build->shader, nir_deref_type_cast);
1281
1282   deref->modes = parent->modes;
1283   deref->type = parent->type;
1284   deref->parent = nir_src_for_ssa(&parent->dest.ssa);
1285   deref->cast.ptr_stride = nir_deref_instr_array_stride(deref);
1286   deref->cast.align_mul = align_mul;
1287   deref->cast.align_offset = align_offset;
1288
1289   nir_ssa_dest_init(&deref->instr, &deref->dest,
1290                     parent->dest.ssa.num_components,
1291                     parent->dest.ssa.bit_size, NULL);
1292
1293   nir_builder_instr_insert(build, &deref->instr);
1294
1295   return deref;
1296}
1297
1298/** Returns a deref that follows another but starting from the given parent
1299 *
1300 * The new deref will be the same type and take the same array or struct index
1301 * as the leader deref but it may have a different parent.  This is very
1302 * useful for walking deref paths.
1303 */
1304static inline nir_deref_instr *
1305nir_build_deref_follower(nir_builder *b, nir_deref_instr *parent,
1306                         nir_deref_instr *leader)
1307{
1308   /* If the derefs would have the same parent, don't make a new one */
1309   assert(leader->parent.is_ssa);
1310   if (leader->parent.ssa == &parent->dest.ssa)
1311      return leader;
1312
1313   UNUSED nir_deref_instr *leader_parent = nir_src_as_deref(leader->parent);
1314
1315   switch (leader->deref_type) {
1316   case nir_deref_type_var:
1317      unreachable("A var dereference cannot have a parent");
1318      break;
1319
1320   case nir_deref_type_array:
1321   case nir_deref_type_array_wildcard:
1322      assert(glsl_type_is_matrix(parent->type) ||
1323             glsl_type_is_array(parent->type) ||
1324             (leader->deref_type == nir_deref_type_array &&
1325              glsl_type_is_vector(parent->type)));
1326      assert(glsl_get_length(parent->type) ==
1327             glsl_get_length(leader_parent->type));
1328
1329      if (leader->deref_type == nir_deref_type_array) {
1330         assert(leader->arr.index.is_ssa);
1331         nir_ssa_def *index = nir_i2i(b, leader->arr.index.ssa,
1332                                         parent->dest.ssa.bit_size);
1333         return nir_build_deref_array(b, parent, index);
1334      } else {
1335         return nir_build_deref_array_wildcard(b, parent);
1336      }
1337
1338   case nir_deref_type_struct:
1339      assert(glsl_type_is_struct_or_ifc(parent->type));
1340      assert(glsl_get_length(parent->type) ==
1341             glsl_get_length(leader_parent->type));
1342
1343      return nir_build_deref_struct(b, parent, leader->strct.index);
1344
1345   default:
1346      unreachable("Invalid deref instruction type");
1347   }
1348}
1349
1350static inline nir_ssa_def *
1351nir_load_reg(nir_builder *build, nir_register *reg)
1352{
1353   return nir_ssa_for_src(build, nir_src_for_reg(reg), reg->num_components);
1354}
1355
1356static inline void
1357nir_store_reg(nir_builder *build, nir_register *reg,
1358              nir_ssa_def *def, nir_component_mask_t write_mask)
1359{
1360   assert(reg->num_components == def->num_components);
1361   assert(reg->bit_size == def->bit_size);
1362
1363   nir_alu_instr *mov = nir_alu_instr_create(build->shader, nir_op_mov);
1364   mov->src[0].src = nir_src_for_ssa(def);
1365   mov->dest.dest = nir_dest_for_reg(reg);
1366   mov->dest.write_mask = write_mask & BITFIELD_MASK(reg->num_components);
1367   nir_builder_instr_insert(build, &mov->instr);
1368}
1369
1370static inline nir_ssa_def *
1371nir_load_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1372                           enum gl_access_qualifier access)
1373{
1374   return nir_build_load_deref(build, glsl_get_vector_elements(deref->type),
1375                               glsl_get_bit_size(deref->type), &deref->dest.ssa,
1376                               access);
1377}
1378
1379#undef nir_load_deref
1380static inline nir_ssa_def *
1381nir_load_deref(nir_builder *build, nir_deref_instr *deref)
1382{
1383   return nir_load_deref_with_access(build, deref, (enum gl_access_qualifier)0);
1384}
1385
1386static inline void
1387nir_store_deref_with_access(nir_builder *build, nir_deref_instr *deref,
1388                            nir_ssa_def *value, unsigned writemask,
1389                            enum gl_access_qualifier access)
1390{
1391   writemask &= (1u << value->num_components) - 1u;
1392   nir_build_store_deref(build, &deref->dest.ssa, value, writemask, access);
1393}
1394
1395#undef nir_store_deref
1396static inline void
1397nir_store_deref(nir_builder *build, nir_deref_instr *deref,
1398                nir_ssa_def *value, unsigned writemask)
1399{
1400   nir_store_deref_with_access(build, deref, value, writemask,
1401                               (enum gl_access_qualifier)0);
1402}
1403
1404static inline void
1405nir_copy_deref_with_access(nir_builder *build, nir_deref_instr *dest,
1406                           nir_deref_instr *src,
1407                           enum gl_access_qualifier dest_access,
1408                           enum gl_access_qualifier src_access)
1409{
1410   nir_build_copy_deref(build, &dest->dest.ssa, &src->dest.ssa, dest_access, src_access);
1411}
1412
1413#undef nir_copy_deref
1414static inline void
1415nir_copy_deref(nir_builder *build, nir_deref_instr *dest, nir_deref_instr *src)
1416{
1417   nir_copy_deref_with_access(build, dest, src,
1418                              (enum gl_access_qualifier) 0,
1419                              (enum gl_access_qualifier) 0);
1420}
1421
1422static inline void
1423nir_memcpy_deref_with_access(nir_builder *build, nir_deref_instr *dest,
1424                             nir_deref_instr *src, nir_ssa_def *size,
1425                             enum gl_access_qualifier dest_access,
1426                             enum gl_access_qualifier src_access)
1427{
1428   nir_build_memcpy_deref(build, &dest->dest.ssa, &src->dest.ssa,
1429                          size, dest_access, src_access);
1430}
1431
1432#undef nir_memcpy_deref
1433static inline void
1434nir_memcpy_deref(nir_builder *build, nir_deref_instr *dest,
1435                 nir_deref_instr *src, nir_ssa_def *size)
1436{
1437   nir_memcpy_deref_with_access(build, dest, src, size,
1438                                (enum gl_access_qualifier)0,
1439                                (enum gl_access_qualifier)0);
1440}
1441
1442static inline nir_ssa_def *
1443nir_load_var(nir_builder *build, nir_variable *var)
1444{
1445   return nir_load_deref(build, nir_build_deref_var(build, var));
1446}
1447
1448static inline void
1449nir_store_var(nir_builder *build, nir_variable *var, nir_ssa_def *value,
1450              unsigned writemask)
1451{
1452   nir_store_deref(build, nir_build_deref_var(build, var), value, writemask);
1453}
1454
1455static inline void
1456nir_copy_var(nir_builder *build, nir_variable *dest, nir_variable *src)
1457{
1458   nir_copy_deref(build, nir_build_deref_var(build, dest),
1459                         nir_build_deref_var(build, src));
1460}
1461
1462static inline nir_ssa_def *
1463nir_load_array_var(nir_builder *build, nir_variable *var, nir_ssa_def *index)
1464{
1465   nir_deref_instr *deref =
1466      nir_build_deref_array(build, nir_build_deref_var(build, var), index);
1467   return nir_load_deref(build, deref);
1468}
1469
1470static inline nir_ssa_def *
1471nir_load_array_var_imm(nir_builder *build, nir_variable *var, int64_t index)
1472{
1473   nir_deref_instr *deref =
1474      nir_build_deref_array_imm(build, nir_build_deref_var(build, var), index);
1475   return nir_load_deref(build, deref);
1476}
1477
1478static inline void
1479nir_store_array_var(nir_builder *build, nir_variable *var, nir_ssa_def *index,
1480                    nir_ssa_def *value, unsigned writemask)
1481{
1482   nir_deref_instr *deref =
1483      nir_build_deref_array(build, nir_build_deref_var(build, var), index);
1484   nir_store_deref(build, deref, value, writemask);
1485}
1486
1487static inline void
1488nir_store_array_var_imm(nir_builder *build, nir_variable *var, int64_t index,
1489                        nir_ssa_def *value, unsigned writemask)
1490{
1491   nir_deref_instr *deref =
1492      nir_build_deref_array_imm(build, nir_build_deref_var(build, var), index);
1493   nir_store_deref(build, deref, value, writemask);
1494}
1495
1496#undef nir_load_global
1497static inline nir_ssa_def *
1498nir_load_global(nir_builder *build, nir_ssa_def *addr, unsigned align,
1499                unsigned num_components, unsigned bit_size)
1500{
1501   nir_intrinsic_instr *load =
1502      nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_global);
1503   load->num_components = num_components;
1504   load->src[0] = nir_src_for_ssa(addr);
1505   nir_intrinsic_set_align(load, align, 0);
1506   nir_ssa_dest_init(&load->instr, &load->dest,
1507                     num_components, bit_size, NULL);
1508   nir_builder_instr_insert(build, &load->instr);
1509   return &load->dest.ssa;
1510}
1511
1512#undef nir_store_global
1513static inline void
1514nir_store_global(nir_builder *build, nir_ssa_def *addr, unsigned align,
1515                 nir_ssa_def *value, nir_component_mask_t write_mask)
1516{
1517   nir_intrinsic_instr *store =
1518      nir_intrinsic_instr_create(build->shader, nir_intrinsic_store_global);
1519   store->num_components = value->num_components;
1520   store->src[0] = nir_src_for_ssa(value);
1521   store->src[1] = nir_src_for_ssa(addr);
1522   nir_intrinsic_set_write_mask(store,
1523      write_mask & BITFIELD_MASK(value->num_components));
1524   nir_intrinsic_set_align(store, align, 0);
1525   nir_builder_instr_insert(build, &store->instr);
1526}
1527
1528#undef nir_load_global_constant
1529static inline nir_ssa_def *
1530nir_load_global_constant(nir_builder *build, nir_ssa_def *addr, unsigned align,
1531                         unsigned num_components, unsigned bit_size)
1532{
1533   nir_intrinsic_instr *load =
1534      nir_intrinsic_instr_create(build->shader, nir_intrinsic_load_global_constant);
1535   load->num_components = num_components;
1536   load->src[0] = nir_src_for_ssa(addr);
1537   nir_intrinsic_set_align(load, align, 0);
1538   nir_ssa_dest_init(&load->instr, &load->dest,
1539                     num_components, bit_size, NULL);
1540   nir_builder_instr_insert(build, &load->instr);
1541   return &load->dest.ssa;
1542}
1543
1544#undef nir_load_param
1545static inline nir_ssa_def *
1546nir_load_param(nir_builder *build, uint32_t param_idx)
1547{
1548   assert(param_idx < build->impl->function->num_params);
1549   nir_parameter *param = &build->impl->function->params[param_idx];
1550   return nir_build_load_param(build, param->num_components, param->bit_size, param_idx);
1551}
1552
1553/* calculate a `(1 << value) - 1` in ssa without overflows */
1554static inline nir_ssa_def *
1555nir_mask(nir_builder *b, nir_ssa_def *bits, unsigned dst_bit_size)
1556{
1557   return nir_ushr(b, nir_imm_intN_t(b, -1, dst_bit_size),
1558                      nir_isub_imm(b, dst_bit_size, nir_u2u32(b, bits)));
1559}
1560
1561static inline nir_ssa_def *
1562nir_f2b(nir_builder *build, nir_ssa_def *f)
1563{
1564   return nir_f2b1(build, f);
1565}
1566
1567static inline nir_ssa_def *
1568nir_i2b(nir_builder *build, nir_ssa_def *i)
1569{
1570   return nir_i2b1(build, i);
1571}
1572
1573static inline nir_ssa_def *
1574nir_b2f(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1575{
1576   switch (bit_size) {
1577   case 64: return nir_b2f64(build, b);
1578   case 32: return nir_b2f32(build, b);
1579   case 16: return nir_b2f16(build, b);
1580   default:
1581      unreachable("Invalid bit-size");
1582   };
1583}
1584
1585static inline nir_ssa_def *
1586nir_b2i(nir_builder *build, nir_ssa_def *b, uint32_t bit_size)
1587{
1588   switch (bit_size) {
1589   case 64: return nir_b2i64(build, b);
1590   case 32: return nir_b2i32(build, b);
1591   case 16: return nir_b2i16(build, b);
1592   case 8:  return nir_b2i8(build, b);
1593   default:
1594      unreachable("Invalid bit-size");
1595   };
1596}
1597static inline nir_ssa_def *
1598nir_load_barycentric(nir_builder *build, nir_intrinsic_op op,
1599                     unsigned interp_mode)
1600{
1601   unsigned num_components = op == nir_intrinsic_load_barycentric_model ? 3 : 2;
1602   nir_intrinsic_instr *bary = nir_intrinsic_instr_create(build->shader, op);
1603   nir_ssa_dest_init(&bary->instr, &bary->dest, num_components, 32, NULL);
1604   nir_intrinsic_set_interp_mode(bary, interp_mode);
1605   nir_builder_instr_insert(build, &bary->instr);
1606   return &bary->dest.ssa;
1607}
1608
1609static inline void
1610nir_jump(nir_builder *build, nir_jump_type jump_type)
1611{
1612   assert(jump_type != nir_jump_goto && jump_type != nir_jump_goto_if);
1613   nir_jump_instr *jump = nir_jump_instr_create(build->shader, jump_type);
1614   nir_builder_instr_insert(build, &jump->instr);
1615}
1616
1617static inline void
1618nir_goto(nir_builder *build, struct nir_block *target)
1619{
1620   assert(!build->impl->structured);
1621   nir_jump_instr *jump = nir_jump_instr_create(build->shader, nir_jump_goto);
1622   jump->target = target;
1623   nir_builder_instr_insert(build, &jump->instr);
1624}
1625
1626static inline void
1627nir_goto_if(nir_builder *build, struct nir_block *target, nir_src cond,
1628            struct nir_block *else_target)
1629{
1630   assert(!build->impl->structured);
1631   nir_jump_instr *jump = nir_jump_instr_create(build->shader, nir_jump_goto_if);
1632   jump->condition = cond;
1633   jump->target = target;
1634   jump->else_target = else_target;
1635   nir_builder_instr_insert(build, &jump->instr);
1636}
1637
1638nir_ssa_def *
1639nir_compare_func(nir_builder *b, enum compare_func func,
1640                 nir_ssa_def *src0, nir_ssa_def *src1);
1641
1642static inline void
1643nir_scoped_memory_barrier(nir_builder *b,
1644                          nir_scope scope,
1645                          nir_memory_semantics semantics,
1646                          nir_variable_mode modes)
1647{
1648   nir_scoped_barrier(b, NIR_SCOPE_NONE, scope, semantics, modes);
1649}
1650
1651nir_ssa_def *
1652nir_type_convert(nir_builder *b,
1653                 nir_ssa_def *src,
1654                 nir_alu_type src_type,
1655                 nir_alu_type dest_type);
1656
1657
1658static inline nir_ssa_def *
1659nir_convert_to_bit_size(nir_builder *b,
1660                    nir_ssa_def *src,
1661                    nir_alu_type type,
1662                    unsigned bit_size)
1663{
1664   return nir_type_convert(b, src, type, (nir_alu_type) (type | bit_size));
1665}
1666
1667static inline nir_ssa_def *
1668nir_i2iN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1669{
1670   return nir_convert_to_bit_size(b, src, nir_type_int, bit_size);
1671}
1672
1673static inline nir_ssa_def *
1674nir_u2uN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1675{
1676   return nir_convert_to_bit_size(b, src, nir_type_uint, bit_size);
1677}
1678
1679static inline nir_ssa_def *
1680nir_b2bN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1681{
1682   return nir_convert_to_bit_size(b, src, nir_type_bool, bit_size);
1683}
1684
1685static inline nir_ssa_def *
1686nir_f2fN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1687{
1688   return nir_convert_to_bit_size(b, src, nir_type_float, bit_size);
1689}
1690
1691static inline nir_ssa_def *
1692nir_i2fN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1693{
1694   return nir_type_convert(b, src, nir_type_int,
1695         (nir_alu_type) (nir_type_float | bit_size));
1696}
1697
1698static inline nir_ssa_def *
1699nir_u2fN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1700{
1701   return nir_type_convert(b, src, nir_type_uint,
1702         (nir_alu_type) (nir_type_float | bit_size));
1703}
1704
1705static inline nir_ssa_def *
1706nir_f2uN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1707{
1708   return nir_type_convert(b, src, nir_type_float,
1709         (nir_alu_type) (nir_type_uint | bit_size));
1710}
1711
1712static inline nir_ssa_def *
1713nir_f2iN(nir_builder *b, nir_ssa_def *src, unsigned bit_size)
1714{
1715   return nir_type_convert(b, src, nir_type_float,
1716         (nir_alu_type) (nir_type_int | bit_size));
1717}
1718
1719nir_ssa_def *
1720nir_gen_rect_vertices(nir_builder *b, nir_ssa_def *z, nir_ssa_def *w);
1721
1722#ifdef __cplusplus
1723} /* extern "C" */
1724#endif
1725
1726#endif /* NIR_BUILDER_H */
1727