1/*
2 * Copyright © 2019 Valve Corporation.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#ifndef RADV_SHADER_ARGS_H
25#define RADV_SHADER_ARGS_H
26
27#include "compiler/shader_enums.h"
28#include "util/list.h"
29#include "util/macros.h"
30#include "ac_shader_args.h"
31#include "amd_family.h"
32#include "radv_constants.h"
33#include "radv_shader.h"
34
35struct radv_shader_args {
36   struct ac_shader_args ac;
37
38   struct ac_arg descriptor_sets[MAX_SETS];
39   /* User data 0/1. GFX: descriptor list, Compute: scratch BO */
40   struct ac_arg ring_offsets;
41   /* User data 2/3. same as the descriptor list above but for task shaders. */
42   struct ac_arg task_ring_offsets;
43
44   /* Streamout */
45   struct ac_arg streamout_buffers;
46
47   /* NGG */
48   struct ac_arg ngg_query_state;
49
50   /* NGG GS */
51   struct ac_arg ngg_culling_settings;
52   struct ac_arg ngg_viewport_scale[2];
53   struct ac_arg ngg_viewport_translate[2];
54
55   /* Task shaders */
56   struct ac_arg task_ib_addr;
57   struct ac_arg task_ib_stride;
58
59   /* Fragment shaders */
60   struct ac_arg ps_epilog_pc;
61
62   struct ac_arg prolog_inputs;
63   struct ac_arg vs_inputs[MAX_VERTEX_ATTRIBS];
64
65   /* PS epilogs */
66   struct ac_arg ps_epilog_inputs[MAX_RTS];
67
68   struct radv_userdata_locations user_sgprs_locs;
69   unsigned num_user_sgprs;
70
71   bool explicit_scratch_args;
72   bool remap_spi_ps_input;
73   bool load_grid_size_from_user_sgpr;
74   bool is_gs_copy_shader;
75   bool is_trap_handler_shader;
76};
77
78static inline struct radv_shader_args *
79radv_shader_args_from_ac(struct ac_shader_args *args)
80{
81   return container_of(args, struct radv_shader_args, ac);
82}
83
84struct radv_pipeline_key;
85struct radv_shader_info;
86
87void radv_declare_shader_args(enum amd_gfx_level gfx_level, const struct radv_pipeline_key *key,
88                              const struct radv_shader_info *info, gl_shader_stage stage,
89                              bool has_previous_stage, gl_shader_stage previous_stage,
90                              struct radv_shader_args *args);
91
92void radv_declare_ps_epilog_args(enum amd_gfx_level gfx_level, const struct radv_ps_epilog_key *key,
93                                 struct radv_shader_args *args);
94
95#endif
96