xref: /third_party/mesa3d/src/amd/vulkan/radv_debug.h (revision bf215546)
1/*
2 * Copyright © 2017 Google.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24#ifndef RADV_DEBUG_H
25#define RADV_DEBUG_H
26
27#include "radv_private.h"
28
29/* Please keep docs/envvars.rst up-to-date when you add/remove options. */
30enum {
31   RADV_DEBUG_NO_FAST_CLEARS = 1ull << 0,
32   RADV_DEBUG_NO_DCC = 1ull << 1,
33   RADV_DEBUG_DUMP_SHADERS = 1ull << 2,
34   RADV_DEBUG_NO_CACHE = 1ull << 3,
35   RADV_DEBUG_DUMP_SHADER_STATS = 1ull << 4,
36   RADV_DEBUG_NO_HIZ = 1ull << 5,
37   RADV_DEBUG_NO_COMPUTE_QUEUE = 1ull << 6,
38   RADV_DEBUG_ALL_BOS = 1ull << 7,
39   RADV_DEBUG_NO_IBS = 1ull << 8,
40   RADV_DEBUG_DUMP_SPIRV = 1ull << 9,
41   RADV_DEBUG_VM_FAULTS = 1ull << 10,
42   RADV_DEBUG_ZERO_VRAM = 1ull << 11,
43   RADV_DEBUG_SYNC_SHADERS = 1ull << 12,
44   RADV_DEBUG_PREOPTIR = 1ull << 13,
45   RADV_DEBUG_NO_DYNAMIC_BOUNDS = 1ull << 14,
46   RADV_DEBUG_NO_OUT_OF_ORDER = 1ull << 15,
47   RADV_DEBUG_INFO = 1ull << 16,
48   RADV_DEBUG_STARTUP = 1ull << 17,
49   RADV_DEBUG_CHECKIR = 1ull << 18,
50   RADV_DEBUG_NOBINNING = 1ull << 19,
51   RADV_DEBUG_NO_NGG = 1ull << 20,
52   RADV_DEBUG_DUMP_META_SHADERS = 1ull << 21,
53   RADV_DEBUG_NO_MEMORY_CACHE = 1ull << 22,
54   RADV_DEBUG_DISCARD_TO_DEMOTE = 1ull << 23,
55   RADV_DEBUG_LLVM = 1ull << 24,
56   RADV_DEBUG_FORCE_COMPRESS = 1ull << 25,
57   RADV_DEBUG_HANG = 1ull << 26,
58   RADV_DEBUG_IMG = 1ull << 27,
59   RADV_DEBUG_NO_UMR = 1ull << 28,
60   RADV_DEBUG_INVARIANT_GEOM = 1ull << 29,
61   RADV_DEBUG_NO_DISPLAY_DCC = 1ull << 30,
62   RADV_DEBUG_NO_TC_COMPAT_CMASK = 1ull << 31,
63   RADV_DEBUG_NO_VRS_FLAT_SHADING = 1ull << 32,
64   RADV_DEBUG_NO_ATOC_DITHERING = 1ull << 33,
65   RADV_DEBUG_NO_NGGC = 1ull << 34,
66   RADV_DEBUG_DUMP_PROLOGS = 1ull << 35,
67   RADV_DEBUG_NO_DMA_BLIT = 1ull << 36,
68   RADV_DEBUG_SPLIT_FMA = 1ull << 37,
69   RADV_DEBUG_DUMP_EPILOGS = 1ull << 38,
70};
71
72enum {
73   RADV_PERFTEST_LOCAL_BOS = 1u << 0,
74   RADV_PERFTEST_DCC_MSAA = 1u << 1,
75   RADV_PERFTEST_BO_LIST = 1u << 2,
76   RADV_PERFTEST_CS_WAVE_32 = 1u << 3,
77   RADV_PERFTEST_PS_WAVE_32 = 1u << 4,
78   RADV_PERFTEST_GE_WAVE_32 = 1u << 5,
79   RADV_PERFTEST_NO_SAM = 1u << 6,
80   RADV_PERFTEST_SAM = 1u << 7,
81   RADV_PERFTEST_RT = 1u << 8,
82   RADV_PERFTEST_NGGC = 1u << 9,
83   RADV_PERFTEST_EMULATE_RT = 1u << 10,
84   RADV_PERFTEST_NV_MS = 1u << 11,
85   RADV_PERFTEST_RT_WAVE_64 = 1u << 12,
86};
87
88bool radv_init_trace(struct radv_device *device);
89void radv_finish_trace(struct radv_device *device);
90
91void radv_check_gpu_hangs(struct radv_queue *queue, struct radeon_cmdbuf *cs);
92
93void radv_print_spirv(const char *data, uint32_t size, FILE *fp);
94
95void radv_dump_enabled_options(struct radv_device *device, FILE *f);
96
97bool radv_trap_handler_init(struct radv_device *device);
98void radv_trap_handler_finish(struct radv_device *device);
99void radv_check_trap_handler(struct radv_queue *queue);
100
101#endif
102