xref: /third_party/mesa3d/src/amd/registers/gfx9.json (revision bf215546) 
1{
2 "enums": {
3  "ArrayMode": {
4   "entries": [
5    {"name": "ARRAY_LINEAR_GENERAL", "value": 0},
6    {"name": "ARRAY_LINEAR_ALIGNED", "value": 1},
7    {"name": "ARRAY_1D_TILED_THIN1", "value": 2},
8    {"name": "ARRAY_1D_TILED_THICK", "value": 3},
9    {"name": "ARRAY_2D_TILED_THIN1", "value": 4},
10    {"name": "ARRAY_PRT_TILED_THIN1", "value": 5},
11    {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6},
12    {"name": "ARRAY_2D_TILED_THICK", "value": 7},
13    {"name": "ARRAY_2D_TILED_XTHICK", "value": 8},
14    {"name": "ARRAY_PRT_TILED_THICK", "value": 9},
15    {"name": "ARRAY_PRT_2D_TILED_THICK", "value": 10},
16    {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11},
17    {"name": "ARRAY_3D_TILED_THIN1", "value": 12},
18    {"name": "ARRAY_3D_TILED_THICK", "value": 13},
19    {"name": "ARRAY_3D_TILED_XTHICK", "value": 14},
20    {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15}
21   ]
22  },
23  "BUF_DATA_FORMAT": {
24   "entries": [
25    {"name": "BUF_DATA_FORMAT_INVALID", "value": 0},
26    {"name": "BUF_DATA_FORMAT_8", "value": 1},
27    {"name": "BUF_DATA_FORMAT_16", "value": 2},
28    {"name": "BUF_DATA_FORMAT_8_8", "value": 3},
29    {"name": "BUF_DATA_FORMAT_32", "value": 4},
30    {"name": "BUF_DATA_FORMAT_16_16", "value": 5},
31    {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6},
32    {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7},
33    {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8},
34    {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9},
35    {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10},
36    {"name": "BUF_DATA_FORMAT_32_32", "value": 11},
37    {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12},
38    {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13},
39    {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14},
40    {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15}
41   ]
42  },
43  "BUF_NUM_FORMAT": {
44   "entries": [
45    {"name": "BUF_NUM_FORMAT_UNORM", "value": 0},
46    {"name": "BUF_NUM_FORMAT_SNORM", "value": 1},
47    {"name": "BUF_NUM_FORMAT_USCALED", "value": 2},
48    {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3},
49    {"name": "BUF_NUM_FORMAT_UINT", "value": 4},
50    {"name": "BUF_NUM_FORMAT_SINT", "value": 5},
51    {"name": "BUF_NUM_FORMAT_UNORM_UINT", "value": 6},
52    {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7}
53   ]
54  },
55  "BankHeight": {
56   "entries": [
57    {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0},
58    {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1},
59    {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2},
60    {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3}
61   ]
62  },
63  "BankWidth": {
64   "entries": [
65    {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0},
66    {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1},
67    {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2},
68    {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3}
69   ]
70  },
71  "BinningMode": {
72   "entries": [
73    {"name": "BINNING_ALLOWED", "value": 0},
74    {"name": "FORCE_BINNING_ON", "value": 1},
75    {"name": "DISABLE_BINNING_USE_NEW_SC", "value": 2},
76    {"name": "DISABLE_BINNING_USE_LEGACY_SC", "value": 3}
77   ]
78  },
79  "BlendOp": {
80   "entries": [
81    {"name": "BLEND_ZERO", "value": 0},
82    {"name": "BLEND_ONE", "value": 1},
83    {"name": "BLEND_SRC_COLOR", "value": 2},
84    {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3},
85    {"name": "BLEND_SRC_ALPHA", "value": 4},
86    {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5},
87    {"name": "BLEND_DST_ALPHA", "value": 6},
88    {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7},
89    {"name": "BLEND_DST_COLOR", "value": 8},
90    {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9},
91    {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10},
92    {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11},
93    {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12},
94    {"name": "BLEND_CONSTANT_COLOR", "value": 13},
95    {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14},
96    {"name": "BLEND_SRC1_COLOR", "value": 15},
97    {"name": "BLEND_INV_SRC1_COLOR", "value": 16},
98    {"name": "BLEND_SRC1_ALPHA", "value": 17},
99    {"name": "BLEND_INV_SRC1_ALPHA", "value": 18},
100    {"name": "BLEND_CONSTANT_ALPHA", "value": 19},
101    {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20}
102   ]
103  },
104  "BlendOpt": {
105   "entries": [
106    {"name": "FORCE_OPT_AUTO", "value": 0},
107    {"name": "FORCE_OPT_DISABLE", "value": 1},
108    {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2},
109    {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3},
110    {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},
111    {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5},
112    {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6},
113    {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7}
114   ]
115  },
116  "CBMode": {
117   "entries": [
118    {"name": "CB_DISABLE", "value": 0},
119    {"name": "CB_NORMAL", "value": 1},
120    {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2},
121    {"name": "CB_RESOLVE", "value": 3},
122    {"name": "CB_DECOMPRESS", "value": 4},
123    {"name": "CB_FMASK_DECOMPRESS", "value": 5},
124    {"name": "CB_DCC_DECOMPRESS", "value": 6}
125   ]
126  },
127  "CBPerfClearFilterSel": {
128   "entries": [
129    {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0},
130    {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1}
131   ]
132  },
133  "CBPerfOpFilterSel": {
134   "entries": [
135    {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0},
136    {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},
137    {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2},
138    {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3},
139    {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4},
140    {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5}
141   ]
142  },
143  "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE": {
144   "entries": [
145    {"name": "MAX_BLOCK_SIZE_64B", "value": 0},
146    {"name": "MAX_BLOCK_SIZE_128B", "value": 1},
147    {"name": "MAX_BLOCK_SIZE_256B", "value": 2}
148   ]
149  },
150  "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE": {
151   "entries": [
152    {"name": "MIN_BLOCK_SIZE_32B", "value": 0},
153    {"name": "MIN_BLOCK_SIZE_64B", "value": 1}
154   ]
155  },
156  "CLIP_RULE": {
157   "entries": [
158    {"name": "OUT", "value": 1},
159    {"name": "IN_0", "value": 2},
160    {"name": "IN_1", "value": 4},
161    {"name": "IN_10", "value": 8},
162    {"name": "IN_2", "value": 16},
163    {"name": "IN_20", "value": 32},
164    {"name": "IN_21", "value": 64},
165    {"name": "IN_210", "value": 128},
166    {"name": "IN_3", "value": 256},
167    {"name": "IN_30", "value": 512},
168    {"name": "IN_31", "value": 1024},
169    {"name": "IN_310", "value": 2048},
170    {"name": "IN_32", "value": 4096},
171    {"name": "IN_320", "value": 8192},
172    {"name": "IN_321", "value": 16384},
173    {"name": "IN_3210", "value": 32768}
174   ]
175  },
176  "CP_PERFMON_ENABLE_MODE": {
177   "entries": [
178    {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0},
179    {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1},
180    {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2},
181    {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3}
182   ]
183  },
184  "CP_PERFMON_STATE": {
185   "entries": [
186    {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
187    {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1},
188    {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2},
189    {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3},
190    {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
191    {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
192   ]
193  },
194  "CmaskAddr": {
195   "entries": [
196    {"name": "CMASK_ADDR_TILED", "value": 0},
197    {"name": "CMASK_ADDR_LINEAR", "value": 1},
198    {"name": "CMASK_ADDR_COMPATIBLE", "value": 2}
199   ]
200  },
201  "ColorFormat": {
202   "entries": [
203    {"name": "COLOR_INVALID", "value": 0},
204    {"name": "COLOR_8", "value": 1},
205    {"name": "COLOR_16", "value": 2},
206    {"name": "COLOR_8_8", "value": 3},
207    {"name": "COLOR_32", "value": 4},
208    {"name": "COLOR_16_16", "value": 5},
209    {"name": "COLOR_10_11_11", "value": 6},
210    {"name": "COLOR_11_11_10", "value": 7},
211    {"name": "COLOR_10_10_10_2", "value": 8},
212    {"name": "COLOR_2_10_10_10", "value": 9},
213    {"name": "COLOR_8_8_8_8", "value": 10},
214    {"name": "COLOR_32_32", "value": 11},
215    {"name": "COLOR_16_16_16_16", "value": 12},
216    {"name": "COLOR_RESERVED_13", "value": 13},
217    {"name": "COLOR_32_32_32_32", "value": 14},
218    {"name": "COLOR_RESERVED_15", "value": 15},
219    {"name": "COLOR_5_6_5", "value": 16},
220    {"name": "COLOR_1_5_5_5", "value": 17},
221    {"name": "COLOR_5_5_5_1", "value": 18},
222    {"name": "COLOR_4_4_4_4", "value": 19},
223    {"name": "COLOR_8_24", "value": 20},
224    {"name": "COLOR_24_8", "value": 21},
225    {"name": "COLOR_X24_8_32_FLOAT", "value": 22},
226    {"name": "COLOR_RESERVED_23", "value": 23},
227    {"name": "COLOR_RESERVED_24", "value": 24},
228    {"name": "COLOR_RESERVED_25", "value": 25},
229    {"name": "COLOR_RESERVED_26", "value": 26},
230    {"name": "COLOR_RESERVED_27", "value": 27},
231    {"name": "COLOR_RESERVED_28", "value": 28},
232    {"name": "COLOR_RESERVED_29", "value": 29},
233    {"name": "COLOR_RESERVED_30", "value": 30},
234    {"name": "COLOR_2_10_10_10_6E4", "value": 31}
235   ]
236  },
237  "CombFunc": {
238   "entries": [
239    {"name": "COMB_DST_PLUS_SRC", "value": 0},
240    {"name": "COMB_SRC_MINUS_DST", "value": 1},
241    {"name": "COMB_MIN_DST_SRC", "value": 2},
242    {"name": "COMB_MAX_DST_SRC", "value": 3},
243    {"name": "COMB_DST_MINUS_SRC", "value": 4}
244   ]
245  },
246  "CompareFrag": {
247   "entries": [
248    {"name": "FRAG_NEVER", "value": 0},
249    {"name": "FRAG_LESS", "value": 1},
250    {"name": "FRAG_EQUAL", "value": 2},
251    {"name": "FRAG_LEQUAL", "value": 3},
252    {"name": "FRAG_GREATER", "value": 4},
253    {"name": "FRAG_NOTEQUAL", "value": 5},
254    {"name": "FRAG_GEQUAL", "value": 6},
255    {"name": "FRAG_ALWAYS", "value": 7}
256   ]
257  },
258  "ConservativeZExport": {
259   "entries": [
260    {"name": "EXPORT_ANY_Z", "value": 0},
261    {"name": "EXPORT_LESS_THAN_Z", "value": 1},
262    {"name": "EXPORT_GREATER_THAN_Z", "value": 2},
263    {"name": "EXPORT_RESERVED", "value": 3}
264   ]
265  },
266  "CovToShaderSel": {
267   "entries": [
268    {"name": "INPUT_COVERAGE", "value": 0},
269    {"name": "INPUT_INNER_COVERAGE", "value": 1},
270    {"name": "INPUT_DEPTH_COVERAGE", "value": 2},
271    {"name": "RAW", "value": 3}
272   ]
273  },
274  "DB_DFSM_CONTROL__PUNCHOUT_MODE": {
275   "entries": [
276    {"name": "AUTO", "value": 0},
277    {"name": "FORCE_ON", "value": 1},
278    {"name": "FORCE_OFF", "value": 2},
279    {"name": "RESERVED", "value": 3}
280   ]
281  },
282  "DbPRTFaultBehavior": {
283   "entries": [
284    {"name": "FAULT_ZERO", "value": 0},
285    {"name": "FAULT_ONE", "value": 1},
286    {"name": "FAULT_FAIL", "value": 2},
287    {"name": "FAULT_PASS", "value": 3}
288   ]
289  },
290  "DbPSLControl": {
291   "entries": [
292    {"name": "PSLC_AUTO", "value": 0},
293    {"name": "PSLC_ON_HANG_ONLY", "value": 1},
294    {"name": "PSLC_ASAP", "value": 2},
295    {"name": "PSLC_COUNTDOWN", "value": 3}
296   ]
297  },
298  "EXCP_EN": {
299   "entries": [
300    {"name": "INVALID", "value": 1},
301    {"name": "INPUT_DENORMAL", "value": 2},
302    {"name": "DIVIDE_BY_ZERO", "value": 4},
303    {"name": "OVERFLOW", "value": 8},
304    {"name": "UNDERFLOW", "value": 16},
305    {"name": "INEXACT", "value": 32},
306    {"name": "INT_DIVIDE_BY_ZERO", "value": 64},
307    {"name": "ADDRESS_WATCH", "value": 128},
308    {"name": "MEMORY_VIOLATION", "value": 256}
309   ]
310  },
311  "FLOAT_MODE": {
312   "entries": [
313    {"name": "FP_32_ROUND_TOWARDS_ZERO", "value": 3},
314    {"name": "FP_16_64_ROUND_TOWARDS_ZERO", "value": 12},
315    {"name": "FP_32_DENORMS", "value": 48},
316    {"name": "FP_16_64_DENORMS", "value": 192}
317   ]
318  },
319  "ForceControl": {
320   "entries": [
321    {"name": "FORCE_OFF", "value": 0},
322    {"name": "FORCE_ENABLE", "value": 1},
323    {"name": "FORCE_DISABLE", "value": 2},
324    {"name": "FORCE_RESERVED", "value": 3}
325   ]
326  },
327  "IMG_DATA_FORMAT": {
328   "entries": [
329    {"name": "IMG_DATA_FORMAT_INVALID", "value": 0},
330    {"name": "IMG_DATA_FORMAT_8", "value": 1},
331    {"name": "IMG_DATA_FORMAT_16", "value": 2},
332    {"name": "IMG_DATA_FORMAT_8_8", "value": 3},
333    {"name": "IMG_DATA_FORMAT_32", "value": 4},
334    {"name": "IMG_DATA_FORMAT_16_16", "value": 5},
335    {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6},
336    {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7},
337    {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8},
338    {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9},
339    {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10},
340    {"name": "IMG_DATA_FORMAT_32_32", "value": 11},
341    {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12},
342    {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13},
343    {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14},
344    {"name": "IMG_DATA_FORMAT_RESERVED_15", "value": 15},
345    {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16},
346    {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17},
347    {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18},
348    {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19},
349    {"name": "IMG_DATA_FORMAT_8_24", "value": 20},
350    {"name": "IMG_DATA_FORMAT_24_8", "value": 21},
351    {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22},
352    {"name": "IMG_DATA_FORMAT_8_AS_8_8_8_8", "value": 23},
353    {"name": "IMG_DATA_FORMAT_ETC2_RGB", "value": 24},
354    {"name": "IMG_DATA_FORMAT_ETC2_RGBA", "value": 25},
355    {"name": "IMG_DATA_FORMAT_ETC2_R", "value": 26},
356    {"name": "IMG_DATA_FORMAT_ETC2_RG", "value": 27},
357    {"name": "IMG_DATA_FORMAT_ETC2_RGBA1", "value": 28},
358    {"name": "IMG_DATA_FORMAT_RESERVED_29", "value": 29},
359    {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30},
360    {"name": "IMG_DATA_FORMAT_6E4", "value": 31},
361    {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32},
362    {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},
363    {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},
364    {"name": "IMG_DATA_FORMAT_BC1", "value": 35},
365    {"name": "IMG_DATA_FORMAT_BC2", "value": 36},
366    {"name": "IMG_DATA_FORMAT_BC3", "value": 37},
367    {"name": "IMG_DATA_FORMAT_BC4", "value": 38},
368    {"name": "IMG_DATA_FORMAT_BC5", "value": 39},
369    {"name": "IMG_DATA_FORMAT_BC6", "value": 40},
370    {"name": "IMG_DATA_FORMAT_BC7", "value": 41},
371    {"name": "IMG_DATA_FORMAT_16_AS_32_32", "value": 42},
372    {"name": "IMG_DATA_FORMAT_16_AS_16_16_16_16", "value": 43},
373    {"name": "IMG_DATA_FORMAT_16_AS_32_32_32_32", "value": 44},
374    {"name": "IMG_DATA_FORMAT_FMASK", "value": 45},
375    {"name": "IMG_DATA_FORMAT_ASTC_2D_LDR", "value": 46},
376    {"name": "IMG_DATA_FORMAT_ASTC_2D_HDR", "value": 47},
377    {"name": "IMG_DATA_FORMAT_ASTC_2D_LDR_SRGB", "value": 48},
378    {"name": "IMG_DATA_FORMAT_ASTC_3D_LDR", "value": 49},
379    {"name": "IMG_DATA_FORMAT_ASTC_3D_HDR", "value": 50},
380    {"name": "IMG_DATA_FORMAT_ASTC_3D_LDR_SRGB", "value": 51},
381    {"name": "IMG_DATA_FORMAT_N_IN_16", "value": 52},
382    {"name": "IMG_DATA_FORMAT_N_IN_16_16", "value": 53},
383    {"name": "IMG_DATA_FORMAT_N_IN_16_16_16_16", "value": 54},
384    {"name": "IMG_DATA_FORMAT_N_IN_16_AS_16_16_16_16", "value": 55},
385    {"name": "IMG_DATA_FORMAT_RESERVED_56", "value": 56},
386    {"name": "IMG_DATA_FORMAT_4_4", "value": 57},
387    {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},
388    {"name": "IMG_DATA_FORMAT_RESERVED_59", "value": 59},
389    {"name": "IMG_DATA_FORMAT_RESERVED_60", "value": 60},
390    {"name": "IMG_DATA_FORMAT_8_AS_32", "value": 61},
391    {"name": "IMG_DATA_FORMAT_8_AS_32_32", "value": 62},
392    {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}
393   ]
394  },
395  "IMG_DATA_FORMAT_STENCIL": {
396   "entries": [
397    {"name": "IMG_DATA_FORMAT_S8_16", "value": 59},
398    {"name": "IMG_DATA_FORMAT_S8_32", "value": 60}
399   ]
400  },
401  "IMG_NUM_FORMAT": {
402   "entries": [
403    {"name": "IMG_NUM_FORMAT_UNORM", "value": 0},
404    {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},
405    {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},
406    {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},
407    {"name": "IMG_NUM_FORMAT_UINT", "value": 4},
408    {"name": "IMG_NUM_FORMAT_SINT", "value": 5},
409    {"name": "IMG_NUM_FORMAT_UNORM_UINT", "value": 6},
410    {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},
411    {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},
412    {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},
413    {"name": "IMG_NUM_FORMAT_RESERVED_10", "value": 10},
414    {"name": "IMG_NUM_FORMAT_RESERVED_11", "value": 11},
415    {"name": "IMG_NUM_FORMAT_RESERVED_12", "value": 12},
416    {"name": "IMG_NUM_FORMAT_RESERVED_13", "value": 13},
417    {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},
418    {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}
419   ]
420  },
421  "IMG_NUM_FORMAT_FMASK": {
422   "entries": [
423    {"name": "IMG_NUM_FORMAT_FMASK_8_2_1", "value": 0},
424    {"name": "IMG_NUM_FORMAT_FMASK_8_4_1", "value": 1},
425    {"name": "IMG_NUM_FORMAT_FMASK_8_8_1", "value": 2},
426    {"name": "IMG_NUM_FORMAT_FMASK_8_2_2", "value": 3},
427    {"name": "IMG_NUM_FORMAT_FMASK_8_4_2", "value": 4},
428    {"name": "IMG_NUM_FORMAT_FMASK_8_4_4", "value": 5},
429    {"name": "IMG_NUM_FORMAT_FMASK_16_16_1", "value": 6},
430    {"name": "IMG_NUM_FORMAT_FMASK_16_8_2", "value": 7},
431    {"name": "IMG_NUM_FORMAT_FMASK_32_16_2", "value": 8},
432    {"name": "IMG_NUM_FORMAT_FMASK_32_8_4", "value": 9},
433    {"name": "IMG_NUM_FORMAT_FMASK_32_8_8", "value": 10},
434    {"name": "IMG_NUM_FORMAT_FMASK_64_16_4", "value": 11},
435    {"name": "IMG_NUM_FORMAT_FMASK_64_16_8", "value": 12},
436    {"name": "IMG_NUM_FORMAT_FMASK_RESERVED_13", "value": 13},
437    {"name": "IMG_NUM_FORMAT_FMASK_RESERVED_14", "value": 14},
438    {"name": "IMG_NUM_FORMAT_FMASK_RESERVED_15", "value": 15}
439   ]
440  },
441  "MacroTileAspect": {
442   "entries": [
443    {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0},
444    {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},
445    {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},
446    {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}
447   ]
448  },
449  "MicroTileMode": {
450   "entries": [
451    {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},
452    {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},
453    {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},
454    {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},
455    {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}
456   ]
457  },
458  "NumBanks": {
459   "entries": [
460    {"name": "ADDR_SURF_2_BANK", "value": 0},
461    {"name": "ADDR_SURF_4_BANK", "value": 1},
462    {"name": "ADDR_SURF_8_BANK", "value": 2},
463    {"name": "ADDR_SURF_16_BANK", "value": 3}
464   ]
465  },
466  "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE": {
467   "entries": [
468    {"name": "X_DRAW_POINTS", "value": 0},
469    {"name": "X_DRAW_LINES", "value": 1},
470    {"name": "X_DRAW_TRIANGLES", "value": 2}
471   ]
472  },
473  "PA_SU_SC_MODE_CNTL__POLY_MODE": {
474   "entries": [
475    {"name": "X_DISABLE_POLY_MODE", "value": 0},
476    {"name": "X_DUAL_MODE", "value": 1}
477   ]
478  },
479  "PA_SU_VTX_CNTL__ROUND_MODE": {
480   "entries": [
481    {"name": "X_TRUNCATE", "value": 0},
482    {"name": "X_ROUND", "value": 1},
483    {"name": "X_ROUND_TO_EVEN", "value": 2},
484    {"name": "X_ROUND_TO_ODD", "value": 3}
485   ]
486  },
487  "PipeConfig": {
488   "entries": [
489    {"name": "ADDR_SURF_P2", "value": 0},
490    {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},
491    {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},
492    {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},
493    {"name": "ADDR_SURF_P4_8x16", "value": 4},
494    {"name": "ADDR_SURF_P4_16x16", "value": 5},
495    {"name": "ADDR_SURF_P4_16x32", "value": 6},
496    {"name": "ADDR_SURF_P4_32x32", "value": 7},
497    {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},
498    {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},
499    {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},
500    {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},
501    {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},
502    {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},
503    {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},
504    {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},
505    {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},
506    {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}
507   ]
508  },
509  "PkrMap": {
510   "entries": [
511    {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},
512    {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},
513    {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},
514    {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}
515   ]
516  },
517  "PkrXsel": {
518   "entries": [
519    {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},
520    {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},
521    {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},
522    {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}
523   ]
524  },
525  "PkrXsel2": {
526   "entries": [
527    {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},
528    {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},
529    {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},
530    {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}
531   ]
532  },
533  "PkrYsel": {
534   "entries": [
535    {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},
536    {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},
537    {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},
538    {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}
539   ]
540  },
541  "QUANT_MODE": {
542   "entries": [
543    {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},
544    {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},
545    {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},
546    {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},
547    {"name": "X_16_8_FIXED_POINT_1", "value": 4},
548    {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},
549    {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},
550    {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}
551   ]
552  },
553  "ROP3": {
554   "entries": [
555    {"name": "ROP3_CLEAR", "value": 0},
556    {"name": "X_0X05", "value": 5},
557    {"name": "X_0X0A", "value": 10},
558    {"name": "X_0X0F", "value": 15},
559    {"name": "ROP3_NOR", "value": 17},
560    {"name": "ROP3_AND_INVERTED", "value": 34},
561    {"name": "ROP3_COPY_INVERTED", "value": 51},
562    {"name": "ROP3_AND_REVERSE", "value": 68},
563    {"name": "X_0X50", "value": 80},
564    {"name": "ROP3_INVERT", "value": 85},
565    {"name": "X_0X5A", "value": 90},
566    {"name": "X_0X5F", "value": 95},
567    {"name": "ROP3_XOR", "value": 102},
568    {"name": "ROP3_NAND", "value": 119},
569    {"name": "ROP3_AND", "value": 136},
570    {"name": "ROP3_EQUIVALENT", "value": 153},
571    {"name": "X_0XA0", "value": 160},
572    {"name": "X_0XA5", "value": 165},
573    {"name": "ROP3_NO_OP", "value": 170},
574    {"name": "X_0XAF", "value": 175},
575    {"name": "ROP3_OR_INVERTED", "value": 187},
576    {"name": "ROP3_COPY", "value": 204},
577    {"name": "ROP3_OR_REVERSE", "value": 221},
578    {"name": "ROP3_OR", "value": 238},
579    {"name": "X_0XF0", "value": 240},
580    {"name": "X_0XF5", "value": 245},
581    {"name": "X_0XFA", "value": 250},
582    {"name": "ROP3_SET", "value": 255}
583   ]
584  },
585  "RbMap": {
586   "entries": [
587    {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},
588    {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},
589    {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},
590    {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}
591   ]
592  },
593  "RbXsel": {
594   "entries": [
595    {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},
596    {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}
597   ]
598  },
599  "RbXsel2": {
600   "entries": [
601    {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},
602    {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},
603    {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},
604    {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}
605   ]
606  },
607  "RbYsel": {
608   "entries": [
609    {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},
610    {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}
611   ]
612  },
613  "SPI_PNT_SPRITE_OVERRIDE": {
614   "entries": [
615    {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},
616    {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},
617    {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},
618    {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},
619    {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}
620   ]
621  },
622  "SPI_SHADER_EX_FORMAT": {
623   "entries": [
624    {"name": "SPI_SHADER_ZERO", "value": 0},
625    {"name": "SPI_SHADER_32_R", "value": 1},
626    {"name": "SPI_SHADER_32_GR", "value": 2},
627    {"name": "SPI_SHADER_32_AR", "value": 3},
628    {"name": "SPI_SHADER_FP16_ABGR", "value": 4},
629    {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},
630    {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},
631    {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},
632    {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},
633    {"name": "SPI_SHADER_32_ABGR", "value": 9}
634   ]
635  },
636  "SPI_SHADER_FORMAT": {
637   "entries": [
638    {"name": "SPI_SHADER_NONE", "value": 0},
639    {"name": "SPI_SHADER_1COMP", "value": 1},
640    {"name": "SPI_SHADER_2COMP", "value": 2},
641    {"name": "SPI_SHADER_4COMPRESS", "value": 3},
642    {"name": "SPI_SHADER_4COMP", "value": 4}
643   ]
644  },
645  "SPM_PERFMON_STATE": {
646   "entries": [
647    {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
648    {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},
649    {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},
650    {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},
651    {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
652    {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
653   ]
654  },
655  "SQ_IMG_FILTER_TYPE": {
656   "entries": [
657    {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},
658    {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},
659    {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}
660   ]
661  },
662  "SQ_IMG_RSRC_WORD4__BC_SWIZZLE": {
663   "entries": [
664    {"name": "BC_SWIZZLE_XYZW", "value": 0},
665    {"name": "BC_SWIZZLE_XWYZ", "value": 1},
666    {"name": "BC_SWIZZLE_WZYX", "value": 2},
667    {"name": "BC_SWIZZLE_WXYZ", "value": 3},
668    {"name": "BC_SWIZZLE_ZYXW", "value": 4},
669    {"name": "BC_SWIZZLE_YXWZ", "value": 5}
670   ]
671  },
672  "SQ_RSRC_BUF_TYPE": {
673   "entries": [
674    {"name": "SQ_RSRC_BUF", "value": 0},
675    {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},
676    {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},
677    {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}
678   ]
679  },
680  "SQ_RSRC_IMG_TYPE": {
681   "entries": [
682    {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},
683    {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},
684    {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},
685    {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},
686    {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},
687    {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},
688    {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},
689    {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},
690    {"name": "SQ_RSRC_IMG_1D", "value": 8},
691    {"name": "SQ_RSRC_IMG_2D", "value": 9},
692    {"name": "SQ_RSRC_IMG_3D", "value": 10},
693    {"name": "SQ_RSRC_IMG_CUBE", "value": 11},
694    {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},
695    {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},
696    {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},
697    {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}
698   ]
699  },
700  "SQ_SEL_XYZW01": {
701   "entries": [
702    {"name": "SQ_SEL_0", "value": 0},
703    {"name": "SQ_SEL_1", "value": 1},
704    {"name": "SQ_SEL_RESERVED_0", "value": 2},
705    {"name": "SQ_SEL_RESERVED_1", "value": 3},
706    {"name": "SQ_SEL_X", "value": 4},
707    {"name": "SQ_SEL_Y", "value": 5},
708    {"name": "SQ_SEL_Z", "value": 6},
709    {"name": "SQ_SEL_W", "value": 7}
710   ]
711  },
712  "SQ_TEX_BORDER_COLOR": {
713   "entries": [
714    {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},
715    {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},
716    {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},
717    {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}
718   ]
719  },
720  "SQ_TEX_CLAMP": {
721   "entries": [
722    {"name": "SQ_TEX_WRAP", "value": 0},
723    {"name": "SQ_TEX_MIRROR", "value": 1},
724    {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},
725    {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},
726    {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},
727    {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},
728    {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},
729    {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}
730   ]
731  },
732  "SQ_TEX_DEPTH_COMPARE": {
733   "entries": [
734    {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},
735    {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},
736    {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},
737    {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},
738    {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},
739    {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},
740    {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},
741    {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}
742   ]
743  },
744  "SQ_TEX_MIP_FILTER": {
745   "entries": [
746    {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},
747    {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},
748    {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2},
749    {"name": "SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ", "value": 3}
750   ]
751  },
752  "SQ_TEX_XY_FILTER": {
753   "entries": [
754    {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},
755    {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},
756    {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},
757    {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}
758   ]
759  },
760  "SQ_TEX_Z_FILTER": {
761   "entries": [
762    {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},
763    {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},
764    {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}
765   ]
766  },
767  "SX_BLEND_OPT": {
768   "entries": [
769    {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_ALL", "value": 0},
770    {"name": "BLEND_OPT_PRESERVE_ALL_IGNORE_NONE", "value": 1},
771    {"name": "BLEND_OPT_PRESERVE_C1_IGNORE_C0", "value": 2},
772    {"name": "BLEND_OPT_PRESERVE_C0_IGNORE_C1", "value": 3},
773    {"name": "BLEND_OPT_PRESERVE_A1_IGNORE_A0", "value": 4},
774    {"name": "BLEND_OPT_PRESERVE_A0_IGNORE_A1", "value": 5},
775    {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_A0", "value": 6},
776    {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_NONE", "value": 7}
777   ]
778  },
779  "SX_BLEND_OPT_EPSILON__MRT0_EPSILON": {
780   "entries": [
781    {"name": "EXACT", "value": 0},
782    {"name": "11BIT_FORMAT", "value": 1},
783    {"name": "10BIT_FORMAT", "value": 3},
784    {"name": "8BIT_FORMAT", "value": 6},
785    {"name": "6BIT_FORMAT", "value": 11},
786    {"name": "5BIT_FORMAT", "value": 13},
787    {"name": "4BIT_FORMAT", "value": 15}
788   ]
789  },
790  "SX_DOWNCONVERT_FORMAT": {
791   "entries": [
792    {"name": "SX_RT_EXPORT_NO_CONVERSION", "value": 0},
793    {"name": "SX_RT_EXPORT_32_R", "value": 1},
794    {"name": "SX_RT_EXPORT_32_A", "value": 2},
795    {"name": "SX_RT_EXPORT_10_11_11", "value": 3},
796    {"name": "SX_RT_EXPORT_2_10_10_10", "value": 4},
797    {"name": "SX_RT_EXPORT_8_8_8_8", "value": 5},
798    {"name": "SX_RT_EXPORT_5_6_5", "value": 6},
799    {"name": "SX_RT_EXPORT_1_5_5_5", "value": 7},
800    {"name": "SX_RT_EXPORT_4_4_4_4", "value": 8},
801    {"name": "SX_RT_EXPORT_16_16_GR", "value": 9},
802    {"name": "SX_RT_EXPORT_16_16_AR", "value": 10}
803   ]
804  },
805  "SX_OPT_COMB_FCN": {
806   "entries": [
807    {"name": "OPT_COMB_NONE", "value": 0},
808    {"name": "OPT_COMB_ADD", "value": 1},
809    {"name": "OPT_COMB_SUBTRACT", "value": 2},
810    {"name": "OPT_COMB_MIN", "value": 3},
811    {"name": "OPT_COMB_MAX", "value": 4},
812    {"name": "OPT_COMB_REVSUBTRACT", "value": 5},
813    {"name": "OPT_COMB_BLEND_DISABLED", "value": 6},
814    {"name": "OPT_COMB_SAFE_ADD", "value": 7}
815   ]
816  },
817  "ScMap": {
818   "entries": [
819    {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},
820    {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},
821    {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},
822    {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}
823   ]
824  },
825  "ScXsel": {
826   "entries": [
827    {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},
828    {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},
829    {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},
830    {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}
831   ]
832  },
833  "ScYsel": {
834   "entries": [
835    {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},
836    {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},
837    {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},
838    {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}
839   ]
840  },
841  "SeMap": {
842   "entries": [
843    {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},
844    {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},
845    {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},
846    {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}
847   ]
848  },
849  "SePairMap": {
850   "entries": [
851    {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},
852    {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},
853    {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},
854    {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}
855   ]
856  },
857  "SePairXsel": {
858   "entries": [
859    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},
860    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},
861    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},
862    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3},
863    {"name": "RASTER_CONFIG_SE_PAIR_XSEL_128_WIDE_TILE", "value": 4}
864   ]
865  },
866  "SePairYsel": {
867   "entries": [
868    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},
869    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},
870    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},
871    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3},
872    {"name": "RASTER_CONFIG_SE_PAIR_YSEL_128_WIDE_TILE", "value": 4}
873   ]
874  },
875  "SeXsel": {
876   "entries": [
877    {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},
878    {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},
879    {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},
880    {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3},
881    {"name": "RASTER_CONFIG_SE_XSEL_128_WIDE_TILE", "value": 4}
882   ]
883  },
884  "SeYsel": {
885   "entries": [
886    {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},
887    {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},
888    {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},
889    {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3},
890    {"name": "RASTER_CONFIG_SE_YSEL_128_WIDE_TILE", "value": 4}
891   ]
892  },
893  "StencilFormat": {
894   "entries": [
895    {"name": "STENCIL_INVALID", "value": 0},
896    {"name": "STENCIL_8", "value": 1}
897   ]
898  },
899  "StencilOp": {
900   "entries": [
901    {"name": "STENCIL_KEEP", "value": 0},
902    {"name": "STENCIL_ZERO", "value": 1},
903    {"name": "STENCIL_ONES", "value": 2},
904    {"name": "STENCIL_REPLACE_TEST", "value": 3},
905    {"name": "STENCIL_REPLACE_OP", "value": 4},
906    {"name": "STENCIL_ADD_CLAMP", "value": 5},
907    {"name": "STENCIL_SUB_CLAMP", "value": 6},
908    {"name": "STENCIL_INVERT", "value": 7},
909    {"name": "STENCIL_ADD_WRAP", "value": 8},
910    {"name": "STENCIL_SUB_WRAP", "value": 9},
911    {"name": "STENCIL_AND", "value": 10},
912    {"name": "STENCIL_OR", "value": 11},
913    {"name": "STENCIL_XOR", "value": 12},
914    {"name": "STENCIL_NAND", "value": 13},
915    {"name": "STENCIL_NOR", "value": 14},
916    {"name": "STENCIL_XNOR", "value": 15}
917   ]
918  },
919  "SurfaceEndian": {
920   "entries": [
921    {"name": "ENDIAN_NONE", "value": 0},
922    {"name": "ENDIAN_8IN16", "value": 1},
923    {"name": "ENDIAN_8IN32", "value": 2},
924    {"name": "ENDIAN_8IN64", "value": 3}
925   ]
926  },
927  "SurfaceNumber": {
928   "entries": [
929    {"name": "NUMBER_UNORM", "value": 0},
930    {"name": "NUMBER_SNORM", "value": 1},
931    {"name": "NUMBER_USCALED", "value": 2},
932    {"name": "NUMBER_SSCALED", "value": 3},
933    {"name": "NUMBER_UINT", "value": 4},
934    {"name": "NUMBER_SINT", "value": 5},
935    {"name": "NUMBER_SRGB", "value": 6},
936    {"name": "NUMBER_FLOAT", "value": 7}
937   ]
938  },
939  "SurfaceSwap": {
940   "entries": [
941    {"name": "SWAP_STD", "value": 0},
942    {"name": "SWAP_ALT", "value": 1},
943    {"name": "SWAP_STD_REV", "value": 2},
944    {"name": "SWAP_ALT_REV", "value": 3}
945   ]
946  },
947  "TileSplit": {
948   "entries": [
949    {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},
950    {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},
951    {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},
952    {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},
953    {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},
954    {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},
955    {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}
956   ]
957  },
958  "VGT_DIST_MODE": {
959   "entries": [
960    {"name": "NO_DIST", "value": 0},
961    {"name": "PATCHES", "value": 1},
962    {"name": "DONUTS", "value": 2},
963    {"name": "TRAPEZOIDS", "value": 3}
964   ]
965  },
966  "VGT_DI_MAJOR_MODE_SELECT": {
967   "entries": [
968    {"name": "DI_MAJOR_MODE_0", "value": 0},
969    {"name": "DI_MAJOR_MODE_1", "value": 1}
970   ]
971  },
972  "VGT_DI_PRIM_TYPE": {
973   "entries": [
974    {"name": "DI_PT_NONE", "value": 0},
975    {"name": "DI_PT_POINTLIST", "value": 1},
976    {"name": "DI_PT_LINELIST", "value": 2},
977    {"name": "DI_PT_LINESTRIP", "value": 3},
978    {"name": "DI_PT_TRILIST", "value": 4},
979    {"name": "DI_PT_TRIFAN", "value": 5},
980    {"name": "DI_PT_TRISTRIP", "value": 6},
981    {"name": "DI_PT_2D_RECTANGLE", "value": 7},
982    {"name": "DI_PT_UNUSED_1", "value": 8},
983    {"name": "DI_PT_PATCH", "value": 9},
984    {"name": "DI_PT_LINELIST_ADJ", "value": 10},
985    {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},
986    {"name": "DI_PT_TRILIST_ADJ", "value": 12},
987    {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},
988    {"name": "DI_PT_UNUSED_3", "value": 14},
989    {"name": "DI_PT_UNUSED_4", "value": 15},
990    {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},
991    {"name": "DI_PT_RECTLIST", "value": 17},
992    {"name": "DI_PT_LINELOOP", "value": 18},
993    {"name": "DI_PT_QUADLIST", "value": 19},
994    {"name": "DI_PT_QUADSTRIP", "value": 20},
995    {"name": "DI_PT_POLYGON", "value": 21}
996   ]
997  },
998  "VGT_DI_SOURCE_SELECT": {
999   "entries": [
1000    {"name": "DI_SRC_SEL_DMA", "value": 0},
1001    {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},
1002    {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},
1003    {"name": "DI_SRC_SEL_RESERVED", "value": 3}
1004   ]
1005  },
1006  "VGT_DMA_BUF_TYPE": {
1007   "entries": [
1008    {"name": "VGT_DMA_BUF_MEM", "value": 0},
1009    {"name": "VGT_DMA_BUF_RING", "value": 1},
1010    {"name": "VGT_DMA_BUF_SETUP", "value": 2},
1011    {"name": "VGT_DMA_PTR_UPDATE", "value": 3}
1012   ]
1013  },
1014  "VGT_DMA_SWAP_MODE": {
1015   "entries": [
1016    {"name": "VGT_DMA_SWAP_NONE", "value": 0},
1017    {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},
1018    {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},
1019    {"name": "VGT_DMA_SWAP_WORD", "value": 3}
1020   ]
1021  },
1022  "VGT_EVENT_TYPE": {
1023   "entries": [
1024    {"name": "Reserved_0x00", "value": 0},
1025    {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
1026    {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
1027    {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
1028    {"name": "CACHE_FLUSH_TS", "value": 4},
1029    {"name": "CONTEXT_DONE", "value": 5},
1030    {"name": "CACHE_FLUSH", "value": 6},
1031    {"name": "CS_PARTIAL_FLUSH", "value": 7},
1032    {"name": "VGT_STREAMOUT_SYNC", "value": 8},
1033    {"name": "Reserved_0x09", "value": 9},
1034    {"name": "VGT_STREAMOUT_RESET", "value": 10},
1035    {"name": "END_OF_PIPE_INCR_DE", "value": 11},
1036    {"name": "END_OF_PIPE_IB_END", "value": 12},
1037    {"name": "RST_PIX_CNT", "value": 13},
1038    {"name": "BREAK_BATCH", "value": 14},
1039    {"name": "VS_PARTIAL_FLUSH", "value": 15},
1040    {"name": "PS_PARTIAL_FLUSH", "value": 16},
1041    {"name": "FLUSH_HS_OUTPUT", "value": 17},
1042    {"name": "FLUSH_DFSM", "value": 18},
1043    {"name": "RESET_TO_LOWEST_VGT", "value": 19},
1044    {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
1045    {"name": "ZPASS_DONE", "value": 21},
1046    {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
1047    {"name": "PERFCOUNTER_START", "value": 23},
1048    {"name": "PERFCOUNTER_STOP", "value": 24},
1049    {"name": "PIPELINESTAT_START", "value": 25},
1050    {"name": "PIPELINESTAT_STOP", "value": 26},
1051    {"name": "PERFCOUNTER_SAMPLE", "value": 27},
1052    {"name": "Available_0x1c", "value": 28},
1053    {"name": "Available_0x1d", "value": 29},
1054    {"name": "SAMPLE_PIPELINESTAT", "value": 30},
1055    {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
1056    {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
1057    {"name": "RESET_VTX_CNT", "value": 33},
1058    {"name": "BLOCK_CONTEXT_DONE", "value": 34},
1059    {"name": "CS_CONTEXT_DONE", "value": 35},
1060    {"name": "VGT_FLUSH", "value": 36},
1061    {"name": "TGID_ROLLOVER", "value": 37},
1062    {"name": "SQ_NON_EVENT", "value": 38},
1063    {"name": "SC_SEND_DB_VPZ", "value": 39},
1064    {"name": "BOTTOM_OF_PIPE_TS", "value": 40},
1065    {"name": "FLUSH_SX_TS", "value": 41},
1066    {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
1067    {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
1068    {"name": "FLUSH_AND_INV_DB_META", "value": 44},
1069    {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
1070    {"name": "FLUSH_AND_INV_CB_META", "value": 46},
1071    {"name": "CS_DONE", "value": 47},
1072    {"name": "PS_DONE", "value": 48},
1073    {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
1074    {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
1075    {"name": "THREAD_TRACE_START", "value": 51},
1076    {"name": "THREAD_TRACE_STOP", "value": 52},
1077    {"name": "THREAD_TRACE_MARKER", "value": 53},
1078    {"name": "THREAD_TRACE_FLUSH", "value": 54},
1079    {"name": "THREAD_TRACE_FINISH", "value": 55},
1080    {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
1081    {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
1082    {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
1083    {"name": "CONTEXT_SUSPEND", "value": 59},
1084    {"name": "OFFCHIP_HS_DEALLOC", "value": 60},
1085    {"name": "ENABLE_NGG_PIPELINE", "value": 61},
1086    {"name": "ENABLE_LEGACY_PIPELINE", "value": 62},
1087    {"name": "Reserved_0x3f", "value": 63}
1088   ]
1089  },
1090  "VGT_GS_CUT_MODE": {
1091   "entries": [
1092    {"name": "GS_CUT_1024", "value": 0},
1093    {"name": "GS_CUT_512", "value": 1},
1094    {"name": "GS_CUT_256", "value": 2},
1095    {"name": "GS_CUT_128", "value": 3}
1096   ]
1097  },
1098  "VGT_GS_MODE_TYPE": {
1099   "entries": [
1100    {"name": "GS_OFF", "value": 0},
1101    {"name": "GS_SCENARIO_A", "value": 1},
1102    {"name": "GS_SCENARIO_B", "value": 2},
1103    {"name": "GS_SCENARIO_G", "value": 3},
1104    {"name": "GS_SCENARIO_C", "value": 4},
1105    {"name": "SPRITE_EN", "value": 5}
1106   ]
1107  },
1108  "VGT_GS_OUTPRIM_TYPE": {
1109   "entries": [
1110    {"name": "POINTLIST", "value": 0},
1111    {"name": "LINESTRIP", "value": 1},
1112    {"name": "TRISTRIP", "value": 2},
1113    {"name": "RECTLIST", "value": 3}
1114   ]
1115  },
1116  "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY": {
1117   "entries": [
1118    {"name": "X_8K_DWORDS", "value": 0},
1119    {"name": "X_4K_DWORDS", "value": 1},
1120    {"name": "X_2K_DWORDS", "value": 2},
1121    {"name": "X_1K_DWORDS", "value": 3}
1122   ]
1123  },
1124  "VGT_INDEX_TYPE_MODE": {
1125   "entries": [
1126    {"name": "VGT_INDEX_16", "value": 0},
1127    {"name": "VGT_INDEX_32", "value": 1},
1128    {"name": "VGT_INDEX_8", "value": 2}
1129   ]
1130  },
1131  "VGT_RDREQ_POLICY": {
1132   "entries": [
1133    {"name": "VGT_POLICY_LRU", "value": 0},
1134    {"name": "VGT_POLICY_STREAM", "value": 1}
1135   ]
1136  },
1137  "VGT_STAGES_ES_EN": {
1138   "entries": [
1139    {"name": "ES_STAGE_OFF", "value": 0},
1140    {"name": "ES_STAGE_DS", "value": 1},
1141    {"name": "ES_STAGE_REAL", "value": 2},
1142    {"name": "RESERVED_ES", "value": 3}
1143   ]
1144  },
1145  "VGT_STAGES_GS_EN": {
1146   "entries": [
1147    {"name": "GS_STAGE_OFF", "value": 0},
1148    {"name": "GS_STAGE_ON", "value": 1}
1149   ]
1150  },
1151  "VGT_STAGES_HS_EN": {
1152   "entries": [
1153    {"name": "HS_STAGE_OFF", "value": 0},
1154    {"name": "HS_STAGE_ON", "value": 1}
1155   ]
1156  },
1157  "VGT_STAGES_LS_EN": {
1158   "entries": [
1159    {"name": "LS_STAGE_OFF", "value": 0},
1160    {"name": "LS_STAGE_ON", "value": 1},
1161    {"name": "CS_STAGE_ON", "value": 2},
1162    {"name": "RESERVED_LS", "value": 3}
1163   ]
1164  },
1165  "VGT_STAGES_VS_EN": {
1166   "entries": [
1167    {"name": "VS_STAGE_REAL", "value": 0},
1168    {"name": "VS_STAGE_DS", "value": 1},
1169    {"name": "VS_STAGE_COPY_SHADER", "value": 2},
1170    {"name": "RESERVED_VS", "value": 3}
1171   ]
1172  },
1173  "VGT_TESS_PARTITION": {
1174   "entries": [
1175    {"name": "PART_INTEGER", "value": 0},
1176    {"name": "PART_POW2", "value": 1},
1177    {"name": "PART_FRAC_ODD", "value": 2},
1178    {"name": "PART_FRAC_EVEN", "value": 3}
1179   ]
1180  },
1181  "VGT_TESS_TOPOLOGY": {
1182   "entries": [
1183    {"name": "OUTPUT_POINT", "value": 0},
1184    {"name": "OUTPUT_LINE", "value": 1},
1185    {"name": "OUTPUT_TRIANGLE_CW", "value": 2},
1186    {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}
1187   ]
1188  },
1189  "VGT_TESS_TYPE": {
1190   "entries": [
1191    {"name": "TESS_ISOLINE", "value": 0},
1192    {"name": "TESS_TRIANGLE", "value": 1},
1193    {"name": "TESS_QUAD", "value": 2}
1194   ]
1195  },
1196  "ZFormat": {
1197   "entries": [
1198    {"name": "Z_INVALID", "value": 0},
1199    {"name": "Z_16", "value": 1},
1200    {"name": "Z_24", "value": 2},
1201    {"name": "Z_32_FLOAT", "value": 3}
1202   ]
1203  },
1204  "ZLimitSumm": {
1205   "entries": [
1206    {"name": "FORCE_SUMM_OFF", "value": 0},
1207    {"name": "FORCE_SUMM_MINZ", "value": 1},
1208    {"name": "FORCE_SUMM_MAXZ", "value": 2},
1209    {"name": "FORCE_SUMM_BOTH", "value": 3}
1210   ]
1211  },
1212  "ZOrder": {
1213   "entries": [
1214    {"name": "LATE_Z", "value": 0},
1215    {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},
1216    {"name": "RE_Z", "value": 2},
1217    {"name": "EARLY_Z_THEN_RE_Z", "value": 3}
1218   ]
1219  }
1220 },
1221 "register_mappings": [
1222  {
1223   "chips": ["gfx9"],
1224   "map": {"at": 68, "to": "mm"},
1225   "name": "SQ_WAVE_MODE",
1226   "type_ref": "SQ_WAVE_MODE"
1227  },
1228  {
1229   "chips": ["gfx9"],
1230   "map": {"at": 72, "to": "mm"},
1231   "name": "SQ_WAVE_STATUS",
1232   "type_ref": "SQ_WAVE_STATUS"
1233  },
1234  {
1235   "chips": ["gfx9"],
1236   "map": {"at": 76, "to": "mm"},
1237   "name": "SQ_WAVE_TRAPSTS",
1238   "type_ref": "SQ_WAVE_TRAPSTS"
1239  },
1240  {
1241   "chips": ["gfx9"],
1242   "map": {"at": 80, "to": "mm"},
1243   "name": "SQ_WAVE_HW_ID",
1244   "type_ref": "SQ_WAVE_HW_ID"
1245  },
1246  {
1247   "chips": ["gfx9"],
1248   "map": {"at": 84, "to": "mm"},
1249   "name": "SQ_WAVE_GPR_ALLOC",
1250   "type_ref": "SQ_WAVE_GPR_ALLOC"
1251  },
1252  {
1253   "chips": ["gfx9"],
1254   "map": {"at": 88, "to": "mm"},
1255   "name": "SQ_WAVE_LDS_ALLOC",
1256   "type_ref": "SQ_WAVE_LDS_ALLOC"
1257  },
1258  {
1259   "chips": ["gfx9"],
1260   "map": {"at": 92, "to": "mm"},
1261   "name": "SQ_WAVE_IB_STS",
1262   "type_ref": "SQ_WAVE_IB_STS"
1263  },
1264  {
1265   "chips": ["gfx9"],
1266   "map": {"at": 96, "to": "mm"},
1267   "name": "SQ_WAVE_PC_LO"
1268  },
1269  {
1270   "chips": ["gfx9"],
1271   "map": {"at": 100, "to": "mm"},
1272   "name": "SQ_WAVE_PC_HI",
1273   "type_ref": "SQ_WAVE_PC_HI"
1274  },
1275  {
1276   "chips": ["gfx9"],
1277   "map": {"at": 104, "to": "mm"},
1278   "name": "SQ_WAVE_INST_DW0"
1279  },
1280  {
1281   "chips": ["gfx9"],
1282   "map": {"at": 108, "to": "mm"},
1283   "name": "SQ_WAVE_INST_DW1"
1284  },
1285  {
1286   "chips": ["gfx9"],
1287   "map": {"at": 112, "to": "mm"},
1288   "name": "SQ_WAVE_IB_DBG0",
1289   "type_ref": "SQ_WAVE_IB_DBG0"
1290  },
1291  {
1292   "chips": ["gfx9"],
1293   "map": {"at": 116, "to": "mm"},
1294   "name": "SQ_WAVE_IB_DBG1",
1295   "type_ref": "SQ_WAVE_IB_DBG1"
1296  },
1297  {
1298   "chips": ["gfx9"],
1299   "map": {"at": 120, "to": "mm"},
1300   "name": "SQ_WAVE_FLUSH_IB"
1301  },
1302  {
1303   "chips": ["gfx9"],
1304   "map": {"at": 2480, "to": "mm"},
1305   "name": "SQ_WAVE_TTMP0"
1306  },
1307  {
1308   "chips": ["gfx9"],
1309   "map": {"at": 2484, "to": "mm"},
1310   "name": "SQ_WAVE_TTMP1"
1311  },
1312  {
1313   "chips": ["gfx9"],
1314   "map": {"at": 2488, "to": "mm"},
1315   "name": "SQ_WAVE_TTMP2"
1316  },
1317  {
1318   "chips": ["gfx9"],
1319   "map": {"at": 2492, "to": "mm"},
1320   "name": "SQ_WAVE_TTMP3"
1321  },
1322  {
1323   "chips": ["gfx9"],
1324   "map": {"at": 2496, "to": "mm"},
1325   "name": "SQ_WAVE_TTMP4"
1326  },
1327  {
1328   "chips": ["gfx9"],
1329   "map": {"at": 2500, "to": "mm"},
1330   "name": "SQ_WAVE_TTMP5"
1331  },
1332  {
1333   "chips": ["gfx9"],
1334   "map": {"at": 2504, "to": "mm"},
1335   "name": "SQ_WAVE_TTMP6"
1336  },
1337  {
1338   "chips": ["gfx9"],
1339   "map": {"at": 2508, "to": "mm"},
1340   "name": "SQ_WAVE_TTMP7"
1341  },
1342  {
1343   "chips": ["gfx9"],
1344   "map": {"at": 2512, "to": "mm"},
1345   "name": "SQ_WAVE_TTMP8"
1346  },
1347  {
1348   "chips": ["gfx9"],
1349   "map": {"at": 2516, "to": "mm"},
1350   "name": "SQ_WAVE_TTMP9"
1351  },
1352  {
1353   "chips": ["gfx9"],
1354   "map": {"at": 2520, "to": "mm"},
1355   "name": "SQ_WAVE_TTMP10"
1356  },
1357  {
1358   "chips": ["gfx9"],
1359   "map": {"at": 2524, "to": "mm"},
1360   "name": "SQ_WAVE_TTMP11"
1361  },
1362  {
1363   "chips": ["gfx9"],
1364   "map": {"at": 2528, "to": "mm"},
1365   "name": "SQ_WAVE_TTMP12"
1366  },
1367  {
1368   "chips": ["gfx9"],
1369   "map": {"at": 2532, "to": "mm"},
1370   "name": "SQ_WAVE_TTMP13"
1371  },
1372  {
1373   "chips": ["gfx9"],
1374   "map": {"at": 2536, "to": "mm"},
1375   "name": "SQ_WAVE_TTMP14"
1376  },
1377  {
1378   "chips": ["gfx9"],
1379   "map": {"at": 2540, "to": "mm"},
1380   "name": "SQ_WAVE_TTMP15"
1381  },
1382  {
1383   "chips": ["gfx9"],
1384   "map": {"at": 2544, "to": "mm"},
1385   "name": "SQ_WAVE_M0"
1386  },
1387  {
1388   "chips": ["gfx9"],
1389   "map": {"at": 2552, "to": "mm"},
1390   "name": "SQ_WAVE_EXEC_LO"
1391  },
1392  {
1393   "chips": ["gfx9"],
1394   "map": {"at": 2556, "to": "mm"},
1395   "name": "SQ_WAVE_EXEC_HI"
1396  },
1397  {
1398   "chips": ["gfx9"],
1399   "map": {"at": 32776, "to": "mm"},
1400   "name": "GRBM_STATUS2",
1401   "type_ref": "GRBM_STATUS2"
1402  },
1403  {
1404   "chips": ["gfx9"],
1405   "map": {"at": 32784, "to": "mm"},
1406   "name": "GRBM_STATUS",
1407   "type_ref": "GRBM_STATUS"
1408  },
1409  {
1410   "chips": ["gfx9"],
1411   "map": {"at": 32788, "to": "mm"},
1412   "name": "GRBM_STATUS_SE0",
1413   "type_ref": "GRBM_STATUS_SE0"
1414  },
1415  {
1416   "chips": ["gfx9"],
1417   "map": {"at": 32792, "to": "mm"},
1418   "name": "GRBM_STATUS_SE1",
1419   "type_ref": "GRBM_STATUS_SE0"
1420  },
1421  {
1422   "chips": ["gfx9"],
1423   "map": {"at": 32824, "to": "mm"},
1424   "name": "GRBM_STATUS_SE2",
1425   "type_ref": "GRBM_STATUS_SE0"
1426  },
1427  {
1428   "chips": ["gfx9"],
1429   "map": {"at": 32828, "to": "mm"},
1430   "name": "GRBM_STATUS_SE3",
1431   "type_ref": "GRBM_STATUS_SE0"
1432  },
1433  {
1434   "chips": ["gfx9"],
1435   "map": {"at": 33296, "to": "mm"},
1436   "name": "CP_CPC_STATUS",
1437   "type_ref": "CP_CPC_STATUS"
1438  },
1439  {
1440   "chips": ["gfx9"],
1441   "map": {"at": 33300, "to": "mm"},
1442   "name": "CP_CPC_BUSY_STAT",
1443   "type_ref": "CP_CPC_BUSY_STAT"
1444  },
1445  {
1446   "chips": ["gfx9"],
1447   "map": {"at": 33304, "to": "mm"},
1448   "name": "CP_CPC_STALLED_STAT1",
1449   "type_ref": "CP_CPC_STALLED_STAT1"
1450  },
1451  {
1452   "chips": ["gfx9"],
1453   "map": {"at": 33308, "to": "mm"},
1454   "name": "CP_CPF_STATUS",
1455   "type_ref": "CP_CPF_STATUS"
1456  },
1457  {
1458   "chips": ["gfx9"],
1459   "map": {"at": 33312, "to": "mm"},
1460   "name": "CP_CPF_BUSY_STAT",
1461   "type_ref": "CP_CPF_BUSY_STAT"
1462  },
1463  {
1464   "chips": ["gfx9"],
1465   "map": {"at": 33316, "to": "mm"},
1466   "name": "CP_CPF_STALLED_STAT1",
1467   "type_ref": "CP_CPF_STALLED_STAT1"
1468  },
1469  {
1470   "chips": ["gfx9"],
1471   "map": {"at": 33324, "to": "mm"},
1472   "name": "CP_CPC_GRBM_FREE_COUNT",
1473   "type_ref": "CP_CPC_GRBM_FREE_COUNT"
1474  },
1475  {
1476   "chips": ["gfx9"],
1477   "map": {"at": 33344, "to": "mm"},
1478   "name": "CP_CPC_SCRATCH_INDEX",
1479   "type_ref": "CP_CPC_SCRATCH_INDEX"
1480  },
1481  {
1482   "chips": ["gfx9"],
1483   "map": {"at": 33348, "to": "mm"},
1484   "name": "CP_CPC_SCRATCH_DATA"
1485  },
1486  {
1487   "chips": ["gfx9"],
1488   "map": {"at": 33352, "to": "mm"},
1489   "name": "CP_CPF_GRBM_FREE_COUNT",
1490   "type_ref": "CP_CPF_GRBM_FREE_COUNT"
1491  },
1492  {
1493   "chips": ["gfx9"],
1494   "map": {"at": 33436, "to": "mm"},
1495   "name": "CP_CPC_HALT_HYST_COUNT",
1496   "type_ref": "CP_CPC_HALT_HYST_COUNT"
1497  },
1498  {
1499   "chips": ["gfx9"],
1500   "map": {"at": 36608, "to": "mm"},
1501   "name": "SQ_BUF_RSRC_WORD0"
1502  },
1503  {
1504   "chips": ["gfx9"],
1505   "map": {"at": 36612, "to": "mm"},
1506   "name": "SQ_BUF_RSRC_WORD1",
1507   "type_ref": "SQ_BUF_RSRC_WORD1"
1508  },
1509  {
1510   "chips": ["gfx9"],
1511   "map": {"at": 36616, "to": "mm"},
1512   "name": "SQ_BUF_RSRC_WORD2"
1513  },
1514  {
1515   "chips": ["gfx9"],
1516   "map": {"at": 36620, "to": "mm"},
1517   "name": "SQ_BUF_RSRC_WORD3",
1518   "type_ref": "SQ_BUF_RSRC_WORD3"
1519  },
1520  {
1521   "chips": ["gfx9"],
1522   "map": {"at": 36624, "to": "mm"},
1523   "name": "SQ_IMG_RSRC_WORD0"
1524  },
1525  {
1526   "chips": ["gfx9"],
1527   "map": {"at": 36628, "to": "mm"},
1528   "name": "SQ_IMG_RSRC_WORD1",
1529   "type_ref": "SQ_IMG_RSRC_WORD1"
1530  },
1531  {
1532   "chips": ["gfx9"],
1533   "map": {"at": 36632, "to": "mm"},
1534   "name": "SQ_IMG_RSRC_WORD2",
1535   "type_ref": "SQ_IMG_RSRC_WORD2"
1536  },
1537  {
1538   "chips": ["gfx9"],
1539   "map": {"at": 36636, "to": "mm"},
1540   "name": "SQ_IMG_RSRC_WORD3",
1541   "type_ref": "SQ_IMG_RSRC_WORD3"
1542  },
1543  {
1544   "chips": ["gfx9"],
1545   "map": {"at": 36640, "to": "mm"},
1546   "name": "SQ_IMG_RSRC_WORD4",
1547   "type_ref": "SQ_IMG_RSRC_WORD4"
1548  },
1549  {
1550   "chips": ["gfx9"],
1551   "map": {"at": 36644, "to": "mm"},
1552   "name": "SQ_IMG_RSRC_WORD5",
1553   "type_ref": "SQ_IMG_RSRC_WORD5"
1554  },
1555  {
1556   "chips": ["gfx9"],
1557   "map": {"at": 36648, "to": "mm"},
1558   "name": "SQ_IMG_RSRC_WORD6",
1559   "type_ref": "SQ_IMG_RSRC_WORD6"
1560  },
1561  {
1562   "chips": ["gfx9"],
1563   "map": {"at": 36652, "to": "mm"},
1564   "name": "SQ_IMG_RSRC_WORD7"
1565  },
1566  {
1567   "chips": ["gfx9"],
1568   "map": {"at": 36656, "to": "mm"},
1569   "name": "SQ_IMG_SAMP_WORD0",
1570   "type_ref": "SQ_IMG_SAMP_WORD0"
1571  },
1572  {
1573   "chips": ["gfx9"],
1574   "map": {"at": 36660, "to": "mm"},
1575   "name": "SQ_IMG_SAMP_WORD1",
1576   "type_ref": "SQ_IMG_SAMP_WORD1"
1577  },
1578  {
1579   "chips": ["gfx9"],
1580   "map": {"at": 36664, "to": "mm"},
1581   "name": "SQ_IMG_SAMP_WORD2",
1582   "type_ref": "SQ_IMG_SAMP_WORD2"
1583  },
1584  {
1585   "chips": ["gfx9"],
1586   "map": {"at": 36668, "to": "mm"},
1587   "name": "SQ_IMG_SAMP_WORD3",
1588   "type_ref": "SQ_IMG_SAMP_WORD3"
1589  },
1590  {
1591   "chips": ["gfx9"],
1592   "map": {"at": 39160, "to": "mm"},
1593   "name": "GB_ADDR_CONFIG",
1594   "type_ref": "GB_ADDR_CONFIG"
1595  },
1596  {
1597   "chips": ["gfx9"],
1598   "map": {"at": 39184, "to": "mm"},
1599   "name": "GB_TILE_MODE0",
1600   "type_ref": "GB_TILE_MODE0"
1601  },
1602  {
1603   "chips": ["gfx9"],
1604   "map": {"at": 39188, "to": "mm"},
1605   "name": "GB_TILE_MODE1",
1606   "type_ref": "GB_TILE_MODE0"
1607  },
1608  {
1609   "chips": ["gfx9"],
1610   "map": {"at": 39192, "to": "mm"},
1611   "name": "GB_TILE_MODE2",
1612   "type_ref": "GB_TILE_MODE0"
1613  },
1614  {
1615   "chips": ["gfx9"],
1616   "map": {"at": 39196, "to": "mm"},
1617   "name": "GB_TILE_MODE3",
1618   "type_ref": "GB_TILE_MODE0"
1619  },
1620  {
1621   "chips": ["gfx9"],
1622   "map": {"at": 39200, "to": "mm"},
1623   "name": "GB_TILE_MODE4",
1624   "type_ref": "GB_TILE_MODE0"
1625  },
1626  {
1627   "chips": ["gfx9"],
1628   "map": {"at": 39204, "to": "mm"},
1629   "name": "GB_TILE_MODE5",
1630   "type_ref": "GB_TILE_MODE0"
1631  },
1632  {
1633   "chips": ["gfx9"],
1634   "map": {"at": 39208, "to": "mm"},
1635   "name": "GB_TILE_MODE6",
1636   "type_ref": "GB_TILE_MODE0"
1637  },
1638  {
1639   "chips": ["gfx9"],
1640   "map": {"at": 39212, "to": "mm"},
1641   "name": "GB_TILE_MODE7",
1642   "type_ref": "GB_TILE_MODE0"
1643  },
1644  {
1645   "chips": ["gfx9"],
1646   "map": {"at": 39216, "to": "mm"},
1647   "name": "GB_TILE_MODE8",
1648   "type_ref": "GB_TILE_MODE0"
1649  },
1650  {
1651   "chips": ["gfx9"],
1652   "map": {"at": 39220, "to": "mm"},
1653   "name": "GB_TILE_MODE9",
1654   "type_ref": "GB_TILE_MODE0"
1655  },
1656  {
1657   "chips": ["gfx9"],
1658   "map": {"at": 39224, "to": "mm"},
1659   "name": "GB_TILE_MODE10",
1660   "type_ref": "GB_TILE_MODE0"
1661  },
1662  {
1663   "chips": ["gfx9"],
1664   "map": {"at": 39228, "to": "mm"},
1665   "name": "GB_TILE_MODE11",
1666   "type_ref": "GB_TILE_MODE0"
1667  },
1668  {
1669   "chips": ["gfx9"],
1670   "map": {"at": 39232, "to": "mm"},
1671   "name": "GB_TILE_MODE12",
1672   "type_ref": "GB_TILE_MODE0"
1673  },
1674  {
1675   "chips": ["gfx9"],
1676   "map": {"at": 39236, "to": "mm"},
1677   "name": "GB_TILE_MODE13",
1678   "type_ref": "GB_TILE_MODE0"
1679  },
1680  {
1681   "chips": ["gfx9"],
1682   "map": {"at": 39240, "to": "mm"},
1683   "name": "GB_TILE_MODE14",
1684   "type_ref": "GB_TILE_MODE0"
1685  },
1686  {
1687   "chips": ["gfx9"],
1688   "map": {"at": 39244, "to": "mm"},
1689   "name": "GB_TILE_MODE15",
1690   "type_ref": "GB_TILE_MODE0"
1691  },
1692  {
1693   "chips": ["gfx9"],
1694   "map": {"at": 39248, "to": "mm"},
1695   "name": "GB_TILE_MODE16",
1696   "type_ref": "GB_TILE_MODE0"
1697  },
1698  {
1699   "chips": ["gfx9"],
1700   "map": {"at": 39252, "to": "mm"},
1701   "name": "GB_TILE_MODE17",
1702   "type_ref": "GB_TILE_MODE0"
1703  },
1704  {
1705   "chips": ["gfx9"],
1706   "map": {"at": 39256, "to": "mm"},
1707   "name": "GB_TILE_MODE18",
1708   "type_ref": "GB_TILE_MODE0"
1709  },
1710  {
1711   "chips": ["gfx9"],
1712   "map": {"at": 39260, "to": "mm"},
1713   "name": "GB_TILE_MODE19",
1714   "type_ref": "GB_TILE_MODE0"
1715  },
1716  {
1717   "chips": ["gfx9"],
1718   "map": {"at": 39264, "to": "mm"},
1719   "name": "GB_TILE_MODE20",
1720   "type_ref": "GB_TILE_MODE0"
1721  },
1722  {
1723   "chips": ["gfx9"],
1724   "map": {"at": 39268, "to": "mm"},
1725   "name": "GB_TILE_MODE21",
1726   "type_ref": "GB_TILE_MODE0"
1727  },
1728  {
1729   "chips": ["gfx9"],
1730   "map": {"at": 39272, "to": "mm"},
1731   "name": "GB_TILE_MODE22",
1732   "type_ref": "GB_TILE_MODE0"
1733  },
1734  {
1735   "chips": ["gfx9"],
1736   "map": {"at": 39276, "to": "mm"},
1737   "name": "GB_TILE_MODE23",
1738   "type_ref": "GB_TILE_MODE0"
1739  },
1740  {
1741   "chips": ["gfx9"],
1742   "map": {"at": 39280, "to": "mm"},
1743   "name": "GB_TILE_MODE24",
1744   "type_ref": "GB_TILE_MODE0"
1745  },
1746  {
1747   "chips": ["gfx9"],
1748   "map": {"at": 39284, "to": "mm"},
1749   "name": "GB_TILE_MODE25",
1750   "type_ref": "GB_TILE_MODE0"
1751  },
1752  {
1753   "chips": ["gfx9"],
1754   "map": {"at": 39288, "to": "mm"},
1755   "name": "GB_TILE_MODE26",
1756   "type_ref": "GB_TILE_MODE0"
1757  },
1758  {
1759   "chips": ["gfx9"],
1760   "map": {"at": 39292, "to": "mm"},
1761   "name": "GB_TILE_MODE27",
1762   "type_ref": "GB_TILE_MODE0"
1763  },
1764  {
1765   "chips": ["gfx9"],
1766   "map": {"at": 39296, "to": "mm"},
1767   "name": "GB_TILE_MODE28",
1768   "type_ref": "GB_TILE_MODE0"
1769  },
1770  {
1771   "chips": ["gfx9"],
1772   "map": {"at": 39300, "to": "mm"},
1773   "name": "GB_TILE_MODE29",
1774   "type_ref": "GB_TILE_MODE0"
1775  },
1776  {
1777   "chips": ["gfx9"],
1778   "map": {"at": 39304, "to": "mm"},
1779   "name": "GB_TILE_MODE30",
1780   "type_ref": "GB_TILE_MODE0"
1781  },
1782  {
1783   "chips": ["gfx9"],
1784   "map": {"at": 39308, "to": "mm"},
1785   "name": "GB_TILE_MODE31",
1786   "type_ref": "GB_TILE_MODE0"
1787  },
1788  {
1789   "chips": ["gfx9"],
1790   "map": {"at": 39312, "to": "mm"},
1791   "name": "GB_MACROTILE_MODE0",
1792   "type_ref": "GB_MACROTILE_MODE0"
1793  },
1794  {
1795   "chips": ["gfx9"],
1796   "map": {"at": 39316, "to": "mm"},
1797   "name": "GB_MACROTILE_MODE1",
1798   "type_ref": "GB_MACROTILE_MODE0"
1799  },
1800  {
1801   "chips": ["gfx9"],
1802   "map": {"at": 39320, "to": "mm"},
1803   "name": "GB_MACROTILE_MODE2",
1804   "type_ref": "GB_MACROTILE_MODE0"
1805  },
1806  {
1807   "chips": ["gfx9"],
1808   "map": {"at": 39324, "to": "mm"},
1809   "name": "GB_MACROTILE_MODE3",
1810   "type_ref": "GB_MACROTILE_MODE0"
1811  },
1812  {
1813   "chips": ["gfx9"],
1814   "map": {"at": 39328, "to": "mm"},
1815   "name": "GB_MACROTILE_MODE4",
1816   "type_ref": "GB_MACROTILE_MODE0"
1817  },
1818  {
1819   "chips": ["gfx9"],
1820   "map": {"at": 39332, "to": "mm"},
1821   "name": "GB_MACROTILE_MODE5",
1822   "type_ref": "GB_MACROTILE_MODE0"
1823  },
1824  {
1825   "chips": ["gfx9"],
1826   "map": {"at": 39336, "to": "mm"},
1827   "name": "GB_MACROTILE_MODE6",
1828   "type_ref": "GB_MACROTILE_MODE0"
1829  },
1830  {
1831   "chips": ["gfx9"],
1832   "map": {"at": 39340, "to": "mm"},
1833   "name": "GB_MACROTILE_MODE7",
1834   "type_ref": "GB_MACROTILE_MODE0"
1835  },
1836  {
1837   "chips": ["gfx9"],
1838   "map": {"at": 39344, "to": "mm"},
1839   "name": "GB_MACROTILE_MODE8",
1840   "type_ref": "GB_MACROTILE_MODE0"
1841  },
1842  {
1843   "chips": ["gfx9"],
1844   "map": {"at": 39348, "to": "mm"},
1845   "name": "GB_MACROTILE_MODE9",
1846   "type_ref": "GB_MACROTILE_MODE0"
1847  },
1848  {
1849   "chips": ["gfx9"],
1850   "map": {"at": 39352, "to": "mm"},
1851   "name": "GB_MACROTILE_MODE10",
1852   "type_ref": "GB_MACROTILE_MODE0"
1853  },
1854  {
1855   "chips": ["gfx9"],
1856   "map": {"at": 39356, "to": "mm"},
1857   "name": "GB_MACROTILE_MODE11",
1858   "type_ref": "GB_MACROTILE_MODE0"
1859  },
1860  {
1861   "chips": ["gfx9"],
1862   "map": {"at": 39360, "to": "mm"},
1863   "name": "GB_MACROTILE_MODE12",
1864   "type_ref": "GB_MACROTILE_MODE0"
1865  },
1866  {
1867   "chips": ["gfx9"],
1868   "map": {"at": 39364, "to": "mm"},
1869   "name": "GB_MACROTILE_MODE13",
1870   "type_ref": "GB_MACROTILE_MODE0"
1871  },
1872  {
1873   "chips": ["gfx9"],
1874   "map": {"at": 39368, "to": "mm"},
1875   "name": "GB_MACROTILE_MODE14",
1876   "type_ref": "GB_MACROTILE_MODE0"
1877  },
1878  {
1879   "chips": ["gfx9"],
1880   "map": {"at": 39372, "to": "mm"},
1881   "name": "GB_MACROTILE_MODE15",
1882   "type_ref": "GB_MACROTILE_MODE0"
1883  },
1884  {
1885   "chips": ["gfx9"],
1886   "map": {"at": 45084, "to": "mm"},
1887   "name": "SPI_SHADER_PGM_RSRC3_PS",
1888   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
1889  },
1890  {
1891   "chips": ["gfx9"],
1892   "map": {"at": 45088, "to": "mm"},
1893   "name": "SPI_SHADER_PGM_LO_PS"
1894  },
1895  {
1896   "chips": ["gfx9"],
1897   "map": {"at": 45092, "to": "mm"},
1898   "name": "SPI_SHADER_PGM_HI_PS",
1899   "type_ref": "SPI_SHADER_PGM_HI_PS"
1900  },
1901  {
1902   "chips": ["gfx9"],
1903   "map": {"at": 45096, "to": "mm"},
1904   "name": "SPI_SHADER_PGM_RSRC1_PS",
1905   "type_ref": "SPI_SHADER_PGM_RSRC1_PS"
1906  },
1907  {
1908   "chips": ["gfx9"],
1909   "map": {"at": 45100, "to": "mm"},
1910   "name": "SPI_SHADER_PGM_RSRC2_PS",
1911   "type_ref": "SPI_SHADER_PGM_RSRC2_PS"
1912  },
1913  {
1914   "chips": ["gfx9"],
1915   "map": {"at": 45104, "to": "mm"},
1916   "name": "SPI_SHADER_USER_DATA_PS_0"
1917  },
1918  {
1919   "chips": ["gfx9"],
1920   "map": {"at": 45108, "to": "mm"},
1921   "name": "SPI_SHADER_USER_DATA_PS_1"
1922  },
1923  {
1924   "chips": ["gfx9"],
1925   "map": {"at": 45112, "to": "mm"},
1926   "name": "SPI_SHADER_USER_DATA_PS_2"
1927  },
1928  {
1929   "chips": ["gfx9"],
1930   "map": {"at": 45116, "to": "mm"},
1931   "name": "SPI_SHADER_USER_DATA_PS_3"
1932  },
1933  {
1934   "chips": ["gfx9"],
1935   "map": {"at": 45120, "to": "mm"},
1936   "name": "SPI_SHADER_USER_DATA_PS_4"
1937  },
1938  {
1939   "chips": ["gfx9"],
1940   "map": {"at": 45124, "to": "mm"},
1941   "name": "SPI_SHADER_USER_DATA_PS_5"
1942  },
1943  {
1944   "chips": ["gfx9"],
1945   "map": {"at": 45128, "to": "mm"},
1946   "name": "SPI_SHADER_USER_DATA_PS_6"
1947  },
1948  {
1949   "chips": ["gfx9"],
1950   "map": {"at": 45132, "to": "mm"},
1951   "name": "SPI_SHADER_USER_DATA_PS_7"
1952  },
1953  {
1954   "chips": ["gfx9"],
1955   "map": {"at": 45136, "to": "mm"},
1956   "name": "SPI_SHADER_USER_DATA_PS_8"
1957  },
1958  {
1959   "chips": ["gfx9"],
1960   "map": {"at": 45140, "to": "mm"},
1961   "name": "SPI_SHADER_USER_DATA_PS_9"
1962  },
1963  {
1964   "chips": ["gfx9"],
1965   "map": {"at": 45144, "to": "mm"},
1966   "name": "SPI_SHADER_USER_DATA_PS_10"
1967  },
1968  {
1969   "chips": ["gfx9"],
1970   "map": {"at": 45148, "to": "mm"},
1971   "name": "SPI_SHADER_USER_DATA_PS_11"
1972  },
1973  {
1974   "chips": ["gfx9"],
1975   "map": {"at": 45152, "to": "mm"},
1976   "name": "SPI_SHADER_USER_DATA_PS_12"
1977  },
1978  {
1979   "chips": ["gfx9"],
1980   "map": {"at": 45156, "to": "mm"},
1981   "name": "SPI_SHADER_USER_DATA_PS_13"
1982  },
1983  {
1984   "chips": ["gfx9"],
1985   "map": {"at": 45160, "to": "mm"},
1986   "name": "SPI_SHADER_USER_DATA_PS_14"
1987  },
1988  {
1989   "chips": ["gfx9"],
1990   "map": {"at": 45164, "to": "mm"},
1991   "name": "SPI_SHADER_USER_DATA_PS_15"
1992  },
1993  {
1994   "chips": ["gfx9"],
1995   "map": {"at": 45168, "to": "mm"},
1996   "name": "SPI_SHADER_USER_DATA_PS_16"
1997  },
1998  {
1999   "chips": ["gfx9"],
2000   "map": {"at": 45172, "to": "mm"},
2001   "name": "SPI_SHADER_USER_DATA_PS_17"
2002  },
2003  {
2004   "chips": ["gfx9"],
2005   "map": {"at": 45176, "to": "mm"},
2006   "name": "SPI_SHADER_USER_DATA_PS_18"
2007  },
2008  {
2009   "chips": ["gfx9"],
2010   "map": {"at": 45180, "to": "mm"},
2011   "name": "SPI_SHADER_USER_DATA_PS_19"
2012  },
2013  {
2014   "chips": ["gfx9"],
2015   "map": {"at": 45184, "to": "mm"},
2016   "name": "SPI_SHADER_USER_DATA_PS_20"
2017  },
2018  {
2019   "chips": ["gfx9"],
2020   "map": {"at": 45188, "to": "mm"},
2021   "name": "SPI_SHADER_USER_DATA_PS_21"
2022  },
2023  {
2024   "chips": ["gfx9"],
2025   "map": {"at": 45192, "to": "mm"},
2026   "name": "SPI_SHADER_USER_DATA_PS_22"
2027  },
2028  {
2029   "chips": ["gfx9"],
2030   "map": {"at": 45196, "to": "mm"},
2031   "name": "SPI_SHADER_USER_DATA_PS_23"
2032  },
2033  {
2034   "chips": ["gfx9"],
2035   "map": {"at": 45200, "to": "mm"},
2036   "name": "SPI_SHADER_USER_DATA_PS_24"
2037  },
2038  {
2039   "chips": ["gfx9"],
2040   "map": {"at": 45204, "to": "mm"},
2041   "name": "SPI_SHADER_USER_DATA_PS_25"
2042  },
2043  {
2044   "chips": ["gfx9"],
2045   "map": {"at": 45208, "to": "mm"},
2046   "name": "SPI_SHADER_USER_DATA_PS_26"
2047  },
2048  {
2049   "chips": ["gfx9"],
2050   "map": {"at": 45212, "to": "mm"},
2051   "name": "SPI_SHADER_USER_DATA_PS_27"
2052  },
2053  {
2054   "chips": ["gfx9"],
2055   "map": {"at": 45216, "to": "mm"},
2056   "name": "SPI_SHADER_USER_DATA_PS_28"
2057  },
2058  {
2059   "chips": ["gfx9"],
2060   "map": {"at": 45220, "to": "mm"},
2061   "name": "SPI_SHADER_USER_DATA_PS_29"
2062  },
2063  {
2064   "chips": ["gfx9"],
2065   "map": {"at": 45224, "to": "mm"},
2066   "name": "SPI_SHADER_USER_DATA_PS_30"
2067  },
2068  {
2069   "chips": ["gfx9"],
2070   "map": {"at": 45228, "to": "mm"},
2071   "name": "SPI_SHADER_USER_DATA_PS_31"
2072  },
2073  {
2074   "chips": ["gfx9"],
2075   "map": {"at": 45336, "to": "mm"},
2076   "name": "SPI_SHADER_PGM_RSRC3_VS",
2077   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
2078  },
2079  {
2080   "chips": ["gfx9"],
2081   "map": {"at": 45340, "to": "mm"},
2082   "name": "SPI_SHADER_LATE_ALLOC_VS",
2083   "type_ref": "SPI_SHADER_LATE_ALLOC_VS"
2084  },
2085  {
2086   "chips": ["gfx9"],
2087   "map": {"at": 45344, "to": "mm"},
2088   "name": "SPI_SHADER_PGM_LO_VS"
2089  },
2090  {
2091   "chips": ["gfx9"],
2092   "map": {"at": 45348, "to": "mm"},
2093   "name": "SPI_SHADER_PGM_HI_VS",
2094   "type_ref": "SPI_SHADER_PGM_HI_PS"
2095  },
2096  {
2097   "chips": ["gfx9"],
2098   "map": {"at": 45352, "to": "mm"},
2099   "name": "SPI_SHADER_PGM_RSRC1_VS",
2100   "type_ref": "SPI_SHADER_PGM_RSRC1_VS"
2101  },
2102  {
2103   "chips": ["gfx9"],
2104   "map": {"at": 45356, "to": "mm"},
2105   "name": "SPI_SHADER_PGM_RSRC2_VS",
2106   "type_ref": "SPI_SHADER_PGM_RSRC2_VS"
2107  },
2108  {
2109   "chips": ["gfx9"],
2110   "map": {"at": 45360, "to": "mm"},
2111   "name": "SPI_SHADER_USER_DATA_VS_0"
2112  },
2113  {
2114   "chips": ["gfx9"],
2115   "map": {"at": 45364, "to": "mm"},
2116   "name": "SPI_SHADER_USER_DATA_VS_1"
2117  },
2118  {
2119   "chips": ["gfx9"],
2120   "map": {"at": 45368, "to": "mm"},
2121   "name": "SPI_SHADER_USER_DATA_VS_2"
2122  },
2123  {
2124   "chips": ["gfx9"],
2125   "map": {"at": 45372, "to": "mm"},
2126   "name": "SPI_SHADER_USER_DATA_VS_3"
2127  },
2128  {
2129   "chips": ["gfx9"],
2130   "map": {"at": 45376, "to": "mm"},
2131   "name": "SPI_SHADER_USER_DATA_VS_4"
2132  },
2133  {
2134   "chips": ["gfx9"],
2135   "map": {"at": 45380, "to": "mm"},
2136   "name": "SPI_SHADER_USER_DATA_VS_5"
2137  },
2138  {
2139   "chips": ["gfx9"],
2140   "map": {"at": 45384, "to": "mm"},
2141   "name": "SPI_SHADER_USER_DATA_VS_6"
2142  },
2143  {
2144   "chips": ["gfx9"],
2145   "map": {"at": 45388, "to": "mm"},
2146   "name": "SPI_SHADER_USER_DATA_VS_7"
2147  },
2148  {
2149   "chips": ["gfx9"],
2150   "map": {"at": 45392, "to": "mm"},
2151   "name": "SPI_SHADER_USER_DATA_VS_8"
2152  },
2153  {
2154   "chips": ["gfx9"],
2155   "map": {"at": 45396, "to": "mm"},
2156   "name": "SPI_SHADER_USER_DATA_VS_9"
2157  },
2158  {
2159   "chips": ["gfx9"],
2160   "map": {"at": 45400, "to": "mm"},
2161   "name": "SPI_SHADER_USER_DATA_VS_10"
2162  },
2163  {
2164   "chips": ["gfx9"],
2165   "map": {"at": 45404, "to": "mm"},
2166   "name": "SPI_SHADER_USER_DATA_VS_11"
2167  },
2168  {
2169   "chips": ["gfx9"],
2170   "map": {"at": 45408, "to": "mm"},
2171   "name": "SPI_SHADER_USER_DATA_VS_12"
2172  },
2173  {
2174   "chips": ["gfx9"],
2175   "map": {"at": 45412, "to": "mm"},
2176   "name": "SPI_SHADER_USER_DATA_VS_13"
2177  },
2178  {
2179   "chips": ["gfx9"],
2180   "map": {"at": 45416, "to": "mm"},
2181   "name": "SPI_SHADER_USER_DATA_VS_14"
2182  },
2183  {
2184   "chips": ["gfx9"],
2185   "map": {"at": 45420, "to": "mm"},
2186   "name": "SPI_SHADER_USER_DATA_VS_15"
2187  },
2188  {
2189   "chips": ["gfx9"],
2190   "map": {"at": 45424, "to": "mm"},
2191   "name": "SPI_SHADER_USER_DATA_VS_16"
2192  },
2193  {
2194   "chips": ["gfx9"],
2195   "map": {"at": 45428, "to": "mm"},
2196   "name": "SPI_SHADER_USER_DATA_VS_17"
2197  },
2198  {
2199   "chips": ["gfx9"],
2200   "map": {"at": 45432, "to": "mm"},
2201   "name": "SPI_SHADER_USER_DATA_VS_18"
2202  },
2203  {
2204   "chips": ["gfx9"],
2205   "map": {"at": 45436, "to": "mm"},
2206   "name": "SPI_SHADER_USER_DATA_VS_19"
2207  },
2208  {
2209   "chips": ["gfx9"],
2210   "map": {"at": 45440, "to": "mm"},
2211   "name": "SPI_SHADER_USER_DATA_VS_20"
2212  },
2213  {
2214   "chips": ["gfx9"],
2215   "map": {"at": 45444, "to": "mm"},
2216   "name": "SPI_SHADER_USER_DATA_VS_21"
2217  },
2218  {
2219   "chips": ["gfx9"],
2220   "map": {"at": 45448, "to": "mm"},
2221   "name": "SPI_SHADER_USER_DATA_VS_22"
2222  },
2223  {
2224   "chips": ["gfx9"],
2225   "map": {"at": 45452, "to": "mm"},
2226   "name": "SPI_SHADER_USER_DATA_VS_23"
2227  },
2228  {
2229   "chips": ["gfx9"],
2230   "map": {"at": 45456, "to": "mm"},
2231   "name": "SPI_SHADER_USER_DATA_VS_24"
2232  },
2233  {
2234   "chips": ["gfx9"],
2235   "map": {"at": 45460, "to": "mm"},
2236   "name": "SPI_SHADER_USER_DATA_VS_25"
2237  },
2238  {
2239   "chips": ["gfx9"],
2240   "map": {"at": 45464, "to": "mm"},
2241   "name": "SPI_SHADER_USER_DATA_VS_26"
2242  },
2243  {
2244   "chips": ["gfx9"],
2245   "map": {"at": 45468, "to": "mm"},
2246   "name": "SPI_SHADER_USER_DATA_VS_27"
2247  },
2248  {
2249   "chips": ["gfx9"],
2250   "map": {"at": 45472, "to": "mm"},
2251   "name": "SPI_SHADER_USER_DATA_VS_28"
2252  },
2253  {
2254   "chips": ["gfx9"],
2255   "map": {"at": 45476, "to": "mm"},
2256   "name": "SPI_SHADER_USER_DATA_VS_29"
2257  },
2258  {
2259   "chips": ["gfx9"],
2260   "map": {"at": 45480, "to": "mm"},
2261   "name": "SPI_SHADER_USER_DATA_VS_30"
2262  },
2263  {
2264   "chips": ["gfx9"],
2265   "map": {"at": 45484, "to": "mm"},
2266   "name": "SPI_SHADER_USER_DATA_VS_31"
2267  },
2268  {
2269   "chips": ["gfx9"],
2270   "map": {"at": 45552, "to": "mm"},
2271   "name": "SPI_SHADER_PGM_RSRC2_GS_VS",
2272   "type_ref": "SPI_SHADER_PGM_RSRC2_GS_VS"
2273  },
2274  {
2275   "chips": ["gfx9"],
2276   "map": {"at": 45572, "to": "mm"},
2277   "name": "SPI_SHADER_PGM_RSRC4_GS",
2278   "type_ref": "SPI_SHADER_PGM_RSRC4_GS"
2279  },
2280  {
2281   "chips": ["gfx9"],
2282   "map": {"at": 45576, "to": "mm"},
2283   "name": "SPI_SHADER_USER_DATA_ADDR_LO_GS"
2284  },
2285  {
2286   "chips": ["gfx9"],
2287   "map": {"at": 45580, "to": "mm"},
2288   "name": "SPI_SHADER_USER_DATA_ADDR_HI_GS"
2289  },
2290  {
2291   "chips": ["gfx9"],
2292   "map": {"at": 45584, "to": "mm"},
2293   "name": "SPI_SHADER_PGM_LO_ES"
2294  },
2295  {
2296   "chips": ["gfx9"],
2297   "map": {"at": 45588, "to": "mm"},
2298   "name": "SPI_SHADER_PGM_HI_ES",
2299   "type_ref": "SPI_SHADER_PGM_HI_PS"
2300  },
2301  {
2302   "chips": ["gfx9"],
2303   "map": {"at": 45596, "to": "mm"},
2304   "name": "SPI_SHADER_PGM_RSRC3_GS",
2305   "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
2306  },
2307  {
2308   "chips": ["gfx9"],
2309   "map": {"at": 45600, "to": "mm"},
2310   "name": "SPI_SHADER_PGM_LO_GS"
2311  },
2312  {
2313   "chips": ["gfx9"],
2314   "map": {"at": 45604, "to": "mm"},
2315   "name": "SPI_SHADER_PGM_HI_GS",
2316   "type_ref": "SPI_SHADER_PGM_HI_PS"
2317  },
2318  {
2319   "chips": ["gfx9"],
2320   "map": {"at": 45608, "to": "mm"},
2321   "name": "SPI_SHADER_PGM_RSRC1_GS",
2322   "type_ref": "SPI_SHADER_PGM_RSRC1_GS"
2323  },
2324  {
2325   "chips": ["gfx9"],
2326   "map": {"at": 45612, "to": "mm"},
2327   "name": "SPI_SHADER_PGM_RSRC2_GS",
2328   "type_ref": "SPI_SHADER_PGM_RSRC2_GS"
2329  },
2330  {
2331   "chips": ["gfx9"],
2332   "map": {"at": 45872, "to": "mm"},
2333   "name": "SPI_SHADER_USER_DATA_ES_0"
2334  },
2335  {
2336   "chips": ["gfx9"],
2337   "map": {"at": 45876, "to": "mm"},
2338   "name": "SPI_SHADER_USER_DATA_ES_1"
2339  },
2340  {
2341   "chips": ["gfx9"],
2342   "map": {"at": 45880, "to": "mm"},
2343   "name": "SPI_SHADER_USER_DATA_ES_2"
2344  },
2345  {
2346   "chips": ["gfx9"],
2347   "map": {"at": 45884, "to": "mm"},
2348   "name": "SPI_SHADER_USER_DATA_ES_3"
2349  },
2350  {
2351   "chips": ["gfx9"],
2352   "map": {"at": 45888, "to": "mm"},
2353   "name": "SPI_SHADER_USER_DATA_ES_4"
2354  },
2355  {
2356   "chips": ["gfx9"],
2357   "map": {"at": 45892, "to": "mm"},
2358   "name": "SPI_SHADER_USER_DATA_ES_5"
2359  },
2360  {
2361   "chips": ["gfx9"],
2362   "map": {"at": 45896, "to": "mm"},
2363   "name": "SPI_SHADER_USER_DATA_ES_6"
2364  },
2365  {
2366   "chips": ["gfx9"],
2367   "map": {"at": 45900, "to": "mm"},
2368   "name": "SPI_SHADER_USER_DATA_ES_7"
2369  },
2370  {
2371   "chips": ["gfx9"],
2372   "map": {"at": 45904, "to": "mm"},
2373   "name": "SPI_SHADER_USER_DATA_ES_8"
2374  },
2375  {
2376   "chips": ["gfx9"],
2377   "map": {"at": 45908, "to": "mm"},
2378   "name": "SPI_SHADER_USER_DATA_ES_9"
2379  },
2380  {
2381   "chips": ["gfx9"],
2382   "map": {"at": 45912, "to": "mm"},
2383   "name": "SPI_SHADER_USER_DATA_ES_10"
2384  },
2385  {
2386   "chips": ["gfx9"],
2387   "map": {"at": 45916, "to": "mm"},
2388   "name": "SPI_SHADER_USER_DATA_ES_11"
2389  },
2390  {
2391   "chips": ["gfx9"],
2392   "map": {"at": 45920, "to": "mm"},
2393   "name": "SPI_SHADER_USER_DATA_ES_12"
2394  },
2395  {
2396   "chips": ["gfx9"],
2397   "map": {"at": 45924, "to": "mm"},
2398   "name": "SPI_SHADER_USER_DATA_ES_13"
2399  },
2400  {
2401   "chips": ["gfx9"],
2402   "map": {"at": 45928, "to": "mm"},
2403   "name": "SPI_SHADER_USER_DATA_ES_14"
2404  },
2405  {
2406   "chips": ["gfx9"],
2407   "map": {"at": 45932, "to": "mm"},
2408   "name": "SPI_SHADER_USER_DATA_ES_15"
2409  },
2410  {
2411   "chips": ["gfx9"],
2412   "map": {"at": 45936, "to": "mm"},
2413   "name": "SPI_SHADER_USER_DATA_ES_16"
2414  },
2415  {
2416   "chips": ["gfx9"],
2417   "map": {"at": 45940, "to": "mm"},
2418   "name": "SPI_SHADER_USER_DATA_ES_17"
2419  },
2420  {
2421   "chips": ["gfx9"],
2422   "map": {"at": 45944, "to": "mm"},
2423   "name": "SPI_SHADER_USER_DATA_ES_18"
2424  },
2425  {
2426   "chips": ["gfx9"],
2427   "map": {"at": 45948, "to": "mm"},
2428   "name": "SPI_SHADER_USER_DATA_ES_19"
2429  },
2430  {
2431   "chips": ["gfx9"],
2432   "map": {"at": 45952, "to": "mm"},
2433   "name": "SPI_SHADER_USER_DATA_ES_20"
2434  },
2435  {
2436   "chips": ["gfx9"],
2437   "map": {"at": 45956, "to": "mm"},
2438   "name": "SPI_SHADER_USER_DATA_ES_21"
2439  },
2440  {
2441   "chips": ["gfx9"],
2442   "map": {"at": 45960, "to": "mm"},
2443   "name": "SPI_SHADER_USER_DATA_ES_22"
2444  },
2445  {
2446   "chips": ["gfx9"],
2447   "map": {"at": 45964, "to": "mm"},
2448   "name": "SPI_SHADER_USER_DATA_ES_23"
2449  },
2450  {
2451   "chips": ["gfx9"],
2452   "map": {"at": 45968, "to": "mm"},
2453   "name": "SPI_SHADER_USER_DATA_ES_24"
2454  },
2455  {
2456   "chips": ["gfx9"],
2457   "map": {"at": 45972, "to": "mm"},
2458   "name": "SPI_SHADER_USER_DATA_ES_25"
2459  },
2460  {
2461   "chips": ["gfx9"],
2462   "map": {"at": 45976, "to": "mm"},
2463   "name": "SPI_SHADER_USER_DATA_ES_26"
2464  },
2465  {
2466   "chips": ["gfx9"],
2467   "map": {"at": 45980, "to": "mm"},
2468   "name": "SPI_SHADER_USER_DATA_ES_27"
2469  },
2470  {
2471   "chips": ["gfx9"],
2472   "map": {"at": 45984, "to": "mm"},
2473   "name": "SPI_SHADER_USER_DATA_ES_28"
2474  },
2475  {
2476   "chips": ["gfx9"],
2477   "map": {"at": 45988, "to": "mm"},
2478   "name": "SPI_SHADER_USER_DATA_ES_29"
2479  },
2480  {
2481   "chips": ["gfx9"],
2482   "map": {"at": 45992, "to": "mm"},
2483   "name": "SPI_SHADER_USER_DATA_ES_30"
2484  },
2485  {
2486   "chips": ["gfx9"],
2487   "map": {"at": 45996, "to": "mm"},
2488   "name": "SPI_SHADER_USER_DATA_ES_31"
2489  },
2490  {
2491   "chips": ["gfx9"],
2492   "map": {"at": 46084, "to": "mm"},
2493   "name": "SPI_SHADER_PGM_RSRC4_HS",
2494   "type_ref": "SPI_SHADER_PGM_RSRC4_HS"
2495  },
2496  {
2497   "chips": ["gfx9"],
2498   "map": {"at": 46088, "to": "mm"},
2499   "name": "SPI_SHADER_USER_DATA_ADDR_LO_HS"
2500  },
2501  {
2502   "chips": ["gfx9"],
2503   "map": {"at": 46092, "to": "mm"},
2504   "name": "SPI_SHADER_USER_DATA_ADDR_HI_HS"
2505  },
2506  {
2507   "chips": ["gfx9"],
2508   "map": {"at": 46096, "to": "mm"},
2509   "name": "SPI_SHADER_PGM_LO_LS"
2510  },
2511  {
2512   "chips": ["gfx9"],
2513   "map": {"at": 46100, "to": "mm"},
2514   "name": "SPI_SHADER_PGM_HI_LS",
2515   "type_ref": "SPI_SHADER_PGM_HI_PS"
2516  },
2517  {
2518   "chips": ["gfx9"],
2519   "map": {"at": 46108, "to": "mm"},
2520   "name": "SPI_SHADER_PGM_RSRC3_HS",
2521   "type_ref": "SPI_SHADER_PGM_RSRC3_HS"
2522  },
2523  {
2524   "chips": ["gfx9"],
2525   "map": {"at": 46112, "to": "mm"},
2526   "name": "SPI_SHADER_PGM_LO_HS"
2527  },
2528  {
2529   "chips": ["gfx9"],
2530   "map": {"at": 46116, "to": "mm"},
2531   "name": "SPI_SHADER_PGM_HI_HS",
2532   "type_ref": "SPI_SHADER_PGM_HI_PS"
2533  },
2534  {
2535   "chips": ["gfx9"],
2536   "map": {"at": 46120, "to": "mm"},
2537   "name": "SPI_SHADER_PGM_RSRC1_HS",
2538   "type_ref": "SPI_SHADER_PGM_RSRC1_HS"
2539  },
2540  {
2541   "chips": ["gfx9"],
2542   "map": {"at": 46124, "to": "mm"},
2543   "name": "SPI_SHADER_PGM_RSRC2_HS",
2544   "type_ref": "SPI_SHADER_PGM_RSRC2_HS"
2545  },
2546  {
2547   "chips": ["gfx9"],
2548   "map": {"at": 46128, "to": "mm"},
2549   "name": "SPI_SHADER_USER_DATA_LS_0"
2550  },
2551  {
2552   "chips": ["gfx9"],
2553   "map": {"at": 46132, "to": "mm"},
2554   "name": "SPI_SHADER_USER_DATA_LS_1"
2555  },
2556  {
2557   "chips": ["gfx9"],
2558   "map": {"at": 46136, "to": "mm"},
2559   "name": "SPI_SHADER_USER_DATA_LS_2"
2560  },
2561  {
2562   "chips": ["gfx9"],
2563   "map": {"at": 46140, "to": "mm"},
2564   "name": "SPI_SHADER_USER_DATA_LS_3"
2565  },
2566  {
2567   "chips": ["gfx9"],
2568   "map": {"at": 46144, "to": "mm"},
2569   "name": "SPI_SHADER_USER_DATA_LS_4"
2570  },
2571  {
2572   "chips": ["gfx9"],
2573   "map": {"at": 46148, "to": "mm"},
2574   "name": "SPI_SHADER_USER_DATA_LS_5"
2575  },
2576  {
2577   "chips": ["gfx9"],
2578   "map": {"at": 46152, "to": "mm"},
2579   "name": "SPI_SHADER_USER_DATA_LS_6"
2580  },
2581  {
2582   "chips": ["gfx9"],
2583   "map": {"at": 46156, "to": "mm"},
2584   "name": "SPI_SHADER_USER_DATA_LS_7"
2585  },
2586  {
2587   "chips": ["gfx9"],
2588   "map": {"at": 46160, "to": "mm"},
2589   "name": "SPI_SHADER_USER_DATA_LS_8"
2590  },
2591  {
2592   "chips": ["gfx9"],
2593   "map": {"at": 46164, "to": "mm"},
2594   "name": "SPI_SHADER_USER_DATA_LS_9"
2595  },
2596  {
2597   "chips": ["gfx9"],
2598   "map": {"at": 46168, "to": "mm"},
2599   "name": "SPI_SHADER_USER_DATA_LS_10"
2600  },
2601  {
2602   "chips": ["gfx9"],
2603   "map": {"at": 46172, "to": "mm"},
2604   "name": "SPI_SHADER_USER_DATA_LS_11"
2605  },
2606  {
2607   "chips": ["gfx9"],
2608   "map": {"at": 46176, "to": "mm"},
2609   "name": "SPI_SHADER_USER_DATA_LS_12"
2610  },
2611  {
2612   "chips": ["gfx9"],
2613   "map": {"at": 46180, "to": "mm"},
2614   "name": "SPI_SHADER_USER_DATA_LS_13"
2615  },
2616  {
2617   "chips": ["gfx9"],
2618   "map": {"at": 46184, "to": "mm"},
2619   "name": "SPI_SHADER_USER_DATA_LS_14"
2620  },
2621  {
2622   "chips": ["gfx9"],
2623   "map": {"at": 46188, "to": "mm"},
2624   "name": "SPI_SHADER_USER_DATA_LS_15"
2625  },
2626  {
2627   "chips": ["gfx9"],
2628   "map": {"at": 46192, "to": "mm"},
2629   "name": "SPI_SHADER_USER_DATA_LS_16"
2630  },
2631  {
2632   "chips": ["gfx9"],
2633   "map": {"at": 46196, "to": "mm"},
2634   "name": "SPI_SHADER_USER_DATA_LS_17"
2635  },
2636  {
2637   "chips": ["gfx9"],
2638   "map": {"at": 46200, "to": "mm"},
2639   "name": "SPI_SHADER_USER_DATA_LS_18"
2640  },
2641  {
2642   "chips": ["gfx9"],
2643   "map": {"at": 46204, "to": "mm"},
2644   "name": "SPI_SHADER_USER_DATA_LS_19"
2645  },
2646  {
2647   "chips": ["gfx9"],
2648   "map": {"at": 46208, "to": "mm"},
2649   "name": "SPI_SHADER_USER_DATA_LS_20"
2650  },
2651  {
2652   "chips": ["gfx9"],
2653   "map": {"at": 46212, "to": "mm"},
2654   "name": "SPI_SHADER_USER_DATA_LS_21"
2655  },
2656  {
2657   "chips": ["gfx9"],
2658   "map": {"at": 46216, "to": "mm"},
2659   "name": "SPI_SHADER_USER_DATA_LS_22"
2660  },
2661  {
2662   "chips": ["gfx9"],
2663   "map": {"at": 46220, "to": "mm"},
2664   "name": "SPI_SHADER_USER_DATA_LS_23"
2665  },
2666  {
2667   "chips": ["gfx9"],
2668   "map": {"at": 46224, "to": "mm"},
2669   "name": "SPI_SHADER_USER_DATA_LS_24"
2670  },
2671  {
2672   "chips": ["gfx9"],
2673   "map": {"at": 46228, "to": "mm"},
2674   "name": "SPI_SHADER_USER_DATA_LS_25"
2675  },
2676  {
2677   "chips": ["gfx9"],
2678   "map": {"at": 46232, "to": "mm"},
2679   "name": "SPI_SHADER_USER_DATA_LS_26"
2680  },
2681  {
2682   "chips": ["gfx9"],
2683   "map": {"at": 46236, "to": "mm"},
2684   "name": "SPI_SHADER_USER_DATA_LS_27"
2685  },
2686  {
2687   "chips": ["gfx9"],
2688   "map": {"at": 46240, "to": "mm"},
2689   "name": "SPI_SHADER_USER_DATA_LS_28"
2690  },
2691  {
2692   "chips": ["gfx9"],
2693   "map": {"at": 46244, "to": "mm"},
2694   "name": "SPI_SHADER_USER_DATA_LS_29"
2695  },
2696  {
2697   "chips": ["gfx9"],
2698   "map": {"at": 46248, "to": "mm"},
2699   "name": "SPI_SHADER_USER_DATA_LS_30"
2700  },
2701  {
2702   "chips": ["gfx9"],
2703   "map": {"at": 46252, "to": "mm"},
2704   "name": "SPI_SHADER_USER_DATA_LS_31"
2705  },
2706  {
2707   "chips": ["gfx9"],
2708   "map": {"at": 46384, "to": "mm"},
2709   "name": "SPI_SHADER_USER_DATA_COMMON_0"
2710  },
2711  {
2712   "chips": ["gfx9"],
2713   "map": {"at": 46388, "to": "mm"},
2714   "name": "SPI_SHADER_USER_DATA_COMMON_1"
2715  },
2716  {
2717   "chips": ["gfx9"],
2718   "map": {"at": 46392, "to": "mm"},
2719   "name": "SPI_SHADER_USER_DATA_COMMON_2"
2720  },
2721  {
2722   "chips": ["gfx9"],
2723   "map": {"at": 46396, "to": "mm"},
2724   "name": "SPI_SHADER_USER_DATA_COMMON_3"
2725  },
2726  {
2727   "chips": ["gfx9"],
2728   "map": {"at": 46400, "to": "mm"},
2729   "name": "SPI_SHADER_USER_DATA_COMMON_4"
2730  },
2731  {
2732   "chips": ["gfx9"],
2733   "map": {"at": 46404, "to": "mm"},
2734   "name": "SPI_SHADER_USER_DATA_COMMON_5"
2735  },
2736  {
2737   "chips": ["gfx9"],
2738   "map": {"at": 46408, "to": "mm"},
2739   "name": "SPI_SHADER_USER_DATA_COMMON_6"
2740  },
2741  {
2742   "chips": ["gfx9"],
2743   "map": {"at": 46412, "to": "mm"},
2744   "name": "SPI_SHADER_USER_DATA_COMMON_7"
2745  },
2746  {
2747   "chips": ["gfx9"],
2748   "map": {"at": 46416, "to": "mm"},
2749   "name": "SPI_SHADER_USER_DATA_COMMON_8"
2750  },
2751  {
2752   "chips": ["gfx9"],
2753   "map": {"at": 46420, "to": "mm"},
2754   "name": "SPI_SHADER_USER_DATA_COMMON_9"
2755  },
2756  {
2757   "chips": ["gfx9"],
2758   "map": {"at": 46424, "to": "mm"},
2759   "name": "SPI_SHADER_USER_DATA_COMMON_10"
2760  },
2761  {
2762   "chips": ["gfx9"],
2763   "map": {"at": 46428, "to": "mm"},
2764   "name": "SPI_SHADER_USER_DATA_COMMON_11"
2765  },
2766  {
2767   "chips": ["gfx9"],
2768   "map": {"at": 46432, "to": "mm"},
2769   "name": "SPI_SHADER_USER_DATA_COMMON_12"
2770  },
2771  {
2772   "chips": ["gfx9"],
2773   "map": {"at": 46436, "to": "mm"},
2774   "name": "SPI_SHADER_USER_DATA_COMMON_13"
2775  },
2776  {
2777   "chips": ["gfx9"],
2778   "map": {"at": 46440, "to": "mm"},
2779   "name": "SPI_SHADER_USER_DATA_COMMON_14"
2780  },
2781  {
2782   "chips": ["gfx9"],
2783   "map": {"at": 46444, "to": "mm"},
2784   "name": "SPI_SHADER_USER_DATA_COMMON_15"
2785  },
2786  {
2787   "chips": ["gfx9"],
2788   "map": {"at": 46448, "to": "mm"},
2789   "name": "SPI_SHADER_USER_DATA_COMMON_16"
2790  },
2791  {
2792   "chips": ["gfx9"],
2793   "map": {"at": 46452, "to": "mm"},
2794   "name": "SPI_SHADER_USER_DATA_COMMON_17"
2795  },
2796  {
2797   "chips": ["gfx9"],
2798   "map": {"at": 46456, "to": "mm"},
2799   "name": "SPI_SHADER_USER_DATA_COMMON_18"
2800  },
2801  {
2802   "chips": ["gfx9"],
2803   "map": {"at": 46460, "to": "mm"},
2804   "name": "SPI_SHADER_USER_DATA_COMMON_19"
2805  },
2806  {
2807   "chips": ["gfx9"],
2808   "map": {"at": 46464, "to": "mm"},
2809   "name": "SPI_SHADER_USER_DATA_COMMON_20"
2810  },
2811  {
2812   "chips": ["gfx9"],
2813   "map": {"at": 46468, "to": "mm"},
2814   "name": "SPI_SHADER_USER_DATA_COMMON_21"
2815  },
2816  {
2817   "chips": ["gfx9"],
2818   "map": {"at": 46472, "to": "mm"},
2819   "name": "SPI_SHADER_USER_DATA_COMMON_22"
2820  },
2821  {
2822   "chips": ["gfx9"],
2823   "map": {"at": 46476, "to": "mm"},
2824   "name": "SPI_SHADER_USER_DATA_COMMON_23"
2825  },
2826  {
2827   "chips": ["gfx9"],
2828   "map": {"at": 46480, "to": "mm"},
2829   "name": "SPI_SHADER_USER_DATA_COMMON_24"
2830  },
2831  {
2832   "chips": ["gfx9"],
2833   "map": {"at": 46484, "to": "mm"},
2834   "name": "SPI_SHADER_USER_DATA_COMMON_25"
2835  },
2836  {
2837   "chips": ["gfx9"],
2838   "map": {"at": 46488, "to": "mm"},
2839   "name": "SPI_SHADER_USER_DATA_COMMON_26"
2840  },
2841  {
2842   "chips": ["gfx9"],
2843   "map": {"at": 46492, "to": "mm"},
2844   "name": "SPI_SHADER_USER_DATA_COMMON_27"
2845  },
2846  {
2847   "chips": ["gfx9"],
2848   "map": {"at": 46496, "to": "mm"},
2849   "name": "SPI_SHADER_USER_DATA_COMMON_28"
2850  },
2851  {
2852   "chips": ["gfx9"],
2853   "map": {"at": 46500, "to": "mm"},
2854   "name": "SPI_SHADER_USER_DATA_COMMON_29"
2855  },
2856  {
2857   "chips": ["gfx9"],
2858   "map": {"at": 46504, "to": "mm"},
2859   "name": "SPI_SHADER_USER_DATA_COMMON_30"
2860  },
2861  {
2862   "chips": ["gfx9"],
2863   "map": {"at": 46508, "to": "mm"},
2864   "name": "SPI_SHADER_USER_DATA_COMMON_31"
2865  },
2866  {
2867   "chips": ["gfx9"],
2868   "map": {"at": 47104, "to": "mm"},
2869   "name": "COMPUTE_DISPATCH_INITIATOR",
2870   "type_ref": "COMPUTE_DISPATCH_INITIATOR"
2871  },
2872  {
2873   "chips": ["gfx9"],
2874   "map": {"at": 47108, "to": "mm"},
2875   "name": "COMPUTE_DIM_X"
2876  },
2877  {
2878   "chips": ["gfx9"],
2879   "map": {"at": 47112, "to": "mm"},
2880   "name": "COMPUTE_DIM_Y"
2881  },
2882  {
2883   "chips": ["gfx9"],
2884   "map": {"at": 47116, "to": "mm"},
2885   "name": "COMPUTE_DIM_Z"
2886  },
2887  {
2888   "chips": ["gfx9"],
2889   "map": {"at": 47120, "to": "mm"},
2890   "name": "COMPUTE_START_X"
2891  },
2892  {
2893   "chips": ["gfx9"],
2894   "map": {"at": 47124, "to": "mm"},
2895   "name": "COMPUTE_START_Y"
2896  },
2897  {
2898   "chips": ["gfx9"],
2899   "map": {"at": 47128, "to": "mm"},
2900   "name": "COMPUTE_START_Z"
2901  },
2902  {
2903   "chips": ["gfx9"],
2904   "map": {"at": 47132, "to": "mm"},
2905   "name": "COMPUTE_NUM_THREAD_X",
2906   "type_ref": "COMPUTE_NUM_THREAD_X"
2907  },
2908  {
2909   "chips": ["gfx9"],
2910   "map": {"at": 47136, "to": "mm"},
2911   "name": "COMPUTE_NUM_THREAD_Y",
2912   "type_ref": "COMPUTE_NUM_THREAD_X"
2913  },
2914  {
2915   "chips": ["gfx9"],
2916   "map": {"at": 47140, "to": "mm"},
2917   "name": "COMPUTE_NUM_THREAD_Z",
2918   "type_ref": "COMPUTE_NUM_THREAD_X"
2919  },
2920  {
2921   "chips": ["gfx9"],
2922   "map": {"at": 47144, "to": "mm"},
2923   "name": "COMPUTE_PIPELINESTAT_ENABLE",
2924   "type_ref": "COMPUTE_PIPELINESTAT_ENABLE"
2925  },
2926  {
2927   "chips": ["gfx9"],
2928   "map": {"at": 47148, "to": "mm"},
2929   "name": "COMPUTE_PERFCOUNT_ENABLE",
2930   "type_ref": "COMPUTE_PERFCOUNT_ENABLE"
2931  },
2932  {
2933   "chips": ["gfx9"],
2934   "map": {"at": 47152, "to": "mm"},
2935   "name": "COMPUTE_PGM_LO"
2936  },
2937  {
2938   "chips": ["gfx9"],
2939   "map": {"at": 47156, "to": "mm"},
2940   "name": "COMPUTE_PGM_HI",
2941   "type_ref": "COMPUTE_PGM_HI"
2942  },
2943  {
2944   "chips": ["gfx9"],
2945   "map": {"at": 47160, "to": "mm"},
2946   "name": "COMPUTE_DISPATCH_PKT_ADDR_LO"
2947  },
2948  {
2949   "chips": ["gfx9"],
2950   "map": {"at": 47164, "to": "mm"},
2951   "name": "COMPUTE_DISPATCH_PKT_ADDR_HI",
2952   "type_ref": "COMPUTE_PGM_HI"
2953  },
2954  {
2955   "chips": ["gfx9"],
2956   "map": {"at": 47168, "to": "mm"},
2957   "name": "COMPUTE_DISPATCH_SCRATCH_BASE_LO"
2958  },
2959  {
2960   "chips": ["gfx9"],
2961   "map": {"at": 47172, "to": "mm"},
2962   "name": "COMPUTE_DISPATCH_SCRATCH_BASE_HI",
2963   "type_ref": "COMPUTE_PGM_HI"
2964  },
2965  {
2966   "chips": ["gfx9"],
2967   "map": {"at": 47176, "to": "mm"},
2968   "name": "COMPUTE_PGM_RSRC1",
2969   "type_ref": "COMPUTE_PGM_RSRC1"
2970  },
2971  {
2972   "chips": ["gfx9"],
2973   "map": {"at": 47180, "to": "mm"},
2974   "name": "COMPUTE_PGM_RSRC2",
2975   "type_ref": "COMPUTE_PGM_RSRC2"
2976  },
2977  {
2978   "chips": ["gfx9"],
2979   "map": {"at": 47184, "to": "mm"},
2980   "name": "COMPUTE_VMID",
2981   "type_ref": "COMPUTE_VMID"
2982  },
2983  {
2984   "chips": ["gfx9"],
2985   "map": {"at": 47188, "to": "mm"},
2986   "name": "COMPUTE_RESOURCE_LIMITS",
2987   "type_ref": "COMPUTE_RESOURCE_LIMITS"
2988  },
2989  {
2990   "chips": ["gfx9"],
2991   "map": {"at": 47192, "to": "mm"},
2992   "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",
2993   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2994  },
2995  {
2996   "chips": ["gfx9"],
2997   "map": {"at": 47196, "to": "mm"},
2998   "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",
2999   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
3000  },
3001  {
3002   "chips": ["gfx9"],
3003   "map": {"at": 47200, "to": "mm"},
3004   "name": "COMPUTE_TMPRING_SIZE",
3005   "type_ref": "COMPUTE_TMPRING_SIZE"
3006  },
3007  {
3008   "chips": ["gfx9"],
3009   "map": {"at": 47204, "to": "mm"},
3010   "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",
3011   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
3012  },
3013  {
3014   "chips": ["gfx9"],
3015   "map": {"at": 47208, "to": "mm"},
3016   "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",
3017   "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
3018  },
3019  {
3020   "chips": ["gfx9"],
3021   "map": {"at": 47212, "to": "mm"},
3022   "name": "COMPUTE_RESTART_X"
3023  },
3024  {
3025   "chips": ["gfx9"],
3026   "map": {"at": 47216, "to": "mm"},
3027   "name": "COMPUTE_RESTART_Y"
3028  },
3029  {
3030   "chips": ["gfx9"],
3031   "map": {"at": 47220, "to": "mm"},
3032   "name": "COMPUTE_RESTART_Z"
3033  },
3034  {
3035   "chips": ["gfx9"],
3036   "map": {"at": 47224, "to": "mm"},
3037   "name": "COMPUTE_THREAD_TRACE_ENABLE",
3038   "type_ref": "COMPUTE_THREAD_TRACE_ENABLE"
3039  },
3040  {
3041   "chips": ["gfx9"],
3042   "map": {"at": 47228, "to": "mm"},
3043   "name": "COMPUTE_MISC_RESERVED",
3044   "type_ref": "COMPUTE_MISC_RESERVED"
3045  },
3046  {
3047   "chips": ["gfx9"],
3048   "map": {"at": 47232, "to": "mm"},
3049   "name": "COMPUTE_DISPATCH_ID"
3050  },
3051  {
3052   "chips": ["gfx9"],
3053   "map": {"at": 47236, "to": "mm"},
3054   "name": "COMPUTE_THREADGROUP_ID"
3055  },
3056  {
3057   "chips": ["gfx9"],
3058   "map": {"at": 47240, "to": "mm"},
3059   "name": "COMPUTE_RELAUNCH",
3060   "type_ref": "COMPUTE_RELAUNCH"
3061  },
3062  {
3063   "chips": ["gfx9"],
3064   "map": {"at": 47244, "to": "mm"},
3065   "name": "COMPUTE_WAVE_RESTORE_ADDR_LO"
3066  },
3067  {
3068   "chips": ["gfx9"],
3069   "map": {"at": 47248, "to": "mm"},
3070   "name": "COMPUTE_WAVE_RESTORE_ADDR_HI",
3071   "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_HI"
3072  },
3073  {
3074   "chips": ["gfx9"],
3075   "map": {"at": 47252, "to": "mm"},
3076   "name": "COMPUTE_SHADER_CHKSUM"
3077  },
3078  {
3079   "chips": ["gfx9"],
3080   "map": {"at": 47360, "to": "mm"},
3081   "name": "COMPUTE_USER_DATA_0"
3082  },
3083  {
3084   "chips": ["gfx9"],
3085   "map": {"at": 47364, "to": "mm"},
3086   "name": "COMPUTE_USER_DATA_1"
3087  },
3088  {
3089   "chips": ["gfx9"],
3090   "map": {"at": 47368, "to": "mm"},
3091   "name": "COMPUTE_USER_DATA_2"
3092  },
3093  {
3094   "chips": ["gfx9"],
3095   "map": {"at": 47372, "to": "mm"},
3096   "name": "COMPUTE_USER_DATA_3"
3097  },
3098  {
3099   "chips": ["gfx9"],
3100   "map": {"at": 47376, "to": "mm"},
3101   "name": "COMPUTE_USER_DATA_4"
3102  },
3103  {
3104   "chips": ["gfx9"],
3105   "map": {"at": 47380, "to": "mm"},
3106   "name": "COMPUTE_USER_DATA_5"
3107  },
3108  {
3109   "chips": ["gfx9"],
3110   "map": {"at": 47384, "to": "mm"},
3111   "name": "COMPUTE_USER_DATA_6"
3112  },
3113  {
3114   "chips": ["gfx9"],
3115   "map": {"at": 47388, "to": "mm"},
3116   "name": "COMPUTE_USER_DATA_7"
3117  },
3118  {
3119   "chips": ["gfx9"],
3120   "map": {"at": 47392, "to": "mm"},
3121   "name": "COMPUTE_USER_DATA_8"
3122  },
3123  {
3124   "chips": ["gfx9"],
3125   "map": {"at": 47396, "to": "mm"},
3126   "name": "COMPUTE_USER_DATA_9"
3127  },
3128  {
3129   "chips": ["gfx9"],
3130   "map": {"at": 47400, "to": "mm"},
3131   "name": "COMPUTE_USER_DATA_10"
3132  },
3133  {
3134   "chips": ["gfx9"],
3135   "map": {"at": 47404, "to": "mm"},
3136   "name": "COMPUTE_USER_DATA_11"
3137  },
3138  {
3139   "chips": ["gfx9"],
3140   "map": {"at": 47408, "to": "mm"},
3141   "name": "COMPUTE_USER_DATA_12"
3142  },
3143  {
3144   "chips": ["gfx9"],
3145   "map": {"at": 47412, "to": "mm"},
3146   "name": "COMPUTE_USER_DATA_13"
3147  },
3148  {
3149   "chips": ["gfx9"],
3150   "map": {"at": 47416, "to": "mm"},
3151   "name": "COMPUTE_USER_DATA_14"
3152  },
3153  {
3154   "chips": ["gfx9"],
3155   "map": {"at": 47420, "to": "mm"},
3156   "name": "COMPUTE_USER_DATA_15"
3157  },
3158  {
3159   "chips": ["gfx9"],
3160   "map": {"at": 47608, "to": "mm"},
3161   "name": "COMPUTE_DISPATCH_END"
3162  },
3163  {
3164   "chips": ["gfx9"],
3165   "map": {"at": 47612, "to": "mm"},
3166   "name": "COMPUTE_NOWHERE"
3167  },
3168  {
3169   "chips": ["gfx9"],
3170   "map": {"at": 163840, "to": "mm"},
3171   "name": "DB_RENDER_CONTROL",
3172   "type_ref": "DB_RENDER_CONTROL"
3173  },
3174  {
3175   "chips": ["gfx9"],
3176   "map": {"at": 163844, "to": "mm"},
3177   "name": "DB_COUNT_CONTROL",
3178   "type_ref": "DB_COUNT_CONTROL"
3179  },
3180  {
3181   "chips": ["gfx9"],
3182   "map": {"at": 163848, "to": "mm"},
3183   "name": "DB_DEPTH_VIEW",
3184   "type_ref": "DB_DEPTH_VIEW"
3185  },
3186  {
3187   "chips": ["gfx9"],
3188   "map": {"at": 163852, "to": "mm"},
3189   "name": "DB_RENDER_OVERRIDE",
3190   "type_ref": "DB_RENDER_OVERRIDE"
3191  },
3192  {
3193   "chips": ["gfx9"],
3194   "map": {"at": 163856, "to": "mm"},
3195   "name": "DB_RENDER_OVERRIDE2",
3196   "type_ref": "DB_RENDER_OVERRIDE2"
3197  },
3198  {
3199   "chips": ["gfx9"],
3200   "map": {"at": 163860, "to": "mm"},
3201   "name": "DB_HTILE_DATA_BASE"
3202  },
3203  {
3204   "chips": ["gfx9"],
3205   "map": {"at": 163864, "to": "mm"},
3206   "name": "DB_HTILE_DATA_BASE_HI",
3207   "type_ref": "DB_HTILE_DATA_BASE_HI"
3208  },
3209  {
3210   "chips": ["gfx9"],
3211   "map": {"at": 163868, "to": "mm"},
3212   "name": "DB_DEPTH_SIZE",
3213   "type_ref": "DB_DEPTH_SIZE"
3214  },
3215  {
3216   "chips": ["gfx9"],
3217   "map": {"at": 163872, "to": "mm"},
3218   "name": "DB_DEPTH_BOUNDS_MIN"
3219  },
3220  {
3221   "chips": ["gfx9"],
3222   "map": {"at": 163876, "to": "mm"},
3223   "name": "DB_DEPTH_BOUNDS_MAX"
3224  },
3225  {
3226   "chips": ["gfx9"],
3227   "map": {"at": 163880, "to": "mm"},
3228   "name": "DB_STENCIL_CLEAR",
3229   "type_ref": "DB_STENCIL_CLEAR"
3230  },
3231  {
3232   "chips": ["gfx9"],
3233   "map": {"at": 163884, "to": "mm"},
3234   "name": "DB_DEPTH_CLEAR"
3235  },
3236  {
3237   "chips": ["gfx9"],
3238   "map": {"at": 163888, "to": "mm"},
3239   "name": "PA_SC_SCREEN_SCISSOR_TL",
3240   "type_ref": "PA_SC_SCREEN_SCISSOR_TL"
3241  },
3242  {
3243   "chips": ["gfx9"],
3244   "map": {"at": 163892, "to": "mm"},
3245   "name": "PA_SC_SCREEN_SCISSOR_BR",
3246   "type_ref": "PA_SC_SCREEN_SCISSOR_BR"
3247  },
3248  {
3249   "chips": ["gfx9"],
3250   "map": {"at": 163896, "to": "mm"},
3251   "name": "DB_Z_INFO",
3252   "type_ref": "DB_Z_INFO"
3253  },
3254  {
3255   "chips": ["gfx9"],
3256   "map": {"at": 163900, "to": "mm"},
3257   "name": "DB_STENCIL_INFO",
3258   "type_ref": "DB_STENCIL_INFO"
3259  },
3260  {
3261   "chips": ["gfx9"],
3262   "map": {"at": 163904, "to": "mm"},
3263   "name": "DB_Z_READ_BASE"
3264  },
3265  {
3266   "chips": ["gfx9"],
3267   "map": {"at": 163908, "to": "mm"},
3268   "name": "DB_Z_READ_BASE_HI",
3269   "type_ref": "DB_HTILE_DATA_BASE_HI"
3270  },
3271  {
3272   "chips": ["gfx9"],
3273   "map": {"at": 163912, "to": "mm"},
3274   "name": "DB_STENCIL_READ_BASE"
3275  },
3276  {
3277   "chips": ["gfx9"],
3278   "map": {"at": 163916, "to": "mm"},
3279   "name": "DB_STENCIL_READ_BASE_HI",
3280   "type_ref": "DB_HTILE_DATA_BASE_HI"
3281  },
3282  {
3283   "chips": ["gfx9"],
3284   "map": {"at": 163920, "to": "mm"},
3285   "name": "DB_Z_WRITE_BASE"
3286  },
3287  {
3288   "chips": ["gfx9"],
3289   "map": {"at": 163924, "to": "mm"},
3290   "name": "DB_Z_WRITE_BASE_HI",
3291   "type_ref": "DB_HTILE_DATA_BASE_HI"
3292  },
3293  {
3294   "chips": ["gfx9"],
3295   "map": {"at": 163928, "to": "mm"},
3296   "name": "DB_STENCIL_WRITE_BASE"
3297  },
3298  {
3299   "chips": ["gfx9"],
3300   "map": {"at": 163932, "to": "mm"},
3301   "name": "DB_STENCIL_WRITE_BASE_HI",
3302   "type_ref": "DB_HTILE_DATA_BASE_HI"
3303  },
3304  {
3305   "chips": ["gfx9"],
3306   "map": {"at": 163936, "to": "mm"},
3307   "name": "DB_DFSM_CONTROL",
3308   "type_ref": "DB_DFSM_CONTROL"
3309  },
3310  {
3311   "chips": ["gfx9"],
3312   "map": {"at": 163944, "to": "mm"},
3313   "name": "DB_Z_INFO2",
3314   "type_ref": "DB_Z_INFO2"
3315  },
3316  {
3317   "chips": ["gfx9"],
3318   "map": {"at": 163948, "to": "mm"},
3319   "name": "DB_STENCIL_INFO2",
3320   "type_ref": "DB_Z_INFO2"
3321  },
3322  {
3323   "chips": ["gfx9"],
3324   "map": {"at": 163968, "to": "mm"},
3325   "name": "TA_BC_BASE_ADDR"
3326  },
3327  {
3328   "chips": ["gfx9"],
3329   "map": {"at": 163972, "to": "mm"},
3330   "name": "TA_BC_BASE_ADDR_HI",
3331   "type_ref": "TA_BC_BASE_ADDR_HI"
3332  },
3333  {
3334   "chips": ["gfx9"],
3335   "map": {"at": 164328, "to": "mm"},
3336   "name": "COHER_DEST_BASE_HI_0",
3337   "type_ref": "COHER_DEST_BASE_HI_0"
3338  },
3339  {
3340   "chips": ["gfx9"],
3341   "map": {"at": 164332, "to": "mm"},
3342   "name": "COHER_DEST_BASE_HI_1",
3343   "type_ref": "COHER_DEST_BASE_HI_0"
3344  },
3345  {
3346   "chips": ["gfx9"],
3347   "map": {"at": 164336, "to": "mm"},
3348   "name": "COHER_DEST_BASE_HI_2",
3349   "type_ref": "COHER_DEST_BASE_HI_0"
3350  },
3351  {
3352   "chips": ["gfx9"],
3353   "map": {"at": 164340, "to": "mm"},
3354   "name": "COHER_DEST_BASE_HI_3",
3355   "type_ref": "COHER_DEST_BASE_HI_0"
3356  },
3357  {
3358   "chips": ["gfx9"],
3359   "map": {"at": 164344, "to": "mm"},
3360   "name": "COHER_DEST_BASE_2"
3361  },
3362  {
3363   "chips": ["gfx9"],
3364   "map": {"at": 164348, "to": "mm"},
3365   "name": "COHER_DEST_BASE_3"
3366  },
3367  {
3368   "chips": ["gfx9"],
3369   "map": {"at": 164352, "to": "mm"},
3370   "name": "PA_SC_WINDOW_OFFSET",
3371   "type_ref": "PA_SC_WINDOW_OFFSET"
3372  },
3373  {
3374   "chips": ["gfx9"],
3375   "map": {"at": 164356, "to": "mm"},
3376   "name": "PA_SC_WINDOW_SCISSOR_TL",
3377   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3378  },
3379  {
3380   "chips": ["gfx9"],
3381   "map": {"at": 164360, "to": "mm"},
3382   "name": "PA_SC_WINDOW_SCISSOR_BR",
3383   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3384  },
3385  {
3386   "chips": ["gfx9"],
3387   "map": {"at": 164364, "to": "mm"},
3388   "name": "PA_SC_CLIPRECT_RULE",
3389   "type_ref": "PA_SC_CLIPRECT_RULE"
3390  },
3391  {
3392   "chips": ["gfx9"],
3393   "map": {"at": 164368, "to": "mm"},
3394   "name": "PA_SC_CLIPRECT_0_TL",
3395   "type_ref": "PA_SC_CLIPRECT_0_TL"
3396  },
3397  {
3398   "chips": ["gfx9"],
3399   "map": {"at": 164372, "to": "mm"},
3400   "name": "PA_SC_CLIPRECT_0_BR",
3401   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3402  },
3403  {
3404   "chips": ["gfx9"],
3405   "map": {"at": 164376, "to": "mm"},
3406   "name": "PA_SC_CLIPRECT_1_TL",
3407   "type_ref": "PA_SC_CLIPRECT_0_TL"
3408  },
3409  {
3410   "chips": ["gfx9"],
3411   "map": {"at": 164380, "to": "mm"},
3412   "name": "PA_SC_CLIPRECT_1_BR",
3413   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3414  },
3415  {
3416   "chips": ["gfx9"],
3417   "map": {"at": 164384, "to": "mm"},
3418   "name": "PA_SC_CLIPRECT_2_TL",
3419   "type_ref": "PA_SC_CLIPRECT_0_TL"
3420  },
3421  {
3422   "chips": ["gfx9"],
3423   "map": {"at": 164388, "to": "mm"},
3424   "name": "PA_SC_CLIPRECT_2_BR",
3425   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3426  },
3427  {
3428   "chips": ["gfx9"],
3429   "map": {"at": 164392, "to": "mm"},
3430   "name": "PA_SC_CLIPRECT_3_TL",
3431   "type_ref": "PA_SC_CLIPRECT_0_TL"
3432  },
3433  {
3434   "chips": ["gfx9"],
3435   "map": {"at": 164396, "to": "mm"},
3436   "name": "PA_SC_CLIPRECT_3_BR",
3437   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3438  },
3439  {
3440   "chips": ["gfx9"],
3441   "map": {"at": 164400, "to": "mm"},
3442   "name": "PA_SC_EDGERULE",
3443   "type_ref": "PA_SC_EDGERULE"
3444  },
3445  {
3446   "chips": ["gfx9"],
3447   "map": {"at": 164404, "to": "mm"},
3448   "name": "PA_SU_HARDWARE_SCREEN_OFFSET",
3449   "type_ref": "PA_SU_HARDWARE_SCREEN_OFFSET"
3450  },
3451  {
3452   "chips": ["gfx9"],
3453   "map": {"at": 164408, "to": "mm"},
3454   "name": "CB_TARGET_MASK",
3455   "type_ref": "CB_TARGET_MASK"
3456  },
3457  {
3458   "chips": ["gfx9"],
3459   "map": {"at": 164412, "to": "mm"},
3460   "name": "CB_SHADER_MASK",
3461   "type_ref": "CB_SHADER_MASK"
3462  },
3463  {
3464   "chips": ["gfx9"],
3465   "map": {"at": 164416, "to": "mm"},
3466   "name": "PA_SC_GENERIC_SCISSOR_TL",
3467   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3468  },
3469  {
3470   "chips": ["gfx9"],
3471   "map": {"at": 164420, "to": "mm"},
3472   "name": "PA_SC_GENERIC_SCISSOR_BR",
3473   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3474  },
3475  {
3476   "chips": ["gfx9"],
3477   "map": {"at": 164424, "to": "mm"},
3478   "name": "COHER_DEST_BASE_0"
3479  },
3480  {
3481   "chips": ["gfx9"],
3482   "map": {"at": 164428, "to": "mm"},
3483   "name": "COHER_DEST_BASE_1"
3484  },
3485  {
3486   "chips": ["gfx9"],
3487   "map": {"at": 164432, "to": "mm"},
3488   "name": "PA_SC_VPORT_SCISSOR_0_TL",
3489   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3490  },
3491  {
3492   "chips": ["gfx9"],
3493   "map": {"at": 164436, "to": "mm"},
3494   "name": "PA_SC_VPORT_SCISSOR_0_BR",
3495   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3496  },
3497  {
3498   "chips": ["gfx9"],
3499   "map": {"at": 164440, "to": "mm"},
3500   "name": "PA_SC_VPORT_SCISSOR_1_TL",
3501   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3502  },
3503  {
3504   "chips": ["gfx9"],
3505   "map": {"at": 164444, "to": "mm"},
3506   "name": "PA_SC_VPORT_SCISSOR_1_BR",
3507   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3508  },
3509  {
3510   "chips": ["gfx9"],
3511   "map": {"at": 164448, "to": "mm"},
3512   "name": "PA_SC_VPORT_SCISSOR_2_TL",
3513   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3514  },
3515  {
3516   "chips": ["gfx9"],
3517   "map": {"at": 164452, "to": "mm"},
3518   "name": "PA_SC_VPORT_SCISSOR_2_BR",
3519   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3520  },
3521  {
3522   "chips": ["gfx9"],
3523   "map": {"at": 164456, "to": "mm"},
3524   "name": "PA_SC_VPORT_SCISSOR_3_TL",
3525   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3526  },
3527  {
3528   "chips": ["gfx9"],
3529   "map": {"at": 164460, "to": "mm"},
3530   "name": "PA_SC_VPORT_SCISSOR_3_BR",
3531   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3532  },
3533  {
3534   "chips": ["gfx9"],
3535   "map": {"at": 164464, "to": "mm"},
3536   "name": "PA_SC_VPORT_SCISSOR_4_TL",
3537   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3538  },
3539  {
3540   "chips": ["gfx9"],
3541   "map": {"at": 164468, "to": "mm"},
3542   "name": "PA_SC_VPORT_SCISSOR_4_BR",
3543   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3544  },
3545  {
3546   "chips": ["gfx9"],
3547   "map": {"at": 164472, "to": "mm"},
3548   "name": "PA_SC_VPORT_SCISSOR_5_TL",
3549   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3550  },
3551  {
3552   "chips": ["gfx9"],
3553   "map": {"at": 164476, "to": "mm"},
3554   "name": "PA_SC_VPORT_SCISSOR_5_BR",
3555   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3556  },
3557  {
3558   "chips": ["gfx9"],
3559   "map": {"at": 164480, "to": "mm"},
3560   "name": "PA_SC_VPORT_SCISSOR_6_TL",
3561   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3562  },
3563  {
3564   "chips": ["gfx9"],
3565   "map": {"at": 164484, "to": "mm"},
3566   "name": "PA_SC_VPORT_SCISSOR_6_BR",
3567   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3568  },
3569  {
3570   "chips": ["gfx9"],
3571   "map": {"at": 164488, "to": "mm"},
3572   "name": "PA_SC_VPORT_SCISSOR_7_TL",
3573   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3574  },
3575  {
3576   "chips": ["gfx9"],
3577   "map": {"at": 164492, "to": "mm"},
3578   "name": "PA_SC_VPORT_SCISSOR_7_BR",
3579   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3580  },
3581  {
3582   "chips": ["gfx9"],
3583   "map": {"at": 164496, "to": "mm"},
3584   "name": "PA_SC_VPORT_SCISSOR_8_TL",
3585   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3586  },
3587  {
3588   "chips": ["gfx9"],
3589   "map": {"at": 164500, "to": "mm"},
3590   "name": "PA_SC_VPORT_SCISSOR_8_BR",
3591   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3592  },
3593  {
3594   "chips": ["gfx9"],
3595   "map": {"at": 164504, "to": "mm"},
3596   "name": "PA_SC_VPORT_SCISSOR_9_TL",
3597   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3598  },
3599  {
3600   "chips": ["gfx9"],
3601   "map": {"at": 164508, "to": "mm"},
3602   "name": "PA_SC_VPORT_SCISSOR_9_BR",
3603   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3604  },
3605  {
3606   "chips": ["gfx9"],
3607   "map": {"at": 164512, "to": "mm"},
3608   "name": "PA_SC_VPORT_SCISSOR_10_TL",
3609   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3610  },
3611  {
3612   "chips": ["gfx9"],
3613   "map": {"at": 164516, "to": "mm"},
3614   "name": "PA_SC_VPORT_SCISSOR_10_BR",
3615   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3616  },
3617  {
3618   "chips": ["gfx9"],
3619   "map": {"at": 164520, "to": "mm"},
3620   "name": "PA_SC_VPORT_SCISSOR_11_TL",
3621   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3622  },
3623  {
3624   "chips": ["gfx9"],
3625   "map": {"at": 164524, "to": "mm"},
3626   "name": "PA_SC_VPORT_SCISSOR_11_BR",
3627   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3628  },
3629  {
3630   "chips": ["gfx9"],
3631   "map": {"at": 164528, "to": "mm"},
3632   "name": "PA_SC_VPORT_SCISSOR_12_TL",
3633   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3634  },
3635  {
3636   "chips": ["gfx9"],
3637   "map": {"at": 164532, "to": "mm"},
3638   "name": "PA_SC_VPORT_SCISSOR_12_BR",
3639   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3640  },
3641  {
3642   "chips": ["gfx9"],
3643   "map": {"at": 164536, "to": "mm"},
3644   "name": "PA_SC_VPORT_SCISSOR_13_TL",
3645   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3646  },
3647  {
3648   "chips": ["gfx9"],
3649   "map": {"at": 164540, "to": "mm"},
3650   "name": "PA_SC_VPORT_SCISSOR_13_BR",
3651   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3652  },
3653  {
3654   "chips": ["gfx9"],
3655   "map": {"at": 164544, "to": "mm"},
3656   "name": "PA_SC_VPORT_SCISSOR_14_TL",
3657   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3658  },
3659  {
3660   "chips": ["gfx9"],
3661   "map": {"at": 164548, "to": "mm"},
3662   "name": "PA_SC_VPORT_SCISSOR_14_BR",
3663   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3664  },
3665  {
3666   "chips": ["gfx9"],
3667   "map": {"at": 164552, "to": "mm"},
3668   "name": "PA_SC_VPORT_SCISSOR_15_TL",
3669   "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3670  },
3671  {
3672   "chips": ["gfx9"],
3673   "map": {"at": 164556, "to": "mm"},
3674   "name": "PA_SC_VPORT_SCISSOR_15_BR",
3675   "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3676  },
3677  {
3678   "chips": ["gfx9"],
3679   "map": {"at": 164560, "to": "mm"},
3680   "name": "PA_SC_VPORT_ZMIN_0"
3681  },
3682  {
3683   "chips": ["gfx9"],
3684   "map": {"at": 164564, "to": "mm"},
3685   "name": "PA_SC_VPORT_ZMAX_0"
3686  },
3687  {
3688   "chips": ["gfx9"],
3689   "map": {"at": 164568, "to": "mm"},
3690   "name": "PA_SC_VPORT_ZMIN_1"
3691  },
3692  {
3693   "chips": ["gfx9"],
3694   "map": {"at": 164572, "to": "mm"},
3695   "name": "PA_SC_VPORT_ZMAX_1"
3696  },
3697  {
3698   "chips": ["gfx9"],
3699   "map": {"at": 164576, "to": "mm"},
3700   "name": "PA_SC_VPORT_ZMIN_2"
3701  },
3702  {
3703   "chips": ["gfx9"],
3704   "map": {"at": 164580, "to": "mm"},
3705   "name": "PA_SC_VPORT_ZMAX_2"
3706  },
3707  {
3708   "chips": ["gfx9"],
3709   "map": {"at": 164584, "to": "mm"},
3710   "name": "PA_SC_VPORT_ZMIN_3"
3711  },
3712  {
3713   "chips": ["gfx9"],
3714   "map": {"at": 164588, "to": "mm"},
3715   "name": "PA_SC_VPORT_ZMAX_3"
3716  },
3717  {
3718   "chips": ["gfx9"],
3719   "map": {"at": 164592, "to": "mm"},
3720   "name": "PA_SC_VPORT_ZMIN_4"
3721  },
3722  {
3723   "chips": ["gfx9"],
3724   "map": {"at": 164596, "to": "mm"},
3725   "name": "PA_SC_VPORT_ZMAX_4"
3726  },
3727  {
3728   "chips": ["gfx9"],
3729   "map": {"at": 164600, "to": "mm"},
3730   "name": "PA_SC_VPORT_ZMIN_5"
3731  },
3732  {
3733   "chips": ["gfx9"],
3734   "map": {"at": 164604, "to": "mm"},
3735   "name": "PA_SC_VPORT_ZMAX_5"
3736  },
3737  {
3738   "chips": ["gfx9"],
3739   "map": {"at": 164608, "to": "mm"},
3740   "name": "PA_SC_VPORT_ZMIN_6"
3741  },
3742  {
3743   "chips": ["gfx9"],
3744   "map": {"at": 164612, "to": "mm"},
3745   "name": "PA_SC_VPORT_ZMAX_6"
3746  },
3747  {
3748   "chips": ["gfx9"],
3749   "map": {"at": 164616, "to": "mm"},
3750   "name": "PA_SC_VPORT_ZMIN_7"
3751  },
3752  {
3753   "chips": ["gfx9"],
3754   "map": {"at": 164620, "to": "mm"},
3755   "name": "PA_SC_VPORT_ZMAX_7"
3756  },
3757  {
3758   "chips": ["gfx9"],
3759   "map": {"at": 164624, "to": "mm"},
3760   "name": "PA_SC_VPORT_ZMIN_8"
3761  },
3762  {
3763   "chips": ["gfx9"],
3764   "map": {"at": 164628, "to": "mm"},
3765   "name": "PA_SC_VPORT_ZMAX_8"
3766  },
3767  {
3768   "chips": ["gfx9"],
3769   "map": {"at": 164632, "to": "mm"},
3770   "name": "PA_SC_VPORT_ZMIN_9"
3771  },
3772  {
3773   "chips": ["gfx9"],
3774   "map": {"at": 164636, "to": "mm"},
3775   "name": "PA_SC_VPORT_ZMAX_9"
3776  },
3777  {
3778   "chips": ["gfx9"],
3779   "map": {"at": 164640, "to": "mm"},
3780   "name": "PA_SC_VPORT_ZMIN_10"
3781  },
3782  {
3783   "chips": ["gfx9"],
3784   "map": {"at": 164644, "to": "mm"},
3785   "name": "PA_SC_VPORT_ZMAX_10"
3786  },
3787  {
3788   "chips": ["gfx9"],
3789   "map": {"at": 164648, "to": "mm"},
3790   "name": "PA_SC_VPORT_ZMIN_11"
3791  },
3792  {
3793   "chips": ["gfx9"],
3794   "map": {"at": 164652, "to": "mm"},
3795   "name": "PA_SC_VPORT_ZMAX_11"
3796  },
3797  {
3798   "chips": ["gfx9"],
3799   "map": {"at": 164656, "to": "mm"},
3800   "name": "PA_SC_VPORT_ZMIN_12"
3801  },
3802  {
3803   "chips": ["gfx9"],
3804   "map": {"at": 164660, "to": "mm"},
3805   "name": "PA_SC_VPORT_ZMAX_12"
3806  },
3807  {
3808   "chips": ["gfx9"],
3809   "map": {"at": 164664, "to": "mm"},
3810   "name": "PA_SC_VPORT_ZMIN_13"
3811  },
3812  {
3813   "chips": ["gfx9"],
3814   "map": {"at": 164668, "to": "mm"},
3815   "name": "PA_SC_VPORT_ZMAX_13"
3816  },
3817  {
3818   "chips": ["gfx9"],
3819   "map": {"at": 164672, "to": "mm"},
3820   "name": "PA_SC_VPORT_ZMIN_14"
3821  },
3822  {
3823   "chips": ["gfx9"],
3824   "map": {"at": 164676, "to": "mm"},
3825   "name": "PA_SC_VPORT_ZMAX_14"
3826  },
3827  {
3828   "chips": ["gfx9"],
3829   "map": {"at": 164680, "to": "mm"},
3830   "name": "PA_SC_VPORT_ZMIN_15"
3831  },
3832  {
3833   "chips": ["gfx9"],
3834   "map": {"at": 164684, "to": "mm"},
3835   "name": "PA_SC_VPORT_ZMAX_15"
3836  },
3837  {
3838   "chips": ["gfx9"],
3839   "map": {"at": 164688, "to": "mm"},
3840   "name": "PA_SC_RASTER_CONFIG",
3841   "type_ref": "PA_SC_RASTER_CONFIG"
3842  },
3843  {
3844   "chips": ["gfx9"],
3845   "map": {"at": 164692, "to": "mm"},
3846   "name": "PA_SC_RASTER_CONFIG_1",
3847   "type_ref": "PA_SC_RASTER_CONFIG_1"
3848  },
3849  {
3850   "chips": ["gfx9"],
3851   "map": {"at": 164696, "to": "mm"},
3852   "name": "PA_SC_SCREEN_EXTENT_CONTROL",
3853   "type_ref": "PA_SC_SCREEN_EXTENT_CONTROL"
3854  },
3855  {
3856   "chips": ["gfx9"],
3857   "map": {"at": 164700, "to": "mm"},
3858   "name": "PA_SC_TILE_STEERING_OVERRIDE",
3859   "type_ref": "PA_SC_TILE_STEERING_OVERRIDE"
3860  },
3861  {
3862   "chips": ["gfx9"],
3863   "map": {"at": 164704, "to": "mm"},
3864   "name": "CP_PERFMON_CNTX_CNTL",
3865   "type_ref": "CP_PERFMON_CNTX_CNTL"
3866  },
3867  {
3868   "chips": ["gfx9"],
3869   "map": {"at": 164708, "to": "mm"},
3870   "name": "CP_PIPEID",
3871   "type_ref": "CP_PIPEID"
3872  },
3873  {
3874   "chips": ["gfx9"],
3875   "map": {"at": 164712, "to": "mm"},
3876   "name": "CP_VMID",
3877   "type_ref": "CP_VMID"
3878  },
3879  {
3880   "chips": ["gfx9"],
3881   "map": {"at": 164768, "to": "mm"},
3882   "name": "PA_SC_RIGHT_VERT_GRID",
3883   "type_ref": "PA_SC_RIGHT_VERT_GRID"
3884  },
3885  {
3886   "chips": ["gfx9"],
3887   "map": {"at": 164772, "to": "mm"},
3888   "name": "PA_SC_LEFT_VERT_GRID",
3889   "type_ref": "PA_SC_RIGHT_VERT_GRID"
3890  },
3891  {
3892   "chips": ["gfx9"],
3893   "map": {"at": 164776, "to": "mm"},
3894   "name": "PA_SC_HORIZ_GRID",
3895   "type_ref": "PA_SC_HORIZ_GRID"
3896  },
3897  {
3898   "chips": ["gfx9"],
3899   "map": {"at": 164876, "to": "mm"},
3900   "name": "VGT_MULTI_PRIM_IB_RESET_INDX"
3901  },
3902  {
3903   "chips": ["gfx9"],
3904   "map": {"at": 164884, "to": "mm"},
3905   "name": "CB_BLEND_RED"
3906  },
3907  {
3908   "chips": ["gfx9"],
3909   "map": {"at": 164888, "to": "mm"},
3910   "name": "CB_BLEND_GREEN"
3911  },
3912  {
3913   "chips": ["gfx9"],
3914   "map": {"at": 164892, "to": "mm"},
3915   "name": "CB_BLEND_BLUE"
3916  },
3917  {
3918   "chips": ["gfx9"],
3919   "map": {"at": 164896, "to": "mm"},
3920   "name": "CB_BLEND_ALPHA"
3921  },
3922  {
3923   "chips": ["gfx9"],
3924   "map": {"at": 164900, "to": "mm"},
3925   "name": "CB_DCC_CONTROL",
3926   "type_ref": "CB_DCC_CONTROL"
3927  },
3928  {
3929   "chips": ["gfx9"],
3930   "map": {"at": 164908, "to": "mm"},
3931   "name": "DB_STENCIL_CONTROL",
3932   "type_ref": "DB_STENCIL_CONTROL"
3933  },
3934  {
3935   "chips": ["gfx9"],
3936   "map": {"at": 164912, "to": "mm"},
3937   "name": "DB_STENCILREFMASK",
3938   "type_ref": "DB_STENCILREFMASK"
3939  },
3940  {
3941   "chips": ["gfx9"],
3942   "map": {"at": 164916, "to": "mm"},
3943   "name": "DB_STENCILREFMASK_BF",
3944   "type_ref": "DB_STENCILREFMASK_BF"
3945  },
3946  {
3947   "chips": ["gfx9"],
3948   "map": {"at": 164924, "to": "mm"},
3949   "name": "PA_CL_VPORT_XSCALE"
3950  },
3951  {
3952   "chips": ["gfx9"],
3953   "map": {"at": 164928, "to": "mm"},
3954   "name": "PA_CL_VPORT_XOFFSET"
3955  },
3956  {
3957   "chips": ["gfx9"],
3958   "map": {"at": 164932, "to": "mm"},
3959   "name": "PA_CL_VPORT_YSCALE"
3960  },
3961  {
3962   "chips": ["gfx9"],
3963   "map": {"at": 164936, "to": "mm"},
3964   "name": "PA_CL_VPORT_YOFFSET"
3965  },
3966  {
3967   "chips": ["gfx9"],
3968   "map": {"at": 164940, "to": "mm"},
3969   "name": "PA_CL_VPORT_ZSCALE"
3970  },
3971  {
3972   "chips": ["gfx9"],
3973   "map": {"at": 164944, "to": "mm"},
3974   "name": "PA_CL_VPORT_ZOFFSET"
3975  },
3976  {
3977   "chips": ["gfx9"],
3978   "map": {"at": 164948, "to": "mm"},
3979   "name": "PA_CL_VPORT_XSCALE_1"
3980  },
3981  {
3982   "chips": ["gfx9"],
3983   "map": {"at": 164952, "to": "mm"},
3984   "name": "PA_CL_VPORT_XOFFSET_1"
3985  },
3986  {
3987   "chips": ["gfx9"],
3988   "map": {"at": 164956, "to": "mm"},
3989   "name": "PA_CL_VPORT_YSCALE_1"
3990  },
3991  {
3992   "chips": ["gfx9"],
3993   "map": {"at": 164960, "to": "mm"},
3994   "name": "PA_CL_VPORT_YOFFSET_1"
3995  },
3996  {
3997   "chips": ["gfx9"],
3998   "map": {"at": 164964, "to": "mm"},
3999   "name": "PA_CL_VPORT_ZSCALE_1"
4000  },
4001  {
4002   "chips": ["gfx9"],
4003   "map": {"at": 164968, "to": "mm"},
4004   "name": "PA_CL_VPORT_ZOFFSET_1"
4005  },
4006  {
4007   "chips": ["gfx9"],
4008   "map": {"at": 164972, "to": "mm"},
4009   "name": "PA_CL_VPORT_XSCALE_2"
4010  },
4011  {
4012   "chips": ["gfx9"],
4013   "map": {"at": 164976, "to": "mm"},
4014   "name": "PA_CL_VPORT_XOFFSET_2"
4015  },
4016  {
4017   "chips": ["gfx9"],
4018   "map": {"at": 164980, "to": "mm"},
4019   "name": "PA_CL_VPORT_YSCALE_2"
4020  },
4021  {
4022   "chips": ["gfx9"],
4023   "map": {"at": 164984, "to": "mm"},
4024   "name": "PA_CL_VPORT_YOFFSET_2"
4025  },
4026  {
4027   "chips": ["gfx9"],
4028   "map": {"at": 164988, "to": "mm"},
4029   "name": "PA_CL_VPORT_ZSCALE_2"
4030  },
4031  {
4032   "chips": ["gfx9"],
4033   "map": {"at": 164992, "to": "mm"},
4034   "name": "PA_CL_VPORT_ZOFFSET_2"
4035  },
4036  {
4037   "chips": ["gfx9"],
4038   "map": {"at": 164996, "to": "mm"},
4039   "name": "PA_CL_VPORT_XSCALE_3"
4040  },
4041  {
4042   "chips": ["gfx9"],
4043   "map": {"at": 165000, "to": "mm"},
4044   "name": "PA_CL_VPORT_XOFFSET_3"
4045  },
4046  {
4047   "chips": ["gfx9"],
4048   "map": {"at": 165004, "to": "mm"},
4049   "name": "PA_CL_VPORT_YSCALE_3"
4050  },
4051  {
4052   "chips": ["gfx9"],
4053   "map": {"at": 165008, "to": "mm"},
4054   "name": "PA_CL_VPORT_YOFFSET_3"
4055  },
4056  {
4057   "chips": ["gfx9"],
4058   "map": {"at": 165012, "to": "mm"},
4059   "name": "PA_CL_VPORT_ZSCALE_3"
4060  },
4061  {
4062   "chips": ["gfx9"],
4063   "map": {"at": 165016, "to": "mm"},
4064   "name": "PA_CL_VPORT_ZOFFSET_3"
4065  },
4066  {
4067   "chips": ["gfx9"],
4068   "map": {"at": 165020, "to": "mm"},
4069   "name": "PA_CL_VPORT_XSCALE_4"
4070  },
4071  {
4072   "chips": ["gfx9"],
4073   "map": {"at": 165024, "to": "mm"},
4074   "name": "PA_CL_VPORT_XOFFSET_4"
4075  },
4076  {
4077   "chips": ["gfx9"],
4078   "map": {"at": 165028, "to": "mm"},
4079   "name": "PA_CL_VPORT_YSCALE_4"
4080  },
4081  {
4082   "chips": ["gfx9"],
4083   "map": {"at": 165032, "to": "mm"},
4084   "name": "PA_CL_VPORT_YOFFSET_4"
4085  },
4086  {
4087   "chips": ["gfx9"],
4088   "map": {"at": 165036, "to": "mm"},
4089   "name": "PA_CL_VPORT_ZSCALE_4"
4090  },
4091  {
4092   "chips": ["gfx9"],
4093   "map": {"at": 165040, "to": "mm"},
4094   "name": "PA_CL_VPORT_ZOFFSET_4"
4095  },
4096  {
4097   "chips": ["gfx9"],
4098   "map": {"at": 165044, "to": "mm"},
4099   "name": "PA_CL_VPORT_XSCALE_5"
4100  },
4101  {
4102   "chips": ["gfx9"],
4103   "map": {"at": 165048, "to": "mm"},
4104   "name": "PA_CL_VPORT_XOFFSET_5"
4105  },
4106  {
4107   "chips": ["gfx9"],
4108   "map": {"at": 165052, "to": "mm"},
4109   "name": "PA_CL_VPORT_YSCALE_5"
4110  },
4111  {
4112   "chips": ["gfx9"],
4113   "map": {"at": 165056, "to": "mm"},
4114   "name": "PA_CL_VPORT_YOFFSET_5"
4115  },
4116  {
4117   "chips": ["gfx9"],
4118   "map": {"at": 165060, "to": "mm"},
4119   "name": "PA_CL_VPORT_ZSCALE_5"
4120  },
4121  {
4122   "chips": ["gfx9"],
4123   "map": {"at": 165064, "to": "mm"},
4124   "name": "PA_CL_VPORT_ZOFFSET_5"
4125  },
4126  {
4127   "chips": ["gfx9"],
4128   "map": {"at": 165068, "to": "mm"},
4129   "name": "PA_CL_VPORT_XSCALE_6"
4130  },
4131  {
4132   "chips": ["gfx9"],
4133   "map": {"at": 165072, "to": "mm"},
4134   "name": "PA_CL_VPORT_XOFFSET_6"
4135  },
4136  {
4137   "chips": ["gfx9"],
4138   "map": {"at": 165076, "to": "mm"},
4139   "name": "PA_CL_VPORT_YSCALE_6"
4140  },
4141  {
4142   "chips": ["gfx9"],
4143   "map": {"at": 165080, "to": "mm"},
4144   "name": "PA_CL_VPORT_YOFFSET_6"
4145  },
4146  {
4147   "chips": ["gfx9"],
4148   "map": {"at": 165084, "to": "mm"},
4149   "name": "PA_CL_VPORT_ZSCALE_6"
4150  },
4151  {
4152   "chips": ["gfx9"],
4153   "map": {"at": 165088, "to": "mm"},
4154   "name": "PA_CL_VPORT_ZOFFSET_6"
4155  },
4156  {
4157   "chips": ["gfx9"],
4158   "map": {"at": 165092, "to": "mm"},
4159   "name": "PA_CL_VPORT_XSCALE_7"
4160  },
4161  {
4162   "chips": ["gfx9"],
4163   "map": {"at": 165096, "to": "mm"},
4164   "name": "PA_CL_VPORT_XOFFSET_7"
4165  },
4166  {
4167   "chips": ["gfx9"],
4168   "map": {"at": 165100, "to": "mm"},
4169   "name": "PA_CL_VPORT_YSCALE_7"
4170  },
4171  {
4172   "chips": ["gfx9"],
4173   "map": {"at": 165104, "to": "mm"},
4174   "name": "PA_CL_VPORT_YOFFSET_7"
4175  },
4176  {
4177   "chips": ["gfx9"],
4178   "map": {"at": 165108, "to": "mm"},
4179   "name": "PA_CL_VPORT_ZSCALE_7"
4180  },
4181  {
4182   "chips": ["gfx9"],
4183   "map": {"at": 165112, "to": "mm"},
4184   "name": "PA_CL_VPORT_ZOFFSET_7"
4185  },
4186  {
4187   "chips": ["gfx9"],
4188   "map": {"at": 165116, "to": "mm"},
4189   "name": "PA_CL_VPORT_XSCALE_8"
4190  },
4191  {
4192   "chips": ["gfx9"],
4193   "map": {"at": 165120, "to": "mm"},
4194   "name": "PA_CL_VPORT_XOFFSET_8"
4195  },
4196  {
4197   "chips": ["gfx9"],
4198   "map": {"at": 165124, "to": "mm"},
4199   "name": "PA_CL_VPORT_YSCALE_8"
4200  },
4201  {
4202   "chips": ["gfx9"],
4203   "map": {"at": 165128, "to": "mm"},
4204   "name": "PA_CL_VPORT_YOFFSET_8"
4205  },
4206  {
4207   "chips": ["gfx9"],
4208   "map": {"at": 165132, "to": "mm"},
4209   "name": "PA_CL_VPORT_ZSCALE_8"
4210  },
4211  {
4212   "chips": ["gfx9"],
4213   "map": {"at": 165136, "to": "mm"},
4214   "name": "PA_CL_VPORT_ZOFFSET_8"
4215  },
4216  {
4217   "chips": ["gfx9"],
4218   "map": {"at": 165140, "to": "mm"},
4219   "name": "PA_CL_VPORT_XSCALE_9"
4220  },
4221  {
4222   "chips": ["gfx9"],
4223   "map": {"at": 165144, "to": "mm"},
4224   "name": "PA_CL_VPORT_XOFFSET_9"
4225  },
4226  {
4227   "chips": ["gfx9"],
4228   "map": {"at": 165148, "to": "mm"},
4229   "name": "PA_CL_VPORT_YSCALE_9"
4230  },
4231  {
4232   "chips": ["gfx9"],
4233   "map": {"at": 165152, "to": "mm"},
4234   "name": "PA_CL_VPORT_YOFFSET_9"
4235  },
4236  {
4237   "chips": ["gfx9"],
4238   "map": {"at": 165156, "to": "mm"},
4239   "name": "PA_CL_VPORT_ZSCALE_9"
4240  },
4241  {
4242   "chips": ["gfx9"],
4243   "map": {"at": 165160, "to": "mm"},
4244   "name": "PA_CL_VPORT_ZOFFSET_9"
4245  },
4246  {
4247   "chips": ["gfx9"],
4248   "map": {"at": 165164, "to": "mm"},
4249   "name": "PA_CL_VPORT_XSCALE_10"
4250  },
4251  {
4252   "chips": ["gfx9"],
4253   "map": {"at": 165168, "to": "mm"},
4254   "name": "PA_CL_VPORT_XOFFSET_10"
4255  },
4256  {
4257   "chips": ["gfx9"],
4258   "map": {"at": 165172, "to": "mm"},
4259   "name": "PA_CL_VPORT_YSCALE_10"
4260  },
4261  {
4262   "chips": ["gfx9"],
4263   "map": {"at": 165176, "to": "mm"},
4264   "name": "PA_CL_VPORT_YOFFSET_10"
4265  },
4266  {
4267   "chips": ["gfx9"],
4268   "map": {"at": 165180, "to": "mm"},
4269   "name": "PA_CL_VPORT_ZSCALE_10"
4270  },
4271  {
4272   "chips": ["gfx9"],
4273   "map": {"at": 165184, "to": "mm"},
4274   "name": "PA_CL_VPORT_ZOFFSET_10"
4275  },
4276  {
4277   "chips": ["gfx9"],
4278   "map": {"at": 165188, "to": "mm"},
4279   "name": "PA_CL_VPORT_XSCALE_11"
4280  },
4281  {
4282   "chips": ["gfx9"],
4283   "map": {"at": 165192, "to": "mm"},
4284   "name": "PA_CL_VPORT_XOFFSET_11"
4285  },
4286  {
4287   "chips": ["gfx9"],
4288   "map": {"at": 165196, "to": "mm"},
4289   "name": "PA_CL_VPORT_YSCALE_11"
4290  },
4291  {
4292   "chips": ["gfx9"],
4293   "map": {"at": 165200, "to": "mm"},
4294   "name": "PA_CL_VPORT_YOFFSET_11"
4295  },
4296  {
4297   "chips": ["gfx9"],
4298   "map": {"at": 165204, "to": "mm"},
4299   "name": "PA_CL_VPORT_ZSCALE_11"
4300  },
4301  {
4302   "chips": ["gfx9"],
4303   "map": {"at": 165208, "to": "mm"},
4304   "name": "PA_CL_VPORT_ZOFFSET_11"
4305  },
4306  {
4307   "chips": ["gfx9"],
4308   "map": {"at": 165212, "to": "mm"},
4309   "name": "PA_CL_VPORT_XSCALE_12"
4310  },
4311  {
4312   "chips": ["gfx9"],
4313   "map": {"at": 165216, "to": "mm"},
4314   "name": "PA_CL_VPORT_XOFFSET_12"
4315  },
4316  {
4317   "chips": ["gfx9"],
4318   "map": {"at": 165220, "to": "mm"},
4319   "name": "PA_CL_VPORT_YSCALE_12"
4320  },
4321  {
4322   "chips": ["gfx9"],
4323   "map": {"at": 165224, "to": "mm"},
4324   "name": "PA_CL_VPORT_YOFFSET_12"
4325  },
4326  {
4327   "chips": ["gfx9"],
4328   "map": {"at": 165228, "to": "mm"},
4329   "name": "PA_CL_VPORT_ZSCALE_12"
4330  },
4331  {
4332   "chips": ["gfx9"],
4333   "map": {"at": 165232, "to": "mm"},
4334   "name": "PA_CL_VPORT_ZOFFSET_12"
4335  },
4336  {
4337   "chips": ["gfx9"],
4338   "map": {"at": 165236, "to": "mm"},
4339   "name": "PA_CL_VPORT_XSCALE_13"
4340  },
4341  {
4342   "chips": ["gfx9"],
4343   "map": {"at": 165240, "to": "mm"},
4344   "name": "PA_CL_VPORT_XOFFSET_13"
4345  },
4346  {
4347   "chips": ["gfx9"],
4348   "map": {"at": 165244, "to": "mm"},
4349   "name": "PA_CL_VPORT_YSCALE_13"
4350  },
4351  {
4352   "chips": ["gfx9"],
4353   "map": {"at": 165248, "to": "mm"},
4354   "name": "PA_CL_VPORT_YOFFSET_13"
4355  },
4356  {
4357   "chips": ["gfx9"],
4358   "map": {"at": 165252, "to": "mm"},
4359   "name": "PA_CL_VPORT_ZSCALE_13"
4360  },
4361  {
4362   "chips": ["gfx9"],
4363   "map": {"at": 165256, "to": "mm"},
4364   "name": "PA_CL_VPORT_ZOFFSET_13"
4365  },
4366  {
4367   "chips": ["gfx9"],
4368   "map": {"at": 165260, "to": "mm"},
4369   "name": "PA_CL_VPORT_XSCALE_14"
4370  },
4371  {
4372   "chips": ["gfx9"],
4373   "map": {"at": 165264, "to": "mm"},
4374   "name": "PA_CL_VPORT_XOFFSET_14"
4375  },
4376  {
4377   "chips": ["gfx9"],
4378   "map": {"at": 165268, "to": "mm"},
4379   "name": "PA_CL_VPORT_YSCALE_14"
4380  },
4381  {
4382   "chips": ["gfx9"],
4383   "map": {"at": 165272, "to": "mm"},
4384   "name": "PA_CL_VPORT_YOFFSET_14"
4385  },
4386  {
4387   "chips": ["gfx9"],
4388   "map": {"at": 165276, "to": "mm"},
4389   "name": "PA_CL_VPORT_ZSCALE_14"
4390  },
4391  {
4392   "chips": ["gfx9"],
4393   "map": {"at": 165280, "to": "mm"},
4394   "name": "PA_CL_VPORT_ZOFFSET_14"
4395  },
4396  {
4397   "chips": ["gfx9"],
4398   "map": {"at": 165284, "to": "mm"},
4399   "name": "PA_CL_VPORT_XSCALE_15"
4400  },
4401  {
4402   "chips": ["gfx9"],
4403   "map": {"at": 165288, "to": "mm"},
4404   "name": "PA_CL_VPORT_XOFFSET_15"
4405  },
4406  {
4407   "chips": ["gfx9"],
4408   "map": {"at": 165292, "to": "mm"},
4409   "name": "PA_CL_VPORT_YSCALE_15"
4410  },
4411  {
4412   "chips": ["gfx9"],
4413   "map": {"at": 165296, "to": "mm"},
4414   "name": "PA_CL_VPORT_YOFFSET_15"
4415  },
4416  {
4417   "chips": ["gfx9"],
4418   "map": {"at": 165300, "to": "mm"},
4419   "name": "PA_CL_VPORT_ZSCALE_15"
4420  },
4421  {
4422   "chips": ["gfx9"],
4423   "map": {"at": 165304, "to": "mm"},
4424   "name": "PA_CL_VPORT_ZOFFSET_15"
4425  },
4426  {
4427   "chips": ["gfx9"],
4428   "map": {"at": 165308, "to": "mm"},
4429   "name": "PA_CL_UCP_0_X"
4430  },
4431  {
4432   "chips": ["gfx9"],
4433   "map": {"at": 165312, "to": "mm"},
4434   "name": "PA_CL_UCP_0_Y"
4435  },
4436  {
4437   "chips": ["gfx9"],
4438   "map": {"at": 165316, "to": "mm"},
4439   "name": "PA_CL_UCP_0_Z"
4440  },
4441  {
4442   "chips": ["gfx9"],
4443   "map": {"at": 165320, "to": "mm"},
4444   "name": "PA_CL_UCP_0_W"
4445  },
4446  {
4447   "chips": ["gfx9"],
4448   "map": {"at": 165324, "to": "mm"},
4449   "name": "PA_CL_UCP_1_X"
4450  },
4451  {
4452   "chips": ["gfx9"],
4453   "map": {"at": 165328, "to": "mm"},
4454   "name": "PA_CL_UCP_1_Y"
4455  },
4456  {
4457   "chips": ["gfx9"],
4458   "map": {"at": 165332, "to": "mm"},
4459   "name": "PA_CL_UCP_1_Z"
4460  },
4461  {
4462   "chips": ["gfx9"],
4463   "map": {"at": 165336, "to": "mm"},
4464   "name": "PA_CL_UCP_1_W"
4465  },
4466  {
4467   "chips": ["gfx9"],
4468   "map": {"at": 165340, "to": "mm"},
4469   "name": "PA_CL_UCP_2_X"
4470  },
4471  {
4472   "chips": ["gfx9"],
4473   "map": {"at": 165344, "to": "mm"},
4474   "name": "PA_CL_UCP_2_Y"
4475  },
4476  {
4477   "chips": ["gfx9"],
4478   "map": {"at": 165348, "to": "mm"},
4479   "name": "PA_CL_UCP_2_Z"
4480  },
4481  {
4482   "chips": ["gfx9"],
4483   "map": {"at": 165352, "to": "mm"},
4484   "name": "PA_CL_UCP_2_W"
4485  },
4486  {
4487   "chips": ["gfx9"],
4488   "map": {"at": 165356, "to": "mm"},
4489   "name": "PA_CL_UCP_3_X"
4490  },
4491  {
4492   "chips": ["gfx9"],
4493   "map": {"at": 165360, "to": "mm"},
4494   "name": "PA_CL_UCP_3_Y"
4495  },
4496  {
4497   "chips": ["gfx9"],
4498   "map": {"at": 165364, "to": "mm"},
4499   "name": "PA_CL_UCP_3_Z"
4500  },
4501  {
4502   "chips": ["gfx9"],
4503   "map": {"at": 165368, "to": "mm"},
4504   "name": "PA_CL_UCP_3_W"
4505  },
4506  {
4507   "chips": ["gfx9"],
4508   "map": {"at": 165372, "to": "mm"},
4509   "name": "PA_CL_UCP_4_X"
4510  },
4511  {
4512   "chips": ["gfx9"],
4513   "map": {"at": 165376, "to": "mm"},
4514   "name": "PA_CL_UCP_4_Y"
4515  },
4516  {
4517   "chips": ["gfx9"],
4518   "map": {"at": 165380, "to": "mm"},
4519   "name": "PA_CL_UCP_4_Z"
4520  },
4521  {
4522   "chips": ["gfx9"],
4523   "map": {"at": 165384, "to": "mm"},
4524   "name": "PA_CL_UCP_4_W"
4525  },
4526  {
4527   "chips": ["gfx9"],
4528   "map": {"at": 165388, "to": "mm"},
4529   "name": "PA_CL_UCP_5_X"
4530  },
4531  {
4532   "chips": ["gfx9"],
4533   "map": {"at": 165392, "to": "mm"},
4534   "name": "PA_CL_UCP_5_Y"
4535  },
4536  {
4537   "chips": ["gfx9"],
4538   "map": {"at": 165396, "to": "mm"},
4539   "name": "PA_CL_UCP_5_Z"
4540  },
4541  {
4542   "chips": ["gfx9"],
4543   "map": {"at": 165400, "to": "mm"},
4544   "name": "PA_CL_UCP_5_W"
4545  },
4546  {
4547   "chips": ["gfx9"],
4548   "map": {"at": 165404, "to": "mm"},
4549   "name": "PA_CL_PROG_NEAR_CLIP_Z"
4550  },
4551  {
4552   "chips": ["gfx9"],
4553   "map": {"at": 165444, "to": "mm"},
4554   "name": "SPI_PS_INPUT_CNTL_0",
4555   "type_ref": "SPI_PS_INPUT_CNTL_0"
4556  },
4557  {
4558   "chips": ["gfx9"],
4559   "map": {"at": 165448, "to": "mm"},
4560   "name": "SPI_PS_INPUT_CNTL_1",
4561   "type_ref": "SPI_PS_INPUT_CNTL_0"
4562  },
4563  {
4564   "chips": ["gfx9"],
4565   "map": {"at": 165452, "to": "mm"},
4566   "name": "SPI_PS_INPUT_CNTL_2",
4567   "type_ref": "SPI_PS_INPUT_CNTL_0"
4568  },
4569  {
4570   "chips": ["gfx9"],
4571   "map": {"at": 165456, "to": "mm"},
4572   "name": "SPI_PS_INPUT_CNTL_3",
4573   "type_ref": "SPI_PS_INPUT_CNTL_0"
4574  },
4575  {
4576   "chips": ["gfx9"],
4577   "map": {"at": 165460, "to": "mm"},
4578   "name": "SPI_PS_INPUT_CNTL_4",
4579   "type_ref": "SPI_PS_INPUT_CNTL_0"
4580  },
4581  {
4582   "chips": ["gfx9"],
4583   "map": {"at": 165464, "to": "mm"},
4584   "name": "SPI_PS_INPUT_CNTL_5",
4585   "type_ref": "SPI_PS_INPUT_CNTL_0"
4586  },
4587  {
4588   "chips": ["gfx9"],
4589   "map": {"at": 165468, "to": "mm"},
4590   "name": "SPI_PS_INPUT_CNTL_6",
4591   "type_ref": "SPI_PS_INPUT_CNTL_0"
4592  },
4593  {
4594   "chips": ["gfx9"],
4595   "map": {"at": 165472, "to": "mm"},
4596   "name": "SPI_PS_INPUT_CNTL_7",
4597   "type_ref": "SPI_PS_INPUT_CNTL_0"
4598  },
4599  {
4600   "chips": ["gfx9"],
4601   "map": {"at": 165476, "to": "mm"},
4602   "name": "SPI_PS_INPUT_CNTL_8",
4603   "type_ref": "SPI_PS_INPUT_CNTL_0"
4604  },
4605  {
4606   "chips": ["gfx9"],
4607   "map": {"at": 165480, "to": "mm"},
4608   "name": "SPI_PS_INPUT_CNTL_9",
4609   "type_ref": "SPI_PS_INPUT_CNTL_0"
4610  },
4611  {
4612   "chips": ["gfx9"],
4613   "map": {"at": 165484, "to": "mm"},
4614   "name": "SPI_PS_INPUT_CNTL_10",
4615   "type_ref": "SPI_PS_INPUT_CNTL_0"
4616  },
4617  {
4618   "chips": ["gfx9"],
4619   "map": {"at": 165488, "to": "mm"},
4620   "name": "SPI_PS_INPUT_CNTL_11",
4621   "type_ref": "SPI_PS_INPUT_CNTL_0"
4622  },
4623  {
4624   "chips": ["gfx9"],
4625   "map": {"at": 165492, "to": "mm"},
4626   "name": "SPI_PS_INPUT_CNTL_12",
4627   "type_ref": "SPI_PS_INPUT_CNTL_0"
4628  },
4629  {
4630   "chips": ["gfx9"],
4631   "map": {"at": 165496, "to": "mm"},
4632   "name": "SPI_PS_INPUT_CNTL_13",
4633   "type_ref": "SPI_PS_INPUT_CNTL_0"
4634  },
4635  {
4636   "chips": ["gfx9"],
4637   "map": {"at": 165500, "to": "mm"},
4638   "name": "SPI_PS_INPUT_CNTL_14",
4639   "type_ref": "SPI_PS_INPUT_CNTL_0"
4640  },
4641  {
4642   "chips": ["gfx9"],
4643   "map": {"at": 165504, "to": "mm"},
4644   "name": "SPI_PS_INPUT_CNTL_15",
4645   "type_ref": "SPI_PS_INPUT_CNTL_0"
4646  },
4647  {
4648   "chips": ["gfx9"],
4649   "map": {"at": 165508, "to": "mm"},
4650   "name": "SPI_PS_INPUT_CNTL_16",
4651   "type_ref": "SPI_PS_INPUT_CNTL_0"
4652  },
4653  {
4654   "chips": ["gfx9"],
4655   "map": {"at": 165512, "to": "mm"},
4656   "name": "SPI_PS_INPUT_CNTL_17",
4657   "type_ref": "SPI_PS_INPUT_CNTL_0"
4658  },
4659  {
4660   "chips": ["gfx9"],
4661   "map": {"at": 165516, "to": "mm"},
4662   "name": "SPI_PS_INPUT_CNTL_18",
4663   "type_ref": "SPI_PS_INPUT_CNTL_0"
4664  },
4665  {
4666   "chips": ["gfx9"],
4667   "map": {"at": 165520, "to": "mm"},
4668   "name": "SPI_PS_INPUT_CNTL_19",
4669   "type_ref": "SPI_PS_INPUT_CNTL_0"
4670  },
4671  {
4672   "chips": ["gfx9"],
4673   "map": {"at": 165524, "to": "mm"},
4674   "name": "SPI_PS_INPUT_CNTL_20",
4675   "type_ref": "SPI_PS_INPUT_CNTL_20"
4676  },
4677  {
4678   "chips": ["gfx9"],
4679   "map": {"at": 165528, "to": "mm"},
4680   "name": "SPI_PS_INPUT_CNTL_21",
4681   "type_ref": "SPI_PS_INPUT_CNTL_20"
4682  },
4683  {
4684   "chips": ["gfx9"],
4685   "map": {"at": 165532, "to": "mm"},
4686   "name": "SPI_PS_INPUT_CNTL_22",
4687   "type_ref": "SPI_PS_INPUT_CNTL_20"
4688  },
4689  {
4690   "chips": ["gfx9"],
4691   "map": {"at": 165536, "to": "mm"},
4692   "name": "SPI_PS_INPUT_CNTL_23",
4693   "type_ref": "SPI_PS_INPUT_CNTL_20"
4694  },
4695  {
4696   "chips": ["gfx9"],
4697   "map": {"at": 165540, "to": "mm"},
4698   "name": "SPI_PS_INPUT_CNTL_24",
4699   "type_ref": "SPI_PS_INPUT_CNTL_20"
4700  },
4701  {
4702   "chips": ["gfx9"],
4703   "map": {"at": 165544, "to": "mm"},
4704   "name": "SPI_PS_INPUT_CNTL_25",
4705   "type_ref": "SPI_PS_INPUT_CNTL_20"
4706  },
4707  {
4708   "chips": ["gfx9"],
4709   "map": {"at": 165548, "to": "mm"},
4710   "name": "SPI_PS_INPUT_CNTL_26",
4711   "type_ref": "SPI_PS_INPUT_CNTL_20"
4712  },
4713  {
4714   "chips": ["gfx9"],
4715   "map": {"at": 165552, "to": "mm"},
4716   "name": "SPI_PS_INPUT_CNTL_27",
4717   "type_ref": "SPI_PS_INPUT_CNTL_20"
4718  },
4719  {
4720   "chips": ["gfx9"],
4721   "map": {"at": 165556, "to": "mm"},
4722   "name": "SPI_PS_INPUT_CNTL_28",
4723   "type_ref": "SPI_PS_INPUT_CNTL_20"
4724  },
4725  {
4726   "chips": ["gfx9"],
4727   "map": {"at": 165560, "to": "mm"},
4728   "name": "SPI_PS_INPUT_CNTL_29",
4729   "type_ref": "SPI_PS_INPUT_CNTL_20"
4730  },
4731  {
4732   "chips": ["gfx9"],
4733   "map": {"at": 165564, "to": "mm"},
4734   "name": "SPI_PS_INPUT_CNTL_30",
4735   "type_ref": "SPI_PS_INPUT_CNTL_20"
4736  },
4737  {
4738   "chips": ["gfx9"],
4739   "map": {"at": 165568, "to": "mm"},
4740   "name": "SPI_PS_INPUT_CNTL_31",
4741   "type_ref": "SPI_PS_INPUT_CNTL_20"
4742  },
4743  {
4744   "chips": ["gfx9"],
4745   "map": {"at": 165572, "to": "mm"},
4746   "name": "SPI_VS_OUT_CONFIG",
4747   "type_ref": "SPI_VS_OUT_CONFIG"
4748  },
4749  {
4750   "chips": ["gfx9"],
4751   "map": {"at": 165580, "to": "mm"},
4752   "name": "SPI_PS_INPUT_ENA",
4753   "type_ref": "SPI_PS_INPUT_ENA"
4754  },
4755  {
4756   "chips": ["gfx9"],
4757   "map": {"at": 165584, "to": "mm"},
4758   "name": "SPI_PS_INPUT_ADDR",
4759   "type_ref": "SPI_PS_INPUT_ENA"
4760  },
4761  {
4762   "chips": ["gfx9"],
4763   "map": {"at": 165588, "to": "mm"},
4764   "name": "SPI_INTERP_CONTROL_0",
4765   "type_ref": "SPI_INTERP_CONTROL_0"
4766  },
4767  {
4768   "chips": ["gfx9"],
4769   "map": {"at": 165592, "to": "mm"},
4770   "name": "SPI_PS_IN_CONTROL",
4771   "type_ref": "SPI_PS_IN_CONTROL"
4772  },
4773  {
4774   "chips": ["gfx9"],
4775   "map": {"at": 165600, "to": "mm"},
4776   "name": "SPI_BARYC_CNTL",
4777   "type_ref": "SPI_BARYC_CNTL"
4778  },
4779  {
4780   "chips": ["gfx9"],
4781   "map": {"at": 165608, "to": "mm"},
4782   "name": "SPI_TMPRING_SIZE",
4783   "type_ref": "COMPUTE_TMPRING_SIZE"
4784  },
4785  {
4786   "chips": ["gfx9"],
4787   "map": {"at": 165644, "to": "mm"},
4788   "name": "SPI_SHADER_POS_FORMAT",
4789   "type_ref": "SPI_SHADER_POS_FORMAT"
4790  },
4791  {
4792   "chips": ["gfx9"],
4793   "map": {"at": 165648, "to": "mm"},
4794   "name": "SPI_SHADER_Z_FORMAT",
4795   "type_ref": "SPI_SHADER_Z_FORMAT"
4796  },
4797  {
4798   "chips": ["gfx9"],
4799   "map": {"at": 165652, "to": "mm"},
4800   "name": "SPI_SHADER_COL_FORMAT",
4801   "type_ref": "SPI_SHADER_COL_FORMAT"
4802  },
4803  {
4804   "chips": ["gfx9"],
4805   "map": {"at": 165716, "to": "mm"},
4806   "name": "SX_PS_DOWNCONVERT",
4807   "type_ref": "SX_PS_DOWNCONVERT"
4808  },
4809  {
4810   "chips": ["gfx9"],
4811   "map": {"at": 165720, "to": "mm"},
4812   "name": "SX_BLEND_OPT_EPSILON",
4813   "type_ref": "SX_BLEND_OPT_EPSILON"
4814  },
4815  {
4816   "chips": ["gfx9"],
4817   "map": {"at": 165724, "to": "mm"},
4818   "name": "SX_BLEND_OPT_CONTROL",
4819   "type_ref": "SX_BLEND_OPT_CONTROL"
4820  },
4821  {
4822   "chips": ["gfx9"],
4823   "map": {"at": 165728, "to": "mm"},
4824   "name": "SX_MRT0_BLEND_OPT",
4825   "type_ref": "SX_MRT0_BLEND_OPT"
4826  },
4827  {
4828   "chips": ["gfx9"],
4829   "map": {"at": 165732, "to": "mm"},
4830   "name": "SX_MRT1_BLEND_OPT",
4831   "type_ref": "SX_MRT0_BLEND_OPT"
4832  },
4833  {
4834   "chips": ["gfx9"],
4835   "map": {"at": 165736, "to": "mm"},
4836   "name": "SX_MRT2_BLEND_OPT",
4837   "type_ref": "SX_MRT0_BLEND_OPT"
4838  },
4839  {
4840   "chips": ["gfx9"],
4841   "map": {"at": 165740, "to": "mm"},
4842   "name": "SX_MRT3_BLEND_OPT",
4843   "type_ref": "SX_MRT0_BLEND_OPT"
4844  },
4845  {
4846   "chips": ["gfx9"],
4847   "map": {"at": 165744, "to": "mm"},
4848   "name": "SX_MRT4_BLEND_OPT",
4849   "type_ref": "SX_MRT0_BLEND_OPT"
4850  },
4851  {
4852   "chips": ["gfx9"],
4853   "map": {"at": 165748, "to": "mm"},
4854   "name": "SX_MRT5_BLEND_OPT",
4855   "type_ref": "SX_MRT0_BLEND_OPT"
4856  },
4857  {
4858   "chips": ["gfx9"],
4859   "map": {"at": 165752, "to": "mm"},
4860   "name": "SX_MRT6_BLEND_OPT",
4861   "type_ref": "SX_MRT0_BLEND_OPT"
4862  },
4863  {
4864   "chips": ["gfx9"],
4865   "map": {"at": 165756, "to": "mm"},
4866   "name": "SX_MRT7_BLEND_OPT",
4867   "type_ref": "SX_MRT0_BLEND_OPT"
4868  },
4869  {
4870   "chips": ["gfx9"],
4871   "map": {"at": 165760, "to": "mm"},
4872   "name": "CB_BLEND0_CONTROL",
4873   "type_ref": "CB_BLEND0_CONTROL"
4874  },
4875  {
4876   "chips": ["gfx9"],
4877   "map": {"at": 165764, "to": "mm"},
4878   "name": "CB_BLEND1_CONTROL",
4879   "type_ref": "CB_BLEND0_CONTROL"
4880  },
4881  {
4882   "chips": ["gfx9"],
4883   "map": {"at": 165768, "to": "mm"},
4884   "name": "CB_BLEND2_CONTROL",
4885   "type_ref": "CB_BLEND0_CONTROL"
4886  },
4887  {
4888   "chips": ["gfx9"],
4889   "map": {"at": 165772, "to": "mm"},
4890   "name": "CB_BLEND3_CONTROL",
4891   "type_ref": "CB_BLEND0_CONTROL"
4892  },
4893  {
4894   "chips": ["gfx9"],
4895   "map": {"at": 165776, "to": "mm"},
4896   "name": "CB_BLEND4_CONTROL",
4897   "type_ref": "CB_BLEND0_CONTROL"
4898  },
4899  {
4900   "chips": ["gfx9"],
4901   "map": {"at": 165780, "to": "mm"},
4902   "name": "CB_BLEND5_CONTROL",
4903   "type_ref": "CB_BLEND0_CONTROL"
4904  },
4905  {
4906   "chips": ["gfx9"],
4907   "map": {"at": 165784, "to": "mm"},
4908   "name": "CB_BLEND6_CONTROL",
4909   "type_ref": "CB_BLEND0_CONTROL"
4910  },
4911  {
4912   "chips": ["gfx9"],
4913   "map": {"at": 165788, "to": "mm"},
4914   "name": "CB_BLEND7_CONTROL",
4915   "type_ref": "CB_BLEND0_CONTROL"
4916  },
4917  {
4918   "chips": ["gfx9"],
4919   "map": {"at": 165792, "to": "mm"},
4920   "name": "CB_MRT0_EPITCH",
4921   "type_ref": "DB_Z_INFO2"
4922  },
4923  {
4924   "chips": ["gfx9"],
4925   "map": {"at": 165796, "to": "mm"},
4926   "name": "CB_MRT1_EPITCH",
4927   "type_ref": "DB_Z_INFO2"
4928  },
4929  {
4930   "chips": ["gfx9"],
4931   "map": {"at": 165800, "to": "mm"},
4932   "name": "CB_MRT2_EPITCH",
4933   "type_ref": "DB_Z_INFO2"
4934  },
4935  {
4936   "chips": ["gfx9"],
4937   "map": {"at": 165804, "to": "mm"},
4938   "name": "CB_MRT3_EPITCH",
4939   "type_ref": "DB_Z_INFO2"
4940  },
4941  {
4942   "chips": ["gfx9"],
4943   "map": {"at": 165808, "to": "mm"},
4944   "name": "CB_MRT4_EPITCH",
4945   "type_ref": "DB_Z_INFO2"
4946  },
4947  {
4948   "chips": ["gfx9"],
4949   "map": {"at": 165812, "to": "mm"},
4950   "name": "CB_MRT5_EPITCH",
4951   "type_ref": "DB_Z_INFO2"
4952  },
4953  {
4954   "chips": ["gfx9"],
4955   "map": {"at": 165816, "to": "mm"},
4956   "name": "CB_MRT6_EPITCH",
4957   "type_ref": "DB_Z_INFO2"
4958  },
4959  {
4960   "chips": ["gfx9"],
4961   "map": {"at": 165820, "to": "mm"},
4962   "name": "CB_MRT7_EPITCH",
4963   "type_ref": "DB_Z_INFO2"
4964  },
4965  {
4966   "chips": ["gfx9"],
4967   "map": {"at": 165836, "to": "mm"},
4968   "name": "CS_COPY_STATE",
4969   "type_ref": "CS_COPY_STATE"
4970  },
4971  {
4972   "chips": ["gfx9"],
4973   "map": {"at": 165840, "to": "mm"},
4974   "name": "GFX_COPY_STATE",
4975   "type_ref": "CS_COPY_STATE"
4976  },
4977  {
4978   "chips": ["gfx9"],
4979   "map": {"at": 165844, "to": "mm"},
4980   "name": "PA_CL_POINT_X_RAD"
4981  },
4982  {
4983   "chips": ["gfx9"],
4984   "map": {"at": 165848, "to": "mm"},
4985   "name": "PA_CL_POINT_Y_RAD"
4986  },
4987  {
4988   "chips": ["gfx9"],
4989   "map": {"at": 165852, "to": "mm"},
4990   "name": "PA_CL_POINT_SIZE"
4991  },
4992  {
4993   "chips": ["gfx9"],
4994   "map": {"at": 165856, "to": "mm"},
4995   "name": "PA_CL_POINT_CULL_RAD"
4996  },
4997  {
4998   "chips": ["gfx9"],
4999   "map": {"at": 165860, "to": "mm"},
5000   "name": "VGT_DMA_BASE_HI",
5001   "type_ref": "VGT_DMA_BASE_HI"
5002  },
5003  {
5004   "chips": ["gfx9"],
5005   "map": {"at": 165864, "to": "mm"},
5006   "name": "VGT_DMA_BASE"
5007  },
5008  {
5009   "chips": ["gfx9"],
5010   "map": {"at": 165872, "to": "mm"},
5011   "name": "VGT_DRAW_INITIATOR",
5012   "type_ref": "VGT_DRAW_INITIATOR"
5013  },
5014  {
5015   "chips": ["gfx9"],
5016   "map": {"at": 165876, "to": "mm"},
5017   "name": "VGT_IMMED_DATA"
5018  },
5019  {
5020   "chips": ["gfx9"],
5021   "map": {"at": 165880, "to": "mm"},
5022   "name": "VGT_EVENT_ADDRESS_REG",
5023   "type_ref": "VGT_EVENT_ADDRESS_REG"
5024  },
5025  {
5026   "chips": ["gfx9"],
5027   "map": {"at": 165888, "to": "mm"},
5028   "name": "DB_DEPTH_CONTROL",
5029   "type_ref": "DB_DEPTH_CONTROL"
5030  },
5031  {
5032   "chips": ["gfx9"],
5033   "map": {"at": 165892, "to": "mm"},
5034   "name": "DB_EQAA",
5035   "type_ref": "DB_EQAA"
5036  },
5037  {
5038   "chips": ["gfx9"],
5039   "map": {"at": 165896, "to": "mm"},
5040   "name": "CB_COLOR_CONTROL",
5041   "type_ref": "CB_COLOR_CONTROL"
5042  },
5043  {
5044   "chips": ["gfx9"],
5045   "map": {"at": 165900, "to": "mm"},
5046   "name": "DB_SHADER_CONTROL",
5047   "type_ref": "DB_SHADER_CONTROL"
5048  },
5049  {
5050   "chips": ["gfx9"],
5051   "map": {"at": 165904, "to": "mm"},
5052   "name": "PA_CL_CLIP_CNTL",
5053   "type_ref": "PA_CL_CLIP_CNTL"
5054  },
5055  {
5056   "chips": ["gfx9"],
5057   "map": {"at": 165908, "to": "mm"},
5058   "name": "PA_SU_SC_MODE_CNTL",
5059   "type_ref": "PA_SU_SC_MODE_CNTL"
5060  },
5061  {
5062   "chips": ["gfx9"],
5063   "map": {"at": 165912, "to": "mm"},
5064   "name": "PA_CL_VTE_CNTL",
5065   "type_ref": "PA_CL_VTE_CNTL"
5066  },
5067  {
5068   "chips": ["gfx9"],
5069   "map": {"at": 165916, "to": "mm"},
5070   "name": "PA_CL_VS_OUT_CNTL",
5071   "type_ref": "PA_CL_VS_OUT_CNTL"
5072  },
5073  {
5074   "chips": ["gfx9"],
5075   "map": {"at": 165920, "to": "mm"},
5076   "name": "PA_CL_NANINF_CNTL",
5077   "type_ref": "PA_CL_NANINF_CNTL"
5078  },
5079  {
5080   "chips": ["gfx9"],
5081   "map": {"at": 165924, "to": "mm"},
5082   "name": "PA_SU_LINE_STIPPLE_CNTL",
5083   "type_ref": "PA_SU_LINE_STIPPLE_CNTL"
5084  },
5085  {
5086   "chips": ["gfx9"],
5087   "map": {"at": 165928, "to": "mm"},
5088   "name": "PA_SU_LINE_STIPPLE_SCALE"
5089  },
5090  {
5091   "chips": ["gfx9"],
5092   "map": {"at": 165932, "to": "mm"},
5093   "name": "PA_SU_PRIM_FILTER_CNTL",
5094   "type_ref": "PA_SU_PRIM_FILTER_CNTL"
5095  },
5096  {
5097   "chips": ["gfx9"],
5098   "map": {"at": 165936, "to": "mm"},
5099   "name": "PA_SU_SMALL_PRIM_FILTER_CNTL",
5100   "type_ref": "PA_SU_SMALL_PRIM_FILTER_CNTL"
5101  },
5102  {
5103   "chips": ["gfx9"],
5104   "map": {"at": 165940, "to": "mm"},
5105   "name": "PA_CL_OBJPRIM_ID_CNTL",
5106   "type_ref": "PA_CL_OBJPRIM_ID_CNTL"
5107  },
5108  {
5109   "chips": ["gfx9"],
5110   "map": {"at": 165944, "to": "mm"},
5111   "name": "PA_CL_NGG_CNTL",
5112   "type_ref": "PA_CL_NGG_CNTL"
5113  },
5114  {
5115   "chips": ["gfx9"],
5116   "map": {"at": 165948, "to": "mm"},
5117   "name": "PA_SU_OVER_RASTERIZATION_CNTL",
5118   "type_ref": "PA_SU_OVER_RASTERIZATION_CNTL"
5119  },
5120  {
5121   "chips": ["gfx9"],
5122   "map": {"at": 165952, "to": "mm"},
5123   "name": "PA_STEREO_CNTL",
5124   "type_ref": "PA_STEREO_CNTL"
5125  },
5126  {
5127   "chips": ["gfx9"],
5128   "map": {"at": 166400, "to": "mm"},
5129   "name": "PA_SU_POINT_SIZE",
5130   "type_ref": "PA_SU_POINT_SIZE"
5131  },
5132  {
5133   "chips": ["gfx9"],
5134   "map": {"at": 166404, "to": "mm"},
5135   "name": "PA_SU_POINT_MINMAX",
5136   "type_ref": "PA_SU_POINT_MINMAX"
5137  },
5138  {
5139   "chips": ["gfx9"],
5140   "map": {"at": 166408, "to": "mm"},
5141   "name": "PA_SU_LINE_CNTL",
5142   "type_ref": "PA_SU_LINE_CNTL"
5143  },
5144  {
5145   "chips": ["gfx9"],
5146   "map": {"at": 166412, "to": "mm"},
5147   "name": "PA_SC_LINE_STIPPLE",
5148   "type_ref": "PA_SC_LINE_STIPPLE"
5149  },
5150  {
5151   "chips": ["gfx9"],
5152   "map": {"at": 166416, "to": "mm"},
5153   "name": "VGT_OUTPUT_PATH_CNTL",
5154   "type_ref": "VGT_OUTPUT_PATH_CNTL"
5155  },
5156  {
5157   "chips": ["gfx9"],
5158   "map": {"at": 166420, "to": "mm"},
5159   "name": "VGT_HOS_CNTL",
5160   "type_ref": "VGT_HOS_CNTL"
5161  },
5162  {
5163   "chips": ["gfx9"],
5164   "map": {"at": 166424, "to": "mm"},
5165   "name": "VGT_HOS_MAX_TESS_LEVEL"
5166  },
5167  {
5168   "chips": ["gfx9"],
5169   "map": {"at": 166428, "to": "mm"},
5170   "name": "VGT_HOS_MIN_TESS_LEVEL"
5171  },
5172  {
5173   "chips": ["gfx9"],
5174   "map": {"at": 166432, "to": "mm"},
5175   "name": "VGT_HOS_REUSE_DEPTH",
5176   "type_ref": "VGT_HOS_REUSE_DEPTH"
5177  },
5178  {
5179   "chips": ["gfx9"],
5180   "map": {"at": 166436, "to": "mm"},
5181   "name": "VGT_GROUP_PRIM_TYPE",
5182   "type_ref": "VGT_GROUP_PRIM_TYPE"
5183  },
5184  {
5185   "chips": ["gfx9"],
5186   "map": {"at": 166440, "to": "mm"},
5187   "name": "VGT_GROUP_FIRST_DECR",
5188   "type_ref": "VGT_GROUP_FIRST_DECR"
5189  },
5190  {
5191   "chips": ["gfx9"],
5192   "map": {"at": 166444, "to": "mm"},
5193   "name": "VGT_GROUP_DECR",
5194   "type_ref": "VGT_GROUP_DECR"
5195  },
5196  {
5197   "chips": ["gfx9"],
5198   "map": {"at": 166448, "to": "mm"},
5199   "name": "VGT_GROUP_VECT_0_CNTL",
5200   "type_ref": "VGT_GROUP_VECT_0_CNTL"
5201  },
5202  {
5203   "chips": ["gfx9"],
5204   "map": {"at": 166452, "to": "mm"},
5205   "name": "VGT_GROUP_VECT_1_CNTL",
5206   "type_ref": "VGT_GROUP_VECT_0_CNTL"
5207  },
5208  {
5209   "chips": ["gfx9"],
5210   "map": {"at": 166456, "to": "mm"},
5211   "name": "VGT_GROUP_VECT_0_FMT_CNTL",
5212   "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
5213  },
5214  {
5215   "chips": ["gfx9"],
5216   "map": {"at": 166460, "to": "mm"},
5217   "name": "VGT_GROUP_VECT_1_FMT_CNTL",
5218   "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
5219  },
5220  {
5221   "chips": ["gfx9"],
5222   "map": {"at": 166464, "to": "mm"},
5223   "name": "VGT_GS_MODE",
5224   "type_ref": "VGT_GS_MODE"
5225  },
5226  {
5227   "chips": ["gfx9"],
5228   "map": {"at": 166468, "to": "mm"},
5229   "name": "VGT_GS_ONCHIP_CNTL",
5230   "type_ref": "VGT_GS_ONCHIP_CNTL"
5231  },
5232  {
5233   "chips": ["gfx9"],
5234   "map": {"at": 166472, "to": "mm"},
5235   "name": "PA_SC_MODE_CNTL_0",
5236   "type_ref": "PA_SC_MODE_CNTL_0"
5237  },
5238  {
5239   "chips": ["gfx9"],
5240   "map": {"at": 166476, "to": "mm"},
5241   "name": "PA_SC_MODE_CNTL_1",
5242   "type_ref": "PA_SC_MODE_CNTL_1"
5243  },
5244  {
5245   "chips": ["gfx9"],
5246   "map": {"at": 166480, "to": "mm"},
5247   "name": "VGT_ENHANCE"
5248  },
5249  {
5250   "chips": ["gfx9"],
5251   "map": {"at": 166484, "to": "mm"},
5252   "name": "VGT_GS_PER_ES",
5253   "type_ref": "VGT_GS_PER_ES"
5254  },
5255  {
5256   "chips": ["gfx9"],
5257   "map": {"at": 166488, "to": "mm"},
5258   "name": "VGT_ES_PER_GS",
5259   "type_ref": "VGT_ES_PER_GS"
5260  },
5261  {
5262   "chips": ["gfx9"],
5263   "map": {"at": 166492, "to": "mm"},
5264   "name": "VGT_GS_PER_VS",
5265   "type_ref": "VGT_GS_PER_VS"
5266  },
5267  {
5268   "chips": ["gfx9"],
5269   "map": {"at": 166496, "to": "mm"},
5270   "name": "VGT_GSVS_RING_OFFSET_1",
5271   "type_ref": "VGT_GSVS_RING_OFFSET_1"
5272  },
5273  {
5274   "chips": ["gfx9"],
5275   "map": {"at": 166500, "to": "mm"},
5276   "name": "VGT_GSVS_RING_OFFSET_2",
5277   "type_ref": "VGT_GSVS_RING_OFFSET_1"
5278  },
5279  {
5280   "chips": ["gfx9"],
5281   "map": {"at": 166504, "to": "mm"},
5282   "name": "VGT_GSVS_RING_OFFSET_3",
5283   "type_ref": "VGT_GSVS_RING_OFFSET_1"
5284  },
5285  {
5286   "chips": ["gfx9"],
5287   "map": {"at": 166508, "to": "mm"},
5288   "name": "VGT_GS_OUT_PRIM_TYPE",
5289   "type_ref": "VGT_GS_OUT_PRIM_TYPE"
5290  },
5291  {
5292   "chips": ["gfx9"],
5293   "map": {"at": 166512, "to": "mm"},
5294   "name": "IA_ENHANCE"
5295  },
5296  {
5297   "chips": ["gfx9"],
5298   "map": {"at": 166516, "to": "mm"},
5299   "name": "VGT_DMA_SIZE"
5300  },
5301  {
5302   "chips": ["gfx9"],
5303   "map": {"at": 166520, "to": "mm"},
5304   "name": "VGT_DMA_MAX_SIZE"
5305  },
5306  {
5307   "chips": ["gfx9"],
5308   "map": {"at": 166524, "to": "mm"},
5309   "name": "VGT_DMA_INDEX_TYPE",
5310   "type_ref": "VGT_DMA_INDEX_TYPE"
5311  },
5312  {
5313   "chips": ["gfx9"],
5314   "map": {"at": 166528, "to": "mm"},
5315   "name": "WD_ENHANCE"
5316  },
5317  {
5318   "chips": ["gfx9"],
5319   "map": {"at": 166532, "to": "mm"},
5320   "name": "VGT_PRIMITIVEID_EN",
5321   "type_ref": "VGT_PRIMITIVEID_EN"
5322  },
5323  {
5324   "chips": ["gfx9"],
5325   "map": {"at": 166536, "to": "mm"},
5326   "name": "VGT_DMA_NUM_INSTANCES"
5327  },
5328  {
5329   "chips": ["gfx9"],
5330   "map": {"at": 166540, "to": "mm"},
5331   "name": "VGT_PRIMITIVEID_RESET"
5332  },
5333  {
5334   "chips": ["gfx9"],
5335   "map": {"at": 166544, "to": "mm"},
5336   "name": "VGT_EVENT_INITIATOR",
5337   "type_ref": "VGT_EVENT_INITIATOR"
5338  },
5339  {
5340   "chips": ["gfx9"],
5341   "map": {"at": 166548, "to": "mm"},
5342   "name": "VGT_GS_MAX_PRIMS_PER_SUBGROUP",
5343   "type_ref": "VGT_GS_MAX_PRIMS_PER_SUBGROUP"
5344  },
5345  {
5346   "chips": ["gfx9"],
5347   "map": {"at": 166552, "to": "mm"},
5348   "name": "VGT_DRAW_PAYLOAD_CNTL",
5349   "type_ref": "VGT_DRAW_PAYLOAD_CNTL"
5350  },
5351  {
5352   "chips": ["gfx9"],
5353   "map": {"at": 166560, "to": "mm"},
5354   "name": "VGT_INSTANCE_STEP_RATE_0"
5355  },
5356  {
5357   "chips": ["gfx9"],
5358   "map": {"at": 166564, "to": "mm"},
5359   "name": "VGT_INSTANCE_STEP_RATE_1"
5360  },
5361  {
5362   "chips": ["gfx9"],
5363   "map": {"at": 166572, "to": "mm"},
5364   "name": "VGT_ESGS_RING_ITEMSIZE",
5365   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5366  },
5367  {
5368   "chips": ["gfx9"],
5369   "map": {"at": 166576, "to": "mm"},
5370   "name": "VGT_GSVS_RING_ITEMSIZE",
5371   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5372  },
5373  {
5374   "chips": ["gfx9"],
5375   "map": {"at": 166580, "to": "mm"},
5376   "name": "VGT_REUSE_OFF",
5377   "type_ref": "VGT_REUSE_OFF"
5378  },
5379  {
5380   "chips": ["gfx9"],
5381   "map": {"at": 166584, "to": "mm"},
5382   "name": "VGT_VTX_CNT_EN",
5383   "type_ref": "VGT_VTX_CNT_EN"
5384  },
5385  {
5386   "chips": ["gfx9"],
5387   "map": {"at": 166588, "to": "mm"},
5388   "name": "DB_HTILE_SURFACE",
5389   "type_ref": "DB_HTILE_SURFACE"
5390  },
5391  {
5392   "chips": ["gfx9"],
5393   "map": {"at": 166592, "to": "mm"},
5394   "name": "DB_SRESULTS_COMPARE_STATE0",
5395   "type_ref": "DB_SRESULTS_COMPARE_STATE0"
5396  },
5397  {
5398   "chips": ["gfx9"],
5399   "map": {"at": 166596, "to": "mm"},
5400   "name": "DB_SRESULTS_COMPARE_STATE1",
5401   "type_ref": "DB_SRESULTS_COMPARE_STATE1"
5402  },
5403  {
5404   "chips": ["gfx9"],
5405   "map": {"at": 166600, "to": "mm"},
5406   "name": "DB_PRELOAD_CONTROL",
5407   "type_ref": "DB_PRELOAD_CONTROL"
5408  },
5409  {
5410   "chips": ["gfx9"],
5411   "map": {"at": 166608, "to": "mm"},
5412   "name": "VGT_STRMOUT_BUFFER_SIZE_0"
5413  },
5414  {
5415   "chips": ["gfx9"],
5416   "map": {"at": 166612, "to": "mm"},
5417   "name": "VGT_STRMOUT_VTX_STRIDE_0",
5418   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5419  },
5420  {
5421   "chips": ["gfx9"],
5422   "map": {"at": 166620, "to": "mm"},
5423   "name": "VGT_STRMOUT_BUFFER_OFFSET_0"
5424  },
5425  {
5426   "chips": ["gfx9"],
5427   "map": {"at": 166624, "to": "mm"},
5428   "name": "VGT_STRMOUT_BUFFER_SIZE_1"
5429  },
5430  {
5431   "chips": ["gfx9"],
5432   "map": {"at": 166628, "to": "mm"},
5433   "name": "VGT_STRMOUT_VTX_STRIDE_1",
5434   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5435  },
5436  {
5437   "chips": ["gfx9"],
5438   "map": {"at": 166636, "to": "mm"},
5439   "name": "VGT_STRMOUT_BUFFER_OFFSET_1"
5440  },
5441  {
5442   "chips": ["gfx9"],
5443   "map": {"at": 166640, "to": "mm"},
5444   "name": "VGT_STRMOUT_BUFFER_SIZE_2"
5445  },
5446  {
5447   "chips": ["gfx9"],
5448   "map": {"at": 166644, "to": "mm"},
5449   "name": "VGT_STRMOUT_VTX_STRIDE_2",
5450   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5451  },
5452  {
5453   "chips": ["gfx9"],
5454   "map": {"at": 166652, "to": "mm"},
5455   "name": "VGT_STRMOUT_BUFFER_OFFSET_2"
5456  },
5457  {
5458   "chips": ["gfx9"],
5459   "map": {"at": 166656, "to": "mm"},
5460   "name": "VGT_STRMOUT_BUFFER_SIZE_3"
5461  },
5462  {
5463   "chips": ["gfx9"],
5464   "map": {"at": 166660, "to": "mm"},
5465   "name": "VGT_STRMOUT_VTX_STRIDE_3",
5466   "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5467  },
5468  {
5469   "chips": ["gfx9"],
5470   "map": {"at": 166668, "to": "mm"},
5471   "name": "VGT_STRMOUT_BUFFER_OFFSET_3"
5472  },
5473  {
5474   "chips": ["gfx9"],
5475   "map": {"at": 166696, "to": "mm"},
5476   "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET"
5477  },
5478  {
5479   "chips": ["gfx9"],
5480   "map": {"at": 166700, "to": "mm"},
5481   "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE"
5482  },
5483  {
5484   "chips": ["gfx9"],
5485   "map": {"at": 166704, "to": "mm"},
5486   "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",
5487   "type_ref": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE"
5488  },
5489  {
5490   "chips": ["gfx9"],
5491   "map": {"at": 166712, "to": "mm"},
5492   "name": "VGT_GS_MAX_VERT_OUT",
5493   "type_ref": "VGT_GS_MAX_VERT_OUT"
5494  },
5495  {
5496   "chips": ["gfx9"],
5497   "map": {"at": 166736, "to": "mm"},
5498   "name": "VGT_TESS_DISTRIBUTION",
5499   "type_ref": "VGT_TESS_DISTRIBUTION"
5500  },
5501  {
5502   "chips": ["gfx9"],
5503   "map": {"at": 166740, "to": "mm"},
5504   "name": "VGT_SHADER_STAGES_EN",
5505   "type_ref": "VGT_SHADER_STAGES_EN"
5506  },
5507  {
5508   "chips": ["gfx9"],
5509   "map": {"at": 166744, "to": "mm"},
5510   "name": "VGT_LS_HS_CONFIG",
5511   "type_ref": "VGT_LS_HS_CONFIG"
5512  },
5513  {
5514   "chips": ["gfx9"],
5515   "map": {"at": 166748, "to": "mm"},
5516   "name": "VGT_GS_VERT_ITEMSIZE",
5517   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5518  },
5519  {
5520   "chips": ["gfx9"],
5521   "map": {"at": 166752, "to": "mm"},
5522   "name": "VGT_GS_VERT_ITEMSIZE_1",
5523   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5524  },
5525  {
5526   "chips": ["gfx9"],
5527   "map": {"at": 166756, "to": "mm"},
5528   "name": "VGT_GS_VERT_ITEMSIZE_2",
5529   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5530  },
5531  {
5532   "chips": ["gfx9"],
5533   "map": {"at": 166760, "to": "mm"},
5534   "name": "VGT_GS_VERT_ITEMSIZE_3",
5535   "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5536  },
5537  {
5538   "chips": ["gfx9"],
5539   "map": {"at": 166764, "to": "mm"},
5540   "name": "VGT_TF_PARAM",
5541   "type_ref": "VGT_TF_PARAM"
5542  },
5543  {
5544   "chips": ["gfx9"],
5545   "map": {"at": 166768, "to": "mm"},
5546   "name": "DB_ALPHA_TO_MASK",
5547   "type_ref": "DB_ALPHA_TO_MASK"
5548  },
5549  {
5550   "chips": ["gfx9"],
5551   "map": {"at": 166772, "to": "mm"},
5552   "name": "VGT_DISPATCH_DRAW_INDEX"
5553  },
5554  {
5555   "chips": ["gfx9"],
5556   "map": {"at": 166776, "to": "mm"},
5557   "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",
5558   "type_ref": "PA_SU_POLY_OFFSET_DB_FMT_CNTL"
5559  },
5560  {
5561   "chips": ["gfx9"],
5562   "map": {"at": 166780, "to": "mm"},
5563   "name": "PA_SU_POLY_OFFSET_CLAMP"
5564  },
5565  {
5566   "chips": ["gfx9"],
5567   "map": {"at": 166784, "to": "mm"},
5568   "name": "PA_SU_POLY_OFFSET_FRONT_SCALE"
5569  },
5570  {
5571   "chips": ["gfx9"],
5572   "map": {"at": 166788, "to": "mm"},
5573   "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5574  },
5575  {
5576   "chips": ["gfx9"],
5577   "map": {"at": 166792, "to": "mm"},
5578   "name": "PA_SU_POLY_OFFSET_BACK_SCALE"
5579  },
5580  {
5581   "chips": ["gfx9"],
5582   "map": {"at": 166796, "to": "mm"},
5583   "name": "PA_SU_POLY_OFFSET_BACK_OFFSET"
5584  },
5585  {
5586   "chips": ["gfx9"],
5587   "map": {"at": 166800, "to": "mm"},
5588   "name": "VGT_GS_INSTANCE_CNT",
5589   "type_ref": "VGT_GS_INSTANCE_CNT"
5590  },
5591  {
5592   "chips": ["gfx9"],
5593   "map": {"at": 166804, "to": "mm"},
5594   "name": "VGT_STRMOUT_CONFIG",
5595   "type_ref": "VGT_STRMOUT_CONFIG"
5596  },
5597  {
5598   "chips": ["gfx9"],
5599   "map": {"at": 166808, "to": "mm"},
5600   "name": "VGT_STRMOUT_BUFFER_CONFIG",
5601   "type_ref": "VGT_STRMOUT_BUFFER_CONFIG"
5602  },
5603  {
5604   "chips": ["gfx9"],
5605   "map": {"at": 166812, "to": "mm"},
5606   "name": "VGT_DMA_EVENT_INITIATOR",
5607   "type_ref": "VGT_EVENT_INITIATOR"
5608  },
5609  {
5610   "chips": ["gfx9"],
5611   "map": {"at": 166868, "to": "mm"},
5612   "name": "PA_SC_CENTROID_PRIORITY_0",
5613   "type_ref": "PA_SC_CENTROID_PRIORITY_0"
5614  },
5615  {
5616   "chips": ["gfx9"],
5617   "map": {"at": 166872, "to": "mm"},
5618   "name": "PA_SC_CENTROID_PRIORITY_1",
5619   "type_ref": "PA_SC_CENTROID_PRIORITY_1"
5620  },
5621  {
5622   "chips": ["gfx9"],
5623   "map": {"at": 166876, "to": "mm"},
5624   "name": "PA_SC_LINE_CNTL",
5625   "type_ref": "PA_SC_LINE_CNTL"
5626  },
5627  {
5628   "chips": ["gfx9"],
5629   "map": {"at": 166880, "to": "mm"},
5630   "name": "PA_SC_AA_CONFIG",
5631   "type_ref": "PA_SC_AA_CONFIG"
5632  },
5633  {
5634   "chips": ["gfx9"],
5635   "map": {"at": 166884, "to": "mm"},
5636   "name": "PA_SU_VTX_CNTL",
5637   "type_ref": "PA_SU_VTX_CNTL"
5638  },
5639  {
5640   "chips": ["gfx9"],
5641   "map": {"at": 166888, "to": "mm"},
5642   "name": "PA_CL_GB_VERT_CLIP_ADJ"
5643  },
5644  {
5645   "chips": ["gfx9"],
5646   "map": {"at": 166892, "to": "mm"},
5647   "name": "PA_CL_GB_VERT_DISC_ADJ"
5648  },
5649  {
5650   "chips": ["gfx9"],
5651   "map": {"at": 166896, "to": "mm"},
5652   "name": "PA_CL_GB_HORZ_CLIP_ADJ"
5653  },
5654  {
5655   "chips": ["gfx9"],
5656   "map": {"at": 166900, "to": "mm"},
5657   "name": "PA_CL_GB_HORZ_DISC_ADJ"
5658  },
5659  {
5660   "chips": ["gfx9"],
5661   "map": {"at": 166904, "to": "mm"},
5662   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",
5663   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5664  },
5665  {
5666   "chips": ["gfx9"],
5667   "map": {"at": 166908, "to": "mm"},
5668   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",
5669   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5670  },
5671  {
5672   "chips": ["gfx9"],
5673   "map": {"at": 166912, "to": "mm"},
5674   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",
5675   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5676  },
5677  {
5678   "chips": ["gfx9"],
5679   "map": {"at": 166916, "to": "mm"},
5680   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",
5681   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5682  },
5683  {
5684   "chips": ["gfx9"],
5685   "map": {"at": 166920, "to": "mm"},
5686   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",
5687   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5688  },
5689  {
5690   "chips": ["gfx9"],
5691   "map": {"at": 166924, "to": "mm"},
5692   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",
5693   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5694  },
5695  {
5696   "chips": ["gfx9"],
5697   "map": {"at": 166928, "to": "mm"},
5698   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",
5699   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5700  },
5701  {
5702   "chips": ["gfx9"],
5703   "map": {"at": 166932, "to": "mm"},
5704   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",
5705   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5706  },
5707  {
5708   "chips": ["gfx9"],
5709   "map": {"at": 166936, "to": "mm"},
5710   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",
5711   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5712  },
5713  {
5714   "chips": ["gfx9"],
5715   "map": {"at": 166940, "to": "mm"},
5716   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",
5717   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5718  },
5719  {
5720   "chips": ["gfx9"],
5721   "map": {"at": 166944, "to": "mm"},
5722   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",
5723   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5724  },
5725  {
5726   "chips": ["gfx9"],
5727   "map": {"at": 166948, "to": "mm"},
5728   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",
5729   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5730  },
5731  {
5732   "chips": ["gfx9"],
5733   "map": {"at": 166952, "to": "mm"},
5734   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",
5735   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5736  },
5737  {
5738   "chips": ["gfx9"],
5739   "map": {"at": 166956, "to": "mm"},
5740   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",
5741   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5742  },
5743  {
5744   "chips": ["gfx9"],
5745   "map": {"at": 166960, "to": "mm"},
5746   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",
5747   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5748  },
5749  {
5750   "chips": ["gfx9"],
5751   "map": {"at": 166964, "to": "mm"},
5752   "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",
5753   "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5754  },
5755  {
5756   "chips": ["gfx9"],
5757   "map": {"at": 166968, "to": "mm"},
5758   "name": "PA_SC_AA_MASK_X0Y0_X1Y0",
5759   "type_ref": "PA_SC_AA_MASK_X0Y0_X1Y0"
5760  },
5761  {
5762   "chips": ["gfx9"],
5763   "map": {"at": 166972, "to": "mm"},
5764   "name": "PA_SC_AA_MASK_X0Y1_X1Y1",
5765   "type_ref": "PA_SC_AA_MASK_X0Y1_X1Y1"
5766  },
5767  {
5768   "chips": ["gfx9"],
5769   "map": {"at": 166976, "to": "mm"},
5770   "name": "PA_SC_SHADER_CONTROL",
5771   "type_ref": "PA_SC_SHADER_CONTROL"
5772  },
5773  {
5774   "chips": ["gfx9"],
5775   "map": {"at": 166980, "to": "mm"},
5776   "name": "PA_SC_BINNER_CNTL_0",
5777   "type_ref": "PA_SC_BINNER_CNTL_0"
5778  },
5779  {
5780   "chips": ["gfx9"],
5781   "map": {"at": 166984, "to": "mm"},
5782   "name": "PA_SC_BINNER_CNTL_1",
5783   "type_ref": "PA_SC_BINNER_CNTL_1"
5784  },
5785  {
5786   "chips": ["gfx9"],
5787   "map": {"at": 166988, "to": "mm"},
5788   "name": "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL",
5789   "type_ref": "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL"
5790  },
5791  {
5792   "chips": ["gfx9"],
5793   "map": {"at": 166992, "to": "mm"},
5794   "name": "PA_SC_NGG_MODE_CNTL",
5795   "type_ref": "PA_SC_NGG_MODE_CNTL"
5796  },
5797  {
5798   "chips": ["gfx9"],
5799   "map": {"at": 167000, "to": "mm"},
5800   "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",
5801   "type_ref": "VGT_VERTEX_REUSE_BLOCK_CNTL"
5802  },
5803  {
5804   "chips": ["gfx9"],
5805   "map": {"at": 167004, "to": "mm"},
5806   "name": "VGT_OUT_DEALLOC_CNTL",
5807   "type_ref": "VGT_OUT_DEALLOC_CNTL"
5808  },
5809  {
5810   "chips": ["gfx9"],
5811   "map": {"at": 167008, "to": "mm"},
5812   "name": "CB_COLOR0_BASE"
5813  },
5814  {
5815   "chips": ["gfx9"],
5816   "map": {"at": 167012, "to": "mm"},
5817   "name": "CB_COLOR0_BASE_EXT",
5818   "type_ref": "CB_COLOR0_BASE_EXT"
5819  },
5820  {
5821   "chips": ["gfx9"],
5822   "map": {"at": 167016, "to": "mm"},
5823   "name": "CB_COLOR0_ATTRIB2",
5824   "type_ref": "CB_COLOR0_ATTRIB2"
5825  },
5826  {
5827   "chips": ["gfx9"],
5828   "map": {"at": 167020, "to": "mm"},
5829   "name": "CB_COLOR0_VIEW",
5830   "type_ref": "CB_COLOR0_VIEW"
5831  },
5832  {
5833   "chips": ["gfx9"],
5834   "map": {"at": 167024, "to": "mm"},
5835   "name": "CB_COLOR0_INFO",
5836   "type_ref": "CB_COLOR0_INFO"
5837  },
5838  {
5839   "chips": ["gfx9"],
5840   "map": {"at": 167028, "to": "mm"},
5841   "name": "CB_COLOR0_ATTRIB",
5842   "type_ref": "CB_COLOR0_ATTRIB"
5843  },
5844  {
5845   "chips": ["gfx9"],
5846   "map": {"at": 167032, "to": "mm"},
5847   "name": "CB_COLOR0_DCC_CONTROL",
5848   "type_ref": "CB_COLOR0_DCC_CONTROL"
5849  },
5850  {
5851   "chips": ["gfx9"],
5852   "map": {"at": 167036, "to": "mm"},
5853   "name": "CB_COLOR0_CMASK"
5854  },
5855  {
5856   "chips": ["gfx9"],
5857   "map": {"at": 167040, "to": "mm"},
5858   "name": "CB_COLOR0_CMASK_BASE_EXT",
5859   "type_ref": "CB_COLOR0_BASE_EXT"
5860  },
5861  {
5862   "chips": ["gfx9"],
5863   "map": {"at": 167044, "to": "mm"},
5864   "name": "CB_COLOR0_FMASK"
5865  },
5866  {
5867   "chips": ["gfx9"],
5868   "map": {"at": 167048, "to": "mm"},
5869   "name": "CB_COLOR0_FMASK_BASE_EXT",
5870   "type_ref": "CB_COLOR0_BASE_EXT"
5871  },
5872  {
5873   "chips": ["gfx9"],
5874   "map": {"at": 167052, "to": "mm"},
5875   "name": "CB_COLOR0_CLEAR_WORD0"
5876  },
5877  {
5878   "chips": ["gfx9"],
5879   "map": {"at": 167056, "to": "mm"},
5880   "name": "CB_COLOR0_CLEAR_WORD1"
5881  },
5882  {
5883   "chips": ["gfx9"],
5884   "map": {"at": 167060, "to": "mm"},
5885   "name": "CB_COLOR0_DCC_BASE"
5886  },
5887  {
5888   "chips": ["gfx9"],
5889   "map": {"at": 167064, "to": "mm"},
5890   "name": "CB_COLOR0_DCC_BASE_EXT",
5891   "type_ref": "CB_COLOR0_BASE_EXT"
5892  },
5893  {
5894   "chips": ["gfx9"],
5895   "map": {"at": 167068, "to": "mm"},
5896   "name": "CB_COLOR1_BASE"
5897  },
5898  {
5899   "chips": ["gfx9"],
5900   "map": {"at": 167072, "to": "mm"},
5901   "name": "CB_COLOR1_BASE_EXT",
5902   "type_ref": "CB_COLOR0_BASE_EXT"
5903  },
5904  {
5905   "chips": ["gfx9"],
5906   "map": {"at": 167076, "to": "mm"},
5907   "name": "CB_COLOR1_ATTRIB2",
5908   "type_ref": "CB_COLOR0_ATTRIB2"
5909  },
5910  {
5911   "chips": ["gfx9"],
5912   "map": {"at": 167080, "to": "mm"},
5913   "name": "CB_COLOR1_VIEW",
5914   "type_ref": "CB_COLOR0_VIEW"
5915  },
5916  {
5917   "chips": ["gfx9"],
5918   "map": {"at": 167084, "to": "mm"},
5919   "name": "CB_COLOR1_INFO",
5920   "type_ref": "CB_COLOR0_INFO"
5921  },
5922  {
5923   "chips": ["gfx9"],
5924   "map": {"at": 167088, "to": "mm"},
5925   "name": "CB_COLOR1_ATTRIB",
5926   "type_ref": "CB_COLOR0_ATTRIB"
5927  },
5928  {
5929   "chips": ["gfx9"],
5930   "map": {"at": 167092, "to": "mm"},
5931   "name": "CB_COLOR1_DCC_CONTROL",
5932   "type_ref": "CB_COLOR0_DCC_CONTROL"
5933  },
5934  {
5935   "chips": ["gfx9"],
5936   "map": {"at": 167096, "to": "mm"},
5937   "name": "CB_COLOR1_CMASK"
5938  },
5939  {
5940   "chips": ["gfx9"],
5941   "map": {"at": 167100, "to": "mm"},
5942   "name": "CB_COLOR1_CMASK_BASE_EXT",
5943   "type_ref": "CB_COLOR0_BASE_EXT"
5944  },
5945  {
5946   "chips": ["gfx9"],
5947   "map": {"at": 167104, "to": "mm"},
5948   "name": "CB_COLOR1_FMASK"
5949  },
5950  {
5951   "chips": ["gfx9"],
5952   "map": {"at": 167108, "to": "mm"},
5953   "name": "CB_COLOR1_FMASK_BASE_EXT",
5954   "type_ref": "CB_COLOR0_BASE_EXT"
5955  },
5956  {
5957   "chips": ["gfx9"],
5958   "map": {"at": 167112, "to": "mm"},
5959   "name": "CB_COLOR1_CLEAR_WORD0"
5960  },
5961  {
5962   "chips": ["gfx9"],
5963   "map": {"at": 167116, "to": "mm"},
5964   "name": "CB_COLOR1_CLEAR_WORD1"
5965  },
5966  {
5967   "chips": ["gfx9"],
5968   "map": {"at": 167120, "to": "mm"},
5969   "name": "CB_COLOR1_DCC_BASE"
5970  },
5971  {
5972   "chips": ["gfx9"],
5973   "map": {"at": 167124, "to": "mm"},
5974   "name": "CB_COLOR1_DCC_BASE_EXT",
5975   "type_ref": "CB_COLOR0_BASE_EXT"
5976  },
5977  {
5978   "chips": ["gfx9"],
5979   "map": {"at": 167128, "to": "mm"},
5980   "name": "CB_COLOR2_BASE"
5981  },
5982  {
5983   "chips": ["gfx9"],
5984   "map": {"at": 167132, "to": "mm"},
5985   "name": "CB_COLOR2_BASE_EXT",
5986   "type_ref": "CB_COLOR0_BASE_EXT"
5987  },
5988  {
5989   "chips": ["gfx9"],
5990   "map": {"at": 167136, "to": "mm"},
5991   "name": "CB_COLOR2_ATTRIB2",
5992   "type_ref": "CB_COLOR0_ATTRIB2"
5993  },
5994  {
5995   "chips": ["gfx9"],
5996   "map": {"at": 167140, "to": "mm"},
5997   "name": "CB_COLOR2_VIEW",
5998   "type_ref": "CB_COLOR0_VIEW"
5999  },
6000  {
6001   "chips": ["gfx9"],
6002   "map": {"at": 167144, "to": "mm"},
6003   "name": "CB_COLOR2_INFO",
6004   "type_ref": "CB_COLOR0_INFO"
6005  },
6006  {
6007   "chips": ["gfx9"],
6008   "map": {"at": 167148, "to": "mm"},
6009   "name": "CB_COLOR2_ATTRIB",
6010   "type_ref": "CB_COLOR0_ATTRIB"
6011  },
6012  {
6013   "chips": ["gfx9"],
6014   "map": {"at": 167152, "to": "mm"},
6015   "name": "CB_COLOR2_DCC_CONTROL",
6016   "type_ref": "CB_COLOR0_DCC_CONTROL"
6017  },
6018  {
6019   "chips": ["gfx9"],
6020   "map": {"at": 167156, "to": "mm"},
6021   "name": "CB_COLOR2_CMASK"
6022  },
6023  {
6024   "chips": ["gfx9"],
6025   "map": {"at": 167160, "to": "mm"},
6026   "name": "CB_COLOR2_CMASK_BASE_EXT",
6027   "type_ref": "CB_COLOR0_BASE_EXT"
6028  },
6029  {
6030   "chips": ["gfx9"],
6031   "map": {"at": 167164, "to": "mm"},
6032   "name": "CB_COLOR2_FMASK"
6033  },
6034  {
6035   "chips": ["gfx9"],
6036   "map": {"at": 167168, "to": "mm"},
6037   "name": "CB_COLOR2_FMASK_BASE_EXT",
6038   "type_ref": "CB_COLOR0_BASE_EXT"
6039  },
6040  {
6041   "chips": ["gfx9"],
6042   "map": {"at": 167172, "to": "mm"},
6043   "name": "CB_COLOR2_CLEAR_WORD0"
6044  },
6045  {
6046   "chips": ["gfx9"],
6047   "map": {"at": 167176, "to": "mm"},
6048   "name": "CB_COLOR2_CLEAR_WORD1"
6049  },
6050  {
6051   "chips": ["gfx9"],
6052   "map": {"at": 167180, "to": "mm"},
6053   "name": "CB_COLOR2_DCC_BASE"
6054  },
6055  {
6056   "chips": ["gfx9"],
6057   "map": {"at": 167184, "to": "mm"},
6058   "name": "CB_COLOR2_DCC_BASE_EXT",
6059   "type_ref": "CB_COLOR0_BASE_EXT"
6060  },
6061  {
6062   "chips": ["gfx9"],
6063   "map": {"at": 167188, "to": "mm"},
6064   "name": "CB_COLOR3_BASE"
6065  },
6066  {
6067   "chips": ["gfx9"],
6068   "map": {"at": 167192, "to": "mm"},
6069   "name": "CB_COLOR3_BASE_EXT",
6070   "type_ref": "CB_COLOR0_BASE_EXT"
6071  },
6072  {
6073   "chips": ["gfx9"],
6074   "map": {"at": 167196, "to": "mm"},
6075   "name": "CB_COLOR3_ATTRIB2",
6076   "type_ref": "CB_COLOR0_ATTRIB2"
6077  },
6078  {
6079   "chips": ["gfx9"],
6080   "map": {"at": 167200, "to": "mm"},
6081   "name": "CB_COLOR3_VIEW",
6082   "type_ref": "CB_COLOR0_VIEW"
6083  },
6084  {
6085   "chips": ["gfx9"],
6086   "map": {"at": 167204, "to": "mm"},
6087   "name": "CB_COLOR3_INFO",
6088   "type_ref": "CB_COLOR0_INFO"
6089  },
6090  {
6091   "chips": ["gfx9"],
6092   "map": {"at": 167208, "to": "mm"},
6093   "name": "CB_COLOR3_ATTRIB",
6094   "type_ref": "CB_COLOR0_ATTRIB"
6095  },
6096  {
6097   "chips": ["gfx9"],
6098   "map": {"at": 167212, "to": "mm"},
6099   "name": "CB_COLOR3_DCC_CONTROL",
6100   "type_ref": "CB_COLOR0_DCC_CONTROL"
6101  },
6102  {
6103   "chips": ["gfx9"],
6104   "map": {"at": 167216, "to": "mm"},
6105   "name": "CB_COLOR3_CMASK"
6106  },
6107  {
6108   "chips": ["gfx9"],
6109   "map": {"at": 167220, "to": "mm"},
6110   "name": "CB_COLOR3_CMASK_BASE_EXT",
6111   "type_ref": "CB_COLOR0_BASE_EXT"
6112  },
6113  {
6114   "chips": ["gfx9"],
6115   "map": {"at": 167224, "to": "mm"},
6116   "name": "CB_COLOR3_FMASK"
6117  },
6118  {
6119   "chips": ["gfx9"],
6120   "map": {"at": 167228, "to": "mm"},
6121   "name": "CB_COLOR3_FMASK_BASE_EXT",
6122   "type_ref": "CB_COLOR0_BASE_EXT"
6123  },
6124  {
6125   "chips": ["gfx9"],
6126   "map": {"at": 167232, "to": "mm"},
6127   "name": "CB_COLOR3_CLEAR_WORD0"
6128  },
6129  {
6130   "chips": ["gfx9"],
6131   "map": {"at": 167236, "to": "mm"},
6132   "name": "CB_COLOR3_CLEAR_WORD1"
6133  },
6134  {
6135   "chips": ["gfx9"],
6136   "map": {"at": 167240, "to": "mm"},
6137   "name": "CB_COLOR3_DCC_BASE"
6138  },
6139  {
6140   "chips": ["gfx9"],
6141   "map": {"at": 167244, "to": "mm"},
6142   "name": "CB_COLOR3_DCC_BASE_EXT",
6143   "type_ref": "CB_COLOR0_BASE_EXT"
6144  },
6145  {
6146   "chips": ["gfx9"],
6147   "map": {"at": 167248, "to": "mm"},
6148   "name": "CB_COLOR4_BASE"
6149  },
6150  {
6151   "chips": ["gfx9"],
6152   "map": {"at": 167252, "to": "mm"},
6153   "name": "CB_COLOR4_BASE_EXT",
6154   "type_ref": "CB_COLOR0_BASE_EXT"
6155  },
6156  {
6157   "chips": ["gfx9"],
6158   "map": {"at": 167256, "to": "mm"},
6159   "name": "CB_COLOR4_ATTRIB2",
6160   "type_ref": "CB_COLOR0_ATTRIB2"
6161  },
6162  {
6163   "chips": ["gfx9"],
6164   "map": {"at": 167260, "to": "mm"},
6165   "name": "CB_COLOR4_VIEW",
6166   "type_ref": "CB_COLOR0_VIEW"
6167  },
6168  {
6169   "chips": ["gfx9"],
6170   "map": {"at": 167264, "to": "mm"},
6171   "name": "CB_COLOR4_INFO",
6172   "type_ref": "CB_COLOR0_INFO"
6173  },
6174  {
6175   "chips": ["gfx9"],
6176   "map": {"at": 167268, "to": "mm"},
6177   "name": "CB_COLOR4_ATTRIB",
6178   "type_ref": "CB_COLOR0_ATTRIB"
6179  },
6180  {
6181   "chips": ["gfx9"],
6182   "map": {"at": 167272, "to": "mm"},
6183   "name": "CB_COLOR4_DCC_CONTROL",
6184   "type_ref": "CB_COLOR0_DCC_CONTROL"
6185  },
6186  {
6187   "chips": ["gfx9"],
6188   "map": {"at": 167276, "to": "mm"},
6189   "name": "CB_COLOR4_CMASK"
6190  },
6191  {
6192   "chips": ["gfx9"],
6193   "map": {"at": 167280, "to": "mm"},
6194   "name": "CB_COLOR4_CMASK_BASE_EXT",
6195   "type_ref": "CB_COLOR0_BASE_EXT"
6196  },
6197  {
6198   "chips": ["gfx9"],
6199   "map": {"at": 167284, "to": "mm"},
6200   "name": "CB_COLOR4_FMASK"
6201  },
6202  {
6203   "chips": ["gfx9"],
6204   "map": {"at": 167288, "to": "mm"},
6205   "name": "CB_COLOR4_FMASK_BASE_EXT",
6206   "type_ref": "CB_COLOR0_BASE_EXT"
6207  },
6208  {
6209   "chips": ["gfx9"],
6210   "map": {"at": 167292, "to": "mm"},
6211   "name": "CB_COLOR4_CLEAR_WORD0"
6212  },
6213  {
6214   "chips": ["gfx9"],
6215   "map": {"at": 167296, "to": "mm"},
6216   "name": "CB_COLOR4_CLEAR_WORD1"
6217  },
6218  {
6219   "chips": ["gfx9"],
6220   "map": {"at": 167300, "to": "mm"},
6221   "name": "CB_COLOR4_DCC_BASE"
6222  },
6223  {
6224   "chips": ["gfx9"],
6225   "map": {"at": 167304, "to": "mm"},
6226   "name": "CB_COLOR4_DCC_BASE_EXT",
6227   "type_ref": "CB_COLOR0_BASE_EXT"
6228  },
6229  {
6230   "chips": ["gfx9"],
6231   "map": {"at": 167308, "to": "mm"},
6232   "name": "CB_COLOR5_BASE"
6233  },
6234  {
6235   "chips": ["gfx9"],
6236   "map": {"at": 167312, "to": "mm"},
6237   "name": "CB_COLOR5_BASE_EXT",
6238   "type_ref": "CB_COLOR0_BASE_EXT"
6239  },
6240  {
6241   "chips": ["gfx9"],
6242   "map": {"at": 167316, "to": "mm"},
6243   "name": "CB_COLOR5_ATTRIB2",
6244   "type_ref": "CB_COLOR0_ATTRIB2"
6245  },
6246  {
6247   "chips": ["gfx9"],
6248   "map": {"at": 167320, "to": "mm"},
6249   "name": "CB_COLOR5_VIEW",
6250   "type_ref": "CB_COLOR0_VIEW"
6251  },
6252  {
6253   "chips": ["gfx9"],
6254   "map": {"at": 167324, "to": "mm"},
6255   "name": "CB_COLOR5_INFO",
6256   "type_ref": "CB_COLOR0_INFO"
6257  },
6258  {
6259   "chips": ["gfx9"],
6260   "map": {"at": 167328, "to": "mm"},
6261   "name": "CB_COLOR5_ATTRIB",
6262   "type_ref": "CB_COLOR0_ATTRIB"
6263  },
6264  {
6265   "chips": ["gfx9"],
6266   "map": {"at": 167332, "to": "mm"},
6267   "name": "CB_COLOR5_DCC_CONTROL",
6268   "type_ref": "CB_COLOR0_DCC_CONTROL"
6269  },
6270  {
6271   "chips": ["gfx9"],
6272   "map": {"at": 167336, "to": "mm"},
6273   "name": "CB_COLOR5_CMASK"
6274  },
6275  {
6276   "chips": ["gfx9"],
6277   "map": {"at": 167340, "to": "mm"},
6278   "name": "CB_COLOR5_CMASK_BASE_EXT",
6279   "type_ref": "CB_COLOR0_BASE_EXT"
6280  },
6281  {
6282   "chips": ["gfx9"],
6283   "map": {"at": 167344, "to": "mm"},
6284   "name": "CB_COLOR5_FMASK"
6285  },
6286  {
6287   "chips": ["gfx9"],
6288   "map": {"at": 167348, "to": "mm"},
6289   "name": "CB_COLOR5_FMASK_BASE_EXT",
6290   "type_ref": "CB_COLOR0_BASE_EXT"
6291  },
6292  {
6293   "chips": ["gfx9"],
6294   "map": {"at": 167352, "to": "mm"},
6295   "name": "CB_COLOR5_CLEAR_WORD0"
6296  },
6297  {
6298   "chips": ["gfx9"],
6299   "map": {"at": 167356, "to": "mm"},
6300   "name": "CB_COLOR5_CLEAR_WORD1"
6301  },
6302  {
6303   "chips": ["gfx9"],
6304   "map": {"at": 167360, "to": "mm"},
6305   "name": "CB_COLOR5_DCC_BASE"
6306  },
6307  {
6308   "chips": ["gfx9"],
6309   "map": {"at": 167364, "to": "mm"},
6310   "name": "CB_COLOR5_DCC_BASE_EXT",
6311   "type_ref": "CB_COLOR0_BASE_EXT"
6312  },
6313  {
6314   "chips": ["gfx9"],
6315   "map": {"at": 167368, "to": "mm"},
6316   "name": "CB_COLOR6_BASE"
6317  },
6318  {
6319   "chips": ["gfx9"],
6320   "map": {"at": 167372, "to": "mm"},
6321   "name": "CB_COLOR6_BASE_EXT",
6322   "type_ref": "CB_COLOR0_BASE_EXT"
6323  },
6324  {
6325   "chips": ["gfx9"],
6326   "map": {"at": 167376, "to": "mm"},
6327   "name": "CB_COLOR6_ATTRIB2",
6328   "type_ref": "CB_COLOR0_ATTRIB2"
6329  },
6330  {
6331   "chips": ["gfx9"],
6332   "map": {"at": 167380, "to": "mm"},
6333   "name": "CB_COLOR6_VIEW",
6334   "type_ref": "CB_COLOR0_VIEW"
6335  },
6336  {
6337   "chips": ["gfx9"],
6338   "map": {"at": 167384, "to": "mm"},
6339   "name": "CB_COLOR6_INFO",
6340   "type_ref": "CB_COLOR0_INFO"
6341  },
6342  {
6343   "chips": ["gfx9"],
6344   "map": {"at": 167388, "to": "mm"},
6345   "name": "CB_COLOR6_ATTRIB",
6346   "type_ref": "CB_COLOR0_ATTRIB"
6347  },
6348  {
6349   "chips": ["gfx9"],
6350   "map": {"at": 167392, "to": "mm"},
6351   "name": "CB_COLOR6_DCC_CONTROL",
6352   "type_ref": "CB_COLOR0_DCC_CONTROL"
6353  },
6354  {
6355   "chips": ["gfx9"],
6356   "map": {"at": 167396, "to": "mm"},
6357   "name": "CB_COLOR6_CMASK"
6358  },
6359  {
6360   "chips": ["gfx9"],
6361   "map": {"at": 167400, "to": "mm"},
6362   "name": "CB_COLOR6_CMASK_BASE_EXT",
6363   "type_ref": "CB_COLOR0_BASE_EXT"
6364  },
6365  {
6366   "chips": ["gfx9"],
6367   "map": {"at": 167404, "to": "mm"},
6368   "name": "CB_COLOR6_FMASK"
6369  },
6370  {
6371   "chips": ["gfx9"],
6372   "map": {"at": 167408, "to": "mm"},
6373   "name": "CB_COLOR6_FMASK_BASE_EXT",
6374   "type_ref": "CB_COLOR0_BASE_EXT"
6375  },
6376  {
6377   "chips": ["gfx9"],
6378   "map": {"at": 167412, "to": "mm"},
6379   "name": "CB_COLOR6_CLEAR_WORD0"
6380  },
6381  {
6382   "chips": ["gfx9"],
6383   "map": {"at": 167416, "to": "mm"},
6384   "name": "CB_COLOR6_CLEAR_WORD1"
6385  },
6386  {
6387   "chips": ["gfx9"],
6388   "map": {"at": 167420, "to": "mm"},
6389   "name": "CB_COLOR6_DCC_BASE"
6390  },
6391  {
6392   "chips": ["gfx9"],
6393   "map": {"at": 167424, "to": "mm"},
6394   "name": "CB_COLOR6_DCC_BASE_EXT",
6395   "type_ref": "CB_COLOR0_BASE_EXT"
6396  },
6397  {
6398   "chips": ["gfx9"],
6399   "map": {"at": 167428, "to": "mm"},
6400   "name": "CB_COLOR7_BASE"
6401  },
6402  {
6403   "chips": ["gfx9"],
6404   "map": {"at": 167432, "to": "mm"},
6405   "name": "CB_COLOR7_BASE_EXT",
6406   "type_ref": "CB_COLOR0_BASE_EXT"
6407  },
6408  {
6409   "chips": ["gfx9"],
6410   "map": {"at": 167436, "to": "mm"},
6411   "name": "CB_COLOR7_ATTRIB2",
6412   "type_ref": "CB_COLOR0_ATTRIB2"
6413  },
6414  {
6415   "chips": ["gfx9"],
6416   "map": {"at": 167440, "to": "mm"},
6417   "name": "CB_COLOR7_VIEW",
6418   "type_ref": "CB_COLOR0_VIEW"
6419  },
6420  {
6421   "chips": ["gfx9"],
6422   "map": {"at": 167444, "to": "mm"},
6423   "name": "CB_COLOR7_INFO",
6424   "type_ref": "CB_COLOR0_INFO"
6425  },
6426  {
6427   "chips": ["gfx9"],
6428   "map": {"at": 167448, "to": "mm"},
6429   "name": "CB_COLOR7_ATTRIB",
6430   "type_ref": "CB_COLOR0_ATTRIB"
6431  },
6432  {
6433   "chips": ["gfx9"],
6434   "map": {"at": 167452, "to": "mm"},
6435   "name": "CB_COLOR7_DCC_CONTROL",
6436   "type_ref": "CB_COLOR0_DCC_CONTROL"
6437  },
6438  {
6439   "chips": ["gfx9"],
6440   "map": {"at": 167456, "to": "mm"},
6441   "name": "CB_COLOR7_CMASK"
6442  },
6443  {
6444   "chips": ["gfx9"],
6445   "map": {"at": 167460, "to": "mm"},
6446   "name": "CB_COLOR7_CMASK_BASE_EXT",
6447   "type_ref": "CB_COLOR0_BASE_EXT"
6448  },
6449  {
6450   "chips": ["gfx9"],
6451   "map": {"at": 167464, "to": "mm"},
6452   "name": "CB_COLOR7_FMASK"
6453  },
6454  {
6455   "chips": ["gfx9"],
6456   "map": {"at": 167468, "to": "mm"},
6457   "name": "CB_COLOR7_FMASK_BASE_EXT",
6458   "type_ref": "CB_COLOR0_BASE_EXT"
6459  },
6460  {
6461   "chips": ["gfx9"],
6462   "map": {"at": 167472, "to": "mm"},
6463   "name": "CB_COLOR7_CLEAR_WORD0"
6464  },
6465  {
6466   "chips": ["gfx9"],
6467   "map": {"at": 167476, "to": "mm"},
6468   "name": "CB_COLOR7_CLEAR_WORD1"
6469  },
6470  {
6471   "chips": ["gfx9"],
6472   "map": {"at": 167480, "to": "mm"},
6473   "name": "CB_COLOR7_DCC_BASE"
6474  },
6475  {
6476   "chips": ["gfx9"],
6477   "map": {"at": 167484, "to": "mm"},
6478   "name": "CB_COLOR7_DCC_BASE_EXT",
6479   "type_ref": "CB_COLOR0_BASE_EXT"
6480  },
6481  {
6482   "chips": ["gfx9"],
6483   "map": {"at": 196608, "to": "mm"},
6484   "name": "CP_EOP_DONE_ADDR_LO",
6485   "type_ref": "CP_EOP_DONE_ADDR_LO"
6486  },
6487  {
6488   "chips": ["gfx9"],
6489   "map": {"at": 196612, "to": "mm"},
6490   "name": "CP_EOP_DONE_ADDR_HI",
6491   "type_ref": "CP_EOP_DONE_ADDR_HI"
6492  },
6493  {
6494   "chips": ["gfx9"],
6495   "map": {"at": 196616, "to": "mm"},
6496   "name": "CP_EOP_DONE_DATA_LO"
6497  },
6498  {
6499   "chips": ["gfx9"],
6500   "map": {"at": 196620, "to": "mm"},
6501   "name": "CP_EOP_DONE_DATA_HI"
6502  },
6503  {
6504   "chips": ["gfx9"],
6505   "map": {"at": 196624, "to": "mm"},
6506   "name": "CP_EOP_LAST_FENCE_LO"
6507  },
6508  {
6509   "chips": ["gfx9"],
6510   "map": {"at": 196628, "to": "mm"},
6511   "name": "CP_EOP_LAST_FENCE_HI"
6512  },
6513  {
6514   "chips": ["gfx9"],
6515   "map": {"at": 196632, "to": "mm"},
6516   "name": "CP_STREAM_OUT_ADDR_LO",
6517   "type_ref": "CP_STREAM_OUT_ADDR_LO"
6518  },
6519  {
6520   "chips": ["gfx9"],
6521   "map": {"at": 196636, "to": "mm"},
6522   "name": "CP_STREAM_OUT_ADDR_HI",
6523   "type_ref": "CP_STREAM_OUT_ADDR_HI"
6524  },
6525  {
6526   "chips": ["gfx9"],
6527   "map": {"at": 196640, "to": "mm"},
6528   "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"
6529  },
6530  {
6531   "chips": ["gfx9"],
6532   "map": {"at": 196644, "to": "mm"},
6533   "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"
6534  },
6535  {
6536   "chips": ["gfx9"],
6537   "map": {"at": 196648, "to": "mm"},
6538   "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO"
6539  },
6540  {
6541   "chips": ["gfx9"],
6542   "map": {"at": 196652, "to": "mm"},
6543   "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI"
6544  },
6545  {
6546   "chips": ["gfx9"],
6547   "map": {"at": 196656, "to": "mm"},
6548   "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"
6549  },
6550  {
6551   "chips": ["gfx9"],
6552   "map": {"at": 196660, "to": "mm"},
6553   "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"
6554  },
6555  {
6556   "chips": ["gfx9"],
6557   "map": {"at": 196664, "to": "mm"},
6558   "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO"
6559  },
6560  {
6561   "chips": ["gfx9"],
6562   "map": {"at": 196668, "to": "mm"},
6563   "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI"
6564  },
6565  {
6566   "chips": ["gfx9"],
6567   "map": {"at": 196672, "to": "mm"},
6568   "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"
6569  },
6570  {
6571   "chips": ["gfx9"],
6572   "map": {"at": 196676, "to": "mm"},
6573   "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"
6574  },
6575  {
6576   "chips": ["gfx9"],
6577   "map": {"at": 196680, "to": "mm"},
6578   "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO"
6579  },
6580  {
6581   "chips": ["gfx9"],
6582   "map": {"at": 196684, "to": "mm"},
6583   "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI"
6584  },
6585  {
6586   "chips": ["gfx9"],
6587   "map": {"at": 196688, "to": "mm"},
6588   "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"
6589  },
6590  {
6591   "chips": ["gfx9"],
6592   "map": {"at": 196692, "to": "mm"},
6593   "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"
6594  },
6595  {
6596   "chips": ["gfx9"],
6597   "map": {"at": 196696, "to": "mm"},
6598   "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO"
6599  },
6600  {
6601   "chips": ["gfx9"],
6602   "map": {"at": 196700, "to": "mm"},
6603   "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI"
6604  },
6605  {
6606   "chips": ["gfx9"],
6607   "map": {"at": 196704, "to": "mm"},
6608   "name": "CP_PIPE_STATS_ADDR_LO",
6609   "type_ref": "CP_PIPE_STATS_ADDR_LO"
6610  },
6611  {
6612   "chips": ["gfx9"],
6613   "map": {"at": 196708, "to": "mm"},
6614   "name": "CP_PIPE_STATS_ADDR_HI",
6615   "type_ref": "CP_PIPE_STATS_ADDR_HI"
6616  },
6617  {
6618   "chips": ["gfx9"],
6619   "map": {"at": 196712, "to": "mm"},
6620   "name": "CP_VGT_IAVERT_COUNT_LO"
6621  },
6622  {
6623   "chips": ["gfx9"],
6624   "map": {"at": 196716, "to": "mm"},
6625   "name": "CP_VGT_IAVERT_COUNT_HI"
6626  },
6627  {
6628   "chips": ["gfx9"],
6629   "map": {"at": 196720, "to": "mm"},
6630   "name": "CP_VGT_IAPRIM_COUNT_LO"
6631  },
6632  {
6633   "chips": ["gfx9"],
6634   "map": {"at": 196724, "to": "mm"},
6635   "name": "CP_VGT_IAPRIM_COUNT_HI"
6636  },
6637  {
6638   "chips": ["gfx9"],
6639   "map": {"at": 196728, "to": "mm"},
6640   "name": "CP_VGT_GSPRIM_COUNT_LO"
6641  },
6642  {
6643   "chips": ["gfx9"],
6644   "map": {"at": 196732, "to": "mm"},
6645   "name": "CP_VGT_GSPRIM_COUNT_HI"
6646  },
6647  {
6648   "chips": ["gfx9"],
6649   "map": {"at": 196736, "to": "mm"},
6650   "name": "CP_VGT_VSINVOC_COUNT_LO"
6651  },
6652  {
6653   "chips": ["gfx9"],
6654   "map": {"at": 196740, "to": "mm"},
6655   "name": "CP_VGT_VSINVOC_COUNT_HI"
6656  },
6657  {
6658   "chips": ["gfx9"],
6659   "map": {"at": 196744, "to": "mm"},
6660   "name": "CP_VGT_GSINVOC_COUNT_LO"
6661  },
6662  {
6663   "chips": ["gfx9"],
6664   "map": {"at": 196748, "to": "mm"},
6665   "name": "CP_VGT_GSINVOC_COUNT_HI"
6666  },
6667  {
6668   "chips": ["gfx9"],
6669   "map": {"at": 196752, "to": "mm"},
6670   "name": "CP_VGT_HSINVOC_COUNT_LO"
6671  },
6672  {
6673   "chips": ["gfx9"],
6674   "map": {"at": 196756, "to": "mm"},
6675   "name": "CP_VGT_HSINVOC_COUNT_HI"
6676  },
6677  {
6678   "chips": ["gfx9"],
6679   "map": {"at": 196760, "to": "mm"},
6680   "name": "CP_VGT_DSINVOC_COUNT_LO"
6681  },
6682  {
6683   "chips": ["gfx9"],
6684   "map": {"at": 196764, "to": "mm"},
6685   "name": "CP_VGT_DSINVOC_COUNT_HI"
6686  },
6687  {
6688   "chips": ["gfx9"],
6689   "map": {"at": 196768, "to": "mm"},
6690   "name": "CP_PA_CINVOC_COUNT_LO"
6691  },
6692  {
6693   "chips": ["gfx9"],
6694   "map": {"at": 196772, "to": "mm"},
6695   "name": "CP_PA_CINVOC_COUNT_HI"
6696  },
6697  {
6698   "chips": ["gfx9"],
6699   "map": {"at": 196776, "to": "mm"},
6700   "name": "CP_PA_CPRIM_COUNT_LO"
6701  },
6702  {
6703   "chips": ["gfx9"],
6704   "map": {"at": 196780, "to": "mm"},
6705   "name": "CP_PA_CPRIM_COUNT_HI"
6706  },
6707  {
6708   "chips": ["gfx9"],
6709   "map": {"at": 196784, "to": "mm"},
6710   "name": "CP_SC_PSINVOC_COUNT0_LO"
6711  },
6712  {
6713   "chips": ["gfx9"],
6714   "map": {"at": 196788, "to": "mm"},
6715   "name": "CP_SC_PSINVOC_COUNT0_HI"
6716  },
6717  {
6718   "chips": ["gfx9"],
6719   "map": {"at": 196792, "to": "mm"},
6720   "name": "CP_SC_PSINVOC_COUNT1_LO"
6721  },
6722  {
6723   "chips": ["gfx9"],
6724   "map": {"at": 196796, "to": "mm"},
6725   "name": "CP_SC_PSINVOC_COUNT1_HI"
6726  },
6727  {
6728   "chips": ["gfx9"],
6729   "map": {"at": 196800, "to": "mm"},
6730   "name": "CP_VGT_CSINVOC_COUNT_LO"
6731  },
6732  {
6733   "chips": ["gfx9"],
6734   "map": {"at": 196804, "to": "mm"},
6735   "name": "CP_VGT_CSINVOC_COUNT_HI"
6736  },
6737  {
6738   "chips": ["gfx9"],
6739   "map": {"at": 196852, "to": "mm"},
6740   "name": "CP_PIPE_STATS_CONTROL",
6741   "type_ref": "CP_PIPE_STATS_CONTROL"
6742  },
6743  {
6744   "chips": ["gfx9"],
6745   "map": {"at": 196856, "to": "mm"},
6746   "name": "CP_STREAM_OUT_CONTROL",
6747   "type_ref": "CP_PIPE_STATS_CONTROL"
6748  },
6749  {
6750   "chips": ["gfx9"],
6751   "map": {"at": 196860, "to": "mm"},
6752   "name": "CP_STRMOUT_CNTL",
6753   "type_ref": "CP_STRMOUT_CNTL"
6754  },
6755  {
6756   "chips": ["gfx9"],
6757   "map": {"at": 196864, "to": "mm"},
6758   "name": "SCRATCH_REG0"
6759  },
6760  {
6761   "chips": ["gfx9"],
6762   "map": {"at": 196868, "to": "mm"},
6763   "name": "SCRATCH_REG1"
6764  },
6765  {
6766   "chips": ["gfx9"],
6767   "map": {"at": 196872, "to": "mm"},
6768   "name": "SCRATCH_REG2"
6769  },
6770  {
6771   "chips": ["gfx9"],
6772   "map": {"at": 196876, "to": "mm"},
6773   "name": "SCRATCH_REG3"
6774  },
6775  {
6776   "chips": ["gfx9"],
6777   "map": {"at": 196880, "to": "mm"},
6778   "name": "SCRATCH_REG4"
6779  },
6780  {
6781   "chips": ["gfx9"],
6782   "map": {"at": 196884, "to": "mm"},
6783   "name": "SCRATCH_REG5"
6784  },
6785  {
6786   "chips": ["gfx9"],
6787   "map": {"at": 196888, "to": "mm"},
6788   "name": "SCRATCH_REG6"
6789  },
6790  {
6791   "chips": ["gfx9"],
6792   "map": {"at": 196892, "to": "mm"},
6793   "name": "SCRATCH_REG7"
6794  },
6795  {
6796   "chips": ["gfx9"],
6797   "map": {"at": 196912, "to": "mm"},
6798   "name": "CP_APPEND_DATA_HI"
6799  },
6800  {
6801   "chips": ["gfx9"],
6802   "map": {"at": 196916, "to": "mm"},
6803   "name": "CP_APPEND_LAST_CS_FENCE_HI"
6804  },
6805  {
6806   "chips": ["gfx9"],
6807   "map": {"at": 196920, "to": "mm"},
6808   "name": "CP_APPEND_LAST_PS_FENCE_HI"
6809  },
6810  {
6811   "chips": ["gfx9"],
6812   "map": {"at": 196928, "to": "mm"},
6813   "name": "SCRATCH_UMSK",
6814   "type_ref": "SCRATCH_UMSK"
6815  },
6816  {
6817   "chips": ["gfx9"],
6818   "map": {"at": 196932, "to": "mm"},
6819   "name": "SCRATCH_ADDR"
6820  },
6821  {
6822   "chips": ["gfx9"],
6823   "map": {"at": 196936, "to": "mm"},
6824   "name": "CP_PFP_ATOMIC_PREOP_LO"
6825  },
6826  {
6827   "chips": ["gfx9"],
6828   "map": {"at": 196940, "to": "mm"},
6829   "name": "CP_PFP_ATOMIC_PREOP_HI"
6830  },
6831  {
6832   "chips": ["gfx9"],
6833   "map": {"at": 196944, "to": "mm"},
6834   "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
6835  },
6836  {
6837   "chips": ["gfx9"],
6838   "map": {"at": 196948, "to": "mm"},
6839   "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
6840  },
6841  {
6842   "chips": ["gfx9"],
6843   "map": {"at": 196952, "to": "mm"},
6844   "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
6845  },
6846  {
6847   "chips": ["gfx9"],
6848   "map": {"at": 196956, "to": "mm"},
6849   "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
6850  },
6851  {
6852   "chips": ["gfx9"],
6853   "map": {"at": 196960, "to": "mm"},
6854   "name": "CP_APPEND_ADDR_LO",
6855   "type_ref": "CP_APPEND_ADDR_LO"
6856  },
6857  {
6858   "chips": ["gfx9"],
6859   "map": {"at": 196964, "to": "mm"},
6860   "name": "CP_APPEND_ADDR_HI",
6861   "type_ref": "CP_APPEND_ADDR_HI"
6862  },
6863  {
6864   "chips": ["gfx9"],
6865   "map": {"at": 196968, "to": "mm"},
6866   "name": "CP_APPEND_DATA_LO"
6867  },
6868  {
6869   "chips": ["gfx9"],
6870   "map": {"at": 196972, "to": "mm"},
6871   "name": "CP_APPEND_LAST_CS_FENCE_LO"
6872  },
6873  {
6874   "chips": ["gfx9"],
6875   "map": {"at": 196976, "to": "mm"},
6876   "name": "CP_APPEND_LAST_PS_FENCE_LO"
6877  },
6878  {
6879   "chips": ["gfx9"],
6880   "map": {"at": 196980, "to": "mm"},
6881   "name": "CP_ATOMIC_PREOP_LO"
6882  },
6883  {
6884   "chips": ["gfx9"],
6885   "map": {"at": 196984, "to": "mm"},
6886   "name": "CP_ATOMIC_PREOP_HI"
6887  },
6888  {
6889   "chips": ["gfx9"],
6890   "map": {"at": 196988, "to": "mm"},
6891   "name": "CP_GDS_ATOMIC0_PREOP_LO"
6892  },
6893  {
6894   "chips": ["gfx9"],
6895   "map": {"at": 196992, "to": "mm"},
6896   "name": "CP_GDS_ATOMIC0_PREOP_HI"
6897  },
6898  {
6899   "chips": ["gfx9"],
6900   "map": {"at": 196996, "to": "mm"},
6901   "name": "CP_GDS_ATOMIC1_PREOP_LO"
6902  },
6903  {
6904   "chips": ["gfx9"],
6905   "map": {"at": 197000, "to": "mm"},
6906   "name": "CP_GDS_ATOMIC1_PREOP_HI"
6907  },
6908  {
6909   "chips": ["gfx9"],
6910   "map": {"at": 197028, "to": "mm"},
6911   "name": "CP_ME_MC_WADDR_LO",
6912   "type_ref": "CP_ME_MC_WADDR_LO"
6913  },
6914  {
6915   "chips": ["gfx9"],
6916   "map": {"at": 197032, "to": "mm"},
6917   "name": "CP_ME_MC_WADDR_HI",
6918   "type_ref": "CP_ME_MC_WADDR_HI"
6919  },
6920  {
6921   "chips": ["gfx9"],
6922   "map": {"at": 197036, "to": "mm"},
6923   "name": "CP_ME_MC_WDATA_LO"
6924  },
6925  {
6926   "chips": ["gfx9"],
6927   "map": {"at": 197040, "to": "mm"},
6928   "name": "CP_ME_MC_WDATA_HI"
6929  },
6930  {
6931   "chips": ["gfx9"],
6932   "map": {"at": 197044, "to": "mm"},
6933   "name": "CP_ME_MC_RADDR_LO",
6934   "type_ref": "CP_ME_MC_RADDR_LO"
6935  },
6936  {
6937   "chips": ["gfx9"],
6938   "map": {"at": 197048, "to": "mm"},
6939   "name": "CP_ME_MC_RADDR_HI",
6940   "type_ref": "CP_ME_MC_RADDR_HI"
6941  },
6942  {
6943   "chips": ["gfx9"],
6944   "map": {"at": 197052, "to": "mm"},
6945   "name": "CP_SEM_WAIT_TIMER"
6946  },
6947  {
6948   "chips": ["gfx9"],
6949   "map": {"at": 197056, "to": "mm"},
6950   "name": "CP_SIG_SEM_ADDR_LO",
6951   "type_ref": "CP_SIG_SEM_ADDR_LO"
6952  },
6953  {
6954   "chips": ["gfx9"],
6955   "map": {"at": 197060, "to": "mm"},
6956   "name": "CP_SIG_SEM_ADDR_HI",
6957   "type_ref": "CP_SIG_SEM_ADDR_HI"
6958  },
6959  {
6960   "chips": ["gfx9"],
6961   "map": {"at": 197072, "to": "mm"},
6962   "name": "CP_WAIT_REG_MEM_TIMEOUT"
6963  },
6964  {
6965   "chips": ["gfx9"],
6966   "map": {"at": 197076, "to": "mm"},
6967   "name": "CP_WAIT_SEM_ADDR_LO",
6968   "type_ref": "CP_SIG_SEM_ADDR_LO"
6969  },
6970  {
6971   "chips": ["gfx9"],
6972   "map": {"at": 197080, "to": "mm"},
6973   "name": "CP_WAIT_SEM_ADDR_HI",
6974   "type_ref": "CP_SIG_SEM_ADDR_HI"
6975  },
6976  {
6977   "chips": ["gfx9"],
6978   "map": {"at": 197084, "to": "mm"},
6979   "name": "CP_DMA_PFP_CONTROL",
6980   "type_ref": "CP_DMA_PFP_CONTROL"
6981  },
6982  {
6983   "chips": ["gfx9"],
6984   "map": {"at": 197088, "to": "mm"},
6985   "name": "CP_DMA_ME_CONTROL",
6986   "type_ref": "CP_DMA_PFP_CONTROL"
6987  },
6988  {
6989   "chips": ["gfx9"],
6990   "map": {"at": 197092, "to": "mm"},
6991   "name": "CP_COHER_BASE_HI",
6992   "type_ref": "CP_COHER_BASE_HI"
6993  },
6994  {
6995   "chips": ["gfx9"],
6996   "map": {"at": 197100, "to": "mm"},
6997   "name": "CP_COHER_START_DELAY",
6998   "type_ref": "CP_COHER_START_DELAY"
6999  },
7000  {
7001   "chips": ["gfx9"],
7002   "map": {"at": 197104, "to": "mm"},
7003   "name": "CP_COHER_CNTL",
7004   "type_ref": "CP_COHER_CNTL"
7005  },
7006  {
7007   "chips": ["gfx9"],
7008   "map": {"at": 197108, "to": "mm"},
7009   "name": "CP_COHER_SIZE"
7010  },
7011  {
7012   "chips": ["gfx9"],
7013   "map": {"at": 197112, "to": "mm"},
7014   "name": "CP_COHER_BASE"
7015  },
7016  {
7017   "chips": ["gfx9"],
7018   "map": {"at": 197116, "to": "mm"},
7019   "name": "CP_COHER_STATUS",
7020   "type_ref": "CP_COHER_STATUS"
7021  },
7022  {
7023   "chips": ["gfx9"],
7024   "map": {"at": 197120, "to": "mm"},
7025   "name": "CP_DMA_ME_SRC_ADDR"
7026  },
7027  {
7028   "chips": ["gfx9"],
7029   "map": {"at": 197124, "to": "mm"},
7030   "name": "CP_DMA_ME_SRC_ADDR_HI",
7031   "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
7032  },
7033  {
7034   "chips": ["gfx9"],
7035   "map": {"at": 197128, "to": "mm"},
7036   "name": "CP_DMA_ME_DST_ADDR"
7037  },
7038  {
7039   "chips": ["gfx9"],
7040   "map": {"at": 197132, "to": "mm"},
7041   "name": "CP_DMA_ME_DST_ADDR_HI",
7042   "type_ref": "CP_DMA_ME_DST_ADDR_HI"
7043  },
7044  {
7045   "chips": ["gfx9"],
7046   "map": {"at": 197136, "to": "mm"},
7047   "name": "CP_DMA_ME_COMMAND",
7048   "type_ref": "CP_DMA_ME_COMMAND"
7049  },
7050  {
7051   "chips": ["gfx9"],
7052   "map": {"at": 197140, "to": "mm"},
7053   "name": "CP_DMA_PFP_SRC_ADDR"
7054  },
7055  {
7056   "chips": ["gfx9"],
7057   "map": {"at": 197144, "to": "mm"},
7058   "name": "CP_DMA_PFP_SRC_ADDR_HI",
7059   "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
7060  },
7061  {
7062   "chips": ["gfx9"],
7063   "map": {"at": 197148, "to": "mm"},
7064   "name": "CP_DMA_PFP_DST_ADDR"
7065  },
7066  {
7067   "chips": ["gfx9"],
7068   "map": {"at": 197152, "to": "mm"},
7069   "name": "CP_DMA_PFP_DST_ADDR_HI",
7070   "type_ref": "CP_DMA_ME_DST_ADDR_HI"
7071  },
7072  {
7073   "chips": ["gfx9"],
7074   "map": {"at": 197156, "to": "mm"},
7075   "name": "CP_DMA_PFP_COMMAND",
7076   "type_ref": "CP_DMA_ME_COMMAND"
7077  },
7078  {
7079   "chips": ["gfx9"],
7080   "map": {"at": 197160, "to": "mm"},
7081   "name": "CP_DMA_CNTL",
7082   "type_ref": "CP_DMA_CNTL"
7083  },
7084  {
7085   "chips": ["gfx9"],
7086   "map": {"at": 197164, "to": "mm"},
7087   "name": "CP_DMA_READ_TAGS",
7088   "type_ref": "CP_DMA_READ_TAGS"
7089  },
7090  {
7091   "chips": ["gfx9"],
7092   "map": {"at": 197168, "to": "mm"},
7093   "name": "CP_COHER_SIZE_HI",
7094   "type_ref": "CP_COHER_SIZE_HI"
7095  },
7096  {
7097   "chips": ["gfx9"],
7098   "map": {"at": 197172, "to": "mm"},
7099   "name": "CP_PFP_IB_CONTROL",
7100   "type_ref": "CP_PFP_IB_CONTROL"
7101  },
7102  {
7103   "chips": ["gfx9"],
7104   "map": {"at": 197176, "to": "mm"},
7105   "name": "CP_PFP_LOAD_CONTROL",
7106   "type_ref": "CP_PFP_LOAD_CONTROL"
7107  },
7108  {
7109   "chips": ["gfx9"],
7110   "map": {"at": 197180, "to": "mm"},
7111   "name": "CP_SCRATCH_INDEX",
7112   "type_ref": "CP_SCRATCH_INDEX"
7113  },
7114  {
7115   "chips": ["gfx9"],
7116   "map": {"at": 197184, "to": "mm"},
7117   "name": "CP_SCRATCH_DATA"
7118  },
7119  {
7120   "chips": ["gfx9"],
7121   "map": {"at": 197188, "to": "mm"},
7122   "name": "CP_RB_OFFSET",
7123   "type_ref": "CP_RB_OFFSET"
7124  },
7125  {
7126   "chips": ["gfx9"],
7127   "map": {"at": 197192, "to": "mm"},
7128   "name": "CP_IB1_OFFSET",
7129   "type_ref": "CP_IB1_OFFSET"
7130  },
7131  {
7132   "chips": ["gfx9"],
7133   "map": {"at": 197196, "to": "mm"},
7134   "name": "CP_IB2_OFFSET",
7135   "type_ref": "CP_IB2_OFFSET"
7136  },
7137  {
7138   "chips": ["gfx9"],
7139   "map": {"at": 197200, "to": "mm"},
7140   "name": "CP_IB1_PREAMBLE_BEGIN",
7141   "type_ref": "CP_IB1_PREAMBLE_BEGIN"
7142  },
7143  {
7144   "chips": ["gfx9"],
7145   "map": {"at": 197204, "to": "mm"},
7146   "name": "CP_IB1_PREAMBLE_END",
7147   "type_ref": "CP_IB1_PREAMBLE_END"
7148  },
7149  {
7150   "chips": ["gfx9"],
7151   "map": {"at": 197208, "to": "mm"},
7152   "name": "CP_IB2_PREAMBLE_BEGIN",
7153   "type_ref": "CP_IB2_PREAMBLE_BEGIN"
7154  },
7155  {
7156   "chips": ["gfx9"],
7157   "map": {"at": 197212, "to": "mm"},
7158   "name": "CP_IB2_PREAMBLE_END",
7159   "type_ref": "CP_IB2_PREAMBLE_END"
7160  },
7161  {
7162   "chips": ["gfx9"],
7163   "map": {"at": 197216, "to": "mm"},
7164   "name": "CP_CE_IB1_OFFSET",
7165   "type_ref": "CP_IB1_OFFSET"
7166  },
7167  {
7168   "chips": ["gfx9"],
7169   "map": {"at": 197220, "to": "mm"},
7170   "name": "CP_CE_IB2_OFFSET",
7171   "type_ref": "CP_IB2_OFFSET"
7172  },
7173  {
7174   "chips": ["gfx9"],
7175   "map": {"at": 197224, "to": "mm"},
7176   "name": "CP_CE_COUNTER"
7177  },
7178  {
7179   "chips": ["gfx9"],
7180   "map": {"at": 197228, "to": "mm"},
7181   "name": "CP_CE_RB_OFFSET",
7182   "type_ref": "CP_RB_OFFSET"
7183  },
7184  {
7185   "chips": ["gfx9"],
7186   "map": {"at": 197364, "to": "mm"},
7187   "name": "CP_CE_INIT_CMD_BUFSZ",
7188   "type_ref": "CP_CE_INIT_CMD_BUFSZ"
7189  },
7190  {
7191   "chips": ["gfx9"],
7192   "map": {"at": 197368, "to": "mm"},
7193   "name": "CP_CE_IB1_CMD_BUFSZ",
7194   "type_ref": "CP_CE_IB1_CMD_BUFSZ"
7195  },
7196  {
7197   "chips": ["gfx9"],
7198   "map": {"at": 197372, "to": "mm"},
7199   "name": "CP_CE_IB2_CMD_BUFSZ",
7200   "type_ref": "CP_CE_IB2_CMD_BUFSZ"
7201  },
7202  {
7203   "chips": ["gfx9"],
7204   "map": {"at": 197376, "to": "mm"},
7205   "name": "CP_IB1_CMD_BUFSZ",
7206   "type_ref": "CP_CE_IB1_CMD_BUFSZ"
7207  },
7208  {
7209   "chips": ["gfx9"],
7210   "map": {"at": 197380, "to": "mm"},
7211   "name": "CP_IB2_CMD_BUFSZ",
7212   "type_ref": "CP_CE_IB2_CMD_BUFSZ"
7213  },
7214  {
7215   "chips": ["gfx9"],
7216   "map": {"at": 197384, "to": "mm"},
7217   "name": "CP_ST_CMD_BUFSZ",
7218   "type_ref": "CP_ST_CMD_BUFSZ"
7219  },
7220  {
7221   "chips": ["gfx9"],
7222   "map": {"at": 197388, "to": "mm"},
7223   "name": "CP_CE_INIT_BASE_LO",
7224   "type_ref": "CP_CE_INIT_BASE_LO"
7225  },
7226  {
7227   "chips": ["gfx9"],
7228   "map": {"at": 197392, "to": "mm"},
7229   "name": "CP_CE_INIT_BASE_HI",
7230   "type_ref": "CP_CE_INIT_BASE_HI"
7231  },
7232  {
7233   "chips": ["gfx9"],
7234   "map": {"at": 197396, "to": "mm"},
7235   "name": "CP_CE_INIT_BUFSZ",
7236   "type_ref": "CP_CE_INIT_BUFSZ"
7237  },
7238  {
7239   "chips": ["gfx9"],
7240   "map": {"at": 197400, "to": "mm"},
7241   "name": "CP_CE_IB1_BASE_LO",
7242   "type_ref": "CP_CE_IB1_BASE_LO"
7243  },
7244  {
7245   "chips": ["gfx9"],
7246   "map": {"at": 197404, "to": "mm"},
7247   "name": "CP_CE_IB1_BASE_HI",
7248   "type_ref": "CP_CE_IB1_BASE_HI"
7249  },
7250  {
7251   "chips": ["gfx9"],
7252   "map": {"at": 197408, "to": "mm"},
7253   "name": "CP_CE_IB1_BUFSZ",
7254   "type_ref": "CP_CE_IB1_BUFSZ"
7255  },
7256  {
7257   "chips": ["gfx9"],
7258   "map": {"at": 197412, "to": "mm"},
7259   "name": "CP_CE_IB2_BASE_LO",
7260   "type_ref": "CP_CE_IB2_BASE_LO"
7261  },
7262  {
7263   "chips": ["gfx9"],
7264   "map": {"at": 197416, "to": "mm"},
7265   "name": "CP_CE_IB2_BASE_HI",
7266   "type_ref": "CP_CE_IB2_BASE_HI"
7267  },
7268  {
7269   "chips": ["gfx9"],
7270   "map": {"at": 197420, "to": "mm"},
7271   "name": "CP_CE_IB2_BUFSZ",
7272   "type_ref": "CP_CE_IB2_BUFSZ"
7273  },
7274  {
7275   "chips": ["gfx9"],
7276   "map": {"at": 197424, "to": "mm"},
7277   "name": "CP_IB1_BASE_LO",
7278   "type_ref": "CP_CE_IB1_BASE_LO"
7279  },
7280  {
7281   "chips": ["gfx9"],
7282   "map": {"at": 197428, "to": "mm"},
7283   "name": "CP_IB1_BASE_HI",
7284   "type_ref": "CP_CE_IB1_BASE_HI"
7285  },
7286  {
7287   "chips": ["gfx9"],
7288   "map": {"at": 197432, "to": "mm"},
7289   "name": "CP_IB1_BUFSZ",
7290   "type_ref": "CP_CE_IB1_BUFSZ"
7291  },
7292  {
7293   "chips": ["gfx9"],
7294   "map": {"at": 197436, "to": "mm"},
7295   "name": "CP_IB2_BASE_LO",
7296   "type_ref": "CP_CE_IB2_BASE_LO"
7297  },
7298  {
7299   "chips": ["gfx9"],
7300   "map": {"at": 197440, "to": "mm"},
7301   "name": "CP_IB2_BASE_HI",
7302   "type_ref": "CP_CE_IB2_BASE_HI"
7303  },
7304  {
7305   "chips": ["gfx9"],
7306   "map": {"at": 197444, "to": "mm"},
7307   "name": "CP_IB2_BUFSZ",
7308   "type_ref": "CP_CE_IB2_BUFSZ"
7309  },
7310  {
7311   "chips": ["gfx9"],
7312   "map": {"at": 197448, "to": "mm"},
7313   "name": "CP_ST_BASE_LO",
7314   "type_ref": "CP_ST_BASE_LO"
7315  },
7316  {
7317   "chips": ["gfx9"],
7318   "map": {"at": 197452, "to": "mm"},
7319   "name": "CP_ST_BASE_HI",
7320   "type_ref": "CP_ST_BASE_HI"
7321  },
7322  {
7323   "chips": ["gfx9"],
7324   "map": {"at": 197456, "to": "mm"},
7325   "name": "CP_ST_BUFSZ",
7326   "type_ref": "CP_ST_BUFSZ"
7327  },
7328  {
7329   "chips": ["gfx9"],
7330   "map": {"at": 197460, "to": "mm"},
7331   "name": "CP_EOP_DONE_EVENT_CNTL",
7332   "type_ref": "CP_EOP_DONE_EVENT_CNTL"
7333  },
7334  {
7335   "chips": ["gfx9"],
7336   "map": {"at": 197464, "to": "mm"},
7337   "name": "CP_EOP_DONE_DATA_CNTL",
7338   "type_ref": "CP_EOP_DONE_DATA_CNTL"
7339  },
7340  {
7341   "chips": ["gfx9"],
7342   "map": {"at": 197468, "to": "mm"},
7343   "name": "CP_EOP_DONE_CNTX_ID"
7344  },
7345  {
7346   "chips": ["gfx9"],
7347   "map": {"at": 197552, "to": "mm"},
7348   "name": "CP_PFP_COMPLETION_STATUS",
7349   "type_ref": "CP_PFP_COMPLETION_STATUS"
7350  },
7351  {
7352   "chips": ["gfx9"],
7353   "map": {"at": 197556, "to": "mm"},
7354   "name": "CP_CE_COMPLETION_STATUS",
7355   "type_ref": "CP_PFP_COMPLETION_STATUS"
7356  },
7357  {
7358   "chips": ["gfx9"],
7359   "map": {"at": 197560, "to": "mm"},
7360   "name": "CP_PRED_NOT_VISIBLE",
7361   "type_ref": "CP_PRED_NOT_VISIBLE"
7362  },
7363  {
7364   "chips": ["gfx9"],
7365   "map": {"at": 197568, "to": "mm"},
7366   "name": "CP_PFP_METADATA_BASE_ADDR"
7367  },
7368  {
7369   "chips": ["gfx9"],
7370   "map": {"at": 197572, "to": "mm"},
7371   "name": "CP_PFP_METADATA_BASE_ADDR_HI",
7372   "type_ref": "CP_EOP_DONE_ADDR_HI"
7373  },
7374  {
7375   "chips": ["gfx9"],
7376   "map": {"at": 197576, "to": "mm"},
7377   "name": "CP_CE_METADATA_BASE_ADDR"
7378  },
7379  {
7380   "chips": ["gfx9"],
7381   "map": {"at": 197580, "to": "mm"},
7382   "name": "CP_CE_METADATA_BASE_ADDR_HI",
7383   "type_ref": "CP_EOP_DONE_ADDR_HI"
7384  },
7385  {
7386   "chips": ["gfx9"],
7387   "map": {"at": 197584, "to": "mm"},
7388   "name": "CP_DRAW_INDX_INDR_ADDR"
7389  },
7390  {
7391   "chips": ["gfx9"],
7392   "map": {"at": 197588, "to": "mm"},
7393   "name": "CP_DRAW_INDX_INDR_ADDR_HI",
7394   "type_ref": "CP_EOP_DONE_ADDR_HI"
7395  },
7396  {
7397   "chips": ["gfx9"],
7398   "map": {"at": 197592, "to": "mm"},
7399   "name": "CP_DISPATCH_INDR_ADDR"
7400  },
7401  {
7402   "chips": ["gfx9"],
7403   "map": {"at": 197596, "to": "mm"},
7404   "name": "CP_DISPATCH_INDR_ADDR_HI",
7405   "type_ref": "CP_EOP_DONE_ADDR_HI"
7406  },
7407  {
7408   "chips": ["gfx9"],
7409   "map": {"at": 197600, "to": "mm"},
7410   "name": "CP_INDEX_BASE_ADDR"
7411  },
7412  {
7413   "chips": ["gfx9"],
7414   "map": {"at": 197604, "to": "mm"},
7415   "name": "CP_INDEX_BASE_ADDR_HI",
7416   "type_ref": "CP_EOP_DONE_ADDR_HI"
7417  },
7418  {
7419   "chips": ["gfx9"],
7420   "map": {"at": 197608, "to": "mm"},
7421   "name": "CP_INDEX_TYPE",
7422   "type_ref": "CP_INDEX_TYPE"
7423  },
7424  {
7425   "chips": ["gfx9"],
7426   "map": {"at": 197612, "to": "mm"},
7427   "name": "CP_GDS_BKUP_ADDR"
7428  },
7429  {
7430   "chips": ["gfx9"],
7431   "map": {"at": 197616, "to": "mm"},
7432   "name": "CP_GDS_BKUP_ADDR_HI",
7433   "type_ref": "CP_EOP_DONE_ADDR_HI"
7434  },
7435  {
7436   "chips": ["gfx9"],
7437   "map": {"at": 197620, "to": "mm"},
7438   "name": "CP_SAMPLE_STATUS",
7439   "type_ref": "CP_SAMPLE_STATUS"
7440  },
7441  {
7442   "chips": ["gfx9"],
7443   "map": {"at": 197624, "to": "mm"},
7444   "name": "CP_ME_COHER_CNTL",
7445   "type_ref": "CP_ME_COHER_CNTL"
7446  },
7447  {
7448   "chips": ["gfx9"],
7449   "map": {"at": 197628, "to": "mm"},
7450   "name": "CP_ME_COHER_SIZE"
7451  },
7452  {
7453   "chips": ["gfx9"],
7454   "map": {"at": 197632, "to": "mm"},
7455   "name": "CP_ME_COHER_SIZE_HI",
7456   "type_ref": "CP_COHER_SIZE_HI"
7457  },
7458  {
7459   "chips": ["gfx9"],
7460   "map": {"at": 197636, "to": "mm"},
7461   "name": "CP_ME_COHER_BASE"
7462  },
7463  {
7464   "chips": ["gfx9"],
7465   "map": {"at": 197640, "to": "mm"},
7466   "name": "CP_ME_COHER_BASE_HI",
7467   "type_ref": "CP_COHER_BASE_HI"
7468  },
7469  {
7470   "chips": ["gfx9"],
7471   "map": {"at": 197644, "to": "mm"},
7472   "name": "CP_ME_COHER_STATUS",
7473   "type_ref": "CP_ME_COHER_STATUS"
7474  },
7475  {
7476   "chips": ["gfx9"],
7477   "map": {"at": 197888, "to": "mm"},
7478   "name": "RLC_GPM_PERF_COUNT_0",
7479   "type_ref": "RLC_GPM_PERF_COUNT_0"
7480  },
7481  {
7482   "chips": ["gfx9"],
7483   "map": {"at": 197892, "to": "mm"},
7484   "name": "RLC_GPM_PERF_COUNT_1",
7485   "type_ref": "RLC_GPM_PERF_COUNT_0"
7486  },
7487  {
7488   "chips": ["gfx9"],
7489   "map": {"at": 198656, "to": "mm"},
7490   "name": "GRBM_GFX_INDEX",
7491   "type_ref": "GRBM_GFX_INDEX"
7492  },
7493  {
7494   "chips": ["gfx9"],
7495   "map": {"at": 198916, "to": "mm"},
7496   "name": "VGT_GSVS_RING_SIZE"
7497  },
7498  {
7499   "chips": ["gfx9"],
7500   "map": {"at": 198920, "to": "mm"},
7501   "name": "VGT_PRIMITIVE_TYPE",
7502   "type_ref": "VGT_PRIMITIVE_TYPE"
7503  },
7504  {
7505   "chips": ["gfx9"],
7506   "map": {"at": 198924, "to": "mm"},
7507   "name": "VGT_INDEX_TYPE",
7508   "type_ref": "VGT_INDEX_TYPE"
7509  },
7510  {
7511   "chips": ["gfx9"],
7512   "map": {"at": 198928, "to": "mm"},
7513   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0"
7514  },
7515  {
7516   "chips": ["gfx9"],
7517   "map": {"at": 198932, "to": "mm"},
7518   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1"
7519  },
7520  {
7521   "chips": ["gfx9"],
7522   "map": {"at": 198936, "to": "mm"},
7523   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2"
7524  },
7525  {
7526   "chips": ["gfx9"],
7527   "map": {"at": 198940, "to": "mm"},
7528   "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3"
7529  },
7530  {
7531   "chips": ["gfx9"],
7532   "map": {"at": 198944, "to": "mm"},
7533   "name": "VGT_MAX_VTX_INDX"
7534  },
7535  {
7536   "chips": ["gfx9"],
7537   "map": {"at": 198948, "to": "mm"},
7538   "name": "VGT_MIN_VTX_INDX"
7539  },
7540  {
7541   "chips": ["gfx9"],
7542   "map": {"at": 198952, "to": "mm"},
7543   "name": "VGT_INDX_OFFSET"
7544  },
7545  {
7546   "chips": ["gfx9"],
7547   "map": {"at": 198956, "to": "mm"},
7548   "name": "VGT_MULTI_PRIM_IB_RESET_EN",
7549   "type_ref": "VGT_MULTI_PRIM_IB_RESET_EN"
7550  },
7551  {
7552   "chips": ["gfx9"],
7553   "map": {"at": 198960, "to": "mm"},
7554   "name": "VGT_NUM_INDICES"
7555  },
7556  {
7557   "chips": ["gfx9"],
7558   "map": {"at": 198964, "to": "mm"},
7559   "name": "VGT_NUM_INSTANCES"
7560  },
7561  {
7562   "chips": ["gfx9"],
7563   "map": {"at": 198968, "to": "mm"},
7564   "name": "VGT_TF_RING_SIZE",
7565   "type_ref": "VGT_TF_RING_SIZE"
7566  },
7567  {
7568   "chips": ["gfx9"],
7569   "map": {"at": 198972, "to": "mm"},
7570   "name": "VGT_HS_OFFCHIP_PARAM",
7571   "type_ref": "VGT_HS_OFFCHIP_PARAM"
7572  },
7573  {
7574   "chips": ["gfx9"],
7575   "map": {"at": 198976, "to": "mm"},
7576   "name": "VGT_TF_MEMORY_BASE"
7577  },
7578  {
7579   "chips": ["gfx9"],
7580   "map": {"at": 198980, "to": "mm"},
7581   "name": "VGT_TF_MEMORY_BASE_HI",
7582   "type_ref": "DB_HTILE_DATA_BASE_HI"
7583  },
7584  {
7585   "chips": ["gfx9"],
7586   "map": {"at": 198984, "to": "mm"},
7587   "name": "WD_POS_BUF_BASE"
7588  },
7589  {
7590   "chips": ["gfx9"],
7591   "map": {"at": 198988, "to": "mm"},
7592   "name": "WD_POS_BUF_BASE_HI",
7593   "type_ref": "DB_HTILE_DATA_BASE_HI"
7594  },
7595  {
7596   "chips": ["gfx9"],
7597   "map": {"at": 198992, "to": "mm"},
7598   "name": "WD_CNTL_SB_BUF_BASE"
7599  },
7600  {
7601   "chips": ["gfx9"],
7602   "map": {"at": 198996, "to": "mm"},
7603   "name": "WD_CNTL_SB_BUF_BASE_HI",
7604   "type_ref": "DB_HTILE_DATA_BASE_HI"
7605  },
7606  {
7607   "chips": ["gfx9"],
7608   "map": {"at": 199000, "to": "mm"},
7609   "name": "WD_INDEX_BUF_BASE"
7610  },
7611  {
7612   "chips": ["gfx9"],
7613   "map": {"at": 199004, "to": "mm"},
7614   "name": "WD_INDEX_BUF_BASE_HI",
7615   "type_ref": "DB_HTILE_DATA_BASE_HI"
7616  },
7617  {
7618   "chips": ["gfx9"],
7619   "map": {"at": 199008, "to": "mm"},
7620   "name": "IA_MULTI_VGT_PARAM",
7621   "type_ref": "IA_MULTI_VGT_PARAM"
7622  },
7623  {
7624   "chips": ["gfx9"],
7625   "map": {"at": 199016, "to": "mm"},
7626   "name": "VGT_INSTANCE_BASE_ID"
7627  },
7628  {
7629   "chips": ["gfx9"],
7630   "map": {"at": 199168, "to": "mm"},
7631   "name": "PA_SU_LINE_STIPPLE_VALUE",
7632   "type_ref": "PA_SU_LINE_STIPPLE_VALUE"
7633  },
7634  {
7635   "chips": ["gfx9"],
7636   "map": {"at": 199172, "to": "mm"},
7637   "name": "PA_SC_LINE_STIPPLE_STATE",
7638   "type_ref": "PA_SC_LINE_STIPPLE_STATE"
7639  },
7640  {
7641   "chips": ["gfx9"],
7642   "map": {"at": 199184, "to": "mm"},
7643   "name": "PA_SC_SCREEN_EXTENT_MIN_0",
7644   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
7645  },
7646  {
7647   "chips": ["gfx9"],
7648   "map": {"at": 199188, "to": "mm"},
7649   "name": "PA_SC_SCREEN_EXTENT_MAX_0",
7650   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
7651  },
7652  {
7653   "chips": ["gfx9"],
7654   "map": {"at": 199192, "to": "mm"},
7655   "name": "PA_SC_SCREEN_EXTENT_MIN_1",
7656   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
7657  },
7658  {
7659   "chips": ["gfx9"],
7660   "map": {"at": 199212, "to": "mm"},
7661   "name": "PA_SC_SCREEN_EXTENT_MAX_1",
7662   "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
7663  },
7664  {
7665   "chips": ["gfx9"],
7666   "map": {"at": 199296, "to": "mm"},
7667   "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",
7668   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
7669  },
7670  {
7671   "chips": ["gfx9"],
7672   "map": {"at": 199300, "to": "mm"},
7673   "name": "PA_SC_P3D_TRAP_SCREEN_H",
7674   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
7675  },
7676  {
7677   "chips": ["gfx9"],
7678   "map": {"at": 199304, "to": "mm"},
7679   "name": "PA_SC_P3D_TRAP_SCREEN_V",
7680   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
7681  },
7682  {
7683   "chips": ["gfx9"],
7684   "map": {"at": 199308, "to": "mm"},
7685   "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",
7686   "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
7687  },
7688  {
7689   "chips": ["gfx9"],
7690   "map": {"at": 199312, "to": "mm"},
7691   "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",
7692   "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
7693  },
7694  {
7695   "chips": ["gfx9"],
7696   "map": {"at": 199328, "to": "mm"},
7697   "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",
7698   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
7699  },
7700  {
7701   "chips": ["gfx9"],
7702   "map": {"at": 199332, "to": "mm"},
7703   "name": "PA_SC_HP3D_TRAP_SCREEN_H",
7704   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
7705  },
7706  {
7707   "chips": ["gfx9"],
7708   "map": {"at": 199336, "to": "mm"},
7709   "name": "PA_SC_HP3D_TRAP_SCREEN_V",
7710   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
7711  },
7712  {
7713   "chips": ["gfx9"],
7714   "map": {"at": 199340, "to": "mm"},
7715   "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",
7716   "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
7717  },
7718  {
7719   "chips": ["gfx9"],
7720   "map": {"at": 199344, "to": "mm"},
7721   "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",
7722   "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
7723  },
7724  {
7725   "chips": ["gfx9"],
7726   "map": {"at": 199360, "to": "mm"},
7727   "name": "PA_SC_TRAP_SCREEN_HV_EN",
7728   "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
7729  },
7730  {
7731   "chips": ["gfx9"],
7732   "map": {"at": 199364, "to": "mm"},
7733   "name": "PA_SC_TRAP_SCREEN_H",
7734   "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
7735  },
7736  {
7737   "chips": ["gfx9"],
7738   "map": {"at": 199368, "to": "mm"},
7739   "name": "PA_SC_TRAP_SCREEN_V",
7740   "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
7741  },
7742  {
7743   "chips": ["gfx9"],
7744   "map": {"at": 199372, "to": "mm"},
7745   "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",
7746   "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
7747  },
7748  {
7749   "chips": ["gfx9"],
7750   "map": {"at": 199376, "to": "mm"},
7751   "name": "PA_SC_TRAP_SCREEN_COUNT",
7752   "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
7753  },
7754  {
7755   "chips": ["gfx9"],
7756   "map": {"at": 199380, "to": "mm"},
7757   "name": "PA_STATE_STEREO_X"
7758  },
7759  {
7760   "chips": ["gfx9"],
7761   "map": {"at": 199872, "to": "mm"},
7762   "name": "SQ_THREAD_TRACE_BASE"
7763  },
7764  {
7765   "chips": ["gfx9"],
7766   "map": {"at": 199876, "to": "mm"},
7767   "name": "SQ_THREAD_TRACE_SIZE",
7768   "type_ref": "SQ_THREAD_TRACE_SIZE"
7769  },
7770  {
7771   "chips": ["gfx9"],
7772   "map": {"at": 199880, "to": "mm"},
7773   "name": "SQ_THREAD_TRACE_MASK",
7774   "type_ref": "SQ_THREAD_TRACE_MASK"
7775  },
7776  {
7777   "chips": ["gfx9"],
7778   "map": {"at": 199884, "to": "mm"},
7779   "name": "SQ_THREAD_TRACE_TOKEN_MASK",
7780   "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK"
7781  },
7782  {
7783   "chips": ["gfx9"],
7784   "map": {"at": 199888, "to": "mm"},
7785   "name": "SQ_THREAD_TRACE_PERF_MASK",
7786   "type_ref": "SQ_THREAD_TRACE_PERF_MASK"
7787  },
7788  {
7789   "chips": ["gfx9"],
7790   "map": {"at": 199892, "to": "mm"},
7791   "name": "SQ_THREAD_TRACE_CTRL",
7792   "type_ref": "SQ_THREAD_TRACE_CTRL"
7793  },
7794  {
7795   "chips": ["gfx9"],
7796   "map": {"at": 199896, "to": "mm"},
7797   "name": "SQ_THREAD_TRACE_MODE",
7798   "type_ref": "SQ_THREAD_TRACE_MODE"
7799  },
7800  {
7801   "chips": ["gfx9"],
7802   "map": {"at": 199900, "to": "mm"},
7803   "name": "SQ_THREAD_TRACE_BASE2",
7804   "type_ref": "SQ_THREAD_TRACE_BASE2"
7805  },
7806  {
7807   "chips": ["gfx9"],
7808   "map": {"at": 199904, "to": "mm"},
7809   "name": "SQ_THREAD_TRACE_TOKEN_MASK2"
7810  },
7811  {
7812   "chips": ["gfx9"],
7813   "map": {"at": 199908, "to": "mm"},
7814   "name": "SQ_THREAD_TRACE_WPTR",
7815   "type_ref": "SQ_THREAD_TRACE_WPTR"
7816  },
7817  {
7818   "chips": ["gfx9"],
7819   "map": {"at": 199912, "to": "mm"},
7820   "name": "SQ_THREAD_TRACE_STATUS",
7821   "type_ref": "SQ_THREAD_TRACE_STATUS"
7822  },
7823  {
7824   "chips": ["gfx9"],
7825   "map": {"at": 199916, "to": "mm"},
7826   "name": "SQ_THREAD_TRACE_HIWATER",
7827   "type_ref": "SQ_THREAD_TRACE_HIWATER"
7828  },
7829  {
7830   "chips": ["gfx9"],
7831   "map": {"at": 199920, "to": "mm"},
7832   "name": "SQ_THREAD_TRACE_CNTR"
7833  },
7834  {
7835   "chips": ["gfx9"],
7836   "map": {"at": 199936, "to": "mm"},
7837   "name": "SQ_THREAD_TRACE_USERDATA_0"
7838  },
7839  {
7840   "chips": ["gfx9"],
7841   "map": {"at": 199940, "to": "mm"},
7842   "name": "SQ_THREAD_TRACE_USERDATA_1"
7843  },
7844  {
7845   "chips": ["gfx9"],
7846   "map": {"at": 199944, "to": "mm"},
7847   "name": "SQ_THREAD_TRACE_USERDATA_2"
7848  },
7849  {
7850   "chips": ["gfx9"],
7851   "map": {"at": 199948, "to": "mm"},
7852   "name": "SQ_THREAD_TRACE_USERDATA_3"
7853  },
7854  {
7855   "chips": ["gfx9"],
7856   "map": {"at": 199968, "to": "mm"},
7857   "name": "SQC_CACHES",
7858   "type_ref": "SQC_CACHES"
7859  },
7860  {
7861   "chips": ["gfx9"],
7862   "map": {"at": 199972, "to": "mm"},
7863   "name": "SQC_WRITEBACK",
7864   "type_ref": "SQC_WRITEBACK"
7865  },
7866  {
7867   "chips": ["gfx9"],
7868   "map": {"at": 200192, "to": "mm"},
7869   "name": "TA_CS_BC_BASE_ADDR"
7870  },
7871  {
7872   "chips": ["gfx9"],
7873   "map": {"at": 200196, "to": "mm"},
7874   "name": "TA_CS_BC_BASE_ADDR_HI",
7875   "type_ref": "TA_BC_BASE_ADDR_HI"
7876  },
7877  {
7878   "chips": ["gfx9"],
7879   "map": {"at": 200448, "to": "mm"},
7880   "name": "DB_OCCLUSION_COUNT0_LOW"
7881  },
7882  {
7883   "chips": ["gfx9"],
7884   "map": {"at": 200452, "to": "mm"},
7885   "name": "DB_OCCLUSION_COUNT0_HI",
7886   "type_ref": "DB_OCCLUSION_COUNT0_HI"
7887  },
7888  {
7889   "chips": ["gfx9"],
7890   "map": {"at": 200456, "to": "mm"},
7891   "name": "DB_OCCLUSION_COUNT1_LOW"
7892  },
7893  {
7894   "chips": ["gfx9"],
7895   "map": {"at": 200460, "to": "mm"},
7896   "name": "DB_OCCLUSION_COUNT1_HI",
7897   "type_ref": "DB_OCCLUSION_COUNT0_HI"
7898  },
7899  {
7900   "chips": ["gfx9"],
7901   "map": {"at": 200464, "to": "mm"},
7902   "name": "DB_OCCLUSION_COUNT2_LOW"
7903  },
7904  {
7905   "chips": ["gfx9"],
7906   "map": {"at": 200468, "to": "mm"},
7907   "name": "DB_OCCLUSION_COUNT2_HI",
7908   "type_ref": "DB_OCCLUSION_COUNT0_HI"
7909  },
7910  {
7911   "chips": ["gfx9"],
7912   "map": {"at": 200472, "to": "mm"},
7913   "name": "DB_OCCLUSION_COUNT3_LOW"
7914  },
7915  {
7916   "chips": ["gfx9"],
7917   "map": {"at": 200476, "to": "mm"},
7918   "name": "DB_OCCLUSION_COUNT3_HI",
7919   "type_ref": "DB_OCCLUSION_COUNT0_HI"
7920  },
7921  {
7922   "chips": ["gfx9"],
7923   "map": {"at": 200696, "to": "mm"},
7924   "name": "DB_ZPASS_COUNT_LOW"
7925  },
7926  {
7927   "chips": ["gfx9"],
7928   "map": {"at": 200700, "to": "mm"},
7929   "name": "DB_ZPASS_COUNT_HI",
7930   "type_ref": "DB_OCCLUSION_COUNT0_HI"
7931  },
7932  {
7933   "chips": ["gfx9"],
7934   "map": {"at": 200704, "to": "mm"},
7935   "name": "GDS_RD_ADDR"
7936  },
7937  {
7938   "chips": ["gfx9"],
7939   "map": {"at": 200708, "to": "mm"},
7940   "name": "GDS_RD_DATA"
7941  },
7942  {
7943   "chips": ["gfx9"],
7944   "map": {"at": 200712, "to": "mm"},
7945   "name": "GDS_RD_BURST_ADDR"
7946  },
7947  {
7948   "chips": ["gfx9"],
7949   "map": {"at": 200716, "to": "mm"},
7950   "name": "GDS_RD_BURST_COUNT"
7951  },
7952  {
7953   "chips": ["gfx9"],
7954   "map": {"at": 200720, "to": "mm"},
7955   "name": "GDS_RD_BURST_DATA"
7956  },
7957  {
7958   "chips": ["gfx9"],
7959   "map": {"at": 200724, "to": "mm"},
7960   "name": "GDS_WR_ADDR"
7961  },
7962  {
7963   "chips": ["gfx9"],
7964   "map": {"at": 200728, "to": "mm"},
7965   "name": "GDS_WR_DATA"
7966  },
7967  {
7968   "chips": ["gfx9"],
7969   "map": {"at": 200732, "to": "mm"},
7970   "name": "GDS_WR_BURST_ADDR"
7971  },
7972  {
7973   "chips": ["gfx9"],
7974   "map": {"at": 200736, "to": "mm"},
7975   "name": "GDS_WR_BURST_DATA"
7976  },
7977  {
7978   "chips": ["gfx9"],
7979   "map": {"at": 200740, "to": "mm"},
7980   "name": "GDS_WRITE_COMPLETE"
7981  },
7982  {
7983   "chips": ["gfx9"],
7984   "map": {"at": 200744, "to": "mm"},
7985   "name": "GDS_ATOM_CNTL",
7986   "type_ref": "GDS_ATOM_CNTL"
7987  },
7988  {
7989   "chips": ["gfx9"],
7990   "map": {"at": 200748, "to": "mm"},
7991   "name": "GDS_ATOM_COMPLETE",
7992   "type_ref": "GDS_ATOM_COMPLETE"
7993  },
7994  {
7995   "chips": ["gfx9"],
7996   "map": {"at": 200752, "to": "mm"},
7997   "name": "GDS_ATOM_BASE",
7998   "type_ref": "GDS_ATOM_BASE"
7999  },
8000  {
8001   "chips": ["gfx9"],
8002   "map": {"at": 200756, "to": "mm"},
8003   "name": "GDS_ATOM_SIZE",
8004   "type_ref": "GDS_ATOM_SIZE"
8005  },
8006  {
8007   "chips": ["gfx9"],
8008   "map": {"at": 200760, "to": "mm"},
8009   "name": "GDS_ATOM_OFFSET0",
8010   "type_ref": "GDS_ATOM_OFFSET0"
8011  },
8012  {
8013   "chips": ["gfx9"],
8014   "map": {"at": 200764, "to": "mm"},
8015   "name": "GDS_ATOM_OFFSET1",
8016   "type_ref": "GDS_ATOM_OFFSET1"
8017  },
8018  {
8019   "chips": ["gfx9"],
8020   "map": {"at": 200768, "to": "mm"},
8021   "name": "GDS_ATOM_DST"
8022  },
8023  {
8024   "chips": ["gfx9"],
8025   "map": {"at": 200772, "to": "mm"},
8026   "name": "GDS_ATOM_OP",
8027   "type_ref": "GDS_ATOM_OP"
8028  },
8029  {
8030   "chips": ["gfx9"],
8031   "map": {"at": 200776, "to": "mm"},
8032   "name": "GDS_ATOM_SRC0"
8033  },
8034  {
8035   "chips": ["gfx9"],
8036   "map": {"at": 200780, "to": "mm"},
8037   "name": "GDS_ATOM_SRC0_U"
8038  },
8039  {
8040   "chips": ["gfx9"],
8041   "map": {"at": 200784, "to": "mm"},
8042   "name": "GDS_ATOM_SRC1"
8043  },
8044  {
8045   "chips": ["gfx9"],
8046   "map": {"at": 200788, "to": "mm"},
8047   "name": "GDS_ATOM_SRC1_U"
8048  },
8049  {
8050   "chips": ["gfx9"],
8051   "map": {"at": 200792, "to": "mm"},
8052   "name": "GDS_ATOM_READ0"
8053  },
8054  {
8055   "chips": ["gfx9"],
8056   "map": {"at": 200796, "to": "mm"},
8057   "name": "GDS_ATOM_READ0_U"
8058  },
8059  {
8060   "chips": ["gfx9"],
8061   "map": {"at": 200800, "to": "mm"},
8062   "name": "GDS_ATOM_READ1"
8063  },
8064  {
8065   "chips": ["gfx9"],
8066   "map": {"at": 200804, "to": "mm"},
8067   "name": "GDS_ATOM_READ1_U"
8068  },
8069  {
8070   "chips": ["gfx9"],
8071   "map": {"at": 200808, "to": "mm"},
8072   "name": "GDS_GWS_RESOURCE_CNTL",
8073   "type_ref": "GDS_GWS_RESOURCE_CNTL"
8074  },
8075  {
8076   "chips": ["gfx9"],
8077   "map": {"at": 200812, "to": "mm"},
8078   "name": "GDS_GWS_RESOURCE",
8079   "type_ref": "GDS_GWS_RESOURCE"
8080  },
8081  {
8082   "chips": ["gfx9"],
8083   "map": {"at": 200816, "to": "mm"},
8084   "name": "GDS_GWS_RESOURCE_CNT",
8085   "type_ref": "GDS_GWS_RESOURCE_CNT"
8086  },
8087  {
8088   "chips": ["gfx9"],
8089   "map": {"at": 200820, "to": "mm"},
8090   "name": "GDS_OA_CNTL",
8091   "type_ref": "GDS_OA_CNTL"
8092  },
8093  {
8094   "chips": ["gfx9"],
8095   "map": {"at": 200824, "to": "mm"},
8096   "name": "GDS_OA_COUNTER"
8097  },
8098  {
8099   "chips": ["gfx9"],
8100   "map": {"at": 200828, "to": "mm"},
8101   "name": "GDS_OA_ADDRESS",
8102   "type_ref": "GDS_OA_ADDRESS"
8103  },
8104  {
8105   "chips": ["gfx9"],
8106   "map": {"at": 200832, "to": "mm"},
8107   "name": "GDS_OA_INCDEC",
8108   "type_ref": "GDS_OA_INCDEC"
8109  },
8110  {
8111   "chips": ["gfx9"],
8112   "map": {"at": 200836, "to": "mm"},
8113   "name": "GDS_OA_RING_SIZE"
8114  },
8115  {
8116   "chips": ["gfx9"],
8117   "map": {"at": 200960, "to": "mm"},
8118   "name": "SPI_CONFIG_CNTL",
8119   "type_ref": "SPI_CONFIG_CNTL"
8120  },
8121  {
8122   "chips": ["gfx9"],
8123   "map": {"at": 200964, "to": "mm"},
8124   "name": "SPI_CONFIG_CNTL_1",
8125   "type_ref": "SPI_CONFIG_CNTL_1"
8126  },
8127  {
8128   "chips": ["gfx9"],
8129   "map": {"at": 200968, "to": "mm"},
8130   "name": "SPI_CONFIG_CNTL_2",
8131   "type_ref": "SPI_CONFIG_CNTL_2"
8132  },
8133  {
8134   "chips": ["gfx9"],
8135   "map": {"at": 200972, "to": "mm"},
8136   "name": "SPI_WAVE_LIMIT_CNTL",
8137   "type_ref": "SPI_WAVE_LIMIT_CNTL"
8138  },
8139  {
8140   "chips": ["gfx9"],
8141   "map": {"at": 212992, "to": "mm"},
8142   "name": "CPG_PERFCOUNTER1_LO"
8143  },
8144  {
8145   "chips": ["gfx9"],
8146   "map": {"at": 212996, "to": "mm"},
8147   "name": "CPG_PERFCOUNTER1_HI"
8148  },
8149  {
8150   "chips": ["gfx9"],
8151   "map": {"at": 213000, "to": "mm"},
8152   "name": "CPG_PERFCOUNTER0_LO"
8153  },
8154  {
8155   "chips": ["gfx9"],
8156   "map": {"at": 213004, "to": "mm"},
8157   "name": "CPG_PERFCOUNTER0_HI"
8158  },
8159  {
8160   "chips": ["gfx9"],
8161   "map": {"at": 213008, "to": "mm"},
8162   "name": "CPC_PERFCOUNTER1_LO"
8163  },
8164  {
8165   "chips": ["gfx9"],
8166   "map": {"at": 213012, "to": "mm"},
8167   "name": "CPC_PERFCOUNTER1_HI"
8168  },
8169  {
8170   "chips": ["gfx9"],
8171   "map": {"at": 213016, "to": "mm"},
8172   "name": "CPC_PERFCOUNTER0_LO"
8173  },
8174  {
8175   "chips": ["gfx9"],
8176   "map": {"at": 213020, "to": "mm"},
8177   "name": "CPC_PERFCOUNTER0_HI"
8178  },
8179  {
8180   "chips": ["gfx9"],
8181   "map": {"at": 213024, "to": "mm"},
8182   "name": "CPF_PERFCOUNTER1_LO"
8183  },
8184  {
8185   "chips": ["gfx9"],
8186   "map": {"at": 213028, "to": "mm"},
8187   "name": "CPF_PERFCOUNTER1_HI"
8188  },
8189  {
8190   "chips": ["gfx9"],
8191   "map": {"at": 213032, "to": "mm"},
8192   "name": "CPF_PERFCOUNTER0_LO"
8193  },
8194  {
8195   "chips": ["gfx9"],
8196   "map": {"at": 213036, "to": "mm"},
8197   "name": "CPF_PERFCOUNTER0_HI"
8198  },
8199  {
8200   "chips": ["gfx9"],
8201   "map": {"at": 213040, "to": "mm"},
8202   "name": "CPF_LATENCY_STATS_DATA"
8203  },
8204  {
8205   "chips": ["gfx9"],
8206   "map": {"at": 213044, "to": "mm"},
8207   "name": "CPG_LATENCY_STATS_DATA"
8208  },
8209  {
8210   "chips": ["gfx9"],
8211   "map": {"at": 213048, "to": "mm"},
8212   "name": "CPC_LATENCY_STATS_DATA"
8213  },
8214  {
8215   "chips": ["gfx9"],
8216   "map": {"at": 213248, "to": "mm"},
8217   "name": "GRBM_PERFCOUNTER0_LO"
8218  },
8219  {
8220   "chips": ["gfx9"],
8221   "map": {"at": 213252, "to": "mm"},
8222   "name": "GRBM_PERFCOUNTER0_HI"
8223  },
8224  {
8225   "chips": ["gfx9"],
8226   "map": {"at": 213260, "to": "mm"},
8227   "name": "GRBM_PERFCOUNTER1_LO"
8228  },
8229  {
8230   "chips": ["gfx9"],
8231   "map": {"at": 213264, "to": "mm"},
8232   "name": "GRBM_PERFCOUNTER1_HI"
8233  },
8234  {
8235   "chips": ["gfx9"],
8236   "map": {"at": 213268, "to": "mm"},
8237   "name": "GRBM_SE0_PERFCOUNTER_LO"
8238  },
8239  {
8240   "chips": ["gfx9"],
8241   "map": {"at": 213272, "to": "mm"},
8242   "name": "GRBM_SE0_PERFCOUNTER_HI"
8243  },
8244  {
8245   "chips": ["gfx9"],
8246   "map": {"at": 213276, "to": "mm"},
8247   "name": "GRBM_SE1_PERFCOUNTER_LO"
8248  },
8249  {
8250   "chips": ["gfx9"],
8251   "map": {"at": 213280, "to": "mm"},
8252   "name": "GRBM_SE1_PERFCOUNTER_HI"
8253  },
8254  {
8255   "chips": ["gfx9"],
8256   "map": {"at": 213284, "to": "mm"},
8257   "name": "GRBM_SE2_PERFCOUNTER_LO"
8258  },
8259  {
8260   "chips": ["gfx9"],
8261   "map": {"at": 213288, "to": "mm"},
8262   "name": "GRBM_SE2_PERFCOUNTER_HI"
8263  },
8264  {
8265   "chips": ["gfx9"],
8266   "map": {"at": 213292, "to": "mm"},
8267   "name": "GRBM_SE3_PERFCOUNTER_LO"
8268  },
8269  {
8270   "chips": ["gfx9"],
8271   "map": {"at": 213296, "to": "mm"},
8272   "name": "GRBM_SE3_PERFCOUNTER_HI"
8273  },
8274  {
8275   "chips": ["gfx9"],
8276   "map": {"at": 213504, "to": "mm"},
8277   "name": "WD_PERFCOUNTER0_LO"
8278  },
8279  {
8280   "chips": ["gfx9"],
8281   "map": {"at": 213508, "to": "mm"},
8282   "name": "WD_PERFCOUNTER0_HI"
8283  },
8284  {
8285   "chips": ["gfx9"],
8286   "map": {"at": 213512, "to": "mm"},
8287   "name": "WD_PERFCOUNTER1_LO"
8288  },
8289  {
8290   "chips": ["gfx9"],
8291   "map": {"at": 213516, "to": "mm"},
8292   "name": "WD_PERFCOUNTER1_HI"
8293  },
8294  {
8295   "chips": ["gfx9"],
8296   "map": {"at": 213520, "to": "mm"},
8297   "name": "WD_PERFCOUNTER2_LO"
8298  },
8299  {
8300   "chips": ["gfx9"],
8301   "map": {"at": 213524, "to": "mm"},
8302   "name": "WD_PERFCOUNTER2_HI"
8303  },
8304  {
8305   "chips": ["gfx9"],
8306   "map": {"at": 213528, "to": "mm"},
8307   "name": "WD_PERFCOUNTER3_LO"
8308  },
8309  {
8310   "chips": ["gfx9"],
8311   "map": {"at": 213532, "to": "mm"},
8312   "name": "WD_PERFCOUNTER3_HI"
8313  },
8314  {
8315   "chips": ["gfx9"],
8316   "map": {"at": 213536, "to": "mm"},
8317   "name": "IA_PERFCOUNTER0_LO"
8318  },
8319  {
8320   "chips": ["gfx9"],
8321   "map": {"at": 213540, "to": "mm"},
8322   "name": "IA_PERFCOUNTER0_HI"
8323  },
8324  {
8325   "chips": ["gfx9"],
8326   "map": {"at": 213544, "to": "mm"},
8327   "name": "IA_PERFCOUNTER1_LO"
8328  },
8329  {
8330   "chips": ["gfx9"],
8331   "map": {"at": 213548, "to": "mm"},
8332   "name": "IA_PERFCOUNTER1_HI"
8333  },
8334  {
8335   "chips": ["gfx9"],
8336   "map": {"at": 213552, "to": "mm"},
8337   "name": "IA_PERFCOUNTER2_LO"
8338  },
8339  {
8340   "chips": ["gfx9"],
8341   "map": {"at": 213556, "to": "mm"},
8342   "name": "IA_PERFCOUNTER2_HI"
8343  },
8344  {
8345   "chips": ["gfx9"],
8346   "map": {"at": 213560, "to": "mm"},
8347   "name": "IA_PERFCOUNTER3_LO"
8348  },
8349  {
8350   "chips": ["gfx9"],
8351   "map": {"at": 213564, "to": "mm"},
8352   "name": "IA_PERFCOUNTER3_HI"
8353  },
8354  {
8355   "chips": ["gfx9"],
8356   "map": {"at": 213568, "to": "mm"},
8357   "name": "VGT_PERFCOUNTER0_LO"
8358  },
8359  {
8360   "chips": ["gfx9"],
8361   "map": {"at": 213572, "to": "mm"},
8362   "name": "VGT_PERFCOUNTER0_HI"
8363  },
8364  {
8365   "chips": ["gfx9"],
8366   "map": {"at": 213576, "to": "mm"},
8367   "name": "VGT_PERFCOUNTER1_LO"
8368  },
8369  {
8370   "chips": ["gfx9"],
8371   "map": {"at": 213580, "to": "mm"},
8372   "name": "VGT_PERFCOUNTER1_HI"
8373  },
8374  {
8375   "chips": ["gfx9"],
8376   "map": {"at": 213584, "to": "mm"},
8377   "name": "VGT_PERFCOUNTER2_LO"
8378  },
8379  {
8380   "chips": ["gfx9"],
8381   "map": {"at": 213588, "to": "mm"},
8382   "name": "VGT_PERFCOUNTER2_HI"
8383  },
8384  {
8385   "chips": ["gfx9"],
8386   "map": {"at": 213592, "to": "mm"},
8387   "name": "VGT_PERFCOUNTER3_LO"
8388  },
8389  {
8390   "chips": ["gfx9"],
8391   "map": {"at": 213596, "to": "mm"},
8392   "name": "VGT_PERFCOUNTER3_HI"
8393  },
8394  {
8395   "chips": ["gfx9"],
8396   "map": {"at": 214016, "to": "mm"},
8397   "name": "PA_SU_PERFCOUNTER0_LO"
8398  },
8399  {
8400   "chips": ["gfx9"],
8401   "map": {"at": 214020, "to": "mm"},
8402   "name": "PA_SU_PERFCOUNTER0_HI",
8403   "type_ref": "PA_SU_PERFCOUNTER0_HI"
8404  },
8405  {
8406   "chips": ["gfx9"],
8407   "map": {"at": 214024, "to": "mm"},
8408   "name": "PA_SU_PERFCOUNTER1_LO"
8409  },
8410  {
8411   "chips": ["gfx9"],
8412   "map": {"at": 214028, "to": "mm"},
8413   "name": "PA_SU_PERFCOUNTER1_HI",
8414   "type_ref": "PA_SU_PERFCOUNTER0_HI"
8415  },
8416  {
8417   "chips": ["gfx9"],
8418   "map": {"at": 214032, "to": "mm"},
8419   "name": "PA_SU_PERFCOUNTER2_LO"
8420  },
8421  {
8422   "chips": ["gfx9"],
8423   "map": {"at": 214036, "to": "mm"},
8424   "name": "PA_SU_PERFCOUNTER2_HI",
8425   "type_ref": "PA_SU_PERFCOUNTER0_HI"
8426  },
8427  {
8428   "chips": ["gfx9"],
8429   "map": {"at": 214040, "to": "mm"},
8430   "name": "PA_SU_PERFCOUNTER3_LO"
8431  },
8432  {
8433   "chips": ["gfx9"],
8434   "map": {"at": 214044, "to": "mm"},
8435   "name": "PA_SU_PERFCOUNTER3_HI",
8436   "type_ref": "PA_SU_PERFCOUNTER0_HI"
8437  },
8438  {
8439   "chips": ["gfx9"],
8440   "map": {"at": 214272, "to": "mm"},
8441   "name": "PA_SC_PERFCOUNTER0_LO"
8442  },
8443  {
8444   "chips": ["gfx9"],
8445   "map": {"at": 214276, "to": "mm"},
8446   "name": "PA_SC_PERFCOUNTER0_HI"
8447  },
8448  {
8449   "chips": ["gfx9"],
8450   "map": {"at": 214280, "to": "mm"},
8451   "name": "PA_SC_PERFCOUNTER1_LO"
8452  },
8453  {
8454   "chips": ["gfx9"],
8455   "map": {"at": 214284, "to": "mm"},
8456   "name": "PA_SC_PERFCOUNTER1_HI"
8457  },
8458  {
8459   "chips": ["gfx9"],
8460   "map": {"at": 214288, "to": "mm"},
8461   "name": "PA_SC_PERFCOUNTER2_LO"
8462  },
8463  {
8464   "chips": ["gfx9"],
8465   "map": {"at": 214292, "to": "mm"},
8466   "name": "PA_SC_PERFCOUNTER2_HI"
8467  },
8468  {
8469   "chips": ["gfx9"],
8470   "map": {"at": 214296, "to": "mm"},
8471   "name": "PA_SC_PERFCOUNTER3_LO"
8472  },
8473  {
8474   "chips": ["gfx9"],
8475   "map": {"at": 214300, "to": "mm"},
8476   "name": "PA_SC_PERFCOUNTER3_HI"
8477  },
8478  {
8479   "chips": ["gfx9"],
8480   "map": {"at": 214304, "to": "mm"},
8481   "name": "PA_SC_PERFCOUNTER4_LO"
8482  },
8483  {
8484   "chips": ["gfx9"],
8485   "map": {"at": 214308, "to": "mm"},
8486   "name": "PA_SC_PERFCOUNTER4_HI"
8487  },
8488  {
8489   "chips": ["gfx9"],
8490   "map": {"at": 214312, "to": "mm"},
8491   "name": "PA_SC_PERFCOUNTER5_LO"
8492  },
8493  {
8494   "chips": ["gfx9"],
8495   "map": {"at": 214316, "to": "mm"},
8496   "name": "PA_SC_PERFCOUNTER5_HI"
8497  },
8498  {
8499   "chips": ["gfx9"],
8500   "map": {"at": 214320, "to": "mm"},
8501   "name": "PA_SC_PERFCOUNTER6_LO"
8502  },
8503  {
8504   "chips": ["gfx9"],
8505   "map": {"at": 214324, "to": "mm"},
8506   "name": "PA_SC_PERFCOUNTER6_HI"
8507  },
8508  {
8509   "chips": ["gfx9"],
8510   "map": {"at": 214328, "to": "mm"},
8511   "name": "PA_SC_PERFCOUNTER7_LO"
8512  },
8513  {
8514   "chips": ["gfx9"],
8515   "map": {"at": 214332, "to": "mm"},
8516   "name": "PA_SC_PERFCOUNTER7_HI"
8517  },
8518  {
8519   "chips": ["gfx9"],
8520   "map": {"at": 214528, "to": "mm"},
8521   "name": "SPI_PERFCOUNTER0_HI"
8522  },
8523  {
8524   "chips": ["gfx9"],
8525   "map": {"at": 214532, "to": "mm"},
8526   "name": "SPI_PERFCOUNTER0_LO"
8527  },
8528  {
8529   "chips": ["gfx9"],
8530   "map": {"at": 214536, "to": "mm"},
8531   "name": "SPI_PERFCOUNTER1_HI"
8532  },
8533  {
8534   "chips": ["gfx9"],
8535   "map": {"at": 214540, "to": "mm"},
8536   "name": "SPI_PERFCOUNTER1_LO"
8537  },
8538  {
8539   "chips": ["gfx9"],
8540   "map": {"at": 214544, "to": "mm"},
8541   "name": "SPI_PERFCOUNTER2_HI"
8542  },
8543  {
8544   "chips": ["gfx9"],
8545   "map": {"at": 214548, "to": "mm"},
8546   "name": "SPI_PERFCOUNTER2_LO"
8547  },
8548  {
8549   "chips": ["gfx9"],
8550   "map": {"at": 214552, "to": "mm"},
8551   "name": "SPI_PERFCOUNTER3_HI"
8552  },
8553  {
8554   "chips": ["gfx9"],
8555   "map": {"at": 214556, "to": "mm"},
8556   "name": "SPI_PERFCOUNTER3_LO"
8557  },
8558  {
8559   "chips": ["gfx9"],
8560   "map": {"at": 214560, "to": "mm"},
8561   "name": "SPI_PERFCOUNTER4_HI"
8562  },
8563  {
8564   "chips": ["gfx9"],
8565   "map": {"at": 214564, "to": "mm"},
8566   "name": "SPI_PERFCOUNTER4_LO"
8567  },
8568  {
8569   "chips": ["gfx9"],
8570   "map": {"at": 214568, "to": "mm"},
8571   "name": "SPI_PERFCOUNTER5_HI"
8572  },
8573  {
8574   "chips": ["gfx9"],
8575   "map": {"at": 214572, "to": "mm"},
8576   "name": "SPI_PERFCOUNTER5_LO"
8577  },
8578  {
8579   "chips": ["gfx9"],
8580   "map": {"at": 214784, "to": "mm"},
8581   "name": "SQ_PERFCOUNTER0_LO"
8582  },
8583  {
8584   "chips": ["gfx9"],
8585   "map": {"at": 214788, "to": "mm"},
8586   "name": "SQ_PERFCOUNTER0_HI"
8587  },
8588  {
8589   "chips": ["gfx9"],
8590   "map": {"at": 214792, "to": "mm"},
8591   "name": "SQ_PERFCOUNTER1_LO"
8592  },
8593  {
8594   "chips": ["gfx9"],
8595   "map": {"at": 214796, "to": "mm"},
8596   "name": "SQ_PERFCOUNTER1_HI"
8597  },
8598  {
8599   "chips": ["gfx9"],
8600   "map": {"at": 214800, "to": "mm"},
8601   "name": "SQ_PERFCOUNTER2_LO"
8602  },
8603  {
8604   "chips": ["gfx9"],
8605   "map": {"at": 214804, "to": "mm"},
8606   "name": "SQ_PERFCOUNTER2_HI"
8607  },
8608  {
8609   "chips": ["gfx9"],
8610   "map": {"at": 214808, "to": "mm"},
8611   "name": "SQ_PERFCOUNTER3_LO"
8612  },
8613  {
8614   "chips": ["gfx9"],
8615   "map": {"at": 214812, "to": "mm"},
8616   "name": "SQ_PERFCOUNTER3_HI"
8617  },
8618  {
8619   "chips": ["gfx9"],
8620   "map": {"at": 214816, "to": "mm"},
8621   "name": "SQ_PERFCOUNTER4_LO"
8622  },
8623  {
8624   "chips": ["gfx9"],
8625   "map": {"at": 214820, "to": "mm"},
8626   "name": "SQ_PERFCOUNTER4_HI"
8627  },
8628  {
8629   "chips": ["gfx9"],
8630   "map": {"at": 214824, "to": "mm"},
8631   "name": "SQ_PERFCOUNTER5_LO"
8632  },
8633  {
8634   "chips": ["gfx9"],
8635   "map": {"at": 214828, "to": "mm"},
8636   "name": "SQ_PERFCOUNTER5_HI"
8637  },
8638  {
8639   "chips": ["gfx9"],
8640   "map": {"at": 214832, "to": "mm"},
8641   "name": "SQ_PERFCOUNTER6_LO"
8642  },
8643  {
8644   "chips": ["gfx9"],
8645   "map": {"at": 214836, "to": "mm"},
8646   "name": "SQ_PERFCOUNTER6_HI"
8647  },
8648  {
8649   "chips": ["gfx9"],
8650   "map": {"at": 214840, "to": "mm"},
8651   "name": "SQ_PERFCOUNTER7_LO"
8652  },
8653  {
8654   "chips": ["gfx9"],
8655   "map": {"at": 214844, "to": "mm"},
8656   "name": "SQ_PERFCOUNTER7_HI"
8657  },
8658  {
8659   "chips": ["gfx9"],
8660   "map": {"at": 214848, "to": "mm"},
8661   "name": "SQ_PERFCOUNTER8_LO"
8662  },
8663  {
8664   "chips": ["gfx9"],
8665   "map": {"at": 214852, "to": "mm"},
8666   "name": "SQ_PERFCOUNTER8_HI"
8667  },
8668  {
8669   "chips": ["gfx9"],
8670   "map": {"at": 214856, "to": "mm"},
8671   "name": "SQ_PERFCOUNTER9_LO"
8672  },
8673  {
8674   "chips": ["gfx9"],
8675   "map": {"at": 214860, "to": "mm"},
8676   "name": "SQ_PERFCOUNTER9_HI"
8677  },
8678  {
8679   "chips": ["gfx9"],
8680   "map": {"at": 214864, "to": "mm"},
8681   "name": "SQ_PERFCOUNTER10_LO"
8682  },
8683  {
8684   "chips": ["gfx9"],
8685   "map": {"at": 214868, "to": "mm"},
8686   "name": "SQ_PERFCOUNTER10_HI"
8687  },
8688  {
8689   "chips": ["gfx9"],
8690   "map": {"at": 214872, "to": "mm"},
8691   "name": "SQ_PERFCOUNTER11_LO"
8692  },
8693  {
8694   "chips": ["gfx9"],
8695   "map": {"at": 214876, "to": "mm"},
8696   "name": "SQ_PERFCOUNTER11_HI"
8697  },
8698  {
8699   "chips": ["gfx9"],
8700   "map": {"at": 214880, "to": "mm"},
8701   "name": "SQ_PERFCOUNTER12_LO"
8702  },
8703  {
8704   "chips": ["gfx9"],
8705   "map": {"at": 214884, "to": "mm"},
8706   "name": "SQ_PERFCOUNTER12_HI"
8707  },
8708  {
8709   "chips": ["gfx9"],
8710   "map": {"at": 214888, "to": "mm"},
8711   "name": "SQ_PERFCOUNTER13_LO"
8712  },
8713  {
8714   "chips": ["gfx9"],
8715   "map": {"at": 214892, "to": "mm"},
8716   "name": "SQ_PERFCOUNTER13_HI"
8717  },
8718  {
8719   "chips": ["gfx9"],
8720   "map": {"at": 214896, "to": "mm"},
8721   "name": "SQ_PERFCOUNTER14_LO"
8722  },
8723  {
8724   "chips": ["gfx9"],
8725   "map": {"at": 214900, "to": "mm"},
8726   "name": "SQ_PERFCOUNTER14_HI"
8727  },
8728  {
8729   "chips": ["gfx9"],
8730   "map": {"at": 214904, "to": "mm"},
8731   "name": "SQ_PERFCOUNTER15_LO"
8732  },
8733  {
8734   "chips": ["gfx9"],
8735   "map": {"at": 214908, "to": "mm"},
8736   "name": "SQ_PERFCOUNTER15_HI"
8737  },
8738  {
8739   "chips": ["gfx9"],
8740   "map": {"at": 215296, "to": "mm"},
8741   "name": "SX_PERFCOUNTER0_LO"
8742  },
8743  {
8744   "chips": ["gfx9"],
8745   "map": {"at": 215300, "to": "mm"},
8746   "name": "SX_PERFCOUNTER0_HI"
8747  },
8748  {
8749   "chips": ["gfx9"],
8750   "map": {"at": 215304, "to": "mm"},
8751   "name": "SX_PERFCOUNTER1_LO"
8752  },
8753  {
8754   "chips": ["gfx9"],
8755   "map": {"at": 215308, "to": "mm"},
8756   "name": "SX_PERFCOUNTER1_HI"
8757  },
8758  {
8759   "chips": ["gfx9"],
8760   "map": {"at": 215312, "to": "mm"},
8761   "name": "SX_PERFCOUNTER2_LO"
8762  },
8763  {
8764   "chips": ["gfx9"],
8765   "map": {"at": 215316, "to": "mm"},
8766   "name": "SX_PERFCOUNTER2_HI"
8767  },
8768  {
8769   "chips": ["gfx9"],
8770   "map": {"at": 215320, "to": "mm"},
8771   "name": "SX_PERFCOUNTER3_LO"
8772  },
8773  {
8774   "chips": ["gfx9"],
8775   "map": {"at": 215324, "to": "mm"},
8776   "name": "SX_PERFCOUNTER3_HI"
8777  },
8778  {
8779   "chips": ["gfx9"],
8780   "map": {"at": 215552, "to": "mm"},
8781   "name": "GDS_PERFCOUNTER0_LO"
8782  },
8783  {
8784   "chips": ["gfx9"],
8785   "map": {"at": 215556, "to": "mm"},
8786   "name": "GDS_PERFCOUNTER0_HI"
8787  },
8788  {
8789   "chips": ["gfx9"],
8790   "map": {"at": 215560, "to": "mm"},
8791   "name": "GDS_PERFCOUNTER1_LO"
8792  },
8793  {
8794   "chips": ["gfx9"],
8795   "map": {"at": 215564, "to": "mm"},
8796   "name": "GDS_PERFCOUNTER1_HI"
8797  },
8798  {
8799   "chips": ["gfx9"],
8800   "map": {"at": 215568, "to": "mm"},
8801   "name": "GDS_PERFCOUNTER2_LO"
8802  },
8803  {
8804   "chips": ["gfx9"],
8805   "map": {"at": 215572, "to": "mm"},
8806   "name": "GDS_PERFCOUNTER2_HI"
8807  },
8808  {
8809   "chips": ["gfx9"],
8810   "map": {"at": 215576, "to": "mm"},
8811   "name": "GDS_PERFCOUNTER3_LO"
8812  },
8813  {
8814   "chips": ["gfx9"],
8815   "map": {"at": 215580, "to": "mm"},
8816   "name": "GDS_PERFCOUNTER3_HI"
8817  },
8818  {
8819   "chips": ["gfx9"],
8820   "map": {"at": 215808, "to": "mm"},
8821   "name": "TA_PERFCOUNTER0_LO"
8822  },
8823  {
8824   "chips": ["gfx9"],
8825   "map": {"at": 215812, "to": "mm"},
8826   "name": "TA_PERFCOUNTER0_HI"
8827  },
8828  {
8829   "chips": ["gfx9"],
8830   "map": {"at": 215816, "to": "mm"},
8831   "name": "TA_PERFCOUNTER1_LO"
8832  },
8833  {
8834   "chips": ["gfx9"],
8835   "map": {"at": 215820, "to": "mm"},
8836   "name": "TA_PERFCOUNTER1_HI"
8837  },
8838  {
8839   "chips": ["gfx9"],
8840   "map": {"at": 216064, "to": "mm"},
8841   "name": "TD_PERFCOUNTER0_LO"
8842  },
8843  {
8844   "chips": ["gfx9"],
8845   "map": {"at": 216068, "to": "mm"},
8846   "name": "TD_PERFCOUNTER0_HI"
8847  },
8848  {
8849   "chips": ["gfx9"],
8850   "map": {"at": 216072, "to": "mm"},
8851   "name": "TD_PERFCOUNTER1_LO"
8852  },
8853  {
8854   "chips": ["gfx9"],
8855   "map": {"at": 216076, "to": "mm"},
8856   "name": "TD_PERFCOUNTER1_HI"
8857  },
8858  {
8859   "chips": ["gfx9"],
8860   "map": {"at": 216320, "to": "mm"},
8861   "name": "TCP_PERFCOUNTER0_LO"
8862  },
8863  {
8864   "chips": ["gfx9"],
8865   "map": {"at": 216324, "to": "mm"},
8866   "name": "TCP_PERFCOUNTER0_HI"
8867  },
8868  {
8869   "chips": ["gfx9"],
8870   "map": {"at": 216328, "to": "mm"},
8871   "name": "TCP_PERFCOUNTER1_LO"
8872  },
8873  {
8874   "chips": ["gfx9"],
8875   "map": {"at": 216332, "to": "mm"},
8876   "name": "TCP_PERFCOUNTER1_HI"
8877  },
8878  {
8879   "chips": ["gfx9"],
8880   "map": {"at": 216336, "to": "mm"},
8881   "name": "TCP_PERFCOUNTER2_LO"
8882  },
8883  {
8884   "chips": ["gfx9"],
8885   "map": {"at": 216340, "to": "mm"},
8886   "name": "TCP_PERFCOUNTER2_HI"
8887  },
8888  {
8889   "chips": ["gfx9"],
8890   "map": {"at": 216344, "to": "mm"},
8891   "name": "TCP_PERFCOUNTER3_LO"
8892  },
8893  {
8894   "chips": ["gfx9"],
8895   "map": {"at": 216348, "to": "mm"},
8896   "name": "TCP_PERFCOUNTER3_HI"
8897  },
8898  {
8899   "chips": ["gfx9"],
8900   "map": {"at": 216576, "to": "mm"},
8901   "name": "TCC_PERFCOUNTER0_LO"
8902  },
8903  {
8904   "chips": ["gfx9"],
8905   "map": {"at": 216580, "to": "mm"},
8906   "name": "TCC_PERFCOUNTER0_HI"
8907  },
8908  {
8909   "chips": ["gfx9"],
8910   "map": {"at": 216584, "to": "mm"},
8911   "name": "TCC_PERFCOUNTER1_LO"
8912  },
8913  {
8914   "chips": ["gfx9"],
8915   "map": {"at": 216588, "to": "mm"},
8916   "name": "TCC_PERFCOUNTER1_HI"
8917  },
8918  {
8919   "chips": ["gfx9"],
8920   "map": {"at": 216592, "to": "mm"},
8921   "name": "TCC_PERFCOUNTER2_LO"
8922  },
8923  {
8924   "chips": ["gfx9"],
8925   "map": {"at": 216596, "to": "mm"},
8926   "name": "TCC_PERFCOUNTER2_HI"
8927  },
8928  {
8929   "chips": ["gfx9"],
8930   "map": {"at": 216600, "to": "mm"},
8931   "name": "TCC_PERFCOUNTER3_LO"
8932  },
8933  {
8934   "chips": ["gfx9"],
8935   "map": {"at": 216604, "to": "mm"},
8936   "name": "TCC_PERFCOUNTER3_HI"
8937  },
8938  {
8939   "chips": ["gfx9"],
8940   "map": {"at": 216640, "to": "mm"},
8941   "name": "TCA_PERFCOUNTER0_LO"
8942  },
8943  {
8944   "chips": ["gfx9"],
8945   "map": {"at": 216644, "to": "mm"},
8946   "name": "TCA_PERFCOUNTER0_HI"
8947  },
8948  {
8949   "chips": ["gfx9"],
8950   "map": {"at": 216648, "to": "mm"},
8951   "name": "TCA_PERFCOUNTER1_LO"
8952  },
8953  {
8954   "chips": ["gfx9"],
8955   "map": {"at": 216652, "to": "mm"},
8956   "name": "TCA_PERFCOUNTER1_HI"
8957  },
8958  {
8959   "chips": ["gfx9"],
8960   "map": {"at": 216656, "to": "mm"},
8961   "name": "TCA_PERFCOUNTER2_LO"
8962  },
8963  {
8964   "chips": ["gfx9"],
8965   "map": {"at": 216660, "to": "mm"},
8966   "name": "TCA_PERFCOUNTER2_HI"
8967  },
8968  {
8969   "chips": ["gfx9"],
8970   "map": {"at": 216664, "to": "mm"},
8971   "name": "TCA_PERFCOUNTER3_LO"
8972  },
8973  {
8974   "chips": ["gfx9"],
8975   "map": {"at": 216668, "to": "mm"},
8976   "name": "TCA_PERFCOUNTER3_HI"
8977  },
8978  {
8979   "chips": ["gfx9"],
8980   "map": {"at": 217112, "to": "mm"},
8981   "name": "CB_PERFCOUNTER0_LO"
8982  },
8983  {
8984   "chips": ["gfx9"],
8985   "map": {"at": 217116, "to": "mm"},
8986   "name": "CB_PERFCOUNTER0_HI"
8987  },
8988  {
8989   "chips": ["gfx9"],
8990   "map": {"at": 217120, "to": "mm"},
8991   "name": "CB_PERFCOUNTER1_LO"
8992  },
8993  {
8994   "chips": ["gfx9"],
8995   "map": {"at": 217124, "to": "mm"},
8996   "name": "CB_PERFCOUNTER1_HI"
8997  },
8998  {
8999   "chips": ["gfx9"],
9000   "map": {"at": 217128, "to": "mm"},
9001   "name": "CB_PERFCOUNTER2_LO"
9002  },
9003  {
9004   "chips": ["gfx9"],
9005   "map": {"at": 217132, "to": "mm"},
9006   "name": "CB_PERFCOUNTER2_HI"
9007  },
9008  {
9009   "chips": ["gfx9"],
9010   "map": {"at": 217136, "to": "mm"},
9011   "name": "CB_PERFCOUNTER3_LO"
9012  },
9013  {
9014   "chips": ["gfx9"],
9015   "map": {"at": 217140, "to": "mm"},
9016   "name": "CB_PERFCOUNTER3_HI"
9017  },
9018  {
9019   "chips": ["gfx9"],
9020   "map": {"at": 217344, "to": "mm"},
9021   "name": "DB_PERFCOUNTER0_LO"
9022  },
9023  {
9024   "chips": ["gfx9"],
9025   "map": {"at": 217348, "to": "mm"},
9026   "name": "DB_PERFCOUNTER0_HI"
9027  },
9028  {
9029   "chips": ["gfx9"],
9030   "map": {"at": 217352, "to": "mm"},
9031   "name": "DB_PERFCOUNTER1_LO"
9032  },
9033  {
9034   "chips": ["gfx9"],
9035   "map": {"at": 217356, "to": "mm"},
9036   "name": "DB_PERFCOUNTER1_HI"
9037  },
9038  {
9039   "chips": ["gfx9"],
9040   "map": {"at": 217360, "to": "mm"},
9041   "name": "DB_PERFCOUNTER2_LO"
9042  },
9043  {
9044   "chips": ["gfx9"],
9045   "map": {"at": 217364, "to": "mm"},
9046   "name": "DB_PERFCOUNTER2_HI"
9047  },
9048  {
9049   "chips": ["gfx9"],
9050   "map": {"at": 217368, "to": "mm"},
9051   "name": "DB_PERFCOUNTER3_LO"
9052  },
9053  {
9054   "chips": ["gfx9"],
9055   "map": {"at": 217372, "to": "mm"},
9056   "name": "DB_PERFCOUNTER3_HI"
9057  },
9058  {
9059   "chips": ["gfx9"],
9060   "map": {"at": 217600, "to": "mm"},
9061   "name": "RLC_PERFCOUNTER0_LO"
9062  },
9063  {
9064   "chips": ["gfx9"],
9065   "map": {"at": 217604, "to": "mm"},
9066   "name": "RLC_PERFCOUNTER0_HI"
9067  },
9068  {
9069   "chips": ["gfx9"],
9070   "map": {"at": 217608, "to": "mm"},
9071   "name": "RLC_PERFCOUNTER1_LO"
9072  },
9073  {
9074   "chips": ["gfx9"],
9075   "map": {"at": 217612, "to": "mm"},
9076   "name": "RLC_PERFCOUNTER1_HI"
9077  },
9078  {
9079   "chips": ["gfx9"],
9080   "map": {"at": 217856, "to": "mm"},
9081   "name": "RMI_PERFCOUNTER0_LO"
9082  },
9083  {
9084   "chips": ["gfx9"],
9085   "map": {"at": 217860, "to": "mm"},
9086   "name": "RMI_PERFCOUNTER0_HI"
9087  },
9088  {
9089   "chips": ["gfx9"],
9090   "map": {"at": 217864, "to": "mm"},
9091   "name": "RMI_PERFCOUNTER1_LO"
9092  },
9093  {
9094   "chips": ["gfx9"],
9095   "map": {"at": 217868, "to": "mm"},
9096   "name": "RMI_PERFCOUNTER1_HI"
9097  },
9098  {
9099   "chips": ["gfx9"],
9100   "map": {"at": 217872, "to": "mm"},
9101   "name": "RMI_PERFCOUNTER2_LO"
9102  },
9103  {
9104   "chips": ["gfx9"],
9105   "map": {"at": 217876, "to": "mm"},
9106   "name": "RMI_PERFCOUNTER2_HI"
9107  },
9108  {
9109   "chips": ["gfx9"],
9110   "map": {"at": 217880, "to": "mm"},
9111   "name": "RMI_PERFCOUNTER3_LO"
9112  },
9113  {
9114   "chips": ["gfx9"],
9115   "map": {"at": 217884, "to": "mm"},
9116   "name": "RMI_PERFCOUNTER3_HI"
9117  },
9118  {
9119   "chips": ["gfx9"],
9120   "map": {"at": 218112, "to": "mm"},
9121   "name": "ATC_L2_PERFCOUNTER_LO"
9122  },
9123  {
9124   "chips": ["gfx9"],
9125   "map": {"at": 218116, "to": "mm"},
9126   "name": "ATC_L2_PERFCOUNTER_HI",
9127   "type_ref": "ATC_L2_PERFCOUNTER_HI"
9128  },
9129  {
9130   "chips": ["gfx9"],
9131   "map": {"at": 218144, "to": "mm"},
9132   "name": "MC_VM_L2_PERFCOUNTER_LO"
9133  },
9134  {
9135   "chips": ["gfx9"],
9136   "map": {"at": 218148, "to": "mm"},
9137   "name": "MC_VM_L2_PERFCOUNTER_HI",
9138   "type_ref": "ATC_L2_PERFCOUNTER_HI"
9139  },
9140  {
9141   "chips": ["gfx9"],
9142   "map": {"at": 221184, "to": "mm"},
9143   "name": "CPG_PERFCOUNTER1_SELECT",
9144   "type_ref": "CPG_PERFCOUNTER1_SELECT"
9145  },
9146  {
9147   "chips": ["gfx9"],
9148   "map": {"at": 221188, "to": "mm"},
9149   "name": "CPG_PERFCOUNTER0_SELECT1",
9150   "type_ref": "CPG_PERFCOUNTER0_SELECT1"
9151  },
9152  {
9153   "chips": ["gfx9"],
9154   "map": {"at": 221192, "to": "mm"},
9155   "name": "CPG_PERFCOUNTER0_SELECT",
9156   "type_ref": "CPG_PERFCOUNTER1_SELECT"
9157  },
9158  {
9159   "chips": ["gfx9"],
9160   "map": {"at": 221196, "to": "mm"},
9161   "name": "CPC_PERFCOUNTER1_SELECT",
9162   "type_ref": "CPG_PERFCOUNTER1_SELECT"
9163  },
9164  {
9165   "chips": ["gfx9"],
9166   "map": {"at": 221200, "to": "mm"},
9167   "name": "CPC_PERFCOUNTER0_SELECT1",
9168   "type_ref": "CPG_PERFCOUNTER0_SELECT1"
9169  },
9170  {
9171   "chips": ["gfx9"],
9172   "map": {"at": 221204, "to": "mm"},
9173   "name": "CPF_PERFCOUNTER1_SELECT",
9174   "type_ref": "CPG_PERFCOUNTER1_SELECT"
9175  },
9176  {
9177   "chips": ["gfx9"],
9178   "map": {"at": 221208, "to": "mm"},
9179   "name": "CPF_PERFCOUNTER0_SELECT1",
9180   "type_ref": "CPG_PERFCOUNTER0_SELECT1"
9181  },
9182  {
9183   "chips": ["gfx9"],
9184   "map": {"at": 221212, "to": "mm"},
9185   "name": "CPF_PERFCOUNTER0_SELECT",
9186   "type_ref": "CPG_PERFCOUNTER1_SELECT"
9187  },
9188  {
9189   "chips": ["gfx9"],
9190   "map": {"at": 221216, "to": "mm"},
9191   "name": "CP_PERFMON_CNTL",
9192   "type_ref": "CP_PERFMON_CNTL"
9193  },
9194  {
9195   "chips": ["gfx9"],
9196   "map": {"at": 221220, "to": "mm"},
9197   "name": "CPC_PERFCOUNTER0_SELECT",
9198   "type_ref": "CPG_PERFCOUNTER1_SELECT"
9199  },
9200  {
9201   "chips": ["gfx9"],
9202   "map": {"at": 221224, "to": "mm"},
9203   "name": "CPF_TC_PERF_COUNTER_WINDOW_SELECT",
9204   "type_ref": "CPF_TC_PERF_COUNTER_WINDOW_SELECT"
9205  },
9206  {
9207   "chips": ["gfx9"],
9208   "map": {"at": 221228, "to": "mm"},
9209   "name": "CPG_TC_PERF_COUNTER_WINDOW_SELECT",
9210   "type_ref": "CPG_TC_PERF_COUNTER_WINDOW_SELECT"
9211  },
9212  {
9213   "chips": ["gfx9"],
9214   "map": {"at": 221232, "to": "mm"},
9215   "name": "CPF_LATENCY_STATS_SELECT",
9216   "type_ref": "CPF_LATENCY_STATS_SELECT"
9217  },
9218  {
9219   "chips": ["gfx9"],
9220   "map": {"at": 221236, "to": "mm"},
9221   "name": "CPG_LATENCY_STATS_SELECT",
9222   "type_ref": "CPG_LATENCY_STATS_SELECT"
9223  },
9224  {
9225   "chips": ["gfx9"],
9226   "map": {"at": 221240, "to": "mm"},
9227   "name": "CPC_LATENCY_STATS_SELECT",
9228   "type_ref": "CPC_LATENCY_STATS_SELECT"
9229  },
9230  {
9231   "chips": ["gfx9"],
9232   "map": {"at": 221248, "to": "mm"},
9233   "name": "CP_DRAW_OBJECT"
9234  },
9235  {
9236   "chips": ["gfx9"],
9237   "map": {"at": 221252, "to": "mm"},
9238   "name": "CP_DRAW_OBJECT_COUNTER",
9239   "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
9240  },
9241  {
9242   "chips": ["gfx9"],
9243   "map": {"at": 221256, "to": "mm"},
9244   "name": "CP_DRAW_WINDOW_MASK_HI"
9245  },
9246  {
9247   "chips": ["gfx9"],
9248   "map": {"at": 221260, "to": "mm"},
9249   "name": "CP_DRAW_WINDOW_HI"
9250  },
9251  {
9252   "chips": ["gfx9"],
9253   "map": {"at": 221264, "to": "mm"},
9254   "name": "CP_DRAW_WINDOW_LO",
9255   "type_ref": "CP_DRAW_WINDOW_LO"
9256  },
9257  {
9258   "chips": ["gfx9"],
9259   "map": {"at": 221268, "to": "mm"},
9260   "name": "CP_DRAW_WINDOW_CNTL",
9261   "type_ref": "CP_DRAW_WINDOW_CNTL"
9262  },
9263  {
9264   "chips": ["gfx9"],
9265   "map": {"at": 221440, "to": "mm"},
9266   "name": "GRBM_PERFCOUNTER0_SELECT",
9267   "type_ref": "GRBM_PERFCOUNTER0_SELECT"
9268  },
9269  {
9270   "chips": ["gfx9"],
9271   "map": {"at": 221444, "to": "mm"},
9272   "name": "GRBM_PERFCOUNTER1_SELECT",
9273   "type_ref": "GRBM_PERFCOUNTER0_SELECT"
9274  },
9275  {
9276   "chips": ["gfx9"],
9277   "map": {"at": 221448, "to": "mm"},
9278   "name": "GRBM_SE0_PERFCOUNTER_SELECT",
9279   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
9280  },
9281  {
9282   "chips": ["gfx9"],
9283   "map": {"at": 221452, "to": "mm"},
9284   "name": "GRBM_SE1_PERFCOUNTER_SELECT",
9285   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
9286  },
9287  {
9288   "chips": ["gfx9"],
9289   "map": {"at": 221456, "to": "mm"},
9290   "name": "GRBM_SE2_PERFCOUNTER_SELECT",
9291   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
9292  },
9293  {
9294   "chips": ["gfx9"],
9295   "map": {"at": 221460, "to": "mm"},
9296   "name": "GRBM_SE3_PERFCOUNTER_SELECT",
9297   "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
9298  },
9299  {
9300   "chips": ["gfx9"],
9301   "map": {"at": 221696, "to": "mm"},
9302   "name": "WD_PERFCOUNTER0_SELECT",
9303   "type_ref": "WD_PERFCOUNTER0_SELECT"
9304  },
9305  {
9306   "chips": ["gfx9"],
9307   "map": {"at": 221700, "to": "mm"},
9308   "name": "WD_PERFCOUNTER1_SELECT",
9309   "type_ref": "WD_PERFCOUNTER0_SELECT"
9310  },
9311  {
9312   "chips": ["gfx9"],
9313   "map": {"at": 221704, "to": "mm"},
9314   "name": "WD_PERFCOUNTER2_SELECT",
9315   "type_ref": "WD_PERFCOUNTER0_SELECT"
9316  },
9317  {
9318   "chips": ["gfx9"],
9319   "map": {"at": 221708, "to": "mm"},
9320   "name": "WD_PERFCOUNTER3_SELECT",
9321   "type_ref": "WD_PERFCOUNTER0_SELECT"
9322  },
9323  {
9324   "chips": ["gfx9"],
9325   "map": {"at": 221712, "to": "mm"},
9326   "name": "IA_PERFCOUNTER0_SELECT",
9327   "type_ref": "IA_PERFCOUNTER0_SELECT"
9328  },
9329  {
9330   "chips": ["gfx9"],
9331   "map": {"at": 221716, "to": "mm"},
9332   "name": "IA_PERFCOUNTER1_SELECT",
9333   "type_ref": "WD_PERFCOUNTER0_SELECT"
9334  },
9335  {
9336   "chips": ["gfx9"],
9337   "map": {"at": 221720, "to": "mm"},
9338   "name": "IA_PERFCOUNTER2_SELECT",
9339   "type_ref": "WD_PERFCOUNTER0_SELECT"
9340  },
9341  {
9342   "chips": ["gfx9"],
9343   "map": {"at": 221724, "to": "mm"},
9344   "name": "IA_PERFCOUNTER3_SELECT",
9345   "type_ref": "WD_PERFCOUNTER0_SELECT"
9346  },
9347  {
9348   "chips": ["gfx9"],
9349   "map": {"at": 221728, "to": "mm"},
9350   "name": "IA_PERFCOUNTER0_SELECT1",
9351   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9352  },
9353  {
9354   "chips": ["gfx9"],
9355   "map": {"at": 221744, "to": "mm"},
9356   "name": "VGT_PERFCOUNTER0_SELECT",
9357   "type_ref": "IA_PERFCOUNTER0_SELECT"
9358  },
9359  {
9360   "chips": ["gfx9"],
9361   "map": {"at": 221748, "to": "mm"},
9362   "name": "VGT_PERFCOUNTER1_SELECT",
9363   "type_ref": "IA_PERFCOUNTER0_SELECT"
9364  },
9365  {
9366   "chips": ["gfx9"],
9367   "map": {"at": 221752, "to": "mm"},
9368   "name": "VGT_PERFCOUNTER2_SELECT",
9369   "type_ref": "WD_PERFCOUNTER0_SELECT"
9370  },
9371  {
9372   "chips": ["gfx9"],
9373   "map": {"at": 221756, "to": "mm"},
9374   "name": "VGT_PERFCOUNTER3_SELECT",
9375   "type_ref": "WD_PERFCOUNTER0_SELECT"
9376  },
9377  {
9378   "chips": ["gfx9"],
9379   "map": {"at": 221760, "to": "mm"},
9380   "name": "VGT_PERFCOUNTER0_SELECT1",
9381   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9382  },
9383  {
9384   "chips": ["gfx9"],
9385   "map": {"at": 221764, "to": "mm"},
9386   "name": "VGT_PERFCOUNTER1_SELECT1",
9387   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9388  },
9389  {
9390   "chips": ["gfx9"],
9391   "map": {"at": 221776, "to": "mm"},
9392   "name": "VGT_PERFCOUNTER_SEID_MASK",
9393   "type_ref": "VGT_PERFCOUNTER_SEID_MASK"
9394  },
9395  {
9396   "chips": ["gfx9"],
9397   "map": {"at": 222208, "to": "mm"},
9398   "name": "PA_SU_PERFCOUNTER0_SELECT",
9399   "type_ref": "IA_PERFCOUNTER0_SELECT"
9400  },
9401  {
9402   "chips": ["gfx9"],
9403   "map": {"at": 222212, "to": "mm"},
9404   "name": "PA_SU_PERFCOUNTER0_SELECT1",
9405   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9406  },
9407  {
9408   "chips": ["gfx9"],
9409   "map": {"at": 222216, "to": "mm"},
9410   "name": "PA_SU_PERFCOUNTER1_SELECT",
9411   "type_ref": "IA_PERFCOUNTER0_SELECT"
9412  },
9413  {
9414   "chips": ["gfx9"],
9415   "map": {"at": 222220, "to": "mm"},
9416   "name": "PA_SU_PERFCOUNTER1_SELECT1",
9417   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9418  },
9419  {
9420   "chips": ["gfx9"],
9421   "map": {"at": 222224, "to": "mm"},
9422   "name": "PA_SU_PERFCOUNTER2_SELECT",
9423   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9424  },
9425  {
9426   "chips": ["gfx9"],
9427   "map": {"at": 222228, "to": "mm"},
9428   "name": "PA_SU_PERFCOUNTER3_SELECT",
9429   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9430  },
9431  {
9432   "chips": ["gfx9"],
9433   "map": {"at": 222464, "to": "mm"},
9434   "name": "PA_SC_PERFCOUNTER0_SELECT",
9435   "type_ref": "IA_PERFCOUNTER0_SELECT"
9436  },
9437  {
9438   "chips": ["gfx9"],
9439   "map": {"at": 222468, "to": "mm"},
9440   "name": "PA_SC_PERFCOUNTER0_SELECT1",
9441   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9442  },
9443  {
9444   "chips": ["gfx9"],
9445   "map": {"at": 222472, "to": "mm"},
9446   "name": "PA_SC_PERFCOUNTER1_SELECT",
9447   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9448  },
9449  {
9450   "chips": ["gfx9"],
9451   "map": {"at": 222476, "to": "mm"},
9452   "name": "PA_SC_PERFCOUNTER2_SELECT",
9453   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9454  },
9455  {
9456   "chips": ["gfx9"],
9457   "map": {"at": 222480, "to": "mm"},
9458   "name": "PA_SC_PERFCOUNTER3_SELECT",
9459   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9460  },
9461  {
9462   "chips": ["gfx9"],
9463   "map": {"at": 222484, "to": "mm"},
9464   "name": "PA_SC_PERFCOUNTER4_SELECT",
9465   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9466  },
9467  {
9468   "chips": ["gfx9"],
9469   "map": {"at": 222488, "to": "mm"},
9470   "name": "PA_SC_PERFCOUNTER5_SELECT",
9471   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9472  },
9473  {
9474   "chips": ["gfx9"],
9475   "map": {"at": 222492, "to": "mm"},
9476   "name": "PA_SC_PERFCOUNTER6_SELECT",
9477   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9478  },
9479  {
9480   "chips": ["gfx9"],
9481   "map": {"at": 222496, "to": "mm"},
9482   "name": "PA_SC_PERFCOUNTER7_SELECT",
9483   "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9484  },
9485  {
9486   "chips": ["gfx9"],
9487   "map": {"at": 222720, "to": "mm"},
9488   "name": "SPI_PERFCOUNTER0_SELECT",
9489   "type_ref": "IA_PERFCOUNTER0_SELECT"
9490  },
9491  {
9492   "chips": ["gfx9"],
9493   "map": {"at": 222724, "to": "mm"},
9494   "name": "SPI_PERFCOUNTER1_SELECT",
9495   "type_ref": "IA_PERFCOUNTER0_SELECT"
9496  },
9497  {
9498   "chips": ["gfx9"],
9499   "map": {"at": 222728, "to": "mm"},
9500   "name": "SPI_PERFCOUNTER2_SELECT",
9501   "type_ref": "IA_PERFCOUNTER0_SELECT"
9502  },
9503  {
9504   "chips": ["gfx9"],
9505   "map": {"at": 222732, "to": "mm"},
9506   "name": "SPI_PERFCOUNTER3_SELECT",
9507   "type_ref": "IA_PERFCOUNTER0_SELECT"
9508  },
9509  {
9510   "chips": ["gfx9"],
9511   "map": {"at": 222736, "to": "mm"},
9512   "name": "SPI_PERFCOUNTER0_SELECT1",
9513   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9514  },
9515  {
9516   "chips": ["gfx9"],
9517   "map": {"at": 222740, "to": "mm"},
9518   "name": "SPI_PERFCOUNTER1_SELECT1",
9519   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9520  },
9521  {
9522   "chips": ["gfx9"],
9523   "map": {"at": 222744, "to": "mm"},
9524   "name": "SPI_PERFCOUNTER2_SELECT1",
9525   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9526  },
9527  {
9528   "chips": ["gfx9"],
9529   "map": {"at": 222748, "to": "mm"},
9530   "name": "SPI_PERFCOUNTER3_SELECT1",
9531   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9532  },
9533  {
9534   "chips": ["gfx9"],
9535   "map": {"at": 222752, "to": "mm"},
9536   "name": "SPI_PERFCOUNTER4_SELECT",
9537   "type_ref": "SPI_PERFCOUNTER4_SELECT"
9538  },
9539  {
9540   "chips": ["gfx9"],
9541   "map": {"at": 222756, "to": "mm"},
9542   "name": "SPI_PERFCOUNTER5_SELECT",
9543   "type_ref": "SPI_PERFCOUNTER4_SELECT"
9544  },
9545  {
9546   "chips": ["gfx9"],
9547   "map": {"at": 222760, "to": "mm"},
9548   "name": "SPI_PERFCOUNTER_BINS",
9549   "type_ref": "SPI_PERFCOUNTER_BINS"
9550  },
9551  {
9552   "chips": ["gfx9"],
9553   "map": {"at": 222976, "to": "mm"},
9554   "name": "SQ_PERFCOUNTER0_SELECT",
9555   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9556  },
9557  {
9558   "chips": ["gfx9"],
9559   "map": {"at": 222980, "to": "mm"},
9560   "name": "SQ_PERFCOUNTER1_SELECT",
9561   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9562  },
9563  {
9564   "chips": ["gfx9"],
9565   "map": {"at": 222984, "to": "mm"},
9566   "name": "SQ_PERFCOUNTER2_SELECT",
9567   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9568  },
9569  {
9570   "chips": ["gfx9"],
9571   "map": {"at": 222988, "to": "mm"},
9572   "name": "SQ_PERFCOUNTER3_SELECT",
9573   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9574  },
9575  {
9576   "chips": ["gfx9"],
9577   "map": {"at": 222992, "to": "mm"},
9578   "name": "SQ_PERFCOUNTER4_SELECT",
9579   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9580  },
9581  {
9582   "chips": ["gfx9"],
9583   "map": {"at": 222996, "to": "mm"},
9584   "name": "SQ_PERFCOUNTER5_SELECT",
9585   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9586  },
9587  {
9588   "chips": ["gfx9"],
9589   "map": {"at": 223000, "to": "mm"},
9590   "name": "SQ_PERFCOUNTER6_SELECT",
9591   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9592  },
9593  {
9594   "chips": ["gfx9"],
9595   "map": {"at": 223004, "to": "mm"},
9596   "name": "SQ_PERFCOUNTER7_SELECT",
9597   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9598  },
9599  {
9600   "chips": ["gfx9"],
9601   "map": {"at": 223008, "to": "mm"},
9602   "name": "SQ_PERFCOUNTER8_SELECT",
9603   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9604  },
9605  {
9606   "chips": ["gfx9"],
9607   "map": {"at": 223012, "to": "mm"},
9608   "name": "SQ_PERFCOUNTER9_SELECT",
9609   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9610  },
9611  {
9612   "chips": ["gfx9"],
9613   "map": {"at": 223016, "to": "mm"},
9614   "name": "SQ_PERFCOUNTER10_SELECT",
9615   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9616  },
9617  {
9618   "chips": ["gfx9"],
9619   "map": {"at": 223020, "to": "mm"},
9620   "name": "SQ_PERFCOUNTER11_SELECT",
9621   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9622  },
9623  {
9624   "chips": ["gfx9"],
9625   "map": {"at": 223024, "to": "mm"},
9626   "name": "SQ_PERFCOUNTER12_SELECT",
9627   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9628  },
9629  {
9630   "chips": ["gfx9"],
9631   "map": {"at": 223028, "to": "mm"},
9632   "name": "SQ_PERFCOUNTER13_SELECT",
9633   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9634  },
9635  {
9636   "chips": ["gfx9"],
9637   "map": {"at": 223032, "to": "mm"},
9638   "name": "SQ_PERFCOUNTER14_SELECT",
9639   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9640  },
9641  {
9642   "chips": ["gfx9"],
9643   "map": {"at": 223036, "to": "mm"},
9644   "name": "SQ_PERFCOUNTER15_SELECT",
9645   "type_ref": "SQ_PERFCOUNTER0_SELECT"
9646  },
9647  {
9648   "chips": ["gfx9"],
9649   "map": {"at": 223104, "to": "mm"},
9650   "name": "SQ_PERFCOUNTER_CTRL",
9651   "type_ref": "SQ_PERFCOUNTER_CTRL"
9652  },
9653  {
9654   "chips": ["gfx9"],
9655   "map": {"at": 223108, "to": "mm"},
9656   "name": "SQ_PERFCOUNTER_MASK",
9657   "type_ref": "SQ_THREAD_TRACE_PERF_MASK"
9658  },
9659  {
9660   "chips": ["gfx9"],
9661   "map": {"at": 223112, "to": "mm"},
9662   "name": "SQ_PERFCOUNTER_CTRL2",
9663   "type_ref": "SQ_PERFCOUNTER_CTRL2"
9664  },
9665  {
9666   "chips": ["gfx9"],
9667   "map": {"at": 223488, "to": "mm"},
9668   "name": "SX_PERFCOUNTER0_SELECT",
9669   "type_ref": "IA_PERFCOUNTER0_SELECT"
9670  },
9671  {
9672   "chips": ["gfx9"],
9673   "map": {"at": 223492, "to": "mm"},
9674   "name": "SX_PERFCOUNTER1_SELECT",
9675   "type_ref": "IA_PERFCOUNTER0_SELECT"
9676  },
9677  {
9678   "chips": ["gfx9"],
9679   "map": {"at": 223496, "to": "mm"},
9680   "name": "SX_PERFCOUNTER2_SELECT",
9681   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9682  },
9683  {
9684   "chips": ["gfx9"],
9685   "map": {"at": 223500, "to": "mm"},
9686   "name": "SX_PERFCOUNTER3_SELECT",
9687   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9688  },
9689  {
9690   "chips": ["gfx9"],
9691   "map": {"at": 223504, "to": "mm"},
9692   "name": "SX_PERFCOUNTER0_SELECT1",
9693   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9694  },
9695  {
9696   "chips": ["gfx9"],
9697   "map": {"at": 223508, "to": "mm"},
9698   "name": "SX_PERFCOUNTER1_SELECT1",
9699   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9700  },
9701  {
9702   "chips": ["gfx9"],
9703   "map": {"at": 223744, "to": "mm"},
9704   "name": "GDS_PERFCOUNTER0_SELECT",
9705   "type_ref": "IA_PERFCOUNTER0_SELECT"
9706  },
9707  {
9708   "chips": ["gfx9"],
9709   "map": {"at": 223748, "to": "mm"},
9710   "name": "GDS_PERFCOUNTER1_SELECT",
9711   "type_ref": "IA_PERFCOUNTER0_SELECT"
9712  },
9713  {
9714   "chips": ["gfx9"],
9715   "map": {"at": 223752, "to": "mm"},
9716   "name": "GDS_PERFCOUNTER2_SELECT",
9717   "type_ref": "IA_PERFCOUNTER0_SELECT"
9718  },
9719  {
9720   "chips": ["gfx9"],
9721   "map": {"at": 223756, "to": "mm"},
9722   "name": "GDS_PERFCOUNTER3_SELECT",
9723   "type_ref": "IA_PERFCOUNTER0_SELECT"
9724  },
9725  {
9726   "chips": ["gfx9"],
9727   "map": {"at": 223760, "to": "mm"},
9728   "name": "GDS_PERFCOUNTER0_SELECT1",
9729   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9730  },
9731  {
9732   "chips": ["gfx9"],
9733   "map": {"at": 224000, "to": "mm"},
9734   "name": "TA_PERFCOUNTER0_SELECT",
9735   "type_ref": "TA_PERFCOUNTER0_SELECT"
9736  },
9737  {
9738   "chips": ["gfx9"],
9739   "map": {"at": 224004, "to": "mm"},
9740   "name": "TA_PERFCOUNTER0_SELECT1",
9741   "type_ref": "TA_PERFCOUNTER0_SELECT1"
9742  },
9743  {
9744   "chips": ["gfx9"],
9745   "map": {"at": 224008, "to": "mm"},
9746   "name": "TA_PERFCOUNTER1_SELECT",
9747   "type_ref": "TA_PERFCOUNTER1_SELECT"
9748  },
9749  {
9750   "chips": ["gfx9"],
9751   "map": {"at": 224256, "to": "mm"},
9752   "name": "TD_PERFCOUNTER0_SELECT",
9753   "type_ref": "TA_PERFCOUNTER0_SELECT"
9754  },
9755  {
9756   "chips": ["gfx9"],
9757   "map": {"at": 224260, "to": "mm"},
9758   "name": "TD_PERFCOUNTER0_SELECT1",
9759   "type_ref": "TA_PERFCOUNTER0_SELECT1"
9760  },
9761  {
9762   "chips": ["gfx9"],
9763   "map": {"at": 224264, "to": "mm"},
9764   "name": "TD_PERFCOUNTER1_SELECT",
9765   "type_ref": "TA_PERFCOUNTER1_SELECT"
9766  },
9767  {
9768   "chips": ["gfx9"],
9769   "map": {"at": 224512, "to": "mm"},
9770   "name": "TCP_PERFCOUNTER0_SELECT",
9771   "type_ref": "IA_PERFCOUNTER0_SELECT"
9772  },
9773  {
9774   "chips": ["gfx9"],
9775   "map": {"at": 224516, "to": "mm"},
9776   "name": "TCP_PERFCOUNTER0_SELECT1",
9777   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9778  },
9779  {
9780   "chips": ["gfx9"],
9781   "map": {"at": 224520, "to": "mm"},
9782   "name": "TCP_PERFCOUNTER1_SELECT",
9783   "type_ref": "IA_PERFCOUNTER0_SELECT"
9784  },
9785  {
9786   "chips": ["gfx9"],
9787   "map": {"at": 224524, "to": "mm"},
9788   "name": "TCP_PERFCOUNTER1_SELECT1",
9789   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9790  },
9791  {
9792   "chips": ["gfx9"],
9793   "map": {"at": 224528, "to": "mm"},
9794   "name": "TCP_PERFCOUNTER2_SELECT",
9795   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9796  },
9797  {
9798   "chips": ["gfx9"],
9799   "map": {"at": 224532, "to": "mm"},
9800   "name": "TCP_PERFCOUNTER3_SELECT",
9801   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9802  },
9803  {
9804   "chips": ["gfx9"],
9805   "map": {"at": 224768, "to": "mm"},
9806   "name": "TCC_PERFCOUNTER0_SELECT",
9807   "type_ref": "IA_PERFCOUNTER0_SELECT"
9808  },
9809  {
9810   "chips": ["gfx9"],
9811   "map": {"at": 224772, "to": "mm"},
9812   "name": "TCC_PERFCOUNTER0_SELECT1",
9813   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
9814  },
9815  {
9816   "chips": ["gfx9"],
9817   "map": {"at": 224776, "to": "mm"},
9818   "name": "TCC_PERFCOUNTER1_SELECT",
9819   "type_ref": "IA_PERFCOUNTER0_SELECT"
9820  },
9821  {
9822   "chips": ["gfx9"],
9823   "map": {"at": 224780, "to": "mm"},
9824   "name": "TCC_PERFCOUNTER1_SELECT1",
9825   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
9826  },
9827  {
9828   "chips": ["gfx9"],
9829   "map": {"at": 224784, "to": "mm"},
9830   "name": "TCC_PERFCOUNTER2_SELECT",
9831   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9832  },
9833  {
9834   "chips": ["gfx9"],
9835   "map": {"at": 224788, "to": "mm"},
9836   "name": "TCC_PERFCOUNTER3_SELECT",
9837   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9838  },
9839  {
9840   "chips": ["gfx9"],
9841   "map": {"at": 224832, "to": "mm"},
9842   "name": "TCA_PERFCOUNTER0_SELECT",
9843   "type_ref": "IA_PERFCOUNTER0_SELECT"
9844  },
9845  {
9846   "chips": ["gfx9"],
9847   "map": {"at": 224836, "to": "mm"},
9848   "name": "TCA_PERFCOUNTER0_SELECT1",
9849   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
9850  },
9851  {
9852   "chips": ["gfx9"],
9853   "map": {"at": 224840, "to": "mm"},
9854   "name": "TCA_PERFCOUNTER1_SELECT",
9855   "type_ref": "IA_PERFCOUNTER0_SELECT"
9856  },
9857  {
9858   "chips": ["gfx9"],
9859   "map": {"at": 224844, "to": "mm"},
9860   "name": "TCA_PERFCOUNTER1_SELECT1",
9861   "type_ref": "TCC_PERFCOUNTER0_SELECT1"
9862  },
9863  {
9864   "chips": ["gfx9"],
9865   "map": {"at": 224848, "to": "mm"},
9866   "name": "TCA_PERFCOUNTER2_SELECT",
9867   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9868  },
9869  {
9870   "chips": ["gfx9"],
9871   "map": {"at": 224852, "to": "mm"},
9872   "name": "TCA_PERFCOUNTER3_SELECT",
9873   "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9874  },
9875  {
9876   "chips": ["gfx9"],
9877   "map": {"at": 225280, "to": "mm"},
9878   "name": "CB_PERFCOUNTER_FILTER",
9879   "type_ref": "CB_PERFCOUNTER_FILTER"
9880  },
9881  {
9882   "chips": ["gfx9"],
9883   "map": {"at": 225284, "to": "mm"},
9884   "name": "CB_PERFCOUNTER0_SELECT",
9885   "type_ref": "CB_PERFCOUNTER0_SELECT"
9886  },
9887  {
9888   "chips": ["gfx9"],
9889   "map": {"at": 225288, "to": "mm"},
9890   "name": "CB_PERFCOUNTER0_SELECT1",
9891   "type_ref": "CB_PERFCOUNTER0_SELECT1"
9892  },
9893  {
9894   "chips": ["gfx9"],
9895   "map": {"at": 225292, "to": "mm"},
9896   "name": "CB_PERFCOUNTER1_SELECT",
9897   "type_ref": "CB_PERFCOUNTER1_SELECT"
9898  },
9899  {
9900   "chips": ["gfx9"],
9901   "map": {"at": 225296, "to": "mm"},
9902   "name": "CB_PERFCOUNTER2_SELECT",
9903   "type_ref": "CB_PERFCOUNTER1_SELECT"
9904  },
9905  {
9906   "chips": ["gfx9"],
9907   "map": {"at": 225300, "to": "mm"},
9908   "name": "CB_PERFCOUNTER3_SELECT",
9909   "type_ref": "CB_PERFCOUNTER1_SELECT"
9910  },
9911  {
9912   "chips": ["gfx9"],
9913   "map": {"at": 225536, "to": "mm"},
9914   "name": "DB_PERFCOUNTER0_SELECT",
9915   "type_ref": "IA_PERFCOUNTER0_SELECT"
9916  },
9917  {
9918   "chips": ["gfx9"],
9919   "map": {"at": 225540, "to": "mm"},
9920   "name": "DB_PERFCOUNTER0_SELECT1",
9921   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9922  },
9923  {
9924   "chips": ["gfx9"],
9925   "map": {"at": 225544, "to": "mm"},
9926   "name": "DB_PERFCOUNTER1_SELECT",
9927   "type_ref": "IA_PERFCOUNTER0_SELECT"
9928  },
9929  {
9930   "chips": ["gfx9"],
9931   "map": {"at": 225548, "to": "mm"},
9932   "name": "DB_PERFCOUNTER1_SELECT1",
9933   "type_ref": "IA_PERFCOUNTER0_SELECT1"
9934  },
9935  {
9936   "chips": ["gfx9"],
9937   "map": {"at": 225552, "to": "mm"},
9938   "name": "DB_PERFCOUNTER2_SELECT",
9939   "type_ref": "IA_PERFCOUNTER0_SELECT"
9940  },
9941  {
9942   "chips": ["gfx9"],
9943   "map": {"at": 225560, "to": "mm"},
9944   "name": "DB_PERFCOUNTER3_SELECT",
9945   "type_ref": "IA_PERFCOUNTER0_SELECT"
9946  },
9947  {
9948   "chips": ["gfx9"],
9949   "map": {"at": 225792, "to": "mm"},
9950   "name": "RLC_SPM_PERFMON_CNTL",
9951   "type_ref": "RLC_SPM_PERFMON_CNTL"
9952  },
9953  {
9954   "chips": ["gfx9"],
9955   "map": {"at": 225796, "to": "mm"},
9956   "name": "RLC_SPM_PERFMON_RING_BASE_LO"
9957  },
9958  {
9959   "chips": ["gfx9"],
9960   "map": {"at": 225800, "to": "mm"},
9961   "name": "RLC_SPM_PERFMON_RING_BASE_HI",
9962   "type_ref": "RLC_SPM_PERFMON_RING_BASE_HI"
9963  },
9964  {
9965   "chips": ["gfx9"],
9966   "map": {"at": 225804, "to": "mm"},
9967   "name": "RLC_SPM_PERFMON_RING_SIZE"
9968  },
9969  {
9970   "chips": ["gfx9"],
9971   "map": {"at": 225808, "to": "mm"},
9972   "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",
9973   "type_ref": "RLC_SPM_PERFMON_SEGMENT_SIZE"
9974  },
9975  {
9976   "chips": ["gfx9"],
9977   "map": {"at": 225812, "to": "mm"},
9978   "name": "RLC_SPM_SE_MUXSEL_ADDR"
9979  },
9980  {
9981   "chips": ["gfx9"],
9982   "map": {"at": 225816, "to": "mm"},
9983   "name": "RLC_SPM_SE_MUXSEL_DATA"
9984  },
9985  {
9986   "chips": ["gfx9"],
9987   "map": {"at": 225820, "to": "mm"},
9988   "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",
9989   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9990  },
9991  {
9992   "chips": ["gfx9"],
9993   "map": {"at": 225824, "to": "mm"},
9994   "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",
9995   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9996  },
9997  {
9998   "chips": ["gfx9"],
9999   "map": {"at": 225828, "to": "mm"},
10000   "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",
10001   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10002  },
10003  {
10004   "chips": ["gfx9"],
10005   "map": {"at": 225832, "to": "mm"},
10006   "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",
10007   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10008  },
10009  {
10010   "chips": ["gfx9"],
10011   "map": {"at": 225836, "to": "mm"},
10012   "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",
10013   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10014  },
10015  {
10016   "chips": ["gfx9"],
10017   "map": {"at": 225840, "to": "mm"},
10018   "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",
10019   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10020  },
10021  {
10022   "chips": ["gfx9"],
10023   "map": {"at": 225844, "to": "mm"},
10024   "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",
10025   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10026  },
10027  {
10028   "chips": ["gfx9"],
10029   "map": {"at": 225848, "to": "mm"},
10030   "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",
10031   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10032  },
10033  {
10034   "chips": ["gfx9"],
10035   "map": {"at": 225856, "to": "mm"},
10036   "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",
10037   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10038  },
10039  {
10040   "chips": ["gfx9"],
10041   "map": {"at": 225860, "to": "mm"},
10042   "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",
10043   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10044  },
10045  {
10046   "chips": ["gfx9"],
10047   "map": {"at": 225864, "to": "mm"},
10048   "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",
10049   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10050  },
10051  {
10052   "chips": ["gfx9"],
10053   "map": {"at": 225868, "to": "mm"},
10054   "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",
10055   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10056  },
10057  {
10058   "chips": ["gfx9"],
10059   "map": {"at": 225872, "to": "mm"},
10060   "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",
10061   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10062  },
10063  {
10064   "chips": ["gfx9"],
10065   "map": {"at": 225876, "to": "mm"},
10066   "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",
10067   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10068  },
10069  {
10070   "chips": ["gfx9"],
10071   "map": {"at": 225880, "to": "mm"},
10072   "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",
10073   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10074  },
10075  {
10076   "chips": ["gfx9"],
10077   "map": {"at": 225884, "to": "mm"},
10078   "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",
10079   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10080  },
10081  {
10082   "chips": ["gfx9"],
10083   "map": {"at": 225888, "to": "mm"},
10084   "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",
10085   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10086  },
10087  {
10088   "chips": ["gfx9"],
10089   "map": {"at": 225896, "to": "mm"},
10090   "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",
10091   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10092  },
10093  {
10094   "chips": ["gfx9"],
10095   "map": {"at": 225900, "to": "mm"},
10096   "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR"
10097  },
10098  {
10099   "chips": ["gfx9"],
10100   "map": {"at": 225904, "to": "mm"},
10101   "name": "RLC_SPM_GLOBAL_MUXSEL_DATA"
10102  },
10103  {
10104   "chips": ["gfx9"],
10105   "map": {"at": 225908, "to": "mm"},
10106   "name": "RLC_SPM_RING_RDPTR"
10107  },
10108  {
10109   "chips": ["gfx9"],
10110   "map": {"at": 225912, "to": "mm"},
10111   "name": "RLC_SPM_SEGMENT_THRESHOLD"
10112  },
10113  {
10114   "chips": ["gfx9"],
10115   "map": {"at": 225932, "to": "mm"},
10116   "name": "RLC_SPM_RMI_PERFMON_SAMPLE_DELAY",
10117   "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10118  },
10119  {
10120   "chips": ["gfx9"],
10121   "map": {"at": 225936, "to": "mm"},
10122   "name": "RLC_SPM_PERFMON_SAMPLE_DELAY_MAX",
10123   "type_ref": "RLC_SPM_PERFMON_SAMPLE_DELAY_MAX"
10124  },
10125  {
10126   "chips": ["gfx9"],
10127   "map": {"at": 226040, "to": "mm"},
10128   "name": "RLC_PERFMON_CLK_CNTL_UCODE",
10129   "type_ref": "RLC_PERFMON_CLK_CNTL_UCODE"
10130  },
10131  {
10132   "chips": ["gfx9"],
10133   "map": {"at": 226044, "to": "mm"},
10134   "name": "RLC_PERFMON_CLK_CNTL",
10135   "type_ref": "RLC_PERFMON_CLK_CNTL_UCODE"
10136  },
10137  {
10138   "chips": ["gfx9"],
10139   "map": {"at": 226048, "to": "mm"},
10140   "name": "RLC_PERFMON_CNTL",
10141   "type_ref": "RLC_PERFMON_CNTL"
10142  },
10143  {
10144   "chips": ["gfx9"],
10145   "map": {"at": 226052, "to": "mm"},
10146   "name": "RLC_PERFCOUNTER0_SELECT",
10147   "type_ref": "RLC_PERFCOUNTER0_SELECT"
10148  },
10149  {
10150   "chips": ["gfx9"],
10151   "map": {"at": 226056, "to": "mm"},
10152   "name": "RLC_PERFCOUNTER1_SELECT",
10153   "type_ref": "RLC_PERFCOUNTER0_SELECT"
10154  },
10155  {
10156   "chips": ["gfx9"],
10157   "map": {"at": 226060, "to": "mm"},
10158   "name": "RLC_GPU_IOV_PERF_CNT_CNTL",
10159   "type_ref": "RLC_GPU_IOV_PERF_CNT_CNTL"
10160  },
10161  {
10162   "chips": ["gfx9"],
10163   "map": {"at": 226064, "to": "mm"},
10164   "name": "RLC_GPU_IOV_PERF_CNT_WR_ADDR",
10165   "type_ref": "RLC_GPU_IOV_PERF_CNT_WR_ADDR"
10166  },
10167  {
10168   "chips": ["gfx9"],
10169   "map": {"at": 226068, "to": "mm"},
10170   "name": "RLC_GPU_IOV_PERF_CNT_WR_DATA",
10171   "type_ref": "COMPUTE_VMID"
10172  },
10173  {
10174   "chips": ["gfx9"],
10175   "map": {"at": 226072, "to": "mm"},
10176   "name": "RLC_GPU_IOV_PERF_CNT_RD_ADDR",
10177   "type_ref": "RLC_GPU_IOV_PERF_CNT_WR_ADDR"
10178  },
10179  {
10180   "chips": ["gfx9"],
10181   "map": {"at": 226076, "to": "mm"},
10182   "name": "RLC_GPU_IOV_PERF_CNT_RD_DATA",
10183   "type_ref": "COMPUTE_VMID"
10184  },
10185  {
10186   "chips": ["gfx9"],
10187   "map": {"at": 226304, "to": "mm"},
10188   "name": "RMI_PERFCOUNTER0_SELECT",
10189   "type_ref": "CB_PERFCOUNTER0_SELECT"
10190  },
10191  {
10192   "chips": ["gfx9"],
10193   "map": {"at": 226308, "to": "mm"},
10194   "name": "RMI_PERFCOUNTER0_SELECT1",
10195   "type_ref": "CB_PERFCOUNTER0_SELECT1"
10196  },
10197  {
10198   "chips": ["gfx9"],
10199   "map": {"at": 226312, "to": "mm"},
10200   "name": "RMI_PERFCOUNTER1_SELECT",
10201   "type_ref": "CB_PERFCOUNTER1_SELECT"
10202  },
10203  {
10204   "chips": ["gfx9"],
10205   "map": {"at": 226316, "to": "mm"},
10206   "name": "RMI_PERFCOUNTER2_SELECT",
10207   "type_ref": "CB_PERFCOUNTER0_SELECT"
10208  },
10209  {
10210   "chips": ["gfx9"],
10211   "map": {"at": 226320, "to": "mm"},
10212   "name": "RMI_PERFCOUNTER2_SELECT1",
10213   "type_ref": "CB_PERFCOUNTER0_SELECT1"
10214  },
10215  {
10216   "chips": ["gfx9"],
10217   "map": {"at": 226324, "to": "mm"},
10218   "name": "RMI_PERFCOUNTER3_SELECT",
10219   "type_ref": "CB_PERFCOUNTER1_SELECT"
10220  },
10221  {
10222   "chips": ["gfx9"],
10223   "map": {"at": 226328, "to": "mm"},
10224   "name": "RMI_PERF_COUNTER_CNTL",
10225   "type_ref": "RMI_PERF_COUNTER_CNTL"
10226  },
10227  {
10228   "chips": ["gfx9"],
10229   "map": {"at": 226560, "to": "mm"},
10230   "name": "ATC_L2_PERFCOUNTER0_CFG",
10231   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10232  },
10233  {
10234   "chips": ["gfx9"],
10235   "map": {"at": 226564, "to": "mm"},
10236   "name": "ATC_L2_PERFCOUNTER1_CFG",
10237   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10238  },
10239  {
10240   "chips": ["gfx9"],
10241   "map": {"at": 226568, "to": "mm"},
10242   "name": "ATC_L2_PERFCOUNTER_RSLT_CNTL",
10243   "type_ref": "ATC_L2_PERFCOUNTER_RSLT_CNTL"
10244  },
10245  {
10246   "chips": ["gfx9"],
10247   "map": {"at": 226608, "to": "mm"},
10248   "name": "MC_VM_L2_PERFCOUNTER0_CFG",
10249   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10250  },
10251  {
10252   "chips": ["gfx9"],
10253   "map": {"at": 226612, "to": "mm"},
10254   "name": "MC_VM_L2_PERFCOUNTER1_CFG",
10255   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10256  },
10257  {
10258   "chips": ["gfx9"],
10259   "map": {"at": 226616, "to": "mm"},
10260   "name": "MC_VM_L2_PERFCOUNTER2_CFG",
10261   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10262  },
10263  {
10264   "chips": ["gfx9"],
10265   "map": {"at": 226620, "to": "mm"},
10266   "name": "MC_VM_L2_PERFCOUNTER3_CFG",
10267   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10268  },
10269  {
10270   "chips": ["gfx9"],
10271   "map": {"at": 226624, "to": "mm"},
10272   "name": "MC_VM_L2_PERFCOUNTER4_CFG",
10273   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10274  },
10275  {
10276   "chips": ["gfx9"],
10277   "map": {"at": 226628, "to": "mm"},
10278   "name": "MC_VM_L2_PERFCOUNTER5_CFG",
10279   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10280  },
10281  {
10282   "chips": ["gfx9"],
10283   "map": {"at": 226632, "to": "mm"},
10284   "name": "MC_VM_L2_PERFCOUNTER6_CFG",
10285   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10286  },
10287  {
10288   "chips": ["gfx9"],
10289   "map": {"at": 226636, "to": "mm"},
10290   "name": "MC_VM_L2_PERFCOUNTER7_CFG",
10291   "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
10292  },
10293  {
10294   "chips": ["gfx9"],
10295   "map": {"at": 226640, "to": "mm"},
10296   "name": "MC_VM_L2_PERFCOUNTER_RSLT_CNTL",
10297   "type_ref": "ATC_L2_PERFCOUNTER_RSLT_CNTL"
10298  }
10299 ],
10300 "register_types": {
10301  "ATC_L2_PERFCOUNTER0_CFG": {
10302   "fields": [
10303    {"bits": [0, 7], "name": "PERF_SEL"},
10304    {"bits": [8, 15], "name": "PERF_SEL_END"},
10305    {"bits": [24, 27], "name": "PERF_MODE"},
10306    {"bits": [28, 28], "name": "ENABLE"},
10307    {"bits": [29, 29], "name": "CLEAR"}
10308   ]
10309  },
10310  "ATC_L2_PERFCOUNTER_HI": {
10311   "fields": [
10312    {"bits": [0, 15], "name": "COUNTER_HI"},
10313    {"bits": [16, 31], "name": "COMPARE_VALUE"}
10314   ]
10315  },
10316  "ATC_L2_PERFCOUNTER_RSLT_CNTL": {
10317   "fields": [
10318    {"bits": [0, 3], "name": "PERF_COUNTER_SELECT"},
10319    {"bits": [8, 15], "name": "START_TRIGGER"},
10320    {"bits": [16, 23], "name": "STOP_TRIGGER"},
10321    {"bits": [24, 24], "name": "ENABLE_ANY"},
10322    {"bits": [25, 25], "name": "CLEAR_ALL"},
10323    {"bits": [26, 26], "name": "STOP_ALL_ON_SATURATE"}
10324   ]
10325  },
10326  "CB_BLEND0_CONTROL": {
10327   "fields": [
10328    {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},
10329    {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},
10330    {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},
10331    {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},
10332    {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},
10333    {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},
10334    {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},
10335    {"bits": [30, 30], "name": "ENABLE"},
10336    {"bits": [31, 31], "name": "DISABLE_ROP3"}
10337   ]
10338  },
10339  "CB_COLOR0_ATTRIB": {
10340   "fields": [
10341    {"bits": [0, 10], "name": "MIP0_DEPTH"},
10342    {"bits": [11, 11], "name": "META_LINEAR"},
10343    {"bits": [12, 14], "name": "NUM_SAMPLES"},
10344    {"bits": [15, 16], "name": "NUM_FRAGMENTS"},
10345    {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"},
10346    {"bits": [18, 22], "name": "COLOR_SW_MODE"},
10347    {"bits": [23, 27], "name": "FMASK_SW_MODE"},
10348    {"bits": [28, 29], "name": "RESOURCE_TYPE"},
10349    {"bits": [30, 30], "name": "RB_ALIGNED"},
10350    {"bits": [31, 31], "name": "PIPE_ALIGNED"}
10351   ]
10352  },
10353  "CB_COLOR0_ATTRIB2": {
10354   "fields": [
10355    {"bits": [0, 13], "name": "MIP0_HEIGHT"},
10356    {"bits": [14, 27], "name": "MIP0_WIDTH"},
10357    {"bits": [28, 31], "name": "MAX_MIP"}
10358   ]
10359  },
10360  "CB_COLOR0_BASE_EXT": {
10361   "fields": [
10362    {"bits": [0, 7], "name": "BASE_256B"}
10363   ]
10364  },
10365  "CB_COLOR0_DCC_CONTROL": {
10366   "fields": [
10367    {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
10368    {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"},
10369    {"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNCOMPRESSED_BLOCK_SIZE"},
10370    {"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPRESSED_BLOCK_SIZE"},
10371    {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"},
10372    {"bits": [7, 8], "name": "COLOR_TRANSFORM"},
10373    {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"},
10374    {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"},
10375    {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"},
10376    {"bits": [18, 18], "name": "DISABLE_CONSTANT_ENCODE_REG"},
10377    {"bits": [19, 19], "name": "ENABLE_CONSTANT_ENCODE_REG_WRITE"}
10378   ]
10379  },
10380  "CB_COLOR0_INFO": {
10381   "fields": [
10382    {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},
10383    {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},
10384    {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},
10385    {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},
10386    {"bits": [13, 13], "name": "FAST_CLEAR"},
10387    {"bits": [14, 14], "name": "COMPRESSION"},
10388    {"bits": [15, 15], "name": "BLEND_CLAMP"},
10389    {"bits": [16, 16], "name": "BLEND_BYPASS"},
10390    {"bits": [17, 17], "name": "SIMPLE_FLOAT"},
10391    {"bits": [18, 18], "name": "ROUND_MODE"},
10392    {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},
10393    {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},
10394    {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"},
10395    {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"},
10396    {"bits": [28, 28], "name": "DCC_ENABLE"},
10397    {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}
10398   ]
10399  },
10400  "CB_COLOR0_VIEW": {
10401   "fields": [
10402    {"bits": [0, 10], "name": "SLICE_START"},
10403    {"bits": [13, 23], "name": "SLICE_MAX"},
10404    {"bits": [24, 27], "name": "MIP_LEVEL"}
10405   ]
10406  },
10407  "CB_COLOR_CONTROL": {
10408   "fields": [
10409    {"bits": [0, 0], "name": "DISABLE_DUAL_QUAD"},
10410    {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},
10411    {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},
10412    {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}
10413   ]
10414  },
10415  "CB_DCC_CONTROL": {
10416   "fields": [
10417    {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
10418    {"bits": [1, 1], "name": "OVERWRITE_COMBINER_MRT_SHARING_DISABLE"},
10419    {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"},
10420    {"bits": [8, 8], "name": "DISABLE_CONSTANT_ENCODE_AC01"},
10421    {"bits": [9, 9], "name": "DISABLE_CONSTANT_ENCODE_SINGLE"},
10422    {"bits": [10, 10], "name": "DISABLE_CONSTANT_ENCODE_REG"},
10423    {"bits": [12, 12], "name": "DISABLE_ELIMFC_SKIP_OF_AC01"},
10424    {"bits": [13, 13], "name": "DISABLE_ELIMFC_SKIP_OF_SINGLE"},
10425    {"bits": [14, 14], "name": "ENABLE_ELIMFC_SKIP_OF_REG"}
10426   ]
10427  },
10428  "CB_PERFCOUNTER0_SELECT": {
10429   "fields": [
10430    {"bits": [0, 8], "name": "PERF_SEL"},
10431    {"bits": [10, 18], "name": "PERF_SEL1"},
10432    {"bits": [20, 23], "name": "CNTR_MODE"},
10433    {"bits": [24, 27], "name": "PERF_MODE1"},
10434    {"bits": [28, 31], "name": "PERF_MODE"}
10435   ]
10436  },
10437  "CB_PERFCOUNTER0_SELECT1": {
10438   "fields": [
10439    {"bits": [0, 8], "name": "PERF_SEL2"},
10440    {"bits": [10, 18], "name": "PERF_SEL3"},
10441    {"bits": [24, 27], "name": "PERF_MODE3"},
10442    {"bits": [28, 31], "name": "PERF_MODE2"}
10443   ]
10444  },
10445  "CB_PERFCOUNTER1_SELECT": {
10446   "fields": [
10447    {"bits": [0, 8], "name": "PERF_SEL"},
10448    {"bits": [28, 31], "name": "PERF_MODE"}
10449   ]
10450  },
10451  "CB_PERFCOUNTER_FILTER": {
10452   "fields": [
10453    {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},
10454    {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},
10455    {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},
10456    {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},
10457    {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},
10458    {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},
10459    {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},
10460    {"bits": [13, 15], "name": "MRT_FILTER_SEL"},
10461    {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},
10462    {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},
10463    {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},
10464    {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}
10465   ]
10466  },
10467  "CB_SHADER_MASK": {
10468   "fields": [
10469    {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},
10470    {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},
10471    {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},
10472    {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},
10473    {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},
10474    {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},
10475    {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},
10476    {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}
10477   ]
10478  },
10479  "CB_TARGET_MASK": {
10480   "fields": [
10481    {"bits": [0, 3], "name": "TARGET0_ENABLE"},
10482    {"bits": [4, 7], "name": "TARGET1_ENABLE"},
10483    {"bits": [8, 11], "name": "TARGET2_ENABLE"},
10484    {"bits": [12, 15], "name": "TARGET3_ENABLE"},
10485    {"bits": [16, 19], "name": "TARGET4_ENABLE"},
10486    {"bits": [20, 23], "name": "TARGET5_ENABLE"},
10487    {"bits": [24, 27], "name": "TARGET6_ENABLE"},
10488    {"bits": [28, 31], "name": "TARGET7_ENABLE"}
10489   ]
10490  },
10491  "COHER_DEST_BASE_HI_0": {
10492   "fields": [
10493    {"bits": [0, 7], "name": "DEST_BASE_HI_256B"}
10494   ]
10495  },
10496  "COMPUTE_DISPATCH_INITIATOR": {
10497   "fields": [
10498    {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},
10499    {"bits": [1, 1], "name": "PARTIAL_TG_EN"},
10500    {"bits": [2, 2], "name": "FORCE_START_AT_000"},
10501    {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},
10502    {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},
10503    {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},
10504    {"bits": [6, 6], "name": "ORDER_MODE"},
10505    {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},
10506    {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},
10507    {"bits": [12, 12], "name": "RESERVED"},
10508    {"bits": [14, 14], "name": "RESTORE"}
10509   ]
10510  },
10511  "COMPUTE_MISC_RESERVED": {
10512   "fields": [
10513    {"bits": [0, 1], "name": "SEND_SEID"},
10514    {"bits": [2, 2], "name": "RESERVED2"},
10515    {"bits": [3, 3], "name": "RESERVED3"},
10516    {"bits": [4, 4], "name": "RESERVED4"},
10517    {"bits": [5, 16], "name": "WAVE_ID_BASE"}
10518   ]
10519  },
10520  "COMPUTE_NUM_THREAD_X": {
10521   "fields": [
10522    {"bits": [0, 15], "name": "NUM_THREAD_FULL"},
10523    {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}
10524   ]
10525  },
10526  "COMPUTE_PERFCOUNT_ENABLE": {
10527   "fields": [
10528    {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}
10529   ]
10530  },
10531  "COMPUTE_PGM_HI": {
10532   "fields": [
10533    {"bits": [0, 7], "name": "DATA"}
10534   ]
10535  },
10536  "COMPUTE_PGM_RSRC1": {
10537   "fields": [
10538    {"bits": [0, 5], "name": "VGPRS"},
10539    {"bits": [6, 9], "name": "SGPRS"},
10540    {"bits": [10, 11], "name": "PRIORITY"},
10541    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
10542    {"bits": [20, 20], "name": "PRIV"},
10543    {"bits": [21, 21], "name": "DX10_CLAMP"},
10544    {"bits": [22, 22], "name": "DEBUG_MODE"},
10545    {"bits": [23, 23], "name": "IEEE_MODE"},
10546    {"bits": [24, 24], "name": "BULKY"},
10547    {"bits": [25, 25], "name": "CDBG_USER"},
10548    {"bits": [26, 26], "name": "FP16_OVFL"}
10549   ]
10550  },
10551  "COMPUTE_PGM_RSRC2": {
10552   "fields": [
10553    {"bits": [0, 0], "name": "SCRATCH_EN"},
10554    {"bits": [1, 5], "name": "USER_SGPR"},
10555    {"bits": [6, 6], "name": "TRAP_PRESENT"},
10556    {"bits": [7, 7], "name": "TGID_X_EN"},
10557    {"bits": [8, 8], "name": "TGID_Y_EN"},
10558    {"bits": [9, 9], "name": "TGID_Z_EN"},
10559    {"bits": [10, 10], "name": "TG_SIZE_EN"},
10560    {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},
10561    {"bits": [13, 14], "name": "EXCP_EN_MSB"},
10562    {"bits": [15, 23], "name": "LDS_SIZE"},
10563    {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
10564    {"bits": [31, 31], "name": "SKIP_USGPR0"}
10565   ]
10566  },
10567  "COMPUTE_PIPELINESTAT_ENABLE": {
10568   "fields": [
10569    {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}
10570   ]
10571  },
10572  "COMPUTE_RELAUNCH": {
10573   "fields": [
10574    {"bits": [0, 29], "name": "PAYLOAD"},
10575    {"bits": [30, 30], "name": "IS_EVENT"},
10576    {"bits": [31, 31], "name": "IS_STATE"}
10577   ]
10578  },
10579  "COMPUTE_RESOURCE_LIMITS": {
10580   "fields": [
10581    {"bits": [0, 9], "name": "WAVES_PER_SH"},
10582    {"bits": [12, 15], "name": "TG_PER_CU"},
10583    {"bits": [16, 21], "name": "LOCK_THRESHOLD"},
10584    {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},
10585    {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},
10586    {"bits": [24, 26], "name": "CU_GROUP_COUNT"},
10587    {"bits": [27, 30], "name": "SIMD_DISABLE"}
10588   ]
10589  },
10590  "COMPUTE_STATIC_THREAD_MGMT_SE0": {
10591   "fields": [
10592    {"bits": [0, 15], "name": "SH0_CU_EN"},
10593    {"bits": [16, 31], "name": "SH1_CU_EN"}
10594   ]
10595  },
10596  "COMPUTE_THREAD_TRACE_ENABLE": {
10597   "fields": [
10598    {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}
10599   ]
10600  },
10601  "COMPUTE_TMPRING_SIZE": {
10602   "fields": [
10603    {"bits": [0, 11], "name": "WAVES"},
10604    {"bits": [12, 24], "name": "WAVESIZE"}
10605   ]
10606  },
10607  "COMPUTE_VMID": {
10608   "fields": [
10609    {"bits": [0, 3], "name": "DATA"}
10610   ]
10611  },
10612  "COMPUTE_WAVE_RESTORE_ADDR_HI": {
10613   "fields": [
10614    {"bits": [0, 15], "name": "ADDR"}
10615   ]
10616  },
10617  "CPC_LATENCY_STATS_SELECT": {
10618   "fields": [
10619    {"bits": [0, 2], "name": "INDEX"},
10620    {"bits": [30, 30], "name": "CLEAR"},
10621    {"bits": [31, 31], "name": "ENABLE"}
10622   ]
10623  },
10624  "CPF_LATENCY_STATS_SELECT": {
10625   "fields": [
10626    {"bits": [0, 3], "name": "INDEX"},
10627    {"bits": [30, 30], "name": "CLEAR"},
10628    {"bits": [31, 31], "name": "ENABLE"}
10629   ]
10630  },
10631  "CPF_TC_PERF_COUNTER_WINDOW_SELECT": {
10632   "fields": [
10633    {"bits": [0, 2], "name": "INDEX"},
10634    {"bits": [30, 30], "name": "ALWAYS"},
10635    {"bits": [31, 31], "name": "ENABLE"}
10636   ]
10637  },
10638  "CPG_LATENCY_STATS_SELECT": {
10639   "fields": [
10640    {"bits": [0, 4], "name": "INDEX"},
10641    {"bits": [30, 30], "name": "CLEAR"},
10642    {"bits": [31, 31], "name": "ENABLE"}
10643   ]
10644  },
10645  "CPG_PERFCOUNTER0_SELECT1": {
10646   "fields": [
10647    {"bits": [0, 9], "name": "CNTR_SEL2"},
10648    {"bits": [10, 19], "name": "CNTR_SEL3"},
10649    {"bits": [24, 27], "name": "CNTR_MODE3"},
10650    {"bits": [28, 31], "name": "CNTR_MODE2"}
10651   ]
10652  },
10653  "CPG_PERFCOUNTER1_SELECT": {
10654   "fields": [
10655    {"bits": [0, 9], "name": "CNTR_SEL0"},
10656    {"bits": [10, 19], "name": "CNTR_SEL1"},
10657    {"bits": [20, 23], "name": "SPM_MODE"},
10658    {"bits": [24, 27], "name": "CNTR_MODE1"},
10659    {"bits": [28, 31], "name": "CNTR_MODE0"}
10660   ]
10661  },
10662  "CPG_TC_PERF_COUNTER_WINDOW_SELECT": {
10663   "fields": [
10664    {"bits": [0, 4], "name": "INDEX"},
10665    {"bits": [30, 30], "name": "ALWAYS"},
10666    {"bits": [31, 31], "name": "ENABLE"}
10667   ]
10668  },
10669  "CP_APPEND_ADDR_HI": {
10670   "fields": [
10671    {"bits": [0, 15], "name": "MEM_ADDR_HI"},
10672    {"bits": [16, 16], "name": "CS_PS_SEL"},
10673    {"bits": [25, 25], "name": "CACHE_POLICY"},
10674    {"bits": [29, 31], "name": "COMMAND"}
10675   ]
10676  },
10677  "CP_APPEND_ADDR_LO": {
10678   "fields": [
10679    {"bits": [2, 31], "name": "MEM_ADDR_LO"}
10680   ]
10681  },
10682  "CP_CE_IB1_BASE_HI": {
10683   "fields": [
10684    {"bits": [0, 15], "name": "IB1_BASE_HI"}
10685   ]
10686  },
10687  "CP_CE_IB1_BASE_LO": {
10688   "fields": [
10689    {"bits": [2, 31], "name": "IB1_BASE_LO"}
10690   ]
10691  },
10692  "CP_CE_IB1_BUFSZ": {
10693   "fields": [
10694    {"bits": [0, 19], "name": "IB1_BUFSZ"}
10695   ]
10696  },
10697  "CP_CE_IB1_CMD_BUFSZ": {
10698   "fields": [
10699    {"bits": [0, 19], "name": "IB1_CMD_REQSZ"}
10700   ]
10701  },
10702  "CP_CE_IB2_BASE_HI": {
10703   "fields": [
10704    {"bits": [0, 15], "name": "IB2_BASE_HI"}
10705   ]
10706  },
10707  "CP_CE_IB2_BASE_LO": {
10708   "fields": [
10709    {"bits": [2, 31], "name": "IB2_BASE_LO"}
10710   ]
10711  },
10712  "CP_CE_IB2_BUFSZ": {
10713   "fields": [
10714    {"bits": [0, 19], "name": "IB2_BUFSZ"}
10715   ]
10716  },
10717  "CP_CE_IB2_CMD_BUFSZ": {
10718   "fields": [
10719    {"bits": [0, 19], "name": "IB2_CMD_REQSZ"}
10720   ]
10721  },
10722  "CP_CE_INIT_BASE_HI": {
10723   "fields": [
10724    {"bits": [0, 15], "name": "INIT_BASE_HI"}
10725   ]
10726  },
10727  "CP_CE_INIT_BASE_LO": {
10728   "fields": [
10729    {"bits": [5, 31], "name": "INIT_BASE_LO"}
10730   ]
10731  },
10732  "CP_CE_INIT_BUFSZ": {
10733   "fields": [
10734    {"bits": [0, 11], "name": "INIT_BUFSZ"}
10735   ]
10736  },
10737  "CP_CE_INIT_CMD_BUFSZ": {
10738   "fields": [
10739    {"bits": [0, 11], "name": "INIT_CMD_REQSZ"}
10740   ]
10741  },
10742  "CP_COHER_BASE_HI": {
10743   "fields": [
10744    {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}
10745   ]
10746  },
10747  "CP_COHER_CNTL": {
10748   "fields": [
10749    {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"},
10750    {"bits": [4, 4], "name": "TC_WC_ACTION_ENA"},
10751    {"bits": [5, 5], "name": "TC_INV_METADATA_ACTION_ENA"},
10752    {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},
10753    {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},
10754    {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},
10755    {"bits": [23, 23], "name": "TC_ACTION_ENA"},
10756    {"bits": [25, 25], "name": "CB_ACTION_ENA"},
10757    {"bits": [26, 26], "name": "DB_ACTION_ENA"},
10758    {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},
10759    {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},
10760    {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"},
10761    {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"}
10762   ]
10763  },
10764  "CP_COHER_SIZE_HI": {
10765   "fields": [
10766    {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}
10767   ]
10768  },
10769  "CP_COHER_START_DELAY": {
10770   "fields": [
10771    {"bits": [0, 5], "name": "START_DELAY_COUNT"}
10772   ]
10773  },
10774  "CP_COHER_STATUS": {
10775   "fields": [
10776    {"bits": [24, 25], "name": "MEID"},
10777    {"bits": [31, 31], "name": "STATUS"}
10778   ]
10779  },
10780  "CP_CPC_BUSY_STAT": {
10781   "fields": [
10782    {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},
10783    {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},
10784    {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},
10785    {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},
10786    {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},
10787    {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},
10788    {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},
10789    {"bits": [7, 7], "name": "MEC1_TC_BUSY"},
10790    {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},
10791    {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},
10792    {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},
10793    {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},
10794    {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},
10795    {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},
10796    {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},
10797    {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},
10798    {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},
10799    {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},
10800    {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},
10801    {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},
10802    {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},
10803    {"bits": [23, 23], "name": "MEC2_TC_BUSY"},
10804    {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},
10805    {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},
10806    {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},
10807    {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},
10808    {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},
10809    {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}
10810   ]
10811  },
10812  "CP_CPC_GRBM_FREE_COUNT": {
10813   "fields": [
10814    {"bits": [0, 5], "name": "FREE_COUNT"}
10815   ]
10816  },
10817  "CP_CPC_HALT_HYST_COUNT": {
10818   "fields": [
10819    {"bits": [0, 3], "name": "COUNT"}
10820   ]
10821  },
10822  "CP_CPC_SCRATCH_INDEX": {
10823   "fields": [
10824    {"bits": [0, 8], "name": "SCRATCH_INDEX"}
10825   ]
10826  },
10827  "CP_CPC_STALLED_STAT1": {
10828   "fields": [
10829    {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},
10830    {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},
10831    {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},
10832    {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},
10833    {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},
10834    {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},
10835    {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},
10836    {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},
10837    {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},
10838    {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},
10839    {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"},
10840    {"bits": [22, 22], "name": "UTCL2IU_WAITING_ON_FREE"},
10841    {"bits": [23, 23], "name": "UTCL2IU_WAITING_ON_TAGS"},
10842    {"bits": [24, 24], "name": "UTCL1_WAITING_ON_TRANS"}
10843   ]
10844  },
10845  "CP_CPC_STATUS": {
10846   "fields": [
10847    {"bits": [0, 0], "name": "MEC1_BUSY"},
10848    {"bits": [1, 1], "name": "MEC2_BUSY"},
10849    {"bits": [2, 2], "name": "DC0_BUSY"},
10850    {"bits": [3, 3], "name": "DC1_BUSY"},
10851    {"bits": [4, 4], "name": "RCIU1_BUSY"},
10852    {"bits": [5, 5], "name": "RCIU2_BUSY"},
10853    {"bits": [6, 6], "name": "ROQ1_BUSY"},
10854    {"bits": [7, 7], "name": "ROQ2_BUSY"},
10855    {"bits": [10, 10], "name": "TCIU_BUSY"},
10856    {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},
10857    {"bits": [12, 12], "name": "QU_BUSY"},
10858    {"bits": [13, 13], "name": "UTCL2IU_BUSY"},
10859    {"bits": [14, 14], "name": "SAVE_RESTORE_BUSY"},
10860    {"bits": [29, 29], "name": "CPG_CPC_BUSY"},
10861    {"bits": [30, 30], "name": "CPF_CPC_BUSY"},
10862    {"bits": [31, 31], "name": "CPC_BUSY"}
10863   ]
10864  },
10865  "CP_CPF_BUSY_STAT": {
10866   "fields": [
10867    {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},
10868    {"bits": [1, 1], "name": "CSF_RING_BUSY"},
10869    {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},
10870    {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},
10871    {"bits": [4, 4], "name": "CSF_STATE_BUSY"},
10872    {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},
10873    {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},
10874    {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},
10875    {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},
10876    {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},
10877    {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},
10878    {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},
10879    {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},
10880    {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},
10881    {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},
10882    {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},
10883    {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},
10884    {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},
10885    {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},
10886    {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},
10887    {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},
10888    {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},
10889    {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},
10890    {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},
10891    {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},
10892    {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},
10893    {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},
10894    {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},
10895    {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},
10896    {"bits": [30, 30], "name": "HQD_PQ_BUSY"},
10897    {"bits": [31, 31], "name": "HQD_IB_BUSY"}
10898   ]
10899  },
10900  "CP_CPF_GRBM_FREE_COUNT": {
10901   "fields": [
10902    {"bits": [0, 2], "name": "FREE_COUNT"}
10903   ]
10904  },
10905  "CP_CPF_STALLED_STAT1": {
10906   "fields": [
10907    {"bits": [0, 0], "name": "RING_FETCHING_DATA"},
10908    {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},
10909    {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},
10910    {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},
10911    {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},
10912    {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"},
10913    {"bits": [7, 7], "name": "UTCL2IU_WAITING_ON_FREE"},
10914    {"bits": [8, 8], "name": "UTCL2IU_WAITING_ON_TAGS"},
10915    {"bits": [9, 9], "name": "GFX_UTCL1_WAITING_ON_TRANS"},
10916    {"bits": [10, 10], "name": "CMP_UTCL1_WAITING_ON_TRANS"},
10917    {"bits": [11, 11], "name": "RCIU_WAITING_ON_FREE"}
10918   ]
10919  },
10920  "CP_CPF_STATUS": {
10921   "fields": [
10922    {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},
10923    {"bits": [1, 1], "name": "CSF_BUSY"},
10924    {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},
10925    {"bits": [5, 5], "name": "ROQ_RING_BUSY"},
10926    {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},
10927    {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},
10928    {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},
10929    {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},
10930    {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},
10931    {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},
10932    {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},
10933    {"bits": [13, 13], "name": "INTERRUPT_BUSY"},
10934    {"bits": [14, 14], "name": "TCIU_BUSY"},
10935    {"bits": [15, 15], "name": "HQD_BUSY"},
10936    {"bits": [16, 16], "name": "PRT_BUSY"},
10937    {"bits": [17, 17], "name": "UTCL2IU_BUSY"},
10938    {"bits": [26, 26], "name": "CPF_GFX_BUSY"},
10939    {"bits": [27, 27], "name": "CPF_CMP_BUSY"},
10940    {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"},
10941    {"bits": [30, 30], "name": "CPC_CPF_BUSY"},
10942    {"bits": [31, 31], "name": "CPF_BUSY"}
10943   ]
10944  },
10945  "CP_DMA_CNTL": {
10946   "fields": [
10947    {"bits": [0, 0], "name": "UTCL1_FAULT_CONTROL"},
10948    {"bits": [4, 5], "name": "MIN_AVAILSZ"},
10949    {"bits": [16, 19], "name": "BUFFER_DEPTH"},
10950    {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},
10951    {"bits": [29, 29], "name": "PIO_FIFO_FULL"},
10952    {"bits": [30, 31], "name": "PIO_COUNT"}
10953   ]
10954  },
10955  "CP_DMA_ME_COMMAND": {
10956   "fields": [
10957    {"bits": [0, 25], "name": "BYTE_COUNT"},
10958    {"bits": [26, 26], "name": "SAS"},
10959    {"bits": [27, 27], "name": "DAS"},
10960    {"bits": [28, 28], "name": "SAIC"},
10961    {"bits": [29, 29], "name": "DAIC"},
10962    {"bits": [30, 30], "name": "RAW_WAIT"},
10963    {"bits": [31, 31], "name": "DIS_WC"}
10964   ]
10965  },
10966  "CP_DMA_ME_DST_ADDR_HI": {
10967   "fields": [
10968    {"bits": [0, 15], "name": "DST_ADDR_HI"}
10969   ]
10970  },
10971  "CP_DMA_ME_SRC_ADDR_HI": {
10972   "fields": [
10973    {"bits": [0, 15], "name": "SRC_ADDR_HI"}
10974   ]
10975  },
10976  "CP_DMA_PFP_CONTROL": {
10977   "fields": [
10978    {"bits": [10, 10], "name": "MEMLOG_CLEAR"},
10979    {"bits": [13, 13], "name": "SRC_CACHE_POLICY"},
10980    {"bits": [20, 21], "name": "DST_SELECT"},
10981    {"bits": [25, 25], "name": "DST_CACHE_POLICY"},
10982    {"bits": [29, 30], "name": "SRC_SELECT"}
10983   ]
10984  },
10985  "CP_DMA_READ_TAGS": {
10986   "fields": [
10987    {"bits": [0, 25], "name": "DMA_READ_TAG"},
10988    {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}
10989   ]
10990  },
10991  "CP_DRAW_WINDOW_CNTL": {
10992   "fields": [
10993    {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},
10994    {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},
10995    {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},
10996    {"bits": [8, 8], "name": "MODE"}
10997   ]
10998  },
10999  "CP_DRAW_WINDOW_LO": {
11000   "fields": [
11001    {"bits": [0, 15], "name": "MIN"},
11002    {"bits": [16, 31], "name": "MAX"}
11003   ]
11004  },
11005  "CP_EOP_DONE_ADDR_HI": {
11006   "fields": [
11007    {"bits": [0, 15], "name": "ADDR_HI"}
11008   ]
11009  },
11010  "CP_EOP_DONE_ADDR_LO": {
11011   "fields": [
11012    {"bits": [2, 31], "name": "ADDR_LO"}
11013   ]
11014  },
11015  "CP_EOP_DONE_DATA_CNTL": {
11016   "fields": [
11017    {"bits": [16, 17], "name": "DST_SEL"},
11018    {"bits": [24, 26], "name": "INT_SEL"},
11019    {"bits": [29, 31], "name": "DATA_SEL"}
11020   ]
11021  },
11022  "CP_EOP_DONE_EVENT_CNTL": {
11023   "fields": [
11024    {"bits": [0, 6], "name": "WBINV_TC_OP"},
11025    {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},
11026    {"bits": [25, 25], "name": "CACHE_POLICY"},
11027    {"bits": [28, 28], "name": "EXECUTE"}
11028   ]
11029  },
11030  "CP_IB1_OFFSET": {
11031   "fields": [
11032    {"bits": [0, 19], "name": "IB1_OFFSET"}
11033   ]
11034  },
11035  "CP_IB1_PREAMBLE_BEGIN": {
11036   "fields": [
11037    {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}
11038   ]
11039  },
11040  "CP_IB1_PREAMBLE_END": {
11041   "fields": [
11042    {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}
11043   ]
11044  },
11045  "CP_IB2_OFFSET": {
11046   "fields": [
11047    {"bits": [0, 19], "name": "IB2_OFFSET"}
11048   ]
11049  },
11050  "CP_IB2_PREAMBLE_BEGIN": {
11051   "fields": [
11052    {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}
11053   ]
11054  },
11055  "CP_IB2_PREAMBLE_END": {
11056   "fields": [
11057    {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}
11058   ]
11059  },
11060  "CP_INDEX_TYPE": {
11061   "fields": [
11062    {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}
11063   ]
11064  },
11065  "CP_ME_COHER_CNTL": {
11066   "fields": [
11067    {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},
11068    {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},
11069    {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},
11070    {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},
11071    {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},
11072    {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},
11073    {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},
11074    {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},
11075    {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},
11076    {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},
11077    {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},
11078    {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},
11079    {"bits": [21, 21], "name": "DEST_BASE_3_ENA"}
11080   ]
11081  },
11082  "CP_ME_COHER_STATUS": {
11083   "fields": [
11084    {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},
11085    {"bits": [31, 31], "name": "STATUS"}
11086   ]
11087  },
11088  "CP_ME_MC_RADDR_HI": {
11089   "fields": [
11090    {"bits": [0, 15], "name": "ME_MC_RADDR_HI"},
11091    {"bits": [22, 22], "name": "CACHE_POLICY"}
11092   ]
11093  },
11094  "CP_ME_MC_RADDR_LO": {
11095   "fields": [
11096    {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}
11097   ]
11098  },
11099  "CP_ME_MC_WADDR_HI": {
11100   "fields": [
11101    {"bits": [0, 15], "name": "ME_MC_WADDR_HI"},
11102    {"bits": [22, 22], "name": "CACHE_POLICY"}
11103   ]
11104  },
11105  "CP_ME_MC_WADDR_LO": {
11106   "fields": [
11107    {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}
11108   ]
11109  },
11110  "CP_PERFMON_CNTL": {
11111   "fields": [
11112    {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
11113    {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},
11114    {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},
11115    {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
11116   ]
11117  },
11118  "CP_PERFMON_CNTX_CNTL": {
11119   "fields": [
11120    {"bits": [31, 31], "name": "PERFMON_ENABLE"}
11121   ]
11122  },
11123  "CP_PFP_COMPLETION_STATUS": {
11124   "fields": [
11125    {"bits": [0, 1], "name": "STATUS"}
11126   ]
11127  },
11128  "CP_PFP_IB_CONTROL": {
11129   "fields": [
11130    {"bits": [0, 7], "name": "IB_EN"}
11131   ]
11132  },
11133  "CP_PFP_LOAD_CONTROL": {
11134   "fields": [
11135    {"bits": [0, 0], "name": "CONFIG_REG_EN"},
11136    {"bits": [1, 1], "name": "CNTX_REG_EN"},
11137    {"bits": [16, 16], "name": "SH_GFX_REG_EN"},
11138    {"bits": [24, 24], "name": "SH_CS_REG_EN"}
11139   ]
11140  },
11141  "CP_PIPEID": {
11142   "fields": [
11143    {"bits": [0, 1], "name": "PIPE_ID"}
11144   ]
11145  },
11146  "CP_PIPE_STATS_ADDR_HI": {
11147   "fields": [
11148    {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}
11149   ]
11150  },
11151  "CP_PIPE_STATS_ADDR_LO": {
11152   "fields": [
11153    {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}
11154   ]
11155  },
11156  "CP_PIPE_STATS_CONTROL": {
11157   "fields": [
11158    {"bits": [25, 25], "name": "CACHE_POLICY"}
11159   ]
11160  },
11161  "CP_PRED_NOT_VISIBLE": {
11162   "fields": [
11163    {"bits": [0, 0], "name": "NOT_VISIBLE"}
11164   ]
11165  },
11166  "CP_RB_OFFSET": {
11167   "fields": [
11168    {"bits": [0, 19], "name": "RB_OFFSET"}
11169   ]
11170  },
11171  "CP_SAMPLE_STATUS": {
11172   "fields": [
11173    {"bits": [0, 0], "name": "Z_PASS_ACITVE"},
11174    {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"},
11175    {"bits": [2, 2], "name": "PIPELINE_ACTIVE"},
11176    {"bits": [3, 3], "name": "STIPPLE_ACTIVE"},
11177    {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"},
11178    {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"},
11179    {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"},
11180    {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"}
11181   ]
11182  },
11183  "CP_SCRATCH_INDEX": {
11184   "fields": [
11185    {"bits": [0, 7], "name": "SCRATCH_INDEX"}
11186   ]
11187  },
11188  "CP_SIG_SEM_ADDR_HI": {
11189   "fields": [
11190    {"bits": [0, 15], "name": "SEM_ADDR_HI"},
11191    {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},
11192    {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},
11193    {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},
11194    {"bits": [29, 31], "name": "SEM_SELECT"}
11195   ]
11196  },
11197  "CP_SIG_SEM_ADDR_LO": {
11198   "fields": [
11199    {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},
11200    {"bits": [3, 31], "name": "SEM_ADDR_LO"}
11201   ]
11202  },
11203  "CP_STREAM_OUT_ADDR_HI": {
11204   "fields": [
11205    {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}
11206   ]
11207  },
11208  "CP_STREAM_OUT_ADDR_LO": {
11209   "fields": [
11210    {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}
11211   ]
11212  },
11213  "CP_STRMOUT_CNTL": {
11214   "fields": [
11215    {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}
11216   ]
11217  },
11218  "CP_ST_BASE_HI": {
11219   "fields": [
11220    {"bits": [0, 15], "name": "ST_BASE_HI"}
11221   ]
11222  },
11223  "CP_ST_BASE_LO": {
11224   "fields": [
11225    {"bits": [2, 31], "name": "ST_BASE_LO"}
11226   ]
11227  },
11228  "CP_ST_BUFSZ": {
11229   "fields": [
11230    {"bits": [0, 19], "name": "ST_BUFSZ"}
11231   ]
11232  },
11233  "CP_ST_CMD_BUFSZ": {
11234   "fields": [
11235    {"bits": [0, 19], "name": "ST_CMD_REQSZ"}
11236   ]
11237  },
11238  "CP_VMID": {
11239   "fields": [
11240    {"bits": [0, 3], "name": "VMID"}
11241   ]
11242  },
11243  "CS_COPY_STATE": {
11244   "fields": [
11245    {"bits": [0, 2], "name": "SRC_STATE_ID"}
11246   ]
11247  },
11248  "DB_ALPHA_TO_MASK": {
11249   "fields": [
11250    {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},
11251    {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},
11252    {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},
11253    {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},
11254    {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},
11255    {"bits": [16, 16], "name": "OFFSET_ROUND"}
11256   ]
11257  },
11258  "DB_COUNT_CONTROL": {
11259   "fields": [
11260    {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},
11261    {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},
11262    {"bits": [4, 6], "name": "SAMPLE_RATE"},
11263    {"bits": [8, 11], "name": "ZPASS_ENABLE"},
11264    {"bits": [12, 15], "name": "ZFAIL_ENABLE"},
11265    {"bits": [16, 19], "name": "SFAIL_ENABLE"},
11266    {"bits": [20, 23], "name": "DBFAIL_ENABLE"},
11267    {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},
11268    {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}
11269   ]
11270  },
11271  "DB_DEPTH_CONTROL": {
11272   "fields": [
11273    {"bits": [0, 0], "name": "STENCIL_ENABLE"},
11274    {"bits": [1, 1], "name": "Z_ENABLE"},
11275    {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},
11276    {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},
11277    {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},
11278    {"bits": [7, 7], "name": "BACKFACE_ENABLE"},
11279    {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},
11280    {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},
11281    {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},
11282    {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}
11283   ]
11284  },
11285  "DB_DEPTH_SIZE": {
11286   "fields": [
11287    {"bits": [0, 13], "name": "X_MAX"},
11288    {"bits": [16, 29], "name": "Y_MAX"}
11289   ]
11290  },
11291  "DB_DEPTH_VIEW": {
11292   "fields": [
11293    {"bits": [0, 10], "name": "SLICE_START"},
11294    {"bits": [13, 23], "name": "SLICE_MAX"},
11295    {"bits": [24, 24], "name": "Z_READ_ONLY"},
11296    {"bits": [25, 25], "name": "STENCIL_READ_ONLY"},
11297    {"bits": [26, 29], "name": "MIPID"}
11298   ]
11299  },
11300  "DB_DFSM_CONTROL": {
11301   "fields": [
11302    {"bits": [0, 1], "enum_ref": "DB_DFSM_CONTROL__PUNCHOUT_MODE", "name": "PUNCHOUT_MODE"},
11303    {"bits": [2, 2], "name": "POPS_DRAIN_PS_ON_OVERLAP"},
11304    {"bits": [3, 3], "name": "DISALLOW_OVERFLOW"}
11305   ]
11306  },
11307  "DB_EQAA": {
11308   "fields": [
11309    {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},
11310    {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},
11311    {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},
11312    {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},
11313    {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},
11314    {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},
11315    {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},
11316    {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},
11317    {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},
11318    {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},
11319    {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},
11320    {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}
11321   ]
11322  },
11323  "DB_HTILE_DATA_BASE_HI": {
11324   "fields": [
11325    {"bits": [0, 7], "name": "BASE_HI"}
11326   ]
11327  },
11328  "DB_HTILE_SURFACE": {
11329   "fields": [
11330    {"bits": [1, 1], "name": "FULL_CACHE"},
11331    {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},
11332    {"bits": [3, 3], "name": "PRELOAD"},
11333    {"bits": [4, 9], "name": "PREFETCH_WIDTH"},
11334    {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},
11335    {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"},
11336    {"bits": [18, 18], "name": "PIPE_ALIGNED"},
11337    {"bits": [19, 19], "name": "RB_ALIGNED"}
11338   ]
11339  },
11340  "DB_OCCLUSION_COUNT0_HI": {
11341   "fields": [
11342    {"bits": [0, 30], "name": "COUNT_HI"}
11343   ]
11344  },
11345  "DB_PRELOAD_CONTROL": {
11346   "fields": [
11347    {"bits": [0, 7], "name": "START_X"},
11348    {"bits": [8, 15], "name": "START_Y"},
11349    {"bits": [16, 23], "name": "MAX_X"},
11350    {"bits": [24, 31], "name": "MAX_Y"}
11351   ]
11352  },
11353  "DB_RENDER_CONTROL": {
11354   "fields": [
11355    {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},
11356    {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},
11357    {"bits": [2, 2], "name": "DEPTH_COPY"},
11358    {"bits": [3, 3], "name": "STENCIL_COPY"},
11359    {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},
11360    {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},
11361    {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},
11362    {"bits": [7, 7], "name": "COPY_CENTROID"},
11363    {"bits": [8, 11], "name": "COPY_SAMPLE"},
11364    {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}
11365   ]
11366  },
11367  "DB_RENDER_OVERRIDE": {
11368   "fields": [
11369    {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},
11370    {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},
11371    {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},
11372    {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},
11373    {"bits": [7, 7], "name": "FAST_Z_DISABLE"},
11374    {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},
11375    {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},
11376    {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},
11377    {"bits": [11, 11], "name": "FORCE_Z_READ"},
11378    {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},
11379    {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},
11380    {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},
11381    {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},
11382    {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},
11383    {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},
11384    {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},
11385    {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},
11386    {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},
11387    {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},
11388    {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},
11389    {"bits": [29, 29], "name": "FORCE_Z_VALID"},
11390    {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},
11391    {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}
11392   ]
11393  },
11394  "DB_RENDER_OVERRIDE2": {
11395   "fields": [
11396    {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},
11397    {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},
11398    {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},
11399    {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},
11400    {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},
11401    {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},
11402    {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},
11403    {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},
11404    {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},
11405    {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},
11406    {"bits": [15, 17], "name": "HIS_SFUNC_FF"},
11407    {"bits": [18, 20], "name": "HIS_SFUNC_BF"},
11408    {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},
11409    {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},
11410    {"bits": [23, 23], "name": "DISABLE_FAST_PASS"},
11411    {"bits": [25, 25], "name": "ALLOW_PARTIAL_RES_HIER_KILL"}
11412   ]
11413  },
11414  "DB_SHADER_CONTROL": {
11415   "fields": [
11416    {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},
11417    {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},
11418    {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},
11419    {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},
11420    {"bits": [6, 6], "name": "KILL_ENABLE"},
11421    {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},
11422    {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},
11423    {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},
11424    {"bits": [10, 10], "name": "EXEC_ON_NOOP"},
11425    {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},
11426    {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},
11427    {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"},
11428    {"bits": [15, 15], "name": "DUAL_QUAD_DISABLE"},
11429    {"bits": [16, 16], "name": "PRIMITIVE_ORDERED_PIXEL_SHADER"},
11430    {"bits": [17, 17], "name": "EXEC_IF_OVERLAPPED"},
11431    {"bits": [20, 22], "name": "POPS_OVERLAP_NUM_SAMPLES"}
11432   ]
11433  },
11434  "DB_SRESULTS_COMPARE_STATE0": {
11435   "fields": [
11436    {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},
11437    {"bits": [4, 11], "name": "COMPAREVALUE0"},
11438    {"bits": [12, 19], "name": "COMPAREMASK0"},
11439    {"bits": [24, 24], "name": "ENABLE0"}
11440   ]
11441  },
11442  "DB_SRESULTS_COMPARE_STATE1": {
11443   "fields": [
11444    {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},
11445    {"bits": [4, 11], "name": "COMPAREVALUE1"},
11446    {"bits": [12, 19], "name": "COMPAREMASK1"},
11447    {"bits": [24, 24], "name": "ENABLE1"}
11448   ]
11449  },
11450  "DB_STENCILREFMASK": {
11451   "fields": [
11452    {"bits": [0, 7], "name": "STENCILTESTVAL"},
11453    {"bits": [8, 15], "name": "STENCILMASK"},
11454    {"bits": [16, 23], "name": "STENCILWRITEMASK"},
11455    {"bits": [24, 31], "name": "STENCILOPVAL"}
11456   ]
11457  },
11458  "DB_STENCILREFMASK_BF": {
11459   "fields": [
11460    {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},
11461    {"bits": [8, 15], "name": "STENCILMASK_BF"},
11462    {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},
11463    {"bits": [24, 31], "name": "STENCILOPVAL_BF"}
11464   ]
11465  },
11466  "DB_STENCIL_CLEAR": {
11467   "fields": [
11468    {"bits": [0, 7], "name": "CLEAR"}
11469   ]
11470  },
11471  "DB_STENCIL_CONTROL": {
11472   "fields": [
11473    {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},
11474    {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},
11475    {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},
11476    {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},
11477    {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},
11478    {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}
11479   ]
11480  },
11481  "DB_STENCIL_INFO": {
11482   "fields": [
11483    {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},
11484    {"bits": [4, 8], "name": "SW_MODE"},
11485    {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"},
11486    {"bits": [13, 14], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"},
11487    {"bits": [15, 15], "name": "ITERATE_FLUSH"},
11488    {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
11489    {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"},
11490    {"bits": [30, 30], "name": "CLEAR_DISALLOWED"}
11491   ]
11492  },
11493  "DB_Z_INFO": {
11494   "fields": [
11495    {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},
11496    {"bits": [2, 3], "name": "NUM_SAMPLES"},
11497    {"bits": [4, 8], "name": "SW_MODE"},
11498    {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"},
11499    {"bits": [13, 14], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"},
11500    {"bits": [15, 15], "name": "ITERATE_FLUSH"},
11501    {"bits": [16, 19], "name": "MAXMIP"},
11502    {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"},
11503    {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
11504    {"bits": [28, 28], "name": "READ_SIZE"},
11505    {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},
11506    {"bits": [30, 30], "name": "CLEAR_DISALLOWED"},
11507    {"bits": [31, 31], "name": "ZRANGE_PRECISION"}
11508   ]
11509  },
11510  "DB_Z_INFO2": {
11511   "fields": [
11512    {"bits": [0, 15], "name": "EPITCH"}
11513   ]
11514  },
11515  "GB_ADDR_CONFIG": {
11516   "fields": [
11517    {"bits": [0, 2], "name": "NUM_PIPES"},
11518    {"bits": [3, 5], "name": "PIPE_INTERLEAVE_SIZE"},
11519    {"bits": [6, 7], "name": "MAX_COMPRESSED_FRAGS"},
11520    {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},
11521    {"bits": [12, 14], "enum_ref": "NumBanks", "name": "NUM_BANKS"},
11522    {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},
11523    {"bits": [19, 20], "name": "NUM_SHADER_ENGINES"},
11524    {"bits": [21, 23], "name": "NUM_GPUS"},
11525    {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},
11526    {"bits": [26, 27], "name": "NUM_RB_PER_SE"},
11527    {"bits": [28, 29], "name": "ROW_SIZE"},
11528    {"bits": [30, 30], "name": "NUM_LOWER_PIPES"},
11529    {"bits": [31, 31], "name": "SE_ENABLE"}
11530   ]
11531  },
11532  "GB_MACROTILE_MODE0": {
11533   "fields": [
11534    {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
11535    {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
11536    {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
11537    {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
11538   ]
11539  },
11540  "GB_TILE_MODE0": {
11541   "fields": [
11542    {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
11543    {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
11544    {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
11545    {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},
11546    {"bits": [25, 26], "name": "SAMPLE_SPLIT"}
11547   ]
11548  },
11549  "GDS_ATOM_BASE": {
11550   "fields": [
11551    {"bits": [0, 15], "name": "BASE"},
11552    {"bits": [16, 31], "name": "UNUSED"}
11553   ]
11554  },
11555  "GDS_ATOM_CNTL": {
11556   "fields": [
11557    {"bits": [0, 5], "name": "AINC"},
11558    {"bits": [6, 7], "name": "UNUSED1"},
11559    {"bits": [8, 9], "name": "DMODE"},
11560    {"bits": [10, 31], "name": "UNUSED2"}
11561   ]
11562  },
11563  "GDS_ATOM_COMPLETE": {
11564   "fields": [
11565    {"bits": [0, 0], "name": "COMPLETE"},
11566    {"bits": [1, 31], "name": "UNUSED"}
11567   ]
11568  },
11569  "GDS_ATOM_OFFSET0": {
11570   "fields": [
11571    {"bits": [0, 7], "name": "OFFSET0"},
11572    {"bits": [8, 31], "name": "UNUSED"}
11573   ]
11574  },
11575  "GDS_ATOM_OFFSET1": {
11576   "fields": [
11577    {"bits": [0, 7], "name": "OFFSET1"},
11578    {"bits": [8, 31], "name": "UNUSED"}
11579   ]
11580  },
11581  "GDS_ATOM_OP": {
11582   "fields": [
11583    {"bits": [0, 7], "name": "OP"},
11584    {"bits": [8, 31], "name": "UNUSED"}
11585   ]
11586  },
11587  "GDS_ATOM_SIZE": {
11588   "fields": [
11589    {"bits": [0, 15], "name": "SIZE"},
11590    {"bits": [16, 31], "name": "UNUSED"}
11591   ]
11592  },
11593  "GDS_GWS_RESOURCE": {
11594   "fields": [
11595    {"bits": [0, 0], "name": "FLAG"},
11596    {"bits": [1, 12], "name": "COUNTER"},
11597    {"bits": [13, 13], "name": "TYPE"},
11598    {"bits": [14, 14], "name": "DED"},
11599    {"bits": [15, 15], "name": "RELEASE_ALL"},
11600    {"bits": [16, 27], "name": "HEAD_QUEUE"},
11601    {"bits": [28, 28], "name": "HEAD_VALID"},
11602    {"bits": [29, 29], "name": "HEAD_FLAG"},
11603    {"bits": [30, 30], "name": "HALTED"},
11604    {"bits": [31, 31], "name": "UNUSED1"}
11605   ]
11606  },
11607  "GDS_GWS_RESOURCE_CNT": {
11608   "fields": [
11609    {"bits": [0, 15], "name": "RESOURCE_CNT"},
11610    {"bits": [16, 31], "name": "UNUSED"}
11611   ]
11612  },
11613  "GDS_GWS_RESOURCE_CNTL": {
11614   "fields": [
11615    {"bits": [0, 5], "name": "INDEX"},
11616    {"bits": [6, 31], "name": "UNUSED"}
11617   ]
11618  },
11619  "GDS_OA_ADDRESS": {
11620   "fields": [
11621    {"bits": [0, 15], "name": "DS_ADDRESS"},
11622    {"bits": [16, 19], "name": "CRAWLER"},
11623    {"bits": [20, 21], "name": "CRAWLER_TYPE"},
11624    {"bits": [22, 29], "name": "UNUSED"},
11625    {"bits": [30, 30], "name": "NO_ALLOC"},
11626    {"bits": [31, 31], "name": "ENABLE"}
11627   ]
11628  },
11629  "GDS_OA_CNTL": {
11630   "fields": [
11631    {"bits": [0, 3], "name": "INDEX"},
11632    {"bits": [4, 31], "name": "UNUSED"}
11633   ]
11634  },
11635  "GDS_OA_INCDEC": {
11636   "fields": [
11637    {"bits": [0, 30], "name": "VALUE"},
11638    {"bits": [31, 31], "name": "INCDEC"}
11639   ]
11640  },
11641  "GRBM_GFX_INDEX": {
11642   "fields": [
11643    {"bits": [0, 7], "name": "INSTANCE_INDEX"},
11644    {"bits": [8, 15], "name": "SH_INDEX"},
11645    {"bits": [16, 23], "name": "SE_INDEX"},
11646    {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},
11647    {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},
11648    {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}
11649   ]
11650  },
11651  "GRBM_PERFCOUNTER0_SELECT": {
11652   "fields": [
11653    {"bits": [0, 5], "name": "PERF_SEL"},
11654    {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
11655    {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
11656    {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},
11657    {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},
11658    {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},
11659    {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},
11660    {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},
11661    {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},
11662    {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},
11663    {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},
11664    {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},
11665    {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},
11666    {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},
11667    {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},
11668    {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},
11669    {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},
11670    {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},
11671    {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"},
11672    {"bits": [29, 29], "name": "UTCL2_BUSY_USER_DEFINED_MASK"},
11673    {"bits": [30, 30], "name": "EA_BUSY_USER_DEFINED_MASK"},
11674    {"bits": [31, 31], "name": "RMI_BUSY_USER_DEFINED_MASK"}
11675   ]
11676  },
11677  "GRBM_SE0_PERFCOUNTER_SELECT": {
11678   "fields": [
11679    {"bits": [0, 5], "name": "PERF_SEL"},
11680    {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
11681    {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
11682    {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},
11683    {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},
11684    {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},
11685    {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},
11686    {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},
11687    {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},
11688    {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},
11689    {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},
11690    {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"},
11691    {"bits": [22, 22], "name": "RMI_BUSY_USER_DEFINED_MASK"}
11692   ]
11693  },
11694  "GRBM_STATUS": {
11695   "fields": [
11696    {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},
11697    {"bits": [5, 5], "name": "RSMU_RQ_PENDING"},
11698    {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},
11699    {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},
11700    {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},
11701    {"bits": [12, 12], "name": "DB_CLEAN"},
11702    {"bits": [13, 13], "name": "CB_CLEAN"},
11703    {"bits": [14, 14], "name": "TA_BUSY"},
11704    {"bits": [15, 15], "name": "GDS_BUSY"},
11705    {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},
11706    {"bits": [17, 17], "name": "VGT_BUSY"},
11707    {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},
11708    {"bits": [19, 19], "name": "IA_BUSY"},
11709    {"bits": [20, 20], "name": "SX_BUSY"},
11710    {"bits": [21, 21], "name": "WD_BUSY"},
11711    {"bits": [22, 22], "name": "SPI_BUSY"},
11712    {"bits": [23, 23], "name": "BCI_BUSY"},
11713    {"bits": [24, 24], "name": "SC_BUSY"},
11714    {"bits": [25, 25], "name": "PA_BUSY"},
11715    {"bits": [26, 26], "name": "DB_BUSY"},
11716    {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},
11717    {"bits": [29, 29], "name": "CP_BUSY"},
11718    {"bits": [30, 30], "name": "CB_BUSY"},
11719    {"bits": [31, 31], "name": "GUI_ACTIVE"}
11720   ]
11721  },
11722  "GRBM_STATUS2": {
11723   "fields": [
11724    {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},
11725    {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},
11726    {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},
11727    {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},
11728    {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},
11729    {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},
11730    {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},
11731    {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},
11732    {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},
11733    {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},
11734    {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},
11735    {"bits": [14, 14], "name": "RLC_RQ_PENDING"},
11736    {"bits": [15, 15], "name": "UTCL2_BUSY"},
11737    {"bits": [16, 16], "name": "EA_BUSY"},
11738    {"bits": [17, 17], "name": "RMI_BUSY"},
11739    {"bits": [18, 18], "name": "UTCL2_RQ_PENDING"},
11740    {"bits": [19, 19], "name": "CPF_RQ_PENDING"},
11741    {"bits": [20, 20], "name": "EA_LINK_BUSY"},
11742    {"bits": [24, 24], "name": "RLC_BUSY"},
11743    {"bits": [25, 25], "name": "TC_BUSY"},
11744    {"bits": [26, 26], "name": "TCC_CC_RESIDENT"},
11745    {"bits": [28, 28], "name": "CPF_BUSY"},
11746    {"bits": [29, 29], "name": "CPC_BUSY"},
11747    {"bits": [30, 30], "name": "CPG_BUSY"},
11748    {"bits": [31, 31], "name": "CPAXI_BUSY"}
11749   ]
11750  },
11751  "GRBM_STATUS_SE0": {
11752   "fields": [
11753    {"bits": [1, 1], "name": "DB_CLEAN"},
11754    {"bits": [2, 2], "name": "CB_CLEAN"},
11755    {"bits": [21, 21], "name": "RMI_BUSY"},
11756    {"bits": [22, 22], "name": "BCI_BUSY"},
11757    {"bits": [23, 23], "name": "VGT_BUSY"},
11758    {"bits": [24, 24], "name": "PA_BUSY"},
11759    {"bits": [25, 25], "name": "TA_BUSY"},
11760    {"bits": [26, 26], "name": "SX_BUSY"},
11761    {"bits": [27, 27], "name": "SPI_BUSY"},
11762    {"bits": [29, 29], "name": "SC_BUSY"},
11763    {"bits": [30, 30], "name": "DB_BUSY"},
11764    {"bits": [31, 31], "name": "CB_BUSY"}
11765   ]
11766  },
11767  "IA_MULTI_VGT_PARAM": {
11768   "fields": [
11769    {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},
11770    {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},
11771    {"bits": [17, 17], "name": "SWITCH_ON_EOP"},
11772    {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},
11773    {"bits": [19, 19], "name": "SWITCH_ON_EOI"},
11774    {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"},
11775    {"bits": [21, 21], "name": "EN_INST_OPT_BASIC"},
11776    {"bits": [22, 22], "name": "EN_INST_OPT_ADV"},
11777    {"bits": [23, 23], "name": "HW_USE_ONLY"}
11778   ]
11779  },
11780  "IA_PERFCOUNTER0_SELECT": {
11781   "fields": [
11782    {"bits": [0, 9], "name": "PERF_SEL"},
11783    {"bits": [10, 19], "name": "PERF_SEL1"},
11784    {"bits": [20, 23], "name": "CNTR_MODE"},
11785    {"bits": [24, 27], "name": "PERF_MODE1"},
11786    {"bits": [28, 31], "name": "PERF_MODE"}
11787   ]
11788  },
11789  "IA_PERFCOUNTER0_SELECT1": {
11790   "fields": [
11791    {"bits": [0, 9], "name": "PERF_SEL2"},
11792    {"bits": [10, 19], "name": "PERF_SEL3"},
11793    {"bits": [24, 27], "name": "PERF_MODE3"},
11794    {"bits": [28, 31], "name": "PERF_MODE2"}
11795   ]
11796  },
11797  "PA_CL_CLIP_CNTL": {
11798   "fields": [
11799    {"bits": [0, 0], "name": "UCP_ENA_0"},
11800    {"bits": [1, 1], "name": "UCP_ENA_1"},
11801    {"bits": [2, 2], "name": "UCP_ENA_2"},
11802    {"bits": [3, 3], "name": "UCP_ENA_3"},
11803    {"bits": [4, 4], "name": "UCP_ENA_4"},
11804    {"bits": [5, 5], "name": "UCP_ENA_5"},
11805    {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},
11806    {"bits": [14, 15], "name": "PS_UCP_MODE"},
11807    {"bits": [16, 16], "name": "CLIP_DISABLE"},
11808    {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},
11809    {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},
11810    {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},
11811    {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},
11812    {"bits": [21, 21], "name": "VTX_KILL_OR"},
11813    {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},
11814    {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},
11815    {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},
11816    {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},
11817    {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"},
11818    {"bits": [28, 28], "name": "ZCLIP_PROG_NEAR_ENA"}
11819   ]
11820  },
11821  "PA_CL_NANINF_CNTL": {
11822   "fields": [
11823    {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},
11824    {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},
11825    {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},
11826    {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},
11827    {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},
11828    {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},
11829    {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},
11830    {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},
11831    {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},
11832    {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},
11833    {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},
11834    {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},
11835    {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},
11836    {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},
11837    {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},
11838    {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}
11839   ]
11840  },
11841  "PA_CL_NGG_CNTL": {
11842   "fields": [
11843    {"bits": [0, 0], "name": "VERTEX_REUSE_OFF"},
11844    {"bits": [1, 1], "name": "INDEX_BUF_EDGE_FLAG_ENA"}
11845   ]
11846  },
11847  "PA_CL_OBJPRIM_ID_CNTL": {
11848   "fields": [
11849    {"bits": [0, 0], "name": "OBJ_ID_SEL"},
11850    {"bits": [1, 1], "name": "ADD_PIPED_PRIM_ID"},
11851    {"bits": [2, 2], "name": "EN_32BIT_OBJPRIMID"}
11852   ]
11853  },
11854  "PA_CL_VS_OUT_CNTL": {
11855   "fields": [
11856    {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},
11857    {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},
11858    {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},
11859    {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},
11860    {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},
11861    {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},
11862    {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},
11863    {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},
11864    {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},
11865    {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},
11866    {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},
11867    {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},
11868    {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},
11869    {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},
11870    {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},
11871    {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},
11872    {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},
11873    {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},
11874    {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},
11875    {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},
11876    {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},
11877    {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},
11878    {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},
11879    {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},
11880    {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},
11881    {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"},
11882    {"bits": [26, 26], "name": "USE_VTX_LINE_WIDTH"},
11883    {"bits": [27, 27], "name": "USE_VTX_SHD_OBJPRIM_ID"}
11884   ]
11885  },
11886  "PA_CL_VTE_CNTL": {
11887   "fields": [
11888    {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},
11889    {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},
11890    {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},
11891    {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},
11892    {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},
11893    {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},
11894    {"bits": [8, 8], "name": "VTX_XY_FMT"},
11895    {"bits": [9, 9], "name": "VTX_Z_FMT"},
11896    {"bits": [10, 10], "name": "VTX_W0_FMT"},
11897    {"bits": [11, 11], "name": "PERFCOUNTER_REF"}
11898   ]
11899  },
11900  "PA_SC_AA_CONFIG": {
11901   "fields": [
11902    {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},
11903    {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},
11904    {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},
11905    {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},
11906    {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"},
11907    {"bits": [26, 27], "enum_ref": "CovToShaderSel", "name": "COVERAGE_TO_SHADER_SELECT"}
11908   ]
11909  },
11910  "PA_SC_AA_MASK_X0Y0_X1Y0": {
11911   "fields": [
11912    {"bits": [0, 15], "name": "AA_MASK_X0Y0"},
11913    {"bits": [16, 31], "name": "AA_MASK_X1Y0"}
11914   ]
11915  },
11916  "PA_SC_AA_MASK_X0Y1_X1Y1": {
11917   "fields": [
11918    {"bits": [0, 15], "name": "AA_MASK_X0Y1"},
11919    {"bits": [16, 31], "name": "AA_MASK_X1Y1"}
11920   ]
11921  },
11922  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0": {
11923   "fields": [
11924    {"bits": [0, 3], "name": "S0_X"},
11925    {"bits": [4, 7], "name": "S0_Y"},
11926    {"bits": [8, 11], "name": "S1_X"},
11927    {"bits": [12, 15], "name": "S1_Y"},
11928    {"bits": [16, 19], "name": "S2_X"},
11929    {"bits": [20, 23], "name": "S2_Y"},
11930    {"bits": [24, 27], "name": "S3_X"},
11931    {"bits": [28, 31], "name": "S3_Y"}
11932   ]
11933  },
11934  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1": {
11935   "fields": [
11936    {"bits": [0, 3], "name": "S4_X"},
11937    {"bits": [4, 7], "name": "S4_Y"},
11938    {"bits": [8, 11], "name": "S5_X"},
11939    {"bits": [12, 15], "name": "S5_Y"},
11940    {"bits": [16, 19], "name": "S6_X"},
11941    {"bits": [20, 23], "name": "S6_Y"},
11942    {"bits": [24, 27], "name": "S7_X"},
11943    {"bits": [28, 31], "name": "S7_Y"}
11944   ]
11945  },
11946  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2": {
11947   "fields": [
11948    {"bits": [0, 3], "name": "S8_X"},
11949    {"bits": [4, 7], "name": "S8_Y"},
11950    {"bits": [8, 11], "name": "S9_X"},
11951    {"bits": [12, 15], "name": "S9_Y"},
11952    {"bits": [16, 19], "name": "S10_X"},
11953    {"bits": [20, 23], "name": "S10_Y"},
11954    {"bits": [24, 27], "name": "S11_X"},
11955    {"bits": [28, 31], "name": "S11_Y"}
11956   ]
11957  },
11958  "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3": {
11959   "fields": [
11960    {"bits": [0, 3], "name": "S12_X"},
11961    {"bits": [4, 7], "name": "S12_Y"},
11962    {"bits": [8, 11], "name": "S13_X"},
11963    {"bits": [12, 15], "name": "S13_Y"},
11964    {"bits": [16, 19], "name": "S14_X"},
11965    {"bits": [20, 23], "name": "S14_Y"},
11966    {"bits": [24, 27], "name": "S15_X"},
11967    {"bits": [28, 31], "name": "S15_Y"}
11968   ]
11969  },
11970  "PA_SC_BINNER_CNTL_0": {
11971   "fields": [
11972    {"bits": [0, 1], "enum_ref": "BinningMode", "name": "BINNING_MODE"},
11973    {"bits": [2, 2], "name": "BIN_SIZE_X"},
11974    {"bits": [3, 3], "name": "BIN_SIZE_Y"},
11975    {"bits": [4, 6], "name": "BIN_SIZE_X_EXTEND"},
11976    {"bits": [7, 9], "name": "BIN_SIZE_Y_EXTEND"},
11977    {"bits": [10, 12], "name": "CONTEXT_STATES_PER_BIN"},
11978    {"bits": [13, 17], "name": "PERSISTENT_STATES_PER_BIN"},
11979    {"bits": [18, 18], "name": "DISABLE_START_OF_PRIM"},
11980    {"bits": [19, 26], "name": "FPOVS_PER_BATCH"},
11981    {"bits": [27, 27], "name": "OPTIMAL_BIN_SELECTION"},
11982    {"bits": [28, 28], "name": "FLUSH_ON_BINNING_TRANSITION"}
11983   ]
11984  },
11985  "PA_SC_BINNER_CNTL_1": {
11986   "fields": [
11987    {"bits": [0, 15], "name": "MAX_ALLOC_COUNT"},
11988    {"bits": [16, 31], "name": "MAX_PRIM_PER_BATCH"}
11989   ]
11990  },
11991  "PA_SC_CENTROID_PRIORITY_0": {
11992   "fields": [
11993    {"bits": [0, 3], "name": "DISTANCE_0"},
11994    {"bits": [4, 7], "name": "DISTANCE_1"},
11995    {"bits": [8, 11], "name": "DISTANCE_2"},
11996    {"bits": [12, 15], "name": "DISTANCE_3"},
11997    {"bits": [16, 19], "name": "DISTANCE_4"},
11998    {"bits": [20, 23], "name": "DISTANCE_5"},
11999    {"bits": [24, 27], "name": "DISTANCE_6"},
12000    {"bits": [28, 31], "name": "DISTANCE_7"}
12001   ]
12002  },
12003  "PA_SC_CENTROID_PRIORITY_1": {
12004   "fields": [
12005    {"bits": [0, 3], "name": "DISTANCE_8"},
12006    {"bits": [4, 7], "name": "DISTANCE_9"},
12007    {"bits": [8, 11], "name": "DISTANCE_10"},
12008    {"bits": [12, 15], "name": "DISTANCE_11"},
12009    {"bits": [16, 19], "name": "DISTANCE_12"},
12010    {"bits": [20, 23], "name": "DISTANCE_13"},
12011    {"bits": [24, 27], "name": "DISTANCE_14"},
12012    {"bits": [28, 31], "name": "DISTANCE_15"}
12013   ]
12014  },
12015  "PA_SC_CLIPRECT_0_TL": {
12016   "fields": [
12017    {"bits": [0, 14], "name": "TL_X"},
12018    {"bits": [16, 30], "name": "TL_Y"}
12019   ]
12020  },
12021  "PA_SC_CLIPRECT_RULE": {
12022   "fields": [
12023    {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}
12024   ]
12025  },
12026  "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL": {
12027   "fields": [
12028    {"bits": [0, 0], "name": "OVER_RAST_ENABLE"},
12029    {"bits": [1, 4], "name": "OVER_RAST_SAMPLE_SELECT"},
12030    {"bits": [5, 5], "name": "UNDER_RAST_ENABLE"},
12031    {"bits": [6, 9], "name": "UNDER_RAST_SAMPLE_SELECT"},
12032    {"bits": [10, 10], "name": "PBB_UNCERTAINTY_REGION_ENABLE"},
12033    {"bits": [11, 11], "name": "ZMM_TRI_EXTENT"},
12034    {"bits": [12, 12], "name": "ZMM_TRI_OFFSET"},
12035    {"bits": [13, 13], "name": "OVERRIDE_OVER_RAST_INNER_TO_NORMAL"},
12036    {"bits": [14, 14], "name": "OVERRIDE_UNDER_RAST_INNER_TO_NORMAL"},
12037    {"bits": [15, 15], "name": "DEGENERATE_OVERRIDE_INNER_TO_NORMAL_DISABLE"},
12038    {"bits": [16, 17], "name": "UNCERTAINTY_REGION_MODE"},
12039    {"bits": [18, 18], "name": "OUTER_UNCERTAINTY_EDGERULE_OVERRIDE"},
12040    {"bits": [19, 19], "name": "INNER_UNCERTAINTY_EDGERULE_OVERRIDE"},
12041    {"bits": [20, 20], "name": "NULL_SQUAD_AA_MASK_ENABLE"},
12042    {"bits": [21, 21], "name": "COVERAGE_AA_MASK_ENABLE"},
12043    {"bits": [22, 22], "name": "PREZ_AA_MASK_ENABLE"},
12044    {"bits": [23, 23], "name": "POSTZ_AA_MASK_ENABLE"},
12045    {"bits": [24, 24], "name": "CENTROID_SAMPLE_OVERRIDE"}
12046   ]
12047  },
12048  "PA_SC_EDGERULE": {
12049   "fields": [
12050    {"bits": [0, 3], "name": "ER_TRI"},
12051    {"bits": [4, 7], "name": "ER_POINT"},
12052    {"bits": [8, 11], "name": "ER_RECT"},
12053    {"bits": [12, 17], "name": "ER_LINE_LR"},
12054    {"bits": [18, 23], "name": "ER_LINE_RL"},
12055    {"bits": [24, 27], "name": "ER_LINE_TB"},
12056    {"bits": [28, 31], "name": "ER_LINE_BT"}
12057   ]
12058  },
12059  "PA_SC_HORIZ_GRID": {
12060   "fields": [
12061    {"bits": [0, 7], "name": "TOP_QTR"},
12062    {"bits": [8, 15], "name": "TOP_HALF"},
12063    {"bits": [16, 23], "name": "BOT_HALF"},
12064    {"bits": [24, 31], "name": "BOT_QTR"}
12065   ]
12066  },
12067  "PA_SC_LINE_CNTL": {
12068   "fields": [
12069    {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},
12070    {"bits": [10, 10], "name": "LAST_PIXEL"},
12071    {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},
12072    {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"},
12073    {"bits": [13, 13], "name": "EXTRA_DX_DY_PRECISION"}
12074   ]
12075  },
12076  "PA_SC_LINE_STIPPLE": {
12077   "fields": [
12078    {"bits": [0, 15], "name": "LINE_PATTERN"},
12079    {"bits": [16, 23], "name": "REPEAT_COUNT"},
12080    {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},
12081    {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}
12082   ]
12083  },
12084  "PA_SC_LINE_STIPPLE_STATE": {
12085   "fields": [
12086    {"bits": [0, 3], "name": "CURRENT_PTR"},
12087    {"bits": [8, 15], "name": "CURRENT_COUNT"}
12088   ]
12089  },
12090  "PA_SC_MODE_CNTL_0": {
12091   "fields": [
12092    {"bits": [0, 0], "name": "MSAA_ENABLE"},
12093    {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},
12094    {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},
12095    {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"},
12096    {"bits": [4, 4], "name": "SCALE_LINE_WIDTH_PAD"},
12097    {"bits": [5, 5], "name": "ALTERNATE_RBS_PER_TILE"},
12098    {"bits": [6, 6], "name": "COARSE_TILE_STARTS_ON_EVEN_RB"}
12099   ]
12100  },
12101  "PA_SC_MODE_CNTL_1": {
12102   "fields": [
12103    {"bits": [0, 0], "name": "WALK_SIZE"},
12104    {"bits": [1, 1], "name": "WALK_ALIGNMENT"},
12105    {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},
12106    {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},
12107    {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},
12108    {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},
12109    {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},
12110    {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},
12111    {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},
12112    {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},
12113    {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},
12114    {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},
12115    {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},
12116    {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},
12117    {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},
12118    {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},
12119    {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},
12120    {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},
12121    {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},
12122    {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},
12123    {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},
12124    {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},
12125    {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},
12126    {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}
12127   ]
12128  },
12129  "PA_SC_NGG_MODE_CNTL": {
12130   "fields": [
12131    {"bits": [0, 10], "name": "MAX_DEALLOCS_IN_WAVE"}
12132   ]
12133  },
12134  "PA_SC_P3D_TRAP_SCREEN_H": {
12135   "fields": [
12136    {"bits": [0, 13], "name": "X_COORD"}
12137   ]
12138  },
12139  "PA_SC_P3D_TRAP_SCREEN_HV_EN": {
12140   "fields": [
12141    {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},
12142    {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}
12143   ]
12144  },
12145  "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE": {
12146   "fields": [
12147    {"bits": [0, 15], "name": "COUNT"}
12148   ]
12149  },
12150  "PA_SC_P3D_TRAP_SCREEN_V": {
12151   "fields": [
12152    {"bits": [0, 13], "name": "Y_COORD"}
12153   ]
12154  },
12155  "PA_SC_PERFCOUNTER1_SELECT": {
12156   "fields": [
12157    {"bits": [0, 9], "name": "PERF_SEL"}
12158   ]
12159  },
12160  "PA_SC_RASTER_CONFIG": {
12161   "fields": [
12162    {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},
12163    {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},
12164    {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},
12165    {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},
12166    {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},
12167    {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},
12168    {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},
12169    {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},
12170    {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},
12171    {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},
12172    {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},
12173    {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},
12174    {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},
12175    {"bits": [26, 28], "enum_ref": "SeXsel", "name": "SE_XSEL"},
12176    {"bits": [29, 31], "enum_ref": "SeYsel", "name": "SE_YSEL"}
12177   ]
12178  },
12179  "PA_SC_RASTER_CONFIG_1": {
12180   "fields": [
12181    {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},
12182    {"bits": [2, 4], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},
12183    {"bits": [5, 7], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}
12184   ]
12185  },
12186  "PA_SC_RIGHT_VERT_GRID": {
12187   "fields": [
12188    {"bits": [0, 7], "name": "LEFT_QTR"},
12189    {"bits": [8, 15], "name": "LEFT_HALF"},
12190    {"bits": [16, 23], "name": "RIGHT_HALF"},
12191    {"bits": [24, 31], "name": "RIGHT_QTR"}
12192   ]
12193  },
12194  "PA_SC_SCREEN_EXTENT_CONTROL": {
12195   "fields": [
12196    {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},
12197    {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}
12198   ]
12199  },
12200  "PA_SC_SCREEN_EXTENT_MIN_0": {
12201   "fields": [
12202    {"bits": [0, 15], "name": "X"},
12203    {"bits": [16, 31], "name": "Y"}
12204   ]
12205  },
12206  "PA_SC_SCREEN_SCISSOR_BR": {
12207   "fields": [
12208    {"bits": [0, 15], "name": "BR_X"},
12209    {"bits": [16, 31], "name": "BR_Y"}
12210   ]
12211  },
12212  "PA_SC_SCREEN_SCISSOR_TL": {
12213   "fields": [
12214    {"bits": [0, 15], "name": "TL_X"},
12215    {"bits": [16, 31], "name": "TL_Y"}
12216   ]
12217  },
12218  "PA_SC_SHADER_CONTROL": {
12219   "fields": [
12220    {"bits": [0, 1], "name": "REALIGN_DQUADS_AFTER_N_WAVES"},
12221    {"bits": [2, 2], "name": "LOAD_COLLISION_WAVEID"},
12222    {"bits": [3, 3], "name": "LOAD_INTRAWAVE_COLLISION"}
12223   ]
12224  },
12225  "PA_SC_TILE_STEERING_OVERRIDE": {
12226   "fields": [
12227    {"bits": [0, 0], "name": "ENABLE"},
12228    {"bits": [1, 2], "name": "NUM_SE"},
12229    {"bits": [5, 6], "name": "NUM_RB_PER_SE"}
12230   ]
12231  },
12232  "PA_SC_WINDOW_OFFSET": {
12233   "fields": [
12234    {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},
12235    {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}
12236   ]
12237  },
12238  "PA_SC_WINDOW_SCISSOR_BR": {
12239   "fields": [
12240    {"bits": [0, 14], "name": "BR_X"},
12241    {"bits": [16, 30], "name": "BR_Y"}
12242   ]
12243  },
12244  "PA_SC_WINDOW_SCISSOR_TL": {
12245   "fields": [
12246    {"bits": [0, 14], "name": "TL_X"},
12247    {"bits": [16, 30], "name": "TL_Y"},
12248    {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}
12249   ]
12250  },
12251  "PA_STEREO_CNTL": {
12252   "fields": [
12253    {"bits": [0, 0], "name": "EN_STEREO"},
12254    {"bits": [1, 4], "name": "STEREO_MODE"},
12255    {"bits": [5, 7], "name": "RT_SLICE_MODE"},
12256    {"bits": [8, 9], "name": "RT_SLICE_OFFSET"},
12257    {"bits": [10, 12], "name": "VP_ID_MODE"},
12258    {"bits": [13, 16], "name": "VP_ID_OFFSET"}
12259   ]
12260  },
12261  "PA_SU_HARDWARE_SCREEN_OFFSET": {
12262   "fields": [
12263    {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},
12264    {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}
12265   ]
12266  },
12267  "PA_SU_LINE_CNTL": {
12268   "fields": [
12269    {"bits": [0, 15], "name": "WIDTH"}
12270   ]
12271  },
12272  "PA_SU_LINE_STIPPLE_CNTL": {
12273   "fields": [
12274    {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},
12275    {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},
12276    {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},
12277    {"bits": [4, 4], "name": "DIAMOND_ADJUST"}
12278   ]
12279  },
12280  "PA_SU_LINE_STIPPLE_VALUE": {
12281   "fields": [
12282    {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}
12283   ]
12284  },
12285  "PA_SU_OVER_RASTERIZATION_CNTL": {
12286   "fields": [
12287    {"bits": [0, 0], "name": "DISCARD_0_AREA_TRIANGLES"},
12288    {"bits": [1, 1], "name": "DISCARD_0_AREA_LINES"},
12289    {"bits": [2, 2], "name": "DISCARD_0_AREA_POINTS"},
12290    {"bits": [3, 3], "name": "DISCARD_0_AREA_RECTANGLES"},
12291    {"bits": [4, 4], "name": "USE_PROVOKING_ZW"}
12292   ]
12293  },
12294  "PA_SU_PERFCOUNTER0_HI": {
12295   "fields": [
12296    {"bits": [0, 15], "name": "PERFCOUNTER_HI"}
12297   ]
12298  },
12299  "PA_SU_PERFCOUNTER2_SELECT": {
12300   "fields": [
12301    {"bits": [0, 9], "name": "PERF_SEL"},
12302    {"bits": [20, 23], "name": "CNTR_MODE"},
12303    {"bits": [28, 31], "name": "PERF_MODE"}
12304   ]
12305  },
12306  "PA_SU_POINT_MINMAX": {
12307   "fields": [
12308    {"bits": [0, 15], "name": "MIN_SIZE"},
12309    {"bits": [16, 31], "name": "MAX_SIZE"}
12310   ]
12311  },
12312  "PA_SU_POINT_SIZE": {
12313   "fields": [
12314    {"bits": [0, 15], "name": "HEIGHT"},
12315    {"bits": [16, 31], "name": "WIDTH"}
12316   ]
12317  },
12318  "PA_SU_POLY_OFFSET_DB_FMT_CNTL": {
12319   "fields": [
12320    {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},
12321    {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}
12322   ]
12323  },
12324  "PA_SU_PRIM_FILTER_CNTL": {
12325   "fields": [
12326    {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},
12327    {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},
12328    {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},
12329    {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},
12330    {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},
12331    {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},
12332    {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},
12333    {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},
12334    {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},
12335    {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},
12336    {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}
12337   ]
12338  },
12339  "PA_SU_SC_MODE_CNTL": {
12340   "fields": [
12341    {"bits": [0, 0], "name": "CULL_FRONT"},
12342    {"bits": [1, 1], "name": "CULL_BACK"},
12343    {"bits": [2, 2], "name": "FACE"},
12344    {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},
12345    {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},
12346    {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},
12347    {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},
12348    {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},
12349    {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},
12350    {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},
12351    {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},
12352    {"bits": [20, 20], "name": "PERSP_CORR_DIS"},
12353    {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"},
12354    {"bits": [22, 22], "name": "RIGHT_TRIANGLE_ALTERNATE_GRADIENT_REF"},
12355    {"bits": [23, 23], "name": "NEW_QUAD_DECOMPOSITION"}
12356   ]
12357  },
12358  "PA_SU_SMALL_PRIM_FILTER_CNTL": {
12359   "fields": [
12360    {"bits": [0, 0], "name": "SMALL_PRIM_FILTER_ENABLE"},
12361    {"bits": [1, 1], "name": "TRIANGLE_FILTER_DISABLE"},
12362    {"bits": [2, 2], "name": "LINE_FILTER_DISABLE"},
12363    {"bits": [3, 3], "name": "POINT_FILTER_DISABLE"},
12364    {"bits": [4, 4], "name": "RECTANGLE_FILTER_DISABLE"},
12365    {"bits": [6, 6], "name": "SC_1XMSAA_COMPATIBLE_DISABLE"}
12366   ]
12367  },
12368  "PA_SU_VTX_CNTL": {
12369   "fields": [
12370    {"bits": [0, 0], "name": "PIX_CENTER"},
12371    {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},
12372    {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}
12373   ]
12374  },
12375  "RLC_GPM_PERF_COUNT_0": {
12376   "fields": [
12377    {"bits": [0, 3], "name": "FEATURE_SEL"},
12378    {"bits": [4, 7], "name": "SE_INDEX"},
12379    {"bits": [8, 11], "name": "SH_INDEX"},
12380    {"bits": [12, 15], "name": "CU_INDEX"},
12381    {"bits": [16, 17], "name": "EVENT_SEL"},
12382    {"bits": [18, 19], "name": "UNUSED"},
12383    {"bits": [20, 20], "name": "ENABLE"},
12384    {"bits": [21, 31], "name": "RESERVED"}
12385   ]
12386  },
12387  "RLC_GPU_IOV_PERF_CNT_CNTL": {
12388   "fields": [
12389    {"bits": [0, 0], "name": "ENABLE"},
12390    {"bits": [1, 1], "name": "MODE_SELECT"},
12391    {"bits": [2, 2], "name": "RESET"},
12392    {"bits": [3, 31], "name": "RESERVED"}
12393   ]
12394  },
12395  "RLC_GPU_IOV_PERF_CNT_WR_ADDR": {
12396   "fields": [
12397    {"bits": [0, 3], "name": "VFID"},
12398    {"bits": [4, 5], "name": "CNT_ID"},
12399    {"bits": [6, 31], "name": "RESERVED"}
12400   ]
12401  },
12402  "RLC_PERFCOUNTER0_SELECT": {
12403   "fields": [
12404    {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}
12405   ]
12406  },
12407  "RLC_PERFMON_CLK_CNTL_UCODE": {
12408   "fields": [
12409    {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"}
12410   ]
12411  },
12412  "RLC_PERFMON_CNTL": {
12413   "fields": [
12414    {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
12415    {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
12416   ]
12417  },
12418  "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY": {
12419   "fields": [
12420    {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},
12421    {"bits": [8, 31], "name": "RESERVED"}
12422   ]
12423  },
12424  "RLC_SPM_PERFMON_CNTL": {
12425   "fields": [
12426    {"bits": [0, 11], "name": "RESERVED1"},
12427    {"bits": [12, 13], "name": "PERFMON_RING_MODE"},
12428    {"bits": [14, 15], "name": "RESERVED"},
12429    {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}
12430   ]
12431  },
12432  "RLC_SPM_PERFMON_RING_BASE_HI": {
12433   "fields": [
12434    {"bits": [0, 15], "name": "RING_BASE_HI"},
12435    {"bits": [16, 31], "name": "RESERVED"}
12436   ]
12437  },
12438  "RLC_SPM_PERFMON_SAMPLE_DELAY_MAX": {
12439   "fields": [
12440    {"bits": [0, 7], "name": "PERFMON_MAX_SAMPLE_DELAY"},
12441    {"bits": [8, 31], "name": "RESERVED"}
12442   ]
12443  },
12444  "RLC_SPM_PERFMON_SEGMENT_SIZE": {
12445   "fields": [
12446    {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},
12447    {"bits": [8, 10], "name": "RESERVED1"},
12448    {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},
12449    {"bits": [16, 20], "name": "SE0_NUM_LINE"},
12450    {"bits": [21, 25], "name": "SE1_NUM_LINE"},
12451    {"bits": [26, 30], "name": "SE2_NUM_LINE"},
12452    {"bits": [31, 31], "name": "RESERVED"}
12453   ]
12454  },
12455  "RMI_PERF_COUNTER_CNTL": {
12456   "fields": [
12457    {"bits": [0, 1], "name": "TRANS_BASED_PERF_EN_SEL"},
12458    {"bits": [2, 3], "name": "EVENT_BASED_PERF_EN_SEL"},
12459    {"bits": [4, 5], "name": "TC_PERF_EN_SEL"},
12460    {"bits": [6, 7], "name": "PERF_EVENT_WINDOW_MASK0"},
12461    {"bits": [8, 9], "name": "PERF_EVENT_WINDOW_MASK1"},
12462    {"bits": [10, 13], "name": "PERF_COUNTER_CID"},
12463    {"bits": [14, 18], "name": "PERF_COUNTER_VMID"},
12464    {"bits": [19, 24], "name": "PERF_COUNTER_BURST_LENGTH_THRESHOLD"},
12465    {"bits": [25, 25], "name": "PERF_SOFT_RESET"},
12466    {"bits": [26, 26], "name": "PERF_CNTR_SPM_SEL"}
12467   ]
12468  },
12469  "SCRATCH_UMSK": {
12470   "fields": [
12471    {"bits": [0, 7], "name": "OBSOLETE_UMSK"},
12472    {"bits": [16, 17], "name": "OBSOLETE_SWAP"}
12473   ]
12474  },
12475  "SPI_BARYC_CNTL": {
12476   "fields": [
12477    {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},
12478    {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},
12479    {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},
12480    {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},
12481    {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},
12482    {"bits": [20, 20], "name": "POS_FLOAT_ULC"},
12483    {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}
12484   ]
12485  },
12486  "SPI_CONFIG_CNTL": {
12487   "fields": [
12488    {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},
12489    {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},
12490    {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},
12491    {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},
12492    {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},
12493    {"bits": [27, 27], "name": "TTRACE_STALL_ALL"},
12494    {"bits": [28, 28], "name": "ALLOC_ARB_LRU_ENA"},
12495    {"bits": [29, 29], "name": "EXP_ARB_LRU_ENA"},
12496    {"bits": [30, 31], "name": "PS_PKR_PRIORITY_CNTL"}
12497   ]
12498  },
12499  "SPI_CONFIG_CNTL_1": {
12500   "fields": [
12501    {"bits": [0, 3], "name": "VTX_DONE_DELAY"},
12502    {"bits": [4, 4], "name": "INTERP_ONE_PRIM_PER_ROW"},
12503    {"bits": [5, 5], "name": "BATON_RESET_DISABLE"},
12504    {"bits": [6, 6], "name": "PC_LIMIT_ENABLE"},
12505    {"bits": [7, 7], "name": "PC_LIMIT_STRICT"},
12506    {"bits": [8, 8], "name": "CRC_SIMD_ID_WADDR_DISABLE"},
12507    {"bits": [9, 9], "name": "LBPW_CU_CHK_MODE"},
12508    {"bits": [10, 13], "name": "LBPW_CU_CHK_CNT"},
12509    {"bits": [14, 14], "name": "CSC_PWR_SAVE_DISABLE"},
12510    {"bits": [15, 15], "name": "CSG_PWR_SAVE_DISABLE"},
12511    {"bits": [16, 31], "name": "PC_LIMIT_SIZE"}
12512   ]
12513  },
12514  "SPI_CONFIG_CNTL_2": {
12515   "fields": [
12516    {"bits": [0, 3], "name": "CONTEXT_SAVE_WAIT_GDS_REQUEST_CYCLE_OVHD"},
12517    {"bits": [4, 7], "name": "CONTEXT_SAVE_WAIT_GDS_GRANT_CYCLE_OVHD"}
12518   ]
12519  },
12520  "SPI_INTERP_CONTROL_0": {
12521   "fields": [
12522    {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},
12523    {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},
12524    {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},
12525    {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},
12526    {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},
12527    {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},
12528    {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}
12529   ]
12530  },
12531  "SPI_PERFCOUNTER4_SELECT": {
12532   "fields": [
12533    {"bits": [0, 7], "name": "PERF_SEL"}
12534   ]
12535  },
12536  "SPI_PERFCOUNTER_BINS": {
12537   "fields": [
12538    {"bits": [0, 3], "name": "BIN0_MIN"},
12539    {"bits": [4, 7], "name": "BIN0_MAX"},
12540    {"bits": [8, 11], "name": "BIN1_MIN"},
12541    {"bits": [12, 15], "name": "BIN1_MAX"},
12542    {"bits": [16, 19], "name": "BIN2_MIN"},
12543    {"bits": [20, 23], "name": "BIN2_MAX"},
12544    {"bits": [24, 27], "name": "BIN3_MIN"},
12545    {"bits": [28, 31], "name": "BIN3_MAX"}
12546   ]
12547  },
12548  "SPI_PS_INPUT_CNTL_0": {
12549   "fields": [
12550    {"bits": [0, 5], "name": "OFFSET"},
12551    {"bits": [8, 9], "name": "DEFAULT_VAL"},
12552    {"bits": [10, 10], "name": "FLAT_SHADE"},
12553    {"bits": [13, 16], "name": "CYL_WRAP"},
12554    {"bits": [17, 17], "name": "PT_SPRITE_TEX"},
12555    {"bits": [18, 18], "name": "DUP"},
12556    {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
12557    {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
12558    {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
12559    {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"},
12560    {"bits": [24, 24], "name": "ATTR0_VALID"},
12561    {"bits": [25, 25], "name": "ATTR1_VALID"}
12562   ]
12563  },
12564  "SPI_PS_INPUT_CNTL_20": {
12565   "fields": [
12566    {"bits": [0, 5], "name": "OFFSET"},
12567    {"bits": [8, 9], "name": "DEFAULT_VAL"},
12568    {"bits": [10, 10], "name": "FLAT_SHADE"},
12569    {"bits": [18, 18], "name": "DUP"},
12570    {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
12571    {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
12572    {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
12573    {"bits": [24, 24], "name": "ATTR0_VALID"},
12574    {"bits": [25, 25], "name": "ATTR1_VALID"}
12575   ]
12576  },
12577  "SPI_PS_INPUT_ENA": {
12578   "fields": [
12579    {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},
12580    {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},
12581    {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},
12582    {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},
12583    {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},
12584    {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},
12585    {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},
12586    {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},
12587    {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},
12588    {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},
12589    {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},
12590    {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},
12591    {"bits": [12, 12], "name": "FRONT_FACE_ENA"},
12592    {"bits": [13, 13], "name": "ANCILLARY_ENA"},
12593    {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},
12594    {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}
12595   ]
12596  },
12597  "SPI_PS_IN_CONTROL": {
12598   "fields": [
12599    {"bits": [0, 5], "name": "NUM_INTERP"},
12600    {"bits": [6, 6], "name": "PARAM_GEN"},
12601    {"bits": [7, 7], "name": "OFFCHIP_PARAM_EN"},
12602    {"bits": [8, 8], "name": "LATE_PC_DEALLOC"},
12603    {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}
12604   ]
12605  },
12606  "SPI_SHADER_COL_FORMAT": {
12607   "fields": [
12608    {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},
12609    {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},
12610    {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},
12611    {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},
12612    {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},
12613    {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},
12614    {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},
12615    {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}
12616   ]
12617  },
12618  "SPI_SHADER_LATE_ALLOC_VS": {
12619   "fields": [
12620    {"bits": [0, 5], "name": "LIMIT"}
12621   ]
12622  },
12623  "SPI_SHADER_PGM_HI_PS": {
12624   "fields": [
12625    {"bits": [0, 7], "name": "MEM_BASE"}
12626   ]
12627  },
12628  "SPI_SHADER_PGM_RSRC1_GS": {
12629   "fields": [
12630    {"bits": [0, 5], "name": "VGPRS"},
12631    {"bits": [6, 9], "name": "SGPRS"},
12632    {"bits": [10, 11], "name": "PRIORITY"},
12633    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12634    {"bits": [20, 20], "name": "PRIV"},
12635    {"bits": [21, 21], "name": "DX10_CLAMP"},
12636    {"bits": [22, 22], "name": "DEBUG_MODE"},
12637    {"bits": [23, 23], "name": "IEEE_MODE"},
12638    {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},
12639    {"bits": [28, 28], "name": "CDBG_USER"},
12640    {"bits": [29, 30], "name": "GS_VGPR_COMP_CNT"},
12641    {"bits": [31, 31], "name": "FP16_OVFL"}
12642   ]
12643  },
12644  "SPI_SHADER_PGM_RSRC1_HS": {
12645   "fields": [
12646    {"bits": [0, 5], "name": "VGPRS"},
12647    {"bits": [6, 9], "name": "SGPRS"},
12648    {"bits": [10, 11], "name": "PRIORITY"},
12649    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12650    {"bits": [20, 20], "name": "PRIV"},
12651    {"bits": [21, 21], "name": "DX10_CLAMP"},
12652    {"bits": [22, 22], "name": "DEBUG_MODE"},
12653    {"bits": [23, 23], "name": "IEEE_MODE"},
12654    {"bits": [27, 27], "name": "CDBG_USER"},
12655    {"bits": [28, 29], "name": "LS_VGPR_COMP_CNT"},
12656    {"bits": [30, 30], "name": "FP16_OVFL"}
12657   ]
12658  },
12659  "SPI_SHADER_PGM_RSRC1_PS": {
12660   "fields": [
12661    {"bits": [0, 5], "name": "VGPRS"},
12662    {"bits": [6, 9], "name": "SGPRS"},
12663    {"bits": [10, 11], "name": "PRIORITY"},
12664    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12665    {"bits": [20, 20], "name": "PRIV"},
12666    {"bits": [21, 21], "name": "DX10_CLAMP"},
12667    {"bits": [22, 22], "name": "DEBUG_MODE"},
12668    {"bits": [23, 23], "name": "IEEE_MODE"},
12669    {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},
12670    {"bits": [28, 28], "name": "CDBG_USER"},
12671    {"bits": [29, 29], "name": "FP16_OVFL"}
12672   ]
12673  },
12674  "SPI_SHADER_PGM_RSRC1_VS": {
12675   "fields": [
12676    {"bits": [0, 5], "name": "VGPRS"},
12677    {"bits": [6, 9], "name": "SGPRS"},
12678    {"bits": [10, 11], "name": "PRIORITY"},
12679    {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12680    {"bits": [20, 20], "name": "PRIV"},
12681    {"bits": [21, 21], "name": "DX10_CLAMP"},
12682    {"bits": [22, 22], "name": "DEBUG_MODE"},
12683    {"bits": [23, 23], "name": "IEEE_MODE"},
12684    {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
12685    {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},
12686    {"bits": [30, 30], "name": "CDBG_USER"},
12687    {"bits": [31, 31], "name": "FP16_OVFL"}
12688   ]
12689  },
12690  "SPI_SHADER_PGM_RSRC2_GS": {
12691   "fields": [
12692    {"bits": [0, 0], "name": "SCRATCH_EN"},
12693    {"bits": [1, 5], "name": "USER_SGPR"},
12694    {"bits": [6, 6], "name": "TRAP_PRESENT"},
12695    {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12696    {"bits": [16, 17], "name": "ES_VGPR_COMP_CNT"},
12697    {"bits": [18, 18], "name": "OC_LDS_EN"},
12698    {"bits": [19, 26], "name": "LDS_SIZE"},
12699    {"bits": [27, 27], "name": "SKIP_USGPR0"},
12700    {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12701   ]
12702  },
12703  "SPI_SHADER_PGM_RSRC2_GS_VS": {
12704   "fields": [
12705    {"bits": [0, 0], "name": "SCRATCH_EN"},
12706    {"bits": [1, 5], "name": "USER_SGPR"},
12707    {"bits": [6, 6], "name": "TRAP_PRESENT"},
12708    {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12709    {"bits": [16, 17], "name": "VGPR_COMP_CNT"},
12710    {"bits": [18, 18], "name": "OC_LDS_EN"},
12711    {"bits": [19, 26], "name": "LDS_SIZE"},
12712    {"bits": [27, 27], "name": "SKIP_USGPR0"},
12713    {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12714   ]
12715  },
12716  "SPI_SHADER_PGM_RSRC2_HS": {
12717   "fields": [
12718    {"bits": [0, 0], "name": "SCRATCH_EN"},
12719    {"bits": [1, 5], "name": "USER_SGPR"},
12720    {"bits": [6, 6], "name": "TRAP_PRESENT"},
12721    {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12722    {"bits": [16, 24], "name": "LDS_SIZE"},
12723    {"bits": [27, 27], "name": "SKIP_USGPR0"},
12724    {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12725   ]
12726  },
12727  "SPI_SHADER_PGM_RSRC2_PS": {
12728   "fields": [
12729    {"bits": [0, 0], "name": "SCRATCH_EN"},
12730    {"bits": [1, 5], "name": "USER_SGPR"},
12731    {"bits": [6, 6], "name": "TRAP_PRESENT"},
12732    {"bits": [7, 7], "name": "WAVE_CNT_EN"},
12733    {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},
12734    {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12735    {"bits": [25, 25], "name": "LOAD_COLLISION_WAVEID"},
12736    {"bits": [26, 26], "name": "LOAD_INTRAWAVE_COLLISION"},
12737    {"bits": [27, 27], "name": "SKIP_USGPR0"},
12738    {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12739   ]
12740  },
12741  "SPI_SHADER_PGM_RSRC2_VS": {
12742   "fields": [
12743    {"bits": [0, 0], "name": "SCRATCH_EN"},
12744    {"bits": [1, 5], "name": "USER_SGPR"},
12745    {"bits": [6, 6], "name": "TRAP_PRESENT"},
12746    {"bits": [7, 7], "name": "OC_LDS_EN"},
12747    {"bits": [8, 8], "name": "SO_BASE0_EN"},
12748    {"bits": [9, 9], "name": "SO_BASE1_EN"},
12749    {"bits": [10, 10], "name": "SO_BASE2_EN"},
12750    {"bits": [11, 11], "name": "SO_BASE3_EN"},
12751    {"bits": [12, 12], "name": "SO_EN"},
12752    {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12753    {"bits": [22, 22], "name": "PC_BASE_EN"},
12754    {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"},
12755    {"bits": [27, 27], "name": "SKIP_USGPR0"},
12756    {"bits": [28, 28], "name": "USER_SGPR_MSB"}
12757   ]
12758  },
12759  "SPI_SHADER_PGM_RSRC3_HS": {
12760   "fields": [
12761    {"bits": [0, 5], "name": "WAVE_LIMIT"},
12762    {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"},
12763    {"bits": [10, 13], "name": "SIMD_DISABLE"},
12764    {"bits": [16, 31], "name": "CU_EN"}
12765   ]
12766  },
12767  "SPI_SHADER_PGM_RSRC3_PS": {
12768   "fields": [
12769    {"bits": [0, 15], "name": "CU_EN"},
12770    {"bits": [16, 21], "name": "WAVE_LIMIT"},
12771    {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"},
12772    {"bits": [26, 29], "name": "SIMD_DISABLE"}
12773   ]
12774  },
12775  "SPI_SHADER_PGM_RSRC4_GS": {
12776   "fields": [
12777    {"bits": [0, 6], "name": "GROUP_FIFO_DEPTH"},
12778    {"bits": [7, 13], "name": "SPI_SHADER_LATE_ALLOC_GS"}
12779   ]
12780  },
12781  "SPI_SHADER_PGM_RSRC4_HS": {
12782   "fields": [
12783    {"bits": [0, 6], "name": "GROUP_FIFO_DEPTH"}
12784   ]
12785  },
12786  "SPI_SHADER_POS_FORMAT": {
12787   "fields": [
12788    {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},
12789    {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},
12790    {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},
12791    {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}
12792   ]
12793  },
12794  "SPI_SHADER_Z_FORMAT": {
12795   "fields": [
12796    {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}
12797   ]
12798  },
12799  "SPI_VS_OUT_CONFIG": {
12800   "fields": [
12801    {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},
12802    {"bits": [6, 6], "name": "VS_HALF_PACK"}
12803   ]
12804  },
12805  "SPI_WAVE_LIMIT_CNTL": {
12806   "fields": [
12807    {"bits": [0, 1], "name": "PS_WAVE_GRAN"},
12808    {"bits": [2, 3], "name": "VS_WAVE_GRAN"},
12809    {"bits": [4, 5], "name": "GS_WAVE_GRAN"},
12810    {"bits": [6, 7], "name": "HS_WAVE_GRAN"}
12811   ]
12812  },
12813  "SQC_CACHES": {
12814   "fields": [
12815    {"bits": [0, 0], "name": "TARGET_INST"},
12816    {"bits": [1, 1], "name": "TARGET_DATA"},
12817    {"bits": [2, 2], "name": "INVALIDATE"},
12818    {"bits": [3, 3], "name": "WRITEBACK"},
12819    {"bits": [4, 4], "name": "VOL"},
12820    {"bits": [16, 16], "name": "COMPLETE"}
12821   ]
12822  },
12823  "SQC_WRITEBACK": {
12824   "fields": [
12825    {"bits": [0, 0], "name": "DWB"},
12826    {"bits": [1, 1], "name": "DIRTY"}
12827   ]
12828  },
12829  "SQ_BUF_RSRC_WORD1": {
12830   "fields": [
12831    {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},
12832    {"bits": [16, 29], "name": "STRIDE"},
12833    {"bits": [30, 30], "name": "CACHE_SWIZZLE"},
12834    {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}
12835   ]
12836  },
12837  "SQ_BUF_RSRC_WORD3": {
12838   "fields": [
12839    {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
12840    {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
12841    {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
12842    {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
12843    {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},
12844    {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},
12845    {"bits": [19, 19], "name": "USER_VM_ENABLE"},
12846    {"bits": [20, 20], "name": "USER_VM_MODE"},
12847    {"bits": [21, 22], "name": "INDEX_STRIDE"},
12848    {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
12849    {"bits": [27, 27], "name": "NV"},
12850    {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}
12851   ]
12852  },
12853  "SQ_IMG_RSRC_WORD1": {
12854   "fields": [
12855    {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
12856    {"bits": [8, 19], "name": "MIN_LOD"},
12857    {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},
12858    {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT_STENCIL", "name": "DATA_FORMAT_STENCIL"},
12859    {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},
12860    {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT_FMASK", "name": "NUM_FORMAT_FMASK"},
12861    {"bits": [30, 30], "name": "NV"},
12862    {"bits": [31, 31], "name": "META_DIRECT"}
12863   ]
12864  },
12865  "SQ_IMG_RSRC_WORD2": {
12866   "fields": [
12867    {"bits": [0, 13], "name": "WIDTH"},
12868    {"bits": [14, 27], "name": "HEIGHT"},
12869    {"bits": [28, 30], "name": "PERF_MOD"}
12870   ]
12871  },
12872  "SQ_IMG_RSRC_WORD3": {
12873   "fields": [
12874    {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
12875    {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
12876    {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
12877    {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
12878    {"bits": [12, 15], "name": "BASE_LEVEL"},
12879    {"bits": [16, 19], "name": "LAST_LEVEL"},
12880    {"bits": [20, 24], "name": "SW_MODE"},
12881    {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}
12882   ]
12883  },
12884  "SQ_IMG_RSRC_WORD4": {
12885   "fields": [
12886    {"bits": [0, 12], "name": "DEPTH"},
12887    {"bits": [13, 28], "name": "PITCH"},
12888    {"bits": [29, 31], "enum_ref": "SQ_IMG_RSRC_WORD4__BC_SWIZZLE", "name": "BC_SWIZZLE"}
12889   ]
12890  },
12891  "SQ_IMG_RSRC_WORD5": {
12892   "fields": [
12893    {"bits": [0, 12], "name": "BASE_ARRAY"},
12894    {"bits": [13, 16], "name": "ARRAY_PITCH"},
12895    {"bits": [17, 24], "name": "META_DATA_ADDRESS"},
12896    {"bits": [25, 25], "name": "META_LINEAR"},
12897    {"bits": [26, 26], "name": "META_PIPE_ALIGNED"},
12898    {"bits": [27, 27], "name": "META_RB_ALIGNED"},
12899    {"bits": [28, 31], "name": "MAX_MIP"}
12900   ]
12901  },
12902  "SQ_IMG_RSRC_WORD6": {
12903   "fields": [
12904    {"bits": [0, 11], "name": "MIN_LOD_WARN"},
12905    {"bits": [12, 19], "name": "COUNTER_BANK_ID"},
12906    {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},
12907    {"bits": [21, 21], "name": "COMPRESSION_EN"},
12908    {"bits": [22, 22], "name": "ALPHA_IS_ON_MSB"},
12909    {"bits": [23, 23], "name": "COLOR_TRANSFORM"},
12910    {"bits": [24, 27], "name": "LOST_ALPHA_BITS"},
12911    {"bits": [28, 31], "name": "LOST_COLOR_BITS"}
12912   ]
12913  },
12914  "SQ_IMG_SAMP_WORD0": {
12915   "fields": [
12916    {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},
12917    {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},
12918    {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},
12919    {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},
12920    {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},
12921    {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},
12922    {"bits": [16, 18], "name": "ANISO_THRESHOLD"},
12923    {"bits": [19, 19], "name": "MC_COORD_TRUNC"},
12924    {"bits": [20, 20], "name": "FORCE_DEGAMMA"},
12925    {"bits": [21, 26], "name": "ANISO_BIAS"},
12926    {"bits": [27, 27], "name": "TRUNC_COORD"},
12927    {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},
12928    {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"},
12929    {"bits": [31, 31], "name": "COMPAT_MODE"}
12930   ]
12931  },
12932  "SQ_IMG_SAMP_WORD1": {
12933   "fields": [
12934    {"bits": [0, 11], "name": "MIN_LOD"},
12935    {"bits": [12, 23], "name": "MAX_LOD"},
12936    {"bits": [24, 27], "name": "PERF_MIP"},
12937    {"bits": [28, 31], "name": "PERF_Z"}
12938   ]
12939  },
12940  "SQ_IMG_SAMP_WORD2": {
12941   "fields": [
12942    {"bits": [0, 13], "name": "LOD_BIAS"},
12943    {"bits": [14, 19], "name": "LOD_BIAS_SEC"},
12944    {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},
12945    {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},
12946    {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},
12947    {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},
12948    {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},
12949    {"bits": [29, 29], "name": "BLEND_ZERO_PRT"},
12950    {"bits": [30, 30], "name": "FILTER_PREC_FIX"},
12951    {"bits": [31, 31], "name": "ANISO_OVERRIDE"}
12952   ]
12953  },
12954  "SQ_IMG_SAMP_WORD3": {
12955   "fields": [
12956    {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},
12957    {"bits": [12, 12], "name": "SKIP_DEGAMMA"},
12958    {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}
12959   ]
12960  },
12961  "SQ_PERFCOUNTER0_SELECT": {
12962   "fields": [
12963    {"bits": [0, 8], "name": "PERF_SEL"},
12964    {"bits": [12, 15], "name": "SQC_BANK_MASK"},
12965    {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},
12966    {"bits": [20, 23], "name": "SPM_MODE"},
12967    {"bits": [24, 27], "name": "SIMD_MASK"},
12968    {"bits": [28, 31], "name": "PERF_MODE"}
12969   ]
12970  },
12971  "SQ_PERFCOUNTER_CTRL": {
12972   "fields": [
12973    {"bits": [0, 0], "name": "PS_EN"},
12974    {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
12975    {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
12976    {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
12977    {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
12978    {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
12979    {"bits": [6, 6], "name": "CS_EN"},
12980    {"bits": [8, 12], "name": "CNTR_RATE"},
12981    {"bits": [13, 13], "name": "DISABLE_FLUSH"}
12982   ]
12983  },
12984  "SQ_PERFCOUNTER_CTRL2": {
12985   "fields": [
12986    {"bits": [0, 0], "name": "FORCE_EN"}
12987   ]
12988  },
12989  "SQ_THREAD_TRACE_BASE2": {
12990   "fields": [
12991    {"bits": [0, 3], "name": "ADDR_HI"}
12992   ]
12993  },
12994  "SQ_THREAD_TRACE_CTRL": {
12995   "fields": [
12996    {"bits": [31, 31], "name": "RESET_BUFFER"}
12997   ]
12998  },
12999  "SQ_THREAD_TRACE_HIWATER": {
13000   "fields": [
13001    {"bits": [0, 2], "name": "HIWATER"}
13002   ]
13003  },
13004  "SQ_THREAD_TRACE_MASK": {
13005   "fields": [
13006    {"bits": [0, 4], "name": "CU_SEL"},
13007    {"bits": [5, 5], "name": "SH_SEL"},
13008    {"bits": [7, 7], "name": "REG_STALL_EN"},
13009    {"bits": [8, 11], "name": "SIMD_EN"},
13010    {"bits": [12, 13], "name": "VM_ID_MASK"},
13011    {"bits": [14, 14], "name": "SPI_STALL_EN"},
13012    {"bits": [15, 15], "name": "SQ_STALL_EN"}
13013   ]
13014  },
13015  "SQ_THREAD_TRACE_MODE": {
13016   "fields": [
13017    {"bits": [0, 2], "name": "MASK_PS"},
13018    {"bits": [3, 5], "name": "MASK_VS"},
13019    {"bits": [6, 8], "name": "MASK_GS"},
13020    {"bits": [9, 11], "name": "MASK_ES"},
13021    {"bits": [12, 14], "name": "MASK_HS"},
13022    {"bits": [15, 17], "name": "MASK_LS"},
13023    {"bits": [18, 20], "name": "MASK_CS"},
13024    {"bits": [21, 22], "name": "MODE"},
13025    {"bits": [23, 24], "name": "CAPTURE_MODE"},
13026    {"bits": [25, 25], "name": "AUTOFLUSH_EN"},
13027    {"bits": [26, 26], "name": "TC_PERF_EN"},
13028    {"bits": [27, 28], "name": "ISSUE_MASK"},
13029    {"bits": [29, 29], "name": "TEST_MODE"},
13030    {"bits": [30, 30], "name": "INTERRUPT_EN"},
13031    {"bits": [31, 31], "name": "WRAP"}
13032   ]
13033  },
13034  "SQ_THREAD_TRACE_PERF_MASK": {
13035   "fields": [
13036    {"bits": [0, 15], "name": "SH0_MASK"},
13037    {"bits": [16, 31], "name": "SH1_MASK"}
13038   ]
13039  },
13040  "SQ_THREAD_TRACE_SIZE": {
13041   "fields": [
13042    {"bits": [0, 21], "name": "SIZE"}
13043   ]
13044  },
13045  "SQ_THREAD_TRACE_STATUS": {
13046   "fields": [
13047    {"bits": [0, 9], "name": "FINISH_PENDING"},
13048    {"bits": [16, 25], "name": "FINISH_DONE"},
13049    {"bits": [28, 28], "name": "UTC_ERROR"},
13050    {"bits": [29, 29], "name": "NEW_BUF"},
13051    {"bits": [30, 30], "name": "BUSY"},
13052    {"bits": [31, 31], "name": "FULL"}
13053   ]
13054  },
13055  "SQ_THREAD_TRACE_TOKEN_MASK": {
13056   "fields": [
13057    {"bits": [0, 15], "name": "TOKEN_MASK"},
13058    {"bits": [16, 23], "name": "REG_MASK"},
13059    {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}
13060   ]
13061  },
13062  "SQ_THREAD_TRACE_WPTR": {
13063   "fields": [
13064    {"bits": [0, 29], "name": "WPTR"},
13065    {"bits": [30, 31], "name": "READ_OFFSET"}
13066   ]
13067  },
13068  "SQ_WAVE_GPR_ALLOC": {
13069   "fields": [
13070    {"bits": [0, 5], "name": "VGPR_BASE"},
13071    {"bits": [8, 13], "name": "VGPR_SIZE"},
13072    {"bits": [16, 21], "name": "SGPR_BASE"},
13073    {"bits": [24, 27], "name": "SGPR_SIZE"}
13074   ]
13075  },
13076  "SQ_WAVE_HW_ID": {
13077   "fields": [
13078    {"bits": [0, 3], "name": "WAVE_ID"},
13079    {"bits": [4, 5], "name": "SIMD_ID"},
13080    {"bits": [6, 7], "name": "PIPE_ID"},
13081    {"bits": [8, 11], "name": "CU_ID"},
13082    {"bits": [12, 12], "name": "SH_ID"},
13083    {"bits": [13, 14], "name": "SE_ID"},
13084    {"bits": [16, 19], "name": "TG_ID"},
13085    {"bits": [20, 23], "name": "VM_ID"},
13086    {"bits": [24, 26], "name": "QUEUE_ID"},
13087    {"bits": [27, 29], "name": "STATE_ID"},
13088    {"bits": [30, 31], "name": "ME_ID"}
13089   ]
13090  },
13091  "SQ_WAVE_IB_DBG0": {
13092   "fields": [
13093    {"bits": [0, 2], "name": "IBUF_ST"},
13094    {"bits": [3, 3], "name": "PC_INVALID"},
13095    {"bits": [4, 4], "name": "NEED_NEXT_DW"},
13096    {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},
13097    {"bits": [8, 9], "name": "IBUF_RPTR"},
13098    {"bits": [10, 11], "name": "IBUF_WPTR"},
13099    {"bits": [16, 19], "name": "INST_STR_ST"},
13100    {"bits": [24, 25], "name": "ECC_ST"},
13101    {"bits": [26, 26], "name": "IS_HYB"},
13102    {"bits": [27, 28], "name": "HYB_CNT"},
13103    {"bits": [29, 29], "name": "KILL"},
13104    {"bits": [30, 30], "name": "NEED_KILL_IFETCH"},
13105    {"bits": [31, 31], "name": "NO_PREFETCH_CNT_HI"}
13106   ]
13107  },
13108  "SQ_WAVE_IB_DBG1": {
13109   "fields": [
13110    {"bits": [0, 0], "name": "IXNACK"},
13111    {"bits": [1, 1], "name": "XNACK"},
13112    {"bits": [2, 2], "name": "TA_NEED_RESET"},
13113    {"bits": [4, 8], "name": "XCNT"},
13114    {"bits": [11, 15], "name": "QCNT"},
13115    {"bits": [18, 22], "name": "RCNT"},
13116    {"bits": [25, 31], "name": "MISC_CNT"}
13117   ]
13118  },
13119  "SQ_WAVE_IB_STS": {
13120   "fields": [
13121    {"bits": [0, 3], "name": "VM_CNT"},
13122    {"bits": [4, 6], "name": "EXP_CNT"},
13123    {"bits": [8, 11], "name": "LGKM_CNT"},
13124    {"bits": [12, 14], "name": "VALU_CNT"},
13125    {"bits": [15, 15], "name": "FIRST_REPLAY"},
13126    {"bits": [16, 20], "name": "RCNT"},
13127    {"bits": [22, 23], "name": "VM_CNT_HI"}
13128   ]
13129  },
13130  "SQ_WAVE_LDS_ALLOC": {
13131   "fields": [
13132    {"bits": [0, 7], "name": "LDS_BASE"},
13133    {"bits": [12, 20], "name": "LDS_SIZE"}
13134   ]
13135  },
13136  "SQ_WAVE_MODE": {
13137   "fields": [
13138    {"bits": [0, 3], "name": "FP_ROUND"},
13139    {"bits": [4, 7], "name": "FP_DENORM"},
13140    {"bits": [8, 8], "name": "DX10_CLAMP"},
13141    {"bits": [9, 9], "name": "IEEE"},
13142    {"bits": [10, 10], "name": "LOD_CLAMPED"},
13143    {"bits": [11, 11], "name": "DEBUG_EN"},
13144    {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
13145    {"bits": [23, 23], "name": "FP16_OVFL"},
13146    {"bits": [24, 24], "name": "POPS_PACKER0"},
13147    {"bits": [25, 25], "name": "POPS_PACKER1"},
13148    {"bits": [26, 26], "name": "DISABLE_PERF"},
13149    {"bits": [27, 27], "name": "GPR_IDX_EN"},
13150    {"bits": [28, 28], "name": "VSKIP"},
13151    {"bits": [29, 31], "name": "CSP"}
13152   ]
13153  },
13154  "SQ_WAVE_PC_HI": {
13155   "fields": [
13156    {"bits": [0, 15], "name": "PC_HI"}
13157   ]
13158  },
13159  "SQ_WAVE_STATUS": {
13160   "fields": [
13161    {"bits": [0, 0], "name": "SCC"},
13162    {"bits": [1, 2], "name": "SPI_PRIO"},
13163    {"bits": [3, 4], "name": "USER_PRIO"},
13164    {"bits": [5, 5], "name": "PRIV"},
13165    {"bits": [6, 6], "name": "TRAP_EN"},
13166    {"bits": [7, 7], "name": "TTRACE_EN"},
13167    {"bits": [8, 8], "name": "EXPORT_RDY"},
13168    {"bits": [9, 9], "name": "EXECZ"},
13169    {"bits": [10, 10], "name": "VCCZ"},
13170    {"bits": [11, 11], "name": "IN_TG"},
13171    {"bits": [12, 12], "name": "IN_BARRIER"},
13172    {"bits": [13, 13], "name": "HALT"},
13173    {"bits": [14, 14], "name": "TRAP"},
13174    {"bits": [15, 15], "name": "TTRACE_CU_EN"},
13175    {"bits": [16, 16], "name": "VALID"},
13176    {"bits": [17, 17], "name": "ECC_ERR"},
13177    {"bits": [18, 18], "name": "SKIP_EXPORT"},
13178    {"bits": [19, 19], "name": "PERF_EN"},
13179    {"bits": [20, 20], "name": "COND_DBG_USER"},
13180    {"bits": [21, 21], "name": "COND_DBG_SYS"},
13181    {"bits": [22, 22], "name": "ALLOW_REPLAY"},
13182    {"bits": [23, 23], "name": "FATAL_HALT"},
13183    {"bits": [27, 27], "name": "MUST_EXPORT"}
13184   ]
13185  },
13186  "SQ_WAVE_TRAPSTS": {
13187   "fields": [
13188    {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},
13189    {"bits": [10, 10], "name": "SAVECTX"},
13190    {"bits": [11, 11], "name": "ILLEGAL_INST"},
13191    {"bits": [12, 14], "name": "EXCP_HI"},
13192    {"bits": [16, 21], "name": "EXCP_CYCLE"},
13193    {"bits": [28, 28], "name": "XNACK_ERROR"},
13194    {"bits": [29, 31], "name": "DP_RATE"}
13195   ]
13196  },
13197  "SX_BLEND_OPT_CONTROL": {
13198   "fields": [
13199    {"bits": [0, 0], "name": "MRT0_COLOR_OPT_DISABLE"},
13200    {"bits": [1, 1], "name": "MRT0_ALPHA_OPT_DISABLE"},
13201    {"bits": [4, 4], "name": "MRT1_COLOR_OPT_DISABLE"},
13202    {"bits": [5, 5], "name": "MRT1_ALPHA_OPT_DISABLE"},
13203    {"bits": [8, 8], "name": "MRT2_COLOR_OPT_DISABLE"},
13204    {"bits": [9, 9], "name": "MRT2_ALPHA_OPT_DISABLE"},
13205    {"bits": [12, 12], "name": "MRT3_COLOR_OPT_DISABLE"},
13206    {"bits": [13, 13], "name": "MRT3_ALPHA_OPT_DISABLE"},
13207    {"bits": [16, 16], "name": "MRT4_COLOR_OPT_DISABLE"},
13208    {"bits": [17, 17], "name": "MRT4_ALPHA_OPT_DISABLE"},
13209    {"bits": [20, 20], "name": "MRT5_COLOR_OPT_DISABLE"},
13210    {"bits": [21, 21], "name": "MRT5_ALPHA_OPT_DISABLE"},
13211    {"bits": [24, 24], "name": "MRT6_COLOR_OPT_DISABLE"},
13212    {"bits": [25, 25], "name": "MRT6_ALPHA_OPT_DISABLE"},
13213    {"bits": [28, 28], "name": "MRT7_COLOR_OPT_DISABLE"},
13214    {"bits": [29, 29], "name": "MRT7_ALPHA_OPT_DISABLE"},
13215    {"bits": [31, 31], "name": "PIXEN_ZERO_OPT_DISABLE"}
13216   ]
13217  },
13218  "SX_BLEND_OPT_EPSILON": {
13219   "fields": [
13220    {"bits": [0, 3], "enum_ref": "SX_BLEND_OPT_EPSILON__MRT0_EPSILON", "name": "MRT0_EPSILON"},
13221    {"bits": [4, 7], "name": "MRT1_EPSILON"},
13222    {"bits": [8, 11], "name": "MRT2_EPSILON"},
13223    {"bits": [12, 15], "name": "MRT3_EPSILON"},
13224    {"bits": [16, 19], "name": "MRT4_EPSILON"},
13225    {"bits": [20, 23], "name": "MRT5_EPSILON"},
13226    {"bits": [24, 27], "name": "MRT6_EPSILON"},
13227    {"bits": [28, 31], "name": "MRT7_EPSILON"}
13228   ]
13229  },
13230  "SX_MRT0_BLEND_OPT": {
13231   "fields": [
13232    {"bits": [0, 2], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_SRC_OPT"},
13233    {"bits": [4, 6], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_DST_OPT"},
13234    {"bits": [8, 10], "enum_ref": "SX_OPT_COMB_FCN", "name": "COLOR_COMB_FCN"},
13235    {"bits": [16, 18], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_SRC_OPT"},
13236    {"bits": [20, 22], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_DST_OPT"},
13237    {"bits": [24, 26], "enum_ref": "SX_OPT_COMB_FCN", "name": "ALPHA_COMB_FCN"}
13238   ]
13239  },
13240  "SX_PS_DOWNCONVERT": {
13241   "fields": [
13242    {"bits": [0, 3], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT0"},
13243    {"bits": [4, 7], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT1"},
13244    {"bits": [8, 11], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT2"},
13245    {"bits": [12, 15], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT3"},
13246    {"bits": [16, 19], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT4"},
13247    {"bits": [20, 23], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT5"},
13248    {"bits": [24, 27], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT6"},
13249    {"bits": [28, 31], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT7"}
13250   ]
13251  },
13252  "TA_BC_BASE_ADDR_HI": {
13253   "fields": [
13254    {"bits": [0, 7], "name": "ADDRESS"}
13255   ]
13256  },
13257  "TA_PERFCOUNTER0_SELECT": {
13258   "fields": [
13259    {"bits": [0, 7], "name": "PERF_SEL"},
13260    {"bits": [10, 17], "name": "PERF_SEL1"},
13261    {"bits": [20, 23], "name": "CNTR_MODE"},
13262    {"bits": [24, 27], "name": "PERF_MODE1"},
13263    {"bits": [28, 31], "name": "PERF_MODE"}
13264   ]
13265  },
13266  "TA_PERFCOUNTER0_SELECT1": {
13267   "fields": [
13268    {"bits": [0, 7], "name": "PERF_SEL2"},
13269    {"bits": [10, 17], "name": "PERF_SEL3"},
13270    {"bits": [24, 27], "name": "PERF_MODE3"},
13271    {"bits": [28, 31], "name": "PERF_MODE2"}
13272   ]
13273  },
13274  "TA_PERFCOUNTER1_SELECT": {
13275   "fields": [
13276    {"bits": [0, 7], "name": "PERF_SEL"},
13277    {"bits": [20, 23], "name": "CNTR_MODE"},
13278    {"bits": [28, 31], "name": "PERF_MODE"}
13279   ]
13280  },
13281  "TCC_PERFCOUNTER0_SELECT1": {
13282   "fields": [
13283    {"bits": [0, 9], "name": "PERF_SEL2"},
13284    {"bits": [10, 19], "name": "PERF_SEL3"},
13285    {"bits": [24, 27], "name": "PERF_MODE2"},
13286    {"bits": [28, 31], "name": "PERF_MODE3"}
13287   ]
13288  },
13289  "VGT_DMA_BASE_HI": {
13290   "fields": [
13291    {"bits": [0, 15], "name": "BASE_ADDR"}
13292   ]
13293  },
13294  "VGT_DMA_INDEX_TYPE": {
13295   "fields": [
13296    {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
13297    {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},
13298    {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},
13299    {"bits": [6, 6], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
13300    {"bits": [8, 8], "name": "PRIMGEN_EN"},
13301    {"bits": [9, 9], "name": "NOT_EOP"},
13302    {"bits": [10, 10], "name": "REQ_PATH"}
13303   ]
13304  },
13305  "VGT_DRAW_INITIATOR": {
13306   "fields": [
13307    {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},
13308    {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},
13309    {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},
13310    {"bits": [5, 5], "name": "NOT_EOP"},
13311    {"bits": [6, 6], "name": "USE_OPAQUE"},
13312    {"bits": [7, 7], "name": "UNROLLED_INST"},
13313    {"bits": [8, 8], "name": "GRBM_SKEW_NO_DEC"},
13314    {"bits": [29, 31], "name": "REG_RT_INDEX"}
13315   ]
13316  },
13317  "VGT_DRAW_PAYLOAD_CNTL": {
13318   "fields": [
13319    {"bits": [0, 0], "name": "OBJPRIM_ID_EN"},
13320    {"bits": [1, 1], "name": "EN_REG_RT_INDEX"},
13321    {"bits": [2, 2], "name": "EN_PIPELINE_PRIMID"},
13322    {"bits": [3, 3], "name": "OBJECT_ID_INST_EN"}
13323   ]
13324  },
13325  "VGT_ESGS_RING_ITEMSIZE": {
13326   "fields": [
13327    {"bits": [0, 14], "name": "ITEMSIZE"}
13328   ]
13329  },
13330  "VGT_ES_PER_GS": {
13331   "fields": [
13332    {"bits": [0, 10], "name": "ES_PER_GS"}
13333   ]
13334  },
13335  "VGT_EVENT_ADDRESS_REG": {
13336   "fields": [
13337    {"bits": [0, 27], "name": "ADDRESS_LOW"}
13338   ]
13339  },
13340  "VGT_EVENT_INITIATOR": {
13341   "fields": [
13342    {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},
13343    {"bits": [10, 26], "name": "ADDRESS_HI"},
13344    {"bits": [27, 27], "name": "EXTENDED_EVENT"}
13345   ]
13346  },
13347  "VGT_GROUP_DECR": {
13348   "fields": [
13349    {"bits": [0, 3], "name": "DECR"}
13350   ]
13351  },
13352  "VGT_GROUP_FIRST_DECR": {
13353   "fields": [
13354    {"bits": [0, 3], "name": "FIRST_DECR"}
13355   ]
13356  },
13357  "VGT_GROUP_PRIM_TYPE": {
13358   "fields": [
13359    {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},
13360    {"bits": [14, 14], "name": "RETAIN_ORDER"},
13361    {"bits": [15, 15], "name": "RETAIN_QUADS"},
13362    {"bits": [16, 18], "name": "PRIM_ORDER"}
13363   ]
13364  },
13365  "VGT_GROUP_VECT_0_CNTL": {
13366   "fields": [
13367    {"bits": [0, 0], "name": "COMP_X_EN"},
13368    {"bits": [1, 1], "name": "COMP_Y_EN"},
13369    {"bits": [2, 2], "name": "COMP_Z_EN"},
13370    {"bits": [3, 3], "name": "COMP_W_EN"},
13371    {"bits": [8, 15], "name": "STRIDE"},
13372    {"bits": [16, 23], "name": "SHIFT"}
13373   ]
13374  },
13375  "VGT_GROUP_VECT_0_FMT_CNTL": {
13376   "fields": [
13377    {"bits": [0, 3], "name": "X_CONV"},
13378    {"bits": [4, 7], "name": "X_OFFSET"},
13379    {"bits": [8, 11], "name": "Y_CONV"},
13380    {"bits": [12, 15], "name": "Y_OFFSET"},
13381    {"bits": [16, 19], "name": "Z_CONV"},
13382    {"bits": [20, 23], "name": "Z_OFFSET"},
13383    {"bits": [24, 27], "name": "W_CONV"},
13384    {"bits": [28, 31], "name": "W_OFFSET"}
13385   ]
13386  },
13387  "VGT_GSVS_RING_OFFSET_1": {
13388   "fields": [
13389    {"bits": [0, 14], "name": "OFFSET"}
13390   ]
13391  },
13392  "VGT_GS_INSTANCE_CNT": {
13393   "fields": [
13394    {"bits": [0, 0], "name": "ENABLE"},
13395    {"bits": [2, 8], "name": "CNT"}
13396   ]
13397  },
13398  "VGT_GS_MAX_PRIMS_PER_SUBGROUP": {
13399   "fields": [
13400    {"bits": [0, 15], "name": "MAX_PRIMS_PER_SUBGROUP"}
13401   ]
13402  },
13403  "VGT_GS_MAX_VERT_OUT": {
13404   "fields": [
13405    {"bits": [0, 10], "name": "MAX_VERT_OUT"}
13406   ]
13407  },
13408  "VGT_GS_MODE": {
13409   "fields": [
13410    {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},
13411    {"bits": [3, 3], "name": "RESERVED_0"},
13412    {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},
13413    {"bits": [6, 10], "name": "RESERVED_1"},
13414    {"bits": [11, 11], "name": "GS_C_PACK_EN"},
13415    {"bits": [12, 12], "name": "RESERVED_2"},
13416    {"bits": [13, 13], "name": "ES_PASSTHRU"},
13417    {"bits": [14, 14], "name": "RESERVED_3"},
13418    {"bits": [15, 15], "name": "RESERVED_4"},
13419    {"bits": [16, 16], "name": "RESERVED_5"},
13420    {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},
13421    {"bits": [18, 18], "name": "SUPPRESS_CUTS"},
13422    {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},
13423    {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},
13424    {"bits": [21, 22], "name": "ONCHIP"}
13425   ]
13426  },
13427  "VGT_GS_ONCHIP_CNTL": {
13428   "fields": [
13429    {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},
13430    {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"},
13431    {"bits": [22, 31], "name": "GS_INST_PRIMS_IN_SUBGRP"}
13432   ]
13433  },
13434  "VGT_GS_OUT_PRIM_TYPE": {
13435   "fields": [
13436    {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},
13437    {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},
13438    {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},
13439    {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},
13440    {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}
13441   ]
13442  },
13443  "VGT_GS_PER_ES": {
13444   "fields": [
13445    {"bits": [0, 10], "name": "GS_PER_ES"}
13446   ]
13447  },
13448  "VGT_GS_PER_VS": {
13449   "fields": [
13450    {"bits": [0, 3], "name": "GS_PER_VS"}
13451   ]
13452  },
13453  "VGT_HOS_CNTL": {
13454   "fields": [
13455    {"bits": [0, 1], "name": "TESS_MODE"}
13456   ]
13457  },
13458  "VGT_HOS_REUSE_DEPTH": {
13459   "fields": [
13460    {"bits": [0, 7], "name": "REUSE_DEPTH"}
13461   ]
13462  },
13463  "VGT_HS_OFFCHIP_PARAM": {
13464   "fields": [
13465    {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},
13466    {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}
13467   ]
13468  },
13469  "VGT_INDEX_TYPE": {
13470   "fields": [
13471    {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
13472    {"bits": [8, 8], "name": "PRIMGEN_EN"}
13473   ]
13474  },
13475  "VGT_LS_HS_CONFIG": {
13476   "fields": [
13477    {"bits": [0, 7], "name": "NUM_PATCHES"},
13478    {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},
13479    {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}
13480   ]
13481  },
13482  "VGT_MULTI_PRIM_IB_RESET_EN": {
13483   "fields": [
13484    {"bits": [0, 0], "name": "RESET_EN"},
13485    {"bits": [1, 1], "name": "MATCH_ALL_BITS"}
13486   ]
13487  },
13488  "VGT_OUTPUT_PATH_CNTL": {
13489   "fields": [
13490    {"bits": [0, 2], "name": "PATH_SELECT"}
13491   ]
13492  },
13493  "VGT_OUT_DEALLOC_CNTL": {
13494   "fields": [
13495    {"bits": [0, 6], "name": "DEALLOC_DIST"}
13496   ]
13497  },
13498  "VGT_PERFCOUNTER_SEID_MASK": {
13499   "fields": [
13500    {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}
13501   ]
13502  },
13503  "VGT_PRIMITIVEID_EN": {
13504   "fields": [
13505    {"bits": [0, 0], "name": "PRIMITIVEID_EN"},
13506    {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"},
13507    {"bits": [2, 2], "name": "NGG_DISABLE_PROVOK_REUSE"}
13508   ]
13509  },
13510  "VGT_PRIMITIVE_TYPE": {
13511   "fields": [
13512    {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}
13513   ]
13514  },
13515  "VGT_REUSE_OFF": {
13516   "fields": [
13517    {"bits": [0, 0], "name": "REUSE_OFF"}
13518   ]
13519  },
13520  "VGT_SHADER_STAGES_EN": {
13521   "fields": [
13522    {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
13523    {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
13524    {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
13525    {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
13526    {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
13527    {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"},
13528    {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"},
13529    {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"},
13530    {"bits": [12, 12], "name": "VS_WAVE_ID_EN"},
13531    {"bits": [13, 13], "name": "PRIMGEN_EN"},
13532    {"bits": [14, 14], "name": "ORDERED_ID_MODE"},
13533    {"bits": [15, 18], "name": "MAX_PRIMGRP_IN_WAVE"},
13534    {"bits": [19, 20], "name": "GS_FAST_LAUNCH"}
13535   ]
13536  },
13537  "VGT_STRMOUT_BUFFER_CONFIG": {
13538   "fields": [
13539    {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},
13540    {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},
13541    {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},
13542    {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}
13543   ]
13544  },
13545  "VGT_STRMOUT_CONFIG": {
13546   "fields": [
13547    {"bits": [0, 0], "name": "STREAMOUT_0_EN"},
13548    {"bits": [1, 1], "name": "STREAMOUT_1_EN"},
13549    {"bits": [2, 2], "name": "STREAMOUT_2_EN"},
13550    {"bits": [3, 3], "name": "STREAMOUT_3_EN"},
13551    {"bits": [4, 6], "name": "RAST_STREAM"},
13552    {"bits": [7, 7], "name": "EN_PRIMS_NEEDED_CNT"},
13553    {"bits": [8, 11], "name": "RAST_STREAM_MASK"},
13554    {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}
13555   ]
13556  },
13557  "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE": {
13558   "fields": [
13559    {"bits": [0, 8], "name": "VERTEX_STRIDE"}
13560   ]
13561  },
13562  "VGT_STRMOUT_VTX_STRIDE_0": {
13563   "fields": [
13564    {"bits": [0, 9], "name": "STRIDE"}
13565   ]
13566  },
13567  "VGT_TESS_DISTRIBUTION": {
13568   "fields": [
13569    {"bits": [0, 7], "name": "ACCUM_ISOLINE"},
13570    {"bits": [8, 15], "name": "ACCUM_TRI"},
13571    {"bits": [16, 23], "name": "ACCUM_QUAD"},
13572    {"bits": [24, 28], "name": "DONUT_SPLIT"},
13573    {"bits": [29, 31], "name": "TRAP_SPLIT"}
13574   ]
13575  },
13576  "VGT_TF_PARAM": {
13577   "fields": [
13578    {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},
13579    {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},
13580    {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},
13581    {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},
13582    {"bits": [9, 9], "name": "DEPRECATED"},
13583    {"bits": [14, 14], "name": "DISABLE_DONUTS"},
13584    {"bits": [15, 15], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
13585    {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"}
13586   ]
13587  },
13588  "VGT_TF_RING_SIZE": {
13589   "fields": [
13590    {"bits": [0, 15], "name": "SIZE"}
13591   ]
13592  },
13593  "VGT_VERTEX_REUSE_BLOCK_CNTL": {
13594   "fields": [
13595    {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}
13596   ]
13597  },
13598  "VGT_VTX_CNT_EN": {
13599   "fields": [
13600    {"bits": [0, 0], "name": "VTX_CNT_EN"}
13601   ]
13602  },
13603  "WD_PERFCOUNTER0_SELECT": {
13604   "fields": [
13605    {"bits": [0, 7], "name": "PERF_SEL"},
13606    {"bits": [28, 31], "name": "PERF_MODE"}
13607   ]
13608  }
13609 }
13610}
13611