1/************************************************************************** 2 * 3 * Copyright 2017 Advanced Micro Devices, Inc. 4 * All Rights Reserved. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the 8 * "Software"), to deal in the Software without restriction, including 9 * without limitation the rights to use, copy, modify, merge, publish, 10 * distribute, sub license, and/or sell copies of the Software, and to 11 * permit persons to whom the Software is furnished to do so, subject to 12 * the following conditions: 13 * 14 * The above copyright notice and this permission notice (including the 15 * next paragraph) shall be included in all copies or substantial portions 16 * of the Software. 17 * 18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. 21 * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR 22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, 23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE 24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25 * 26 **************************************************************************/ 27 28#ifndef _AC_VCN_DEC_H 29#define _AC_VCN_DEC_H 30 31/* VCN programming information shared between gallium/vulkan */ 32#define RDECODE_PKT_TYPE_S(x) (((unsigned)(x)&0x3) << 30) 33#define RDECODE_PKT_TYPE_G(x) (((x) >> 30) & 0x3) 34#define RDECODE_PKT_TYPE_C 0x3FFFFFFF 35#define RDECODE_PKT_COUNT_S(x) (((unsigned)(x)&0x3FFF) << 16) 36#define RDECODE_PKT_COUNT_G(x) (((x) >> 16) & 0x3FFF) 37#define RDECODE_PKT_COUNT_C 0xC000FFFF 38#define RDECODE_PKT0_BASE_INDEX_S(x) (((unsigned)(x)&0xFFFF) << 0) 39#define RDECODE_PKT0_BASE_INDEX_G(x) (((x) >> 0) & 0xFFFF) 40#define RDECODE_PKT0_BASE_INDEX_C 0xFFFF0000 41#define RDECODE_PKT0(index, count) \ 42 (RDECODE_PKT_TYPE_S(0) | RDECODE_PKT0_BASE_INDEX_S(index) | RDECODE_PKT_COUNT_S(count)) 43 44#define RDECODE_PKT2() (RDECODE_PKT_TYPE_S(2)) 45 46#define RDECODE_PKT_REG_J(x) ((unsigned)(x)&0x3FFFF) 47#define RDECODE_PKT_RES_J(x) (((unsigned)(x)&0x3F) << 18) 48#define RDECODE_PKT_COND_J(x) (((unsigned)(x)&0xF) << 24) 49#define RDECODE_PKT_TYPE_J(x) (((unsigned)(x)&0xF) << 28) 50#define RDECODE_PKTJ(reg, cond, type) \ 51 (RDECODE_PKT_REG_J(reg) | RDECODE_PKT_RES_J(0) | RDECODE_PKT_COND_J(cond) | \ 52 RDECODE_PKT_TYPE_J(type)) 53 54#define RDECODE_IB_PARAM_DECODE_BUFFER (0x00000001) 55#define RDECODE_IB_PARAM_QUERY_BUFFER (0x00000002) 56#define RDECODE_IB_PARAM_PREDICATION_BUFFER (0x00000003) 57#define RDECODE_IB_PARAM_UMD_64BIT_FENCE (0x00000005) 58#define RDECODE_IB_PARAM_UMD_RECORD_TIMESTAMP (0x00000006) 59#define RDECODE_IB_PARAM_UMD_REPORT_EVENT_STATUS (0x00000007) 60#define RDECODE_IB_PARAM_UMD_COPY_MEMORY (0x00000008) 61#define RDECODE_IB_PARAM_UMD_WRITE_MEMORY (0x00000009) 62#define RDECODE_IB_PARAM_FEEDBACK_BUFFER (0x0000000A) 63 64#define RDECODE_CMDBUF_FLAGS_MSG_BUFFER (0x00000001) 65#define RDECODE_CMDBUF_FLAGS_DPB_BUFFER (0x00000002) 66#define RDECODE_CMDBUF_FLAGS_BITSTREAM_BUFFER (0x00000004) 67#define RDECODE_CMDBUF_FLAGS_DECODING_TARGET_BUFFER (0x00000008) 68#define RDECODE_CMDBUF_FLAGS_FEEDBACK_BUFFER (0x00000010) 69#define RDECODE_CMDBUF_FLAGS_PICTURE_PARAM_BUFFER (0x00000020) 70#define RDECODE_CMDBUF_FLAGS_MB_CONTROL_BUFFER (0x00000040) 71#define RDECODE_CMDBUF_FLAGS_IDCT_COEF_BUFFER (0x00000080) 72#define RDECODE_CMDBUF_FLAGS_PREEMPT_BUFFER (0x00000100) 73#define RDECODE_CMDBUF_FLAGS_IT_SCALING_BUFFER (0x00000200) 74#define RDECODE_CMDBUF_FLAGS_SCALER_TARGET_BUFFER (0x00000400) 75#define RDECODE_CMDBUF_FLAGS_CONTEXT_BUFFER (0x00000800) 76#define RDECODE_CMDBUF_FLAGS_PROB_TBL_BUFFER (0x00001000) 77#define RDECODE_CMDBUF_FLAGS_QUERY_BUFFER (0x00002000) 78#define RDECODE_CMDBUF_FLAGS_PREDICATION_BUFFER (0x00004000) 79#define RDECODE_CMDBUF_FLAGS_SCLR_COEF_BUFFER (0x00008000) 80#define RDECODE_CMDBUF_FLAGS_RECORD_TIMESTAMP (0x00010000) 81#define RDECODE_CMDBUF_FLAGS_REPORT_EVENT_STATUS (0x00020000) 82#define RDECODE_CMDBUF_FLAGS_RESERVED_SIZE_INFO_BUFFER (0x00040000) 83#define RDECODE_CMDBUF_FLAGS_LUMA_HIST_BUFFER (0x00080000) 84#define RDECODE_CMDBUF_FLAGS_SESSION_CONTEXT_BUFFER (0x00100000) 85 86#define RDECODE_CMD_MSG_BUFFER 0x00000000 87#define RDECODE_CMD_DPB_BUFFER 0x00000001 88#define RDECODE_CMD_DECODING_TARGET_BUFFER 0x00000002 89#define RDECODE_CMD_FEEDBACK_BUFFER 0x00000003 90#define RDECODE_CMD_PROB_TBL_BUFFER 0x00000004 91#define RDECODE_CMD_SESSION_CONTEXT_BUFFER 0x00000005 92#define RDECODE_CMD_BITSTREAM_BUFFER 0x00000100 93#define RDECODE_CMD_IT_SCALING_TABLE_BUFFER 0x00000204 94#define RDECODE_CMD_CONTEXT_BUFFER 0x00000206 95 96#define RDECODE_MSG_CREATE 0x00000000 97#define RDECODE_MSG_DECODE 0x00000001 98#define RDECODE_MSG_DESTROY 0x00000002 99 100#define RDECODE_CODEC_H264 0x00000000 101#define RDECODE_CODEC_VC1 0x00000001 102#define RDECODE_CODEC_MPEG2_VLD 0x00000003 103#define RDECODE_CODEC_MPEG4 0x00000004 104#define RDECODE_CODEC_H264_PERF 0x00000007 105#define RDECODE_CODEC_JPEG 0x00000008 106#define RDECODE_CODEC_H265 0x00000010 107#define RDECODE_CODEC_VP9 0x00000011 108#define RDECODE_CODEC_AV1 0x00000013 109 110#define RDECODE_ARRAY_MODE_LINEAR 0x00000000 111#define RDECODE_ARRAY_MODE_MACRO_LINEAR_MICRO_TILED 0x00000001 112#define RDECODE_ARRAY_MODE_1D_THIN 0x00000002 113#define RDECODE_ARRAY_MODE_2D_THIN 0x00000004 114#define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_LINEAR 0x00000004 115#define RDECODE_ARRAY_MODE_MACRO_TILED_MICRO_TILED 0x00000005 116 117#define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX10 0x00000000 118#define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX9 0x00000001 119#define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX8 0x00000002 120#define RDECODE_ARRAY_MODE_ADDRLIB_SEL_GFX11 0x00000003 121 122#define RDECODE_H264_PROFILE_BASELINE 0x00000000 123#define RDECODE_H264_PROFILE_MAIN 0x00000001 124#define RDECODE_H264_PROFILE_HIGH 0x00000002 125#define RDECODE_H264_PROFILE_STEREO_HIGH 0x00000003 126#define RDECODE_H264_PROFILE_MVC 0x00000004 127 128#define RDECODE_VC1_PROFILE_SIMPLE 0x00000000 129#define RDECODE_VC1_PROFILE_MAIN 0x00000001 130#define RDECODE_VC1_PROFILE_ADVANCED 0x00000002 131 132#define RDECODE_SW_MODE_LINEAR 0x00000000 133#define RDECODE_256B_S 0x00000001 134#define RDECODE_256B_D 0x00000002 135#define RDECODE_4KB_S 0x00000005 136#define RDECODE_4KB_D 0x00000006 137#define RDECODE_64KB_S 0x00000009 138#define RDECODE_64KB_D 0x0000000A 139#define RDECODE_4KB_S_X 0x00000015 140#define RDECODE_4KB_D_X 0x00000016 141#define RDECODE_64KB_S_X 0x00000019 142#define RDECODE_64KB_D_X 0x0000001A 143 144#define RDECODE_MESSAGE_NOT_SUPPORTED 0x00000000 145#define RDECODE_MESSAGE_CREATE 0x00000001 146#define RDECODE_MESSAGE_DECODE 0x00000002 147#define RDECODE_MESSAGE_DRM 0x00000003 148#define RDECODE_MESSAGE_AVC 0x00000006 149#define RDECODE_MESSAGE_VC1 0x00000007 150#define RDECODE_MESSAGE_MPEG2_VLD 0x0000000A 151#define RDECODE_MESSAGE_MPEG4_ASP_VLD 0x0000000B 152#define RDECODE_MESSAGE_HEVC 0x0000000D 153#define RDECODE_MESSAGE_VP9 0x0000000E 154#define RDECODE_MESSAGE_DYNAMIC_DPB 0x00000010 155#define RDECODE_MESSAGE_AV1 0x00000011 156 157#define RDECODE_FEEDBACK_PROFILING 0x00000001 158 159#define RDECODE_SPS_INFO_H264_EXTENSION_SUPPORT_FLAG_SHIFT 7 160 161#define RDECODE_VP9_PROBS_DATA_SIZE 2304 162 163#define mmUVD_JPEG_CNTL 0x0200 164#define mmUVD_JPEG_CNTL_BASE_IDX 1 165#define mmUVD_JPEG_RB_BASE 0x0201 166#define mmUVD_JPEG_RB_BASE_BASE_IDX 1 167#define mmUVD_JPEG_RB_WPTR 0x0202 168#define mmUVD_JPEG_RB_WPTR_BASE_IDX 1 169#define mmUVD_JPEG_RB_RPTR 0x0203 170#define mmUVD_JPEG_RB_RPTR_BASE_IDX 1 171#define mmUVD_JPEG_RB_SIZE 0x0204 172#define mmUVD_JPEG_RB_SIZE_BASE_IDX 1 173#define mmUVD_JPEG_TIER_CNTL2 0x021a 174#define mmUVD_JPEG_TIER_CNTL2_BASE_IDX 1 175#define mmUVD_JPEG_UV_TILING_CTRL 0x021c 176#define mmUVD_JPEG_UV_TILING_CTRL_BASE_IDX 1 177#define mmUVD_JPEG_TILING_CTRL 0x021e 178#define mmUVD_JPEG_TILING_CTRL_BASE_IDX 1 179#define mmUVD_JPEG_OUTBUF_RPTR 0x0220 180#define mmUVD_JPEG_OUTBUF_RPTR_BASE_IDX 1 181#define mmUVD_JPEG_OUTBUF_WPTR 0x0221 182#define mmUVD_JPEG_OUTBUF_WPTR_BASE_IDX 1 183#define mmUVD_JPEG_PITCH 0x0222 184#define mmUVD_JPEG_PITCH_BASE_IDX 1 185#define mmUVD_JPEG_INT_EN 0x0229 186#define mmUVD_JPEG_INT_EN_BASE_IDX 1 187#define mmUVD_JPEG_UV_PITCH 0x022b 188#define mmUVD_JPEG_UV_PITCH_BASE_IDX 1 189#define mmUVD_JPEG_INDEX 0x023e 190#define mmUVD_JPEG_INDEX_BASE_IDX 1 191#define mmUVD_JPEG_DATA 0x023f 192#define mmUVD_JPEG_DATA_BASE_IDX 1 193#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH 0x0438 194#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH_BASE_IDX 1 195#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW 0x0439 196#define mmUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW_BASE_IDX 1 197#define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH 0x045a 198#define mmUVD_LMI_JPEG_READ_64BIT_BAR_HIGH_BASE_IDX 1 199#define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW 0x045b 200#define mmUVD_LMI_JPEG_READ_64BIT_BAR_LOW_BASE_IDX 1 201#define mmUVD_CTX_INDEX 0x0528 202#define mmUVD_CTX_INDEX_BASE_IDX 1 203#define mmUVD_CTX_DATA 0x0529 204#define mmUVD_CTX_DATA_BASE_IDX 1 205#define mmUVD_SOFT_RESET 0x05a0 206#define mmUVD_SOFT_RESET_BASE_IDX 1 207 208#define vcnipUVD_JPEG_DEC_SOFT_RST 0x402f 209#define vcnipUVD_JRBC_IB_COND_RD_TIMER 0x408e 210#define vcnipUVD_JRBC_IB_REF_DATA 0x408f 211#define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_HIGH 0x40e1 212#define vcnipUVD_LMI_JPEG_READ_64BIT_BAR_LOW 0x40e0 213#define vcnipUVD_JPEG_RB_BASE 0x4001 214#define vcnipUVD_JPEG_RB_SIZE 0x4004 215#define vcnipUVD_JPEG_RB_WPTR 0x4002 216#define vcnipUVD_JPEG_PITCH 0x401f 217#define vcnipUVD_JPEG_UV_PITCH 0x4020 218#define vcnipJPEG_DEC_ADDR_MODE 0x4027 219#define vcnipJPEG_DEC_Y_GFX10_TILING_SURFACE 0x4024 220#define vcnipJPEG_DEC_UV_GFX10_TILING_SURFACE 0x4025 221#define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_HIGH 0x40e3 222#define vcnipUVD_LMI_JPEG_WRITE_64BIT_BAR_LOW 0x40e2 223#define vcnipUVD_JPEG_INDEX 0x402c 224#define vcnipUVD_JPEG_DATA 0x402d 225#define vcnipUVD_JPEG_TIER_CNTL2 0x400f 226#define vcnipUVD_JPEG_OUTBUF_RPTR 0x401e 227#define vcnipUVD_JPEG_OUTBUF_CNTL 0x401c 228#define vcnipUVD_JPEG_INT_EN 0x400a 229#define vcnipUVD_JPEG_CNTL 0x4000 230#define vcnipUVD_JPEG_RB_RPTR 0x4003 231#define vcnipUVD_JPEG_OUTBUF_WPTR 0x401d 232 233#define UVD_BASE_INST0_SEG0 0x00007800 234#define UVD_BASE_INST0_SEG1 0x00007E00 235#define UVD_BASE_INST0_SEG2 0 236#define UVD_BASE_INST0_SEG3 0 237#define UVD_BASE_INST0_SEG4 0 238 239#define SOC15_REG_ADDR(reg) (UVD_BASE_INST0_SEG1 + reg) 240 241#define COND0 0 242#define COND1 1 243#define COND2 2 244#define COND3 3 245#define COND4 4 246#define COND5 5 247#define COND6 6 248#define COND7 7 249 250#define TYPE0 0 251#define TYPE1 1 252#define TYPE2 2 253#define TYPE3 3 254#define TYPE4 4 255#define TYPE5 5 256#define TYPE6 6 257#define TYPE7 7 258 259/* VP9 Frame header flags */ 260#define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_SHIFT (14) 261#define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_SHIFT (13) 262#define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_SHIFT (12) 263#define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_SHIFT (11) 264#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_SHIFT (10) 265#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (9) 266#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_SHIFT (8) 267#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_SHIFT (7) 268#define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_SHIFT (6) 269#define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_SHIFT (5) 270#define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_SHIFT (4) 271#define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_SHIFT (3) 272#define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_SHIFT (2) 273#define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_SHIFT (1) 274#define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_SHIFT (0) 275 276 277#define RDECODE_FRAME_HDR_INFO_VP9_USE_UNCOMPRESSED_HEADER_MASK (0x00004000) 278#define RDECODE_FRAME_HDR_INFO_VP9_USE_PREV_IN_FIND_MV_REFS_MASK (0x00002000) 279#define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_UPDATE_MASK (0x00001000) 280#define RDECODE_FRAME_HDR_INFO_VP9_MODE_REF_DELTA_ENABLED_MASK (0x00000800) 281#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_DATA_MASK (0x00000400) 282#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x00000200) 283#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_UPDATE_MAP_MASK (0x00000100) 284#define RDECODE_FRAME_HDR_INFO_VP9_SEGMENTATION_ENABLED_MASK (0x00000080) 285#define RDECODE_FRAME_HDR_INFO_VP9_FRAME_PARALLEL_DECODING_MODE_MASK (0x00000040) 286#define RDECODE_FRAME_HDR_INFO_VP9_REFRESH_FRAME_CONTEXT_MASK (0x00000020) 287#define RDECODE_FRAME_HDR_INFO_VP9_ALLOW_HIGH_PRECISION_MV_MASK (0x00000010) 288#define RDECODE_FRAME_HDR_INFO_VP9_INTRA_ONLY_MASK (0x00000008) 289#define RDECODE_FRAME_HDR_INFO_VP9_ERROR_RESILIENT_MODE_MASK (0x00000004) 290#define RDECODE_FRAME_HDR_INFO_VP9_FRAME_TYPE_MASK (0x00000002) 291#define RDECODE_FRAME_HDR_INFO_VP9_SHOW_EXISTING_FRAME_MASK (0x00000001) 292 293/* Drm definitions */ 294#define DRM_CMD_KEY_SHIFT 0 295#define DRM_CMD_CNT_KEY_SHIFT 1 296#define DRM_CMD_CNT_DATA_SHIFT 2 297#define DRM_CMD_OFFSET_SHIFT 3 298#define DRM_CMD_SESSION_SEL_SHIFT 4 299#define DRM_CMD_UNWRAP_KEY_SHIFT 8 300#define DRM_CMD_GEN_MASK_SHIFT 9 301#define DRM_CMD_ALGORITHM_SHIFT 10 302#define DRM_CMD_BYTE_MASK_SHIFT 16 303#define DRM_CMD_DRM_BYPASS_SHIFT 31 304 305#define DRM_CMD_KEY_MASK (0x00000001) 306#define DRM_CMD_CNT_KEY_MASK (0x00000002) 307#define DRM_CMD_CNT_DATA_MASK (0x00000004) 308#define DRM_CMD_OFFSET_MASK (0x00000008) 309#define DRM_CMD_SESSION_SEL_MASK (0x000000F0) 310#define DRM_CMD_UNWRAP_KEY_MASK (0x00000100) 311#define DRM_CMD_GEN_MASK_MASK (0x00000200) 312#define DRM_CMD_ALGORITHM_MASK (0x00000C00) 313#define DRM_CMD_BYTE_MASK_MASK (0x00FF0000) 314#define DRM_CMD_DRM_BYPASS_MASK (0x80000000) 315 316/* Drm_cntl definitions */ 317#define DRM_CNTL_ENC_BYTECNT_SHIFT (6) 318#define DRM_CNTL_CLR_BYTECNT_SHIFT (16) 319#define DRM_CNTL_BYPASS_SHIFT (24) 320#define DRM_CNTL_PARTIAL_MODE_SHIFT (25) 321#define DRM_CNTL_OFFSET_MODE_SHIFT (26) 322#define DRM_CNTL_HEADER_MODE_SHIFT (27) 323#define DRM_CNTL_HEADER_BYTECNT_SHIFT (28) 324 325#define DRM_CNTL_ENC_BYTECNT_MASK (0x00000FC0) 326#define DRM_CNTL_CLR_BYTECNT_MASK (0x003F0000) 327#define DRM_CNTL_BYPASS_MASK (0x01000000) 328#define DRM_CNTL_PARTIAL_MODE_MASK (0x02000000) 329#define DRM_CNTL_OFFSET_MODE_MASK (0x04000000) 330#define DRM_CNTL_HEADER_MODE_MASK (0x08000000) 331#define DRM_CNTL_HEADER_BYTECNT_MASK (0xF0000000) 332 333#define SAMU_DRM_DISABLE 0x00000000 334#define SAMU_DRM_ENABLE 0x00000001 335 336/* AV1 Frame header flags */ 337#define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_SHIFT (31) 338#define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_SHIFT (30) 339#define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_SHIFT (29) 340#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_SHIFT (28) 341#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_SHIFT (27) 342#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_SHIFT (26) 343#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_SHIFT (25) 344#define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_SHIFT (24) 345#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_SHIFT (23) 346#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_SHIFT (22) 347#define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_SHIFT (21) 348#define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_SHIFT (20) 349#define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_SHIFT (19) 350#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_SHIFT (18) 351#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_SHIFT (17) 352#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_SHIFT (16) 353#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_SHIFT (15) 354#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_SHIFT (14) 355#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_SHIFT (13) 356#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_SHIFT (12) 357#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_SHIFT (11) 358#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_SHIFT (10) 359#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_SHIFT (9) 360#define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_SHIFT (8) 361#define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_SHIFT (7) 362#define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_SHIFT (6) 363#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_SHIFT (5) 364#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_SHIFT (4) 365#define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_SHIFT (3) 366#define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_SHIFT (2) 367#define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_SHIFT (1) 368#define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_SHIFT (0) 369 370#define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_REF_FRAME_MVS_MASK (0x80000000) 371#define RDECODE_FRAME_HDR_INFO_AV1_SKIP_REFERENCE_UPDATE_MASK (0x40000000) 372#define RDECODE_FRAME_HDR_INFO_AV1_SWITCHABLE_SKIP_MODE_MASK (0x20000000) 373#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_MULTI_MASK (0x10000000) 374#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_TEMPORAL_UPDATE_MASK (0x08000000) 375#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_UPDATE_MAP_MASK (0x04000000) 376#define RDECODE_FRAME_HDR_INFO_AV1_SEGMENTATION_ENABLED_MASK (0x02000000) 377#define RDECODE_FRAME_HDR_INFO_AV1_REDUCED_TX_SET_USED_MASK (0x01000000) 378#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_LF_PRESENT_FLAG_MASK (0x00800000) 379#define RDECODE_FRAME_HDR_INFO_AV1_DELTA_Q_PRESENT_FLAG_MASK (0x00400000) 380#define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_UPDATE_MASK (0x00200000) 381#define RDECODE_FRAME_HDR_INFO_AV1_MODE_REF_DELTA_ENABLED_MASK (0x00100000) 382#define RDECODE_FRAME_HDR_INFO_AV1_CUR_FRAME_FORCE_INTEGER_MV_MASK (0x00080000) 383#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_SCREEN_CONTENT_TOOLS_MASK (0x00040000) 384#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_REF_FRAME_MVS_MASK (0x00020000) 385#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_JNT_COMP_MASK (0x00010000) 386#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_ORDER_HINT_MASK (0x00008000) 387#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_DUAL_FILTER_MASK (0x00004000) 388#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_WARPED_MOTION_MASK (0x00002000) 389#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_MASKED_COMPOUND_MASK (0x00001000) 390#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTERINTRA_COMPOUND_MASK (0x00000800) 391#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_INTRA_EDGE_FILTER_MASK (0x00000400) 392#define RDECODE_FRAME_HDR_INFO_AV1_ENABLE_FILTER_INTRA_MASK (0x00000200) 393#define RDECODE_FRAME_HDR_INFO_AV1_USING_QMATRIX_MASK (0x00000100) 394#define RDECODE_FRAME_HDR_INFO_AV1_SKIP_MODE_FLAG_MASK (0x00000080) 395#define RDECODE_FRAME_HDR_INFO_AV1_MONOCHROME_MASK (0x08000040) 396#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_HIGH_PRECISION_MV_MASK (0x00000020) 397#define RDECODE_FRAME_HDR_INFO_AV1_ALLOW_INTRABC_MASK (0x00000010) 398#define RDECODE_FRAME_HDR_INFO_AV1_INTRA_ONLY_MASK (0x00000008) 399#define RDECODE_FRAME_HDR_INFO_AV1_REFRESH_FRAME_CONTEXT_MASK (0x00000004) 400#define RDECODE_FRAME_HDR_INFO_AV1_DISABLE_CDF_UPDATE_MASK (0x00000002) 401#define RDECODE_FRAME_HDR_INFO_AV1_SHOW_FRAME_MASK (0x00000001) 402 403#define RDECODE_AV1_VER_0 0 404#define RDECODE_AV1_VER_1 1 405 406typedef struct rvcn_decode_buffer_s { 407 unsigned int valid_buf_flag; 408 unsigned int msg_buffer_address_hi; 409 unsigned int msg_buffer_address_lo; 410 unsigned int dpb_buffer_address_hi; 411 unsigned int dpb_buffer_address_lo; 412 unsigned int target_buffer_address_hi; 413 unsigned int target_buffer_address_lo; 414 unsigned int session_contex_buffer_address_hi; 415 unsigned int session_contex_buffer_address_lo; 416 unsigned int bitstream_buffer_address_hi; 417 unsigned int bitstream_buffer_address_lo; 418 unsigned int context_buffer_address_hi; 419 unsigned int context_buffer_address_lo; 420 unsigned int feedback_buffer_address_hi; 421 unsigned int feedback_buffer_address_lo; 422 unsigned int luma_hist_buffer_address_hi; 423 unsigned int luma_hist_buffer_address_lo; 424 unsigned int prob_tbl_buffer_address_hi; 425 unsigned int prob_tbl_buffer_address_lo; 426 unsigned int sclr_coeff_buffer_address_hi; 427 unsigned int sclr_coeff_buffer_address_lo; 428 unsigned int it_sclr_table_buffer_address_hi; 429 unsigned int it_sclr_table_buffer_address_lo; 430 unsigned int sclr_target_buffer_address_hi; 431 unsigned int sclr_target_buffer_address_lo; 432 unsigned int reserved_size_info_buffer_address_hi; 433 unsigned int reserved_size_info_buffer_address_lo; 434 unsigned int mpeg2_pic_param_buffer_address_hi; 435 unsigned int mpeg2_pic_param_buffer_address_lo; 436 unsigned int mpeg2_mb_control_buffer_address_hi; 437 unsigned int mpeg2_mb_control_buffer_address_lo; 438 unsigned int mpeg2_idct_coeff_buffer_address_hi; 439 unsigned int mpeg2_idct_coeff_buffer_address_lo; 440} rvcn_decode_buffer_t; 441 442typedef struct rvcn_decode_ib_package_s { 443 unsigned int package_size; 444 unsigned int package_type; 445} rvcn_decode_ib_package_t; 446 447typedef struct rvcn_dec_message_index_s { 448 unsigned int message_id; 449 unsigned int offset; 450 unsigned int size; 451 unsigned int filled; 452} rvcn_dec_message_index_t; 453 454typedef struct rvcn_dec_message_header_s { 455 unsigned int header_size; 456 unsigned int total_size; 457 unsigned int num_buffers; 458 unsigned int msg_type; 459 unsigned int stream_handle; 460 unsigned int status_report_feedback_number; 461 462 rvcn_dec_message_index_t index[1]; 463} rvcn_dec_message_header_t; 464 465typedef struct rvcn_dec_message_create_s { 466 unsigned int stream_type; 467 unsigned int session_flags; 468 unsigned int width_in_samples; 469 unsigned int height_in_samples; 470} rvcn_dec_message_create_t; 471 472typedef struct rvcn_dec_message_decode_s { 473 unsigned int stream_type; 474 unsigned int decode_flags; 475 unsigned int width_in_samples; 476 unsigned int height_in_samples; 477 478 unsigned int bsd_size; 479 unsigned int dpb_size; 480 unsigned int dt_size; 481 unsigned int sct_size; 482 unsigned int sc_coeff_size; 483 unsigned int hw_ctxt_size; 484 unsigned int sw_ctxt_size; 485 unsigned int pic_param_size; 486 unsigned int mb_cntl_size; 487 unsigned int reserved0[4]; 488 unsigned int decode_buffer_flags; 489 490 unsigned int db_pitch; 491 unsigned int db_aligned_height; 492 unsigned int db_tiling_mode; 493 unsigned int db_swizzle_mode; 494 unsigned int db_array_mode; 495 unsigned int db_field_mode; 496 unsigned int db_surf_tile_config; 497 498 unsigned int dt_pitch; 499 unsigned int dt_uv_pitch; 500 unsigned int dt_tiling_mode; 501 unsigned int dt_swizzle_mode; 502 unsigned int dt_array_mode; 503 unsigned int dt_field_mode; 504 unsigned int dt_out_format; 505 unsigned int dt_surf_tile_config; 506 unsigned int dt_uv_surf_tile_config; 507 unsigned int dt_luma_top_offset; 508 unsigned int dt_luma_bottom_offset; 509 unsigned int dt_chroma_top_offset; 510 unsigned int dt_chroma_bottom_offset; 511 unsigned int dt_chromaV_top_offset; 512 unsigned int dt_chromaV_bottom_offset; 513 514 unsigned int mif_wrc_en; 515 unsigned int db_pitch_uv; 516 517 unsigned char reserved1[20]; 518} rvcn_dec_message_decode_t; 519 520typedef struct rvcn_dec_message_drm_s { 521 unsigned int drm_key[4]; 522 unsigned int drm_counter[4]; 523 unsigned int drm_wrapped_key[4]; 524 unsigned int drm_offset; 525 unsigned int drm_cmd; 526 unsigned int drm_cntl; 527 unsigned int drm_reserved; 528} rvcn_dec_message_drm_t; 529 530typedef struct rvcn_dec_message_dynamic_dpb_s { 531 unsigned int dpbConfigFlags; 532 unsigned int dpbLumaPitch; 533 unsigned int dpbLumaAlignedHeight; 534 unsigned int dpbLumaAlignedSize; 535 unsigned int dpbChromaPitch; 536 unsigned int dpbChromaAlignedHeight; 537 unsigned int dpbChromaAlignedSize; 538 539 unsigned char dpbArraySize; 540 unsigned char dpbCurArraySlice; 541 unsigned char dpbRefArraySlice[16]; 542 unsigned char dpbReserved0[2]; 543 544 unsigned int dpbCurrOffset; 545 unsigned int dpbAddrOffset[16]; 546} rvcn_dec_message_dynamic_dpb_t; 547 548typedef struct rvcn_dec_message_dynamic_dpb_t2_s { 549 unsigned int dpbConfigFlags; 550 unsigned int dpbLumaPitch; 551 unsigned int dpbLumaAlignedHeight; 552 unsigned int dpbLumaAlignedSize; 553 unsigned int dpbChromaPitch; 554 unsigned int dpbChromaAlignedHeight; 555 unsigned int dpbChromaAlignedSize; 556 unsigned int dpbArraySize; 557 558 unsigned int dpbCurrLo; 559 unsigned int dpbCurrHi; 560 unsigned int dpbAddrLo[16]; 561 unsigned int dpbAddrHi[16]; 562} rvcn_dec_message_dynamic_dpb_t2_t; 563 564typedef struct { 565 unsigned short viewOrderIndex; 566 unsigned short viewId; 567 unsigned short numOfAnchorRefsInL0; 568 unsigned short viewIdOfAnchorRefsInL0[15]; 569 unsigned short numOfAnchorRefsInL1; 570 unsigned short viewIdOfAnchorRefsInL1[15]; 571 unsigned short numOfNonAnchorRefsInL0; 572 unsigned short viewIdOfNonAnchorRefsInL0[15]; 573 unsigned short numOfNonAnchorRefsInL1; 574 unsigned short viewIdOfNonAnchorRefsInL1[15]; 575} radeon_mvcElement_t; 576 577typedef struct rvcn_dec_message_avc_s { 578 unsigned int profile; 579 unsigned int level; 580 581 unsigned int sps_info_flags; 582 unsigned int pps_info_flags; 583 unsigned char chroma_format; 584 unsigned char bit_depth_luma_minus8; 585 unsigned char bit_depth_chroma_minus8; 586 unsigned char log2_max_frame_num_minus4; 587 588 unsigned char pic_order_cnt_type; 589 unsigned char log2_max_pic_order_cnt_lsb_minus4; 590 unsigned char num_ref_frames; 591 unsigned char reserved_8bit; 592 593 signed char pic_init_qp_minus26; 594 signed char pic_init_qs_minus26; 595 signed char chroma_qp_index_offset; 596 signed char second_chroma_qp_index_offset; 597 598 unsigned char num_slice_groups_minus1; 599 unsigned char slice_group_map_type; 600 unsigned char num_ref_idx_l0_active_minus1; 601 unsigned char num_ref_idx_l1_active_minus1; 602 603 unsigned short slice_group_change_rate_minus1; 604 unsigned short reserved_16bit_1; 605 606 unsigned char scaling_list_4x4[6][16]; 607 unsigned char scaling_list_8x8[2][64]; 608 609 unsigned int frame_num; 610 unsigned int frame_num_list[16]; 611 int curr_field_order_cnt_list[2]; 612 int field_order_cnt_list[16][2]; 613 614 unsigned int decoded_pic_idx; 615 unsigned int curr_pic_ref_frame_num; 616 unsigned char ref_frame_list[16]; 617 618 unsigned int reserved[122]; 619 620 struct { 621 unsigned int numViews; 622 unsigned int viewId0; 623 radeon_mvcElement_t mvcElements[1]; 624 } mvc; 625 626 unsigned short non_existing_frame_flags; 627 unsigned int used_for_reference_flags; 628} rvcn_dec_message_avc_t; 629 630typedef struct rvcn_dec_message_vc1_s { 631 unsigned int profile; 632 unsigned int level; 633 unsigned int sps_info_flags; 634 unsigned int pps_info_flags; 635 unsigned int pic_structure; 636 unsigned int chroma_format; 637 unsigned short decoded_pic_idx; 638 unsigned short deblocked_pic_idx; 639 unsigned short forward_ref_idx; 640 unsigned short backward_ref_idx; 641 unsigned int cached_frame_flag; 642} rvcn_dec_message_vc1_t; 643 644typedef struct rvcn_dec_message_mpeg2_vld_s { 645 unsigned int decoded_pic_idx; 646 unsigned int forward_ref_pic_idx; 647 unsigned int backward_ref_pic_idx; 648 649 unsigned char load_intra_quantiser_matrix; 650 unsigned char load_nonintra_quantiser_matrix; 651 unsigned char reserved_quantiser_alignement[2]; 652 unsigned char intra_quantiser_matrix[64]; 653 unsigned char nonintra_quantiser_matrix[64]; 654 655 unsigned char profile_and_level_indication; 656 unsigned char chroma_format; 657 658 unsigned char picture_coding_type; 659 660 unsigned char reserved_1; 661 662 unsigned char f_code[2][2]; 663 unsigned char intra_dc_precision; 664 unsigned char pic_structure; 665 unsigned char top_field_first; 666 unsigned char frame_pred_frame_dct; 667 unsigned char concealment_motion_vectors; 668 unsigned char q_scale_type; 669 unsigned char intra_vlc_format; 670 unsigned char alternate_scan; 671} rvcn_dec_message_mpeg2_vld_t; 672 673typedef struct rvcn_dec_message_mpeg4_asp_vld_s { 674 unsigned int decoded_pic_idx; 675 unsigned int forward_ref_pic_idx; 676 unsigned int backward_ref_pic_idx; 677 678 unsigned int variant_type; 679 unsigned char profile_and_level_indication; 680 681 unsigned char video_object_layer_verid; 682 unsigned char video_object_layer_shape; 683 684 unsigned char reserved_1; 685 686 unsigned short video_object_layer_width; 687 unsigned short video_object_layer_height; 688 689 unsigned short vop_time_increment_resolution; 690 691 unsigned short reserved_2; 692 693 struct { 694 unsigned int short_video_header : 1; 695 unsigned int obmc_disable : 1; 696 unsigned int interlaced : 1; 697 unsigned int load_intra_quant_mat : 1; 698 unsigned int load_nonintra_quant_mat : 1; 699 unsigned int quarter_sample : 1; 700 unsigned int complexity_estimation_disable : 1; 701 unsigned int resync_marker_disable : 1; 702 unsigned int data_partitioned : 1; 703 unsigned int reversible_vlc : 1; 704 unsigned int newpred_enable : 1; 705 unsigned int reduced_resolution_vop_enable : 1; 706 unsigned int scalability : 1; 707 unsigned int is_object_layer_identifier : 1; 708 unsigned int fixed_vop_rate : 1; 709 unsigned int newpred_segment_type : 1; 710 unsigned int reserved_bits : 16; 711 }; 712 713 unsigned char quant_type; 714 unsigned char reserved_3[3]; 715 unsigned char intra_quant_mat[64]; 716 unsigned char nonintra_quant_mat[64]; 717 718 struct { 719 unsigned char sprite_enable; 720 721 unsigned char reserved_4[3]; 722 723 unsigned short sprite_width; 724 unsigned short sprite_height; 725 short sprite_left_coordinate; 726 short sprite_top_coordinate; 727 728 unsigned char no_of_sprite_warping_points; 729 unsigned char sprite_warping_accuracy; 730 unsigned char sprite_brightness_change; 731 unsigned char low_latency_sprite_enable; 732 } sprite_config; 733 734 struct { 735 struct { 736 unsigned int check_skip : 1; 737 unsigned int switch_rounding : 1; 738 unsigned int t311 : 1; 739 unsigned int reserved_bits : 29; 740 }; 741 742 unsigned char vol_mode; 743 744 unsigned char reserved_5[3]; 745 } divx_311_config; 746 747 struct { 748 unsigned char vop_data_present; 749 unsigned char vop_coding_type; 750 unsigned char vop_quant; 751 unsigned char vop_coded; 752 unsigned char vop_rounding_type; 753 unsigned char intra_dc_vlc_thr; 754 unsigned char top_field_first; 755 unsigned char alternate_vertical_scan_flag; 756 unsigned char vop_fcode_forward; 757 unsigned char vop_fcode_backward; 758 unsigned int TRB[2]; 759 unsigned int TRD[2]; 760 } vop; 761 762} rvcn_dec_message_mpeg4_asp_vld_t; 763 764typedef struct rvcn_dec_message_hevc_s { 765 unsigned int sps_info_flags; 766 unsigned int pps_info_flags; 767 unsigned char chroma_format; 768 unsigned char bit_depth_luma_minus8; 769 unsigned char bit_depth_chroma_minus8; 770 unsigned char log2_max_pic_order_cnt_lsb_minus4; 771 772 unsigned char sps_max_dec_pic_buffering_minus1; 773 unsigned char log2_min_luma_coding_block_size_minus3; 774 unsigned char log2_diff_max_min_luma_coding_block_size; 775 unsigned char log2_min_transform_block_size_minus2; 776 777 unsigned char log2_diff_max_min_transform_block_size; 778 unsigned char max_transform_hierarchy_depth_inter; 779 unsigned char max_transform_hierarchy_depth_intra; 780 unsigned char pcm_sample_bit_depth_luma_minus1; 781 782 unsigned char pcm_sample_bit_depth_chroma_minus1; 783 unsigned char log2_min_pcm_luma_coding_block_size_minus3; 784 unsigned char log2_diff_max_min_pcm_luma_coding_block_size; 785 unsigned char num_extra_slice_header_bits; 786 787 unsigned char num_short_term_ref_pic_sets; 788 unsigned char num_long_term_ref_pic_sps; 789 unsigned char num_ref_idx_l0_default_active_minus1; 790 unsigned char num_ref_idx_l1_default_active_minus1; 791 792 signed char pps_cb_qp_offset; 793 signed char pps_cr_qp_offset; 794 signed char pps_beta_offset_div2; 795 signed char pps_tc_offset_div2; 796 797 unsigned char diff_cu_qp_delta_depth; 798 unsigned char num_tile_columns_minus1; 799 unsigned char num_tile_rows_minus1; 800 unsigned char log2_parallel_merge_level_minus2; 801 802 unsigned short column_width_minus1[19]; 803 unsigned short row_height_minus1[21]; 804 805 signed char init_qp_minus26; 806 unsigned char num_delta_pocs_ref_rps_idx; 807 unsigned char curr_idx; 808 unsigned char reserved[1]; 809 int curr_poc; 810 unsigned char ref_pic_list[16]; 811 int poc_list[16]; 812 unsigned char ref_pic_set_st_curr_before[8]; 813 unsigned char ref_pic_set_st_curr_after[8]; 814 unsigned char ref_pic_set_lt_curr[8]; 815 816 unsigned char ucScalingListDCCoefSizeID2[6]; 817 unsigned char ucScalingListDCCoefSizeID3[2]; 818 819 unsigned char highestTid; 820 unsigned char isNonRef; 821 822 unsigned char p010_mode; 823 unsigned char msb_mode; 824 unsigned char luma_10to8; 825 unsigned char chroma_10to8; 826 827 unsigned char hevc_reserved[2]; 828 829 unsigned char direct_reflist[2][15]; 830 unsigned int st_rps_bits; 831} rvcn_dec_message_hevc_t; 832 833typedef struct rvcn_dec_message_vp9_s { 834 unsigned int frame_header_flags; 835 836 unsigned char frame_context_idx; 837 unsigned char reset_frame_context; 838 839 unsigned char curr_pic_idx; 840 unsigned char interp_filter; 841 842 unsigned char filter_level; 843 unsigned char sharpness_level; 844 unsigned char lf_adj_level[8][4][2]; 845 unsigned char base_qindex; 846 signed char y_dc_delta_q; 847 signed char uv_ac_delta_q; 848 signed char uv_dc_delta_q; 849 850 unsigned char log2_tile_cols; 851 unsigned char log2_tile_rows; 852 unsigned char tx_mode; 853 unsigned char reference_mode; 854 unsigned char chroma_format; 855 856 unsigned char ref_frame_map[8]; 857 858 unsigned char frame_refs[3]; 859 unsigned char ref_frame_sign_bias[3]; 860 unsigned char frame_to_show; 861 unsigned char bit_depth_luma_minus8; 862 unsigned char bit_depth_chroma_minus8; 863 864 unsigned char p010_mode; 865 unsigned char msb_mode; 866 unsigned char luma_10to8; 867 unsigned char chroma_10to8; 868 869 unsigned int vp9_frame_size; 870 unsigned int compressed_header_size; 871 unsigned int uncompressed_header_size; 872} rvcn_dec_message_vp9_t; 873 874typedef enum { 875 RVCN_DEC_AV1_IDENTITY = 0, 876 RVCN_DEC_AV1_TRANSLATION = 1, 877 RVCN_DEC_AV1_ROTZOOM = 2, 878 RVCN_DEC_AV1_AFFINE = 3, 879 RVCN_DEC_AV1_HORTRAPEZOID = 4, 880 RVCN_DEC_AV1_VERTRAPEZOID = 5, 881 RVCN_DEC_AV1_HOMOGRAPHY = 6, 882 RVCN_DEC_AV1_TRANS_TYPES = 7, 883} rvcn_dec_transformation_type_e; 884 885typedef struct { 886 rvcn_dec_transformation_type_e wmtype; 887 int wmmat[8]; 888 short alpha, beta, gamma, delta; 889} rvcn_dec_warped_motion_params_t; 890 891typedef struct { 892 unsigned char apply_grain; 893 unsigned char scaling_points_y[14][2]; 894 unsigned char num_y_points; 895 unsigned char scaling_points_cb[10][2]; 896 unsigned char num_cb_points; 897 unsigned char scaling_points_cr[10][2]; 898 unsigned char num_cr_points; 899 unsigned char scaling_shift; 900 unsigned char ar_coeff_lag; 901 signed char ar_coeffs_y[24]; 902 signed char ar_coeffs_cb[25]; 903 signed char ar_coeffs_cr[25]; 904 unsigned char ar_coeff_shift; 905 unsigned char cb_mult; 906 unsigned char cb_luma_mult; 907 unsigned short cb_offset; 908 unsigned char cr_mult; 909 unsigned char cr_luma_mult; 910 unsigned short cr_offset; 911 unsigned char overlap_flag; 912 unsigned char clip_to_restricted_range; 913 unsigned char bit_depth_minus_8; 914 unsigned char chroma_scaling_from_luma; 915 unsigned char grain_scale_shift; 916 unsigned short random_seed; 917} rvcn_dec_film_grain_params_t; 918 919typedef struct rvcn_dec_av1_tile_info_s { 920 unsigned int offset; 921 unsigned int size; 922} rvcn_dec_av1_tile_info_t; 923 924typedef struct rvcn_dec_message_av1_s { 925 unsigned int frame_header_flags; 926 unsigned int current_frame_id; 927 unsigned int frame_offset; 928 929 unsigned char profile; 930 unsigned char is_annexb; 931 unsigned char frame_type; 932 unsigned char primary_ref_frame; 933 unsigned char curr_pic_idx; 934 935 unsigned char sb_size; 936 unsigned char interp_filter; 937 unsigned char filter_level[2]; 938 unsigned char filter_level_u; 939 unsigned char filter_level_v; 940 unsigned char sharpness_level; 941 signed char ref_deltas[8]; 942 signed char mode_deltas[2]; 943 unsigned char base_qindex; 944 signed char y_dc_delta_q; 945 signed char u_dc_delta_q; 946 signed char v_dc_delta_q; 947 signed char u_ac_delta_q; 948 signed char v_ac_delta_q; 949 signed char qm_y; 950 signed char qm_u; 951 signed char qm_v; 952 signed char delta_q_res; 953 signed char delta_lf_res; 954 955 unsigned char tile_cols; 956 unsigned char tile_rows; 957 unsigned char tx_mode; 958 unsigned char reference_mode; 959 unsigned char chroma_format; 960 unsigned int tile_size_bytes; 961 unsigned int context_update_tile_id; 962 unsigned int tile_col_start_sb[65]; 963 unsigned int tile_row_start_sb[65]; 964 unsigned int max_width; 965 unsigned int max_height; 966 unsigned int width; 967 unsigned int height; 968 unsigned int superres_upscaled_width; 969 unsigned char superres_scale_denominator; 970 unsigned char order_hint_bits; 971 972 unsigned char ref_frame_map[8]; 973 unsigned int ref_frame_offset[8]; 974 unsigned char frame_refs[7]; 975 unsigned char ref_frame_sign_bias[7]; 976 977 unsigned char bit_depth_luma_minus8; 978 unsigned char bit_depth_chroma_minus8; 979 980 int feature_data[8][8]; 981 unsigned char feature_mask[8]; 982 983 unsigned char cdef_damping; 984 unsigned char cdef_bits; 985 unsigned short cdef_strengths[16]; 986 unsigned short cdef_uv_strengths[16]; 987 unsigned char frame_restoration_type[3]; 988 unsigned char log2_restoration_unit_size_minus5[3]; 989 990 unsigned char p010_mode; 991 unsigned char msb_mode; 992 unsigned char luma_10to8; 993 unsigned char chroma_10to8; 994 unsigned char preskip_segid; 995 unsigned char last_active_segid; 996 unsigned char seg_lossless_flag; 997 unsigned char coded_lossless; 998 rvcn_dec_film_grain_params_t film_grain; 999 unsigned int uncompressed_header_size; 1000 rvcn_dec_warped_motion_params_t global_motion[8]; 1001 rvcn_dec_av1_tile_info_t tile_info[256]; 1002} rvcn_dec_message_av1_t; 1003 1004typedef struct rvcn_dec_feature_index_s { 1005 unsigned int feature_id; 1006 unsigned int offset; 1007 unsigned int size; 1008 unsigned int filled; 1009} rvcn_dec_feature_index_t; 1010 1011typedef struct rvcn_dec_feedback_header_s { 1012 unsigned int header_size; 1013 unsigned int total_size; 1014 unsigned int num_buffers; 1015 unsigned int status_report_feedback_number; 1016 unsigned int status; 1017 unsigned int value; 1018 unsigned int errorBits; 1019 rvcn_dec_feature_index_t index[1]; 1020} rvcn_dec_feedback_header_t; 1021 1022typedef struct rvcn_dec_feedback_profiling_s { 1023 unsigned int size; 1024 1025 unsigned int decodingTime; 1026 unsigned int decodePlusOverhead; 1027 unsigned int masterTimerHits; 1028 unsigned int uvdLBSIREWaitCount; 1029 1030 unsigned int avgMPCMemLatency; 1031 unsigned int maxMPCMemLatency; 1032 unsigned int uvdMPCLumaHits; 1033 unsigned int uvdMPCLumaHitPend; 1034 unsigned int uvdMPCLumaSearch; 1035 unsigned int uvdMPCChromaHits; 1036 unsigned int uvdMPCChromaHitPend; 1037 unsigned int uvdMPCChromaSearch; 1038 1039 unsigned int uvdLMIPerfCountLo; 1040 unsigned int uvdLMIPerfCountHi; 1041 unsigned int uvdLMIAvgLatCntrEnvHit; 1042 unsigned int uvdLMILatCntr; 1043 1044 unsigned int frameCRC0; 1045 unsigned int frameCRC1; 1046 unsigned int frameCRC2; 1047 unsigned int frameCRC3; 1048 1049 unsigned int uvdLMIPerfMonCtrl; 1050 unsigned int uvdLMILatCtrl; 1051 unsigned int uvdMPCCntl; 1052 unsigned int reserved0[4]; 1053 unsigned int decoderID; 1054 unsigned int codec; 1055 1056 unsigned int dmaHwCrc32Enable; 1057 unsigned int dmaHwCrc32Value; 1058 unsigned int dmaHwCrc32Value2; 1059} rvcn_dec_feedback_profiling_t; 1060 1061typedef struct rvcn_dec_vp9_nmv_ctx_mask_s { 1062 unsigned short classes_mask[2]; 1063 unsigned short bits_mask[2]; 1064 unsigned char joints_mask; 1065 unsigned char sign_mask[2]; 1066 unsigned char class0_mask[2]; 1067 unsigned char class0_fp_mask[2]; 1068 unsigned char fp_mask[2]; 1069 unsigned char class0_hp_mask[2]; 1070 unsigned char hp_mask[2]; 1071 unsigned char reserve[11]; 1072} rvcn_dec_vp9_nmv_ctx_mask_t; 1073 1074typedef struct rvcn_dec_vp9_nmv_component_s { 1075 unsigned char sign; 1076 unsigned char classes[10]; 1077 unsigned char class0[1]; 1078 unsigned char bits[10]; 1079 unsigned char class0_fp[2][3]; 1080 unsigned char fp[3]; 1081 unsigned char class0_hp; 1082 unsigned char hp; 1083} rvcn_dec_vp9_nmv_component_t; 1084 1085typedef struct rvcn_dec_vp9_probs_s { 1086 rvcn_dec_vp9_nmv_ctx_mask_t nmvc_mask; 1087 unsigned char coef_probs[4][2][2][6][6][3]; 1088 unsigned char y_mode_prob[4][9]; 1089 unsigned char uv_mode_prob[10][9]; 1090 unsigned char single_ref_prob[5][2]; 1091 unsigned char switchable_interp_prob[4][2]; 1092 unsigned char partition_prob[16][3]; 1093 unsigned char inter_mode_probs[7][3]; 1094 unsigned char mbskip_probs[3]; 1095 unsigned char intra_inter_prob[4]; 1096 unsigned char comp_inter_prob[5]; 1097 unsigned char comp_ref_prob[5]; 1098 unsigned char tx_probs_32x32[2][3]; 1099 unsigned char tx_probs_16x16[2][2]; 1100 unsigned char tx_probs_8x8[2][1]; 1101 unsigned char mv_joints[3]; 1102 rvcn_dec_vp9_nmv_component_t mv_comps[2]; 1103} rvcn_dec_vp9_probs_t; 1104 1105typedef struct rvcn_dec_vp9_probs_segment_s { 1106 union { 1107 rvcn_dec_vp9_probs_t probs; 1108 unsigned char probs_data[RDECODE_VP9_PROBS_DATA_SIZE]; 1109 }; 1110 1111 union { 1112 struct { 1113 unsigned int feature_data[8]; 1114 unsigned char tree_probs[7]; 1115 unsigned char pred_probs[3]; 1116 unsigned char abs_delta; 1117 unsigned char feature_mask[8]; 1118 } seg; 1119 unsigned char segment_data[256]; 1120 }; 1121} rvcn_dec_vp9_probs_segment_t; 1122 1123struct rvcn_av1_prob_funcs 1124{ 1125 void (*init_mode_probs)(void * prob); 1126 void (*init_mv_probs)(void *prob); 1127 void (*default_coef_probs)(void *prob, int index); 1128}; 1129 1130typedef struct rvcn_dec_av1_fg_init_buf_s { 1131 short luma_grain_block[64][96]; 1132 short cb_grain_block[32][48]; 1133 short cr_grain_block[32][48]; 1134 short scaling_lut_y[256]; 1135 short scaling_lut_cb[256]; 1136 short scaling_lut_cr[256]; 1137 unsigned short temp_tile_left_seed[256]; 1138} rvcn_dec_av1_fg_init_buf_t; 1139 1140typedef struct rvcn_dec_av1_segment_fg_s { 1141 union { 1142 struct { 1143 unsigned char feature_data[128]; 1144 unsigned char feature_mask[8]; 1145 } seg; 1146 unsigned char segment_data[256]; 1147 }; 1148 rvcn_dec_av1_fg_init_buf_t fg_buf; 1149} rvcn_dec_av1_segment_fg_t; 1150 1151struct jpeg_params { 1152 unsigned bsd_size; 1153 unsigned dt_pitch; 1154 unsigned dt_uv_pitch; 1155 unsigned dt_luma_top_offset; 1156 unsigned dt_chroma_top_offset; 1157 bool direct_reg; 1158}; 1159 1160#define RDECODE_VCN1_GPCOM_VCPU_CMD 0x2070c 1161#define RDECODE_VCN1_GPCOM_VCPU_DATA0 0x20710 1162#define RDECODE_VCN1_GPCOM_VCPU_DATA1 0x20714 1163#define RDECODE_VCN1_ENGINE_CNTL 0x20718 1164 1165#define RDECODE_VCN2_GPCOM_VCPU_CMD (0x503 << 2) 1166#define RDECODE_VCN2_GPCOM_VCPU_DATA0 (0x504 << 2) 1167#define RDECODE_VCN2_GPCOM_VCPU_DATA1 (0x505 << 2) 1168#define RDECODE_VCN2_ENGINE_CNTL (0x506 << 2) 1169 1170#define RDECODE_VCN2_5_GPCOM_VCPU_CMD 0x3c 1171#define RDECODE_VCN2_5_GPCOM_VCPU_DATA0 0x40 1172#define RDECODE_VCN2_5_GPCOM_VCPU_DATA1 0x44 1173#define RDECODE_VCN2_5_ENGINE_CNTL 0x9b4 1174 1175#define RDECODE_SESSION_CONTEXT_SIZE (128 * 1024) 1176 1177#endif 1178