1f08c3bdfSopenharmony_ci// SPDX-License-Identifier: GPL-2.0-or-later
2f08c3bdfSopenharmony_ci/*
3f08c3bdfSopenharmony_ci * Copyright (C) 2023 SUSE LLC
4f08c3bdfSopenharmony_ci * Author: Nicolai Stange <nstange@suse.de>
5f08c3bdfSopenharmony_ci * LTP port: Martin Doucha <mdoucha@suse.cz>
6f08c3bdfSopenharmony_ci */
7f08c3bdfSopenharmony_ci
8f08c3bdfSopenharmony_ci/*\
9f08c3bdfSopenharmony_ci * CVE 2021-3653
10f08c3bdfSopenharmony_ci *
11f08c3bdfSopenharmony_ci * Check that KVM either blocks enabling virtual interrupt controller (AVIC)
12f08c3bdfSopenharmony_ci * in nested VMs or correctly sets up the required memory address translation.
13f08c3bdfSopenharmony_ci * If AVIC is enabled without address translation in the host kernel,
14f08c3bdfSopenharmony_ci * the nested VM will be able to read and write an arbitraty physical memory
15f08c3bdfSopenharmony_ci * page specified by the parent VM. Unauthorized memory access fixed in:
16f08c3bdfSopenharmony_ci *
17f08c3bdfSopenharmony_ci *  commit 0f923e07124df069ba68d8bb12324398f4b6b709
18f08c3bdfSopenharmony_ci *  Author: Maxim Levitsky <mlevitsk@redhat.com>
19f08c3bdfSopenharmony_ci *  Date:   Thu Jul 15 01:56:24 2021 +0300
20f08c3bdfSopenharmony_ci *
21f08c3bdfSopenharmony_ci *  KVM: nSVM: avoid picking up unsupported bits from L2 in int_ctl (CVE-2021-3653)
22f08c3bdfSopenharmony_ci */
23f08c3bdfSopenharmony_ci
24f08c3bdfSopenharmony_ci#include "kvm_test.h"
25f08c3bdfSopenharmony_ci
26f08c3bdfSopenharmony_ci#ifdef COMPILE_PAYLOAD
27f08c3bdfSopenharmony_ci#if defined(__i386__) || defined(__x86_64__)
28f08c3bdfSopenharmony_ci
29f08c3bdfSopenharmony_ci#include "kvm_x86_svm.h"
30f08c3bdfSopenharmony_ci
31f08c3bdfSopenharmony_ci#define AVIC_REG_ADDR 0x280
32f08c3bdfSopenharmony_ci#define AVIC_TEST_VAL 0xec
33f08c3bdfSopenharmony_ci#define AVIC_READ_FAIL 0x12ead
34f08c3bdfSopenharmony_ci
35f08c3bdfSopenharmony_ci#define AVIC_INFO_MASK ((1ULL << 32) | 0xff0)
36f08c3bdfSopenharmony_ci#define AVIC_INFO_EXP ((1ULL << 32) | AVIC_REG_ADDR)
37f08c3bdfSopenharmony_ci
38f08c3bdfSopenharmony_cistatic uint32_t * const avic_ptr = (uint32_t *)AVIC_REG_ADDR;
39f08c3bdfSopenharmony_ci
40f08c3bdfSopenharmony_cistatic int guest_main(void)
41f08c3bdfSopenharmony_ci{
42f08c3bdfSopenharmony_ci	if (*avic_ptr != 0xaaaaaaaa)
43f08c3bdfSopenharmony_ci		return AVIC_READ_FAIL;
44f08c3bdfSopenharmony_ci
45f08c3bdfSopenharmony_ci	*avic_ptr = AVIC_TEST_VAL;
46f08c3bdfSopenharmony_ci	return 0;
47f08c3bdfSopenharmony_ci}
48f08c3bdfSopenharmony_ci
49f08c3bdfSopenharmony_civoid main(void)
50f08c3bdfSopenharmony_ci{
51f08c3bdfSopenharmony_ci	struct kvm_svm_vcpu *vcpu;
52f08c3bdfSopenharmony_ci
53f08c3bdfSopenharmony_ci	kvm_init_svm();
54f08c3bdfSopenharmony_ci	vcpu = kvm_create_svm_vcpu(guest_main, 1);
55f08c3bdfSopenharmony_ci
56f08c3bdfSopenharmony_ci	/*
57f08c3bdfSopenharmony_ci	 * Enable AVIC and set both the AVIC base address (where the nested VM
58f08c3bdfSopenharmony_ci	 * will write) and backing page address (where the parent VM expects
59f08c3bdfSopenharmony_ci	 * to see the changes) to 0
60f08c3bdfSopenharmony_ci	 */
61f08c3bdfSopenharmony_ci	vcpu->vmcb->virt_intr_ctl |= SVM_INTR_AVIC;
62f08c3bdfSopenharmony_ci	vcpu->vmcb->avic_backing_page = 0;
63f08c3bdfSopenharmony_ci	vcpu->vmcb->avic_bar = 0;
64f08c3bdfSopenharmony_ci	memset((void *)8, 0xaa, PAGESIZE - 8);
65f08c3bdfSopenharmony_ci
66f08c3bdfSopenharmony_ci	/* Write into AVIC backing page in the nested VM */
67f08c3bdfSopenharmony_ci	kvm_svm_vmrun(vcpu);
68f08c3bdfSopenharmony_ci
69f08c3bdfSopenharmony_ci	switch (vcpu->vmcb->exitcode) {
70f08c3bdfSopenharmony_ci	case SVM_EXIT_HLT:
71f08c3bdfSopenharmony_ci		if (vcpu->vmcb->rax == AVIC_READ_FAIL) {
72f08c3bdfSopenharmony_ci			tst_res(TFAIL, "Nested VM can read host memory");
73f08c3bdfSopenharmony_ci			return;
74f08c3bdfSopenharmony_ci		}
75f08c3bdfSopenharmony_ci
76f08c3bdfSopenharmony_ci		if (vcpu->vmcb->rax)
77f08c3bdfSopenharmony_ci			tst_brk(TBROK, "Unexpected guest_main() return value");
78f08c3bdfSopenharmony_ci
79f08c3bdfSopenharmony_ci		break;
80f08c3bdfSopenharmony_ci
81f08c3bdfSopenharmony_ci	case SVM_EXIT_AVIC_NOACCEL:
82f08c3bdfSopenharmony_ci		if ((vcpu->vmcb->exitinfo1 & AVIC_INFO_MASK) == AVIC_INFO_EXP) {
83f08c3bdfSopenharmony_ci			tst_res(TPASS, "AVIC register write caused VMEXIT");
84f08c3bdfSopenharmony_ci			break;
85f08c3bdfSopenharmony_ci		}
86f08c3bdfSopenharmony_ci
87f08c3bdfSopenharmony_ci		/* unexpected exit, fall through */
88f08c3bdfSopenharmony_ci
89f08c3bdfSopenharmony_ci	default:
90f08c3bdfSopenharmony_ci		tst_brk(TBROK, "Nested VM exited unexpectedly");
91f08c3bdfSopenharmony_ci	}
92f08c3bdfSopenharmony_ci
93f08c3bdfSopenharmony_ci	if (*avic_ptr != AVIC_TEST_VAL) {
94f08c3bdfSopenharmony_ci		tst_res(TFAIL, "Write into AVIC ESR redirected to host memory");
95f08c3bdfSopenharmony_ci		return;
96f08c3bdfSopenharmony_ci	}
97f08c3bdfSopenharmony_ci
98f08c3bdfSopenharmony_ci	tst_res(TPASS, "Writes into AVIC backing page were not redirected");
99f08c3bdfSopenharmony_ci}
100f08c3bdfSopenharmony_ci
101f08c3bdfSopenharmony_ci#else /* defined(__i386__) || defined(__x86_64__) */
102f08c3bdfSopenharmony_ciTST_TEST_TCONF("Test supported only on x86");
103f08c3bdfSopenharmony_ci#endif /* defined(__i386__) || defined(__x86_64__) */
104f08c3bdfSopenharmony_ci
105f08c3bdfSopenharmony_ci#else /* COMPILE_PAYLOAD */
106f08c3bdfSopenharmony_ci
107f08c3bdfSopenharmony_cistatic struct tst_test test = {
108f08c3bdfSopenharmony_ci	.test_all = tst_kvm_run,
109f08c3bdfSopenharmony_ci	.setup = tst_kvm_setup,
110f08c3bdfSopenharmony_ci	.cleanup = tst_kvm_cleanup,
111f08c3bdfSopenharmony_ci	.supported_archs = (const char *const []) {
112f08c3bdfSopenharmony_ci		"x86_64",
113f08c3bdfSopenharmony_ci		"x86",
114f08c3bdfSopenharmony_ci		NULL
115f08c3bdfSopenharmony_ci	},
116f08c3bdfSopenharmony_ci	.tags = (struct tst_tag[]){
117f08c3bdfSopenharmony_ci		{"linux-git", "0f923e07124d"},
118f08c3bdfSopenharmony_ci		{"CVE", "2021-3653"},
119f08c3bdfSopenharmony_ci		{}
120f08c3bdfSopenharmony_ci	}
121f08c3bdfSopenharmony_ci};
122f08c3bdfSopenharmony_ci
123f08c3bdfSopenharmony_ci#endif /* COMPILE_PAYLOAD */
124