1/*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22*/
23
24#ifndef _AMDGPU_TEST_H_
25#define _AMDGPU_TEST_H_
26
27#include "amdgpu.h"
28#include "amdgpu_drm.h"
29
30/**
31 * Define max. number of card in system which we are able to handle
32 */
33#define MAX_CARDS_SUPPORTED     128
34
35/* Forward reference for array to keep "drm" handles */
36extern int drm_amdgpu[MAX_CARDS_SUPPORTED];
37
38/* Global variables */
39extern int open_render_node;
40
41/*************************  Basic test suite ********************************/
42
43/*
44 * Define basic test suite to serve as the starting point for future testing
45*/
46
47/**
48 * Initialize basic test suite
49 */
50int suite_basic_tests_init();
51
52/**
53 * Deinitialize basic test suite
54 */
55int suite_basic_tests_clean();
56
57/**
58 * Decide if the suite is enabled by default or not.
59 */
60CU_BOOL suite_basic_tests_enable(void);
61
62/**
63 * Tests in basic test suite
64 */
65extern CU_TestInfo basic_tests[];
66
67/**
68 * Initialize bo test suite
69 */
70int suite_bo_tests_init();
71
72/**
73 * Deinitialize bo test suite
74 */
75int suite_bo_tests_clean();
76
77/**
78 * Tests in bo test suite
79 */
80extern CU_TestInfo bo_tests[];
81
82/**
83 * Initialize cs test suite
84 */
85int suite_cs_tests_init();
86
87/**
88 * Deinitialize cs test suite
89 */
90int suite_cs_tests_clean();
91
92/**
93 * Decide if the suite is enabled by default or not.
94 */
95CU_BOOL suite_cs_tests_enable(void);
96
97/**
98 * Tests in cs test suite
99 */
100extern CU_TestInfo cs_tests[];
101
102/**
103 * Initialize vce test suite
104 */
105int suite_vce_tests_init();
106
107/**
108 * Deinitialize vce test suite
109 */
110int suite_vce_tests_clean();
111
112/**
113 * Decide if the suite is enabled by default or not.
114 */
115CU_BOOL suite_vce_tests_enable(void);
116
117/**
118 * Tests in vce test suite
119 */
120extern CU_TestInfo vce_tests[];
121
122/**
123+ * Initialize vcn test suite
124+ */
125int suite_vcn_tests_init();
126
127/**
128+ * Deinitialize vcn test suite
129+ */
130int suite_vcn_tests_clean();
131
132/**
133 * Decide if the suite is enabled by default or not.
134 */
135CU_BOOL suite_vcn_tests_enable(void);
136
137/**
138+ * Tests in vcn test suite
139+ */
140extern CU_TestInfo vcn_tests[];
141
142/**
143+ * Initialize jpeg test suite
144+ */
145int suite_jpeg_tests_init();
146
147/**
148+ * Deinitialize jpeg test suite
149+ */
150int suite_jpeg_tests_clean();
151
152/**
153 * Decide if the suite is enabled by default or not.
154 */
155CU_BOOL suite_jpeg_tests_enable(void);
156
157/**
158+ * Tests in vcn test suite
159+ */
160extern CU_TestInfo jpeg_tests[];
161
162/**
163 * Initialize uvd enc test suite
164 */
165int suite_uvd_enc_tests_init();
166
167/**
168 * Deinitialize uvd enc test suite
169 */
170int suite_uvd_enc_tests_clean();
171
172/**
173 * Decide if the suite is enabled by default or not.
174 */
175CU_BOOL suite_uvd_enc_tests_enable(void);
176
177/**
178 * Tests in uvd enc test suite
179 */
180extern CU_TestInfo uvd_enc_tests[];
181
182/**
183 * Initialize deadlock test suite
184 */
185int suite_deadlock_tests_init();
186
187/**
188 * Deinitialize deadlock test suite
189 */
190int suite_deadlock_tests_clean();
191
192/**
193 * Decide if the suite is enabled by default or not.
194 */
195CU_BOOL suite_deadlock_tests_enable(void);
196
197/**
198 * Tests in uvd enc test suite
199 */
200extern CU_TestInfo deadlock_tests[];
201
202/**
203 * Initialize vm test suite
204 */
205int suite_vm_tests_init();
206
207/**
208 * Deinitialize deadlock test suite
209 */
210int suite_vm_tests_clean();
211
212/**
213 * Decide if the suite is enabled by default or not.
214 */
215CU_BOOL suite_vm_tests_enable(void);
216
217/**
218 * Tests in vm test suite
219 */
220extern CU_TestInfo vm_tests[];
221
222
223/**
224 * Initialize ras test suite
225 */
226int suite_ras_tests_init();
227
228/**
229 * Deinitialize deadlock test suite
230 */
231int suite_ras_tests_clean();
232
233/**
234 * Decide if the suite is enabled by default or not.
235 */
236CU_BOOL suite_ras_tests_enable(void);
237
238/**
239 * Tests in ras test suite
240 */
241extern CU_TestInfo ras_tests[];
242
243
244/**
245 * Initialize syncobj timeline test suite
246 */
247int suite_syncobj_timeline_tests_init();
248
249/**
250 * Deinitialize syncobj timeline test suite
251 */
252int suite_syncobj_timeline_tests_clean();
253
254/**
255 * Decide if the suite is enabled by default or not.
256 */
257CU_BOOL suite_syncobj_timeline_tests_enable(void);
258
259/**
260 * Tests in syncobj timeline test suite
261 */
262extern CU_TestInfo syncobj_timeline_tests[];
263
264
265/**
266 * Initialize cp dma test suite
267 */
268int suite_cp_dma_tests_init();
269
270/**
271 * Deinitialize cp dma test suite
272 */
273int suite_cp_dma_tests_clean();
274
275/**
276 * Decide if the suite is enabled by default or not.
277 */
278CU_BOOL suite_cp_dma_tests_enable(void);
279
280/**
281 * Tests in cp dma test suite
282 */
283extern CU_TestInfo cp_dma_tests[];
284
285void amdgpu_dispatch_hang_helper(amdgpu_device_handle device_handle, uint32_t ip_type);
286void amdgpu_dispatch_hang_slow_helper(amdgpu_device_handle device_handle, uint32_t ip_type);
287void amdgpu_memcpy_draw_test(amdgpu_device_handle device_handle, uint32_t ring,
288			     int version, int hang);
289void amdgpu_memcpy_draw_hang_slow_test(amdgpu_device_handle device_handle, uint32_t ring, int version);
290
291/**
292 * Initialize security test suite
293 */
294int suite_security_tests_init();
295
296/**
297 * Deinitialize security test suite
298 */
299int suite_security_tests_clean();
300
301/**
302 * Decide if the suite is enabled by default or not.
303 */
304CU_BOOL suite_security_tests_enable(void);
305
306/**
307 * Tests in security test suite
308 */
309extern CU_TestInfo security_tests[];
310
311extern void
312amdgpu_command_submission_write_linear_helper_with_secure(amdgpu_device_handle
313							  device,
314							  unsigned ip_type,
315							  bool secure);
316
317
318
319/**
320 * Initialize hotunplug test suite
321 */
322int suite_hotunplug_tests_init();
323
324/**
325 * Deinitialize hotunplug test suite
326 */
327int suite_hotunplug_tests_clean();
328
329/**
330 * Decide if the suite is enabled by default or not.
331 */
332CU_BOOL suite_hotunplug_tests_enable(void);
333
334/**
335 * Tests in uvd enc test suite
336 */
337extern CU_TestInfo hotunplug_tests[];
338
339
340/**
341 * Helper functions
342 */
343static inline amdgpu_bo_handle gpu_mem_alloc(
344					amdgpu_device_handle device_handle,
345					uint64_t size,
346					uint64_t alignment,
347					uint32_t type,
348					uint64_t flags,
349					uint64_t *vmc_addr,
350					amdgpu_va_handle *va_handle)
351{
352	struct amdgpu_bo_alloc_request req = {0};
353	amdgpu_bo_handle buf_handle = NULL;
354	int r;
355
356	req.alloc_size = size;
357	req.phys_alignment = alignment;
358	req.preferred_heap = type;
359	req.flags = flags;
360
361	r = amdgpu_bo_alloc(device_handle, &req, &buf_handle);
362	CU_ASSERT_EQUAL(r, 0);
363	if (r)
364		return NULL;
365
366	if (vmc_addr && va_handle) {
367		r = amdgpu_va_range_alloc(device_handle,
368					  amdgpu_gpu_va_range_general,
369					  size, alignment, 0, vmc_addr,
370					  va_handle, 0);
371		CU_ASSERT_EQUAL(r, 0);
372		if (r)
373			goto error_free_bo;
374
375		r = amdgpu_bo_va_op(buf_handle, 0, size, *vmc_addr, 0,
376				    AMDGPU_VA_OP_MAP);
377		CU_ASSERT_EQUAL(r, 0);
378		if (r)
379			goto error_free_va;
380	}
381
382	return buf_handle;
383
384error_free_va:
385	r = amdgpu_va_range_free(*va_handle);
386	CU_ASSERT_EQUAL(r, 0);
387
388error_free_bo:
389	r = amdgpu_bo_free(buf_handle);
390	CU_ASSERT_EQUAL(r, 0);
391
392	return NULL;
393}
394
395static inline int gpu_mem_free(amdgpu_bo_handle bo,
396			       amdgpu_va_handle va_handle,
397			       uint64_t vmc_addr,
398			       uint64_t size)
399{
400	int r;
401
402	if (!bo)
403		return 0;
404
405	if (va_handle) {
406		r = amdgpu_bo_va_op(bo, 0, size, vmc_addr, 0,
407				    AMDGPU_VA_OP_UNMAP);
408		CU_ASSERT_EQUAL(r, 0);
409		if (r)
410			return r;
411
412		r = amdgpu_va_range_free(va_handle);
413		CU_ASSERT_EQUAL(r, 0);
414		if (r)
415			return r;
416	}
417
418	r = amdgpu_bo_free(bo);
419	CU_ASSERT_EQUAL(r, 0);
420
421	return r;
422}
423
424static inline int
425amdgpu_bo_alloc_wrap(amdgpu_device_handle dev, unsigned size,
426		     unsigned alignment, unsigned heap, uint64_t flags,
427		     amdgpu_bo_handle *bo)
428{
429	struct amdgpu_bo_alloc_request request = {};
430	amdgpu_bo_handle buf_handle;
431	int r;
432
433	request.alloc_size = size;
434	request.phys_alignment = alignment;
435	request.preferred_heap = heap;
436	request.flags = flags;
437
438	r = amdgpu_bo_alloc(dev, &request, &buf_handle);
439	if (r)
440		return r;
441
442	*bo = buf_handle;
443
444	return 0;
445}
446
447int amdgpu_bo_alloc_and_map_raw(amdgpu_device_handle dev, unsigned size,
448			unsigned alignment, unsigned heap, uint64_t alloc_flags,
449			uint64_t mapping_flags, amdgpu_bo_handle *bo, void **cpu,
450			uint64_t *mc_address,
451			amdgpu_va_handle *va_handle);
452
453static inline int
454amdgpu_bo_alloc_and_map(amdgpu_device_handle dev, unsigned size,
455			unsigned alignment, unsigned heap, uint64_t alloc_flags,
456			amdgpu_bo_handle *bo, void **cpu, uint64_t *mc_address,
457			amdgpu_va_handle *va_handle)
458{
459	return amdgpu_bo_alloc_and_map_raw(dev, size, alignment, heap,
460					alloc_flags, 0, bo, cpu, mc_address, va_handle);
461}
462
463static inline int
464amdgpu_bo_unmap_and_free(amdgpu_bo_handle bo, amdgpu_va_handle va_handle,
465			 uint64_t mc_addr, uint64_t size)
466{
467	amdgpu_bo_cpu_unmap(bo);
468	amdgpu_bo_va_op(bo, 0, size, mc_addr, 0, AMDGPU_VA_OP_UNMAP);
469	amdgpu_va_range_free(va_handle);
470	amdgpu_bo_free(bo);
471
472	return 0;
473
474}
475
476static inline int
477amdgpu_get_bo_list(amdgpu_device_handle dev, amdgpu_bo_handle bo1,
478		   amdgpu_bo_handle bo2, amdgpu_bo_list_handle *list)
479{
480	amdgpu_bo_handle resources[] = {bo1, bo2};
481
482	return amdgpu_bo_list_create(dev, bo2 ? 2 : 1, resources, NULL, list);
483}
484
485
486static inline CU_ErrorCode amdgpu_set_suite_active(const char *suite_name,
487							  CU_BOOL active)
488{
489	CU_ErrorCode r = CU_set_suite_active(CU_get_suite(suite_name), active);
490
491	if (r != CUE_SUCCESS)
492		fprintf(stderr, "Failed to obtain suite %s\n", suite_name);
493
494	return r;
495}
496
497static inline CU_ErrorCode amdgpu_set_test_active(const char *suite_name,
498				  const char *test_name, CU_BOOL active)
499{
500	CU_ErrorCode r;
501	CU_pSuite pSuite = CU_get_suite(suite_name);
502
503	if (!pSuite) {
504		fprintf(stderr, "Failed to obtain suite %s\n",
505				suite_name);
506		return CUE_NOSUITE;
507	}
508
509	r = CU_set_test_active(CU_get_test(pSuite, test_name), active);
510	if (r != CUE_SUCCESS)
511		fprintf(stderr, "Failed to obtain test %s\n", test_name);
512
513	return r;
514}
515
516
517static inline bool asic_is_gfx_pipe_removed(uint32_t family_id, uint32_t chip_id, uint32_t chip_rev)
518{
519
520	if (family_id != AMDGPU_FAMILY_AI)
521	return false;
522
523	switch (chip_id - chip_rev) {
524	/* Arcturus */
525	case 0x32:
526	/* Aldebaran */
527	case 0x3c:
528		return true;
529	default:
530		return false;
531	}
532}
533
534void amdgpu_test_exec_cs_helper_raw(amdgpu_device_handle device_handle,
535				    amdgpu_context_handle context_handle,
536				    unsigned ip_type, int instance, int pm4_dw,
537				    uint32_t *pm4_src, int res_cnt,
538				    amdgpu_bo_handle *resources,
539				    struct amdgpu_cs_ib_info *ib_info,
540				    struct amdgpu_cs_request *ibs_request,
541				    bool secure);
542
543void amdgpu_close_devices();
544int amdgpu_open_device_on_test_index(int render_node);
545char *amdgpu_get_device_from_fd(int fd);
546
547#endif  /* #ifdef _AMDGPU_TEST_H_ */
548